2#ifndef PEDIGREE_PC_PCI_MESSAGE_INTERRUPTS_H
3#define PEDIGREE_PC_PCI_MESSAGE_INTERRUPTS_H
9#include "pedigree/kernel/Spinlock.h"
10#include "pedigree/kernel/machine/IrqHandlerRegistry.h"
11#include "pedigree/kernel/machine/ThreadedIrqDispatcher.h"
12#include "pedigree/kernel/process/Mutex.h"
13#include "pedigree/kernel/processor/InterruptHandler.h"
23 static constexpr uint8_t FirstVector = 0x40;
24 static constexpr uint8_t VectorCount = 64;
26 PciMessageInterrupts();
29 bool initialiseThreaded();
30 bool shutdownThreaded();
31 irq_id_t registerThreaded(
Device* device,
IrqHandler* handler,
bool& fallbackSafe);
32 bool registerThreadedVectors(
Device* device,
IrqHandler*
const* handlers,
size_t count,
33 irq_id_t* ids,
bool& fallbackSafe,
34 const size_t* processors =
nullptr);
37 void enable(irq_id_t
id,
bool enabled);
39 static bool contains(irq_id_t
id) {
40 return id >= FirstVector &&
id < FirstVector + VectorCount;
44 enum class Mode : uint8_t { None, Threaded, Hard };
48 Mode mode = Mode::None;
53 bool workerPrepared =
false;
54 bool reusable =
false;
55 bool spuriousSafe =
false;
57 bool removing =
false;
58 bool deferred =
false;
60 uint8_t msixIndex = 0;
61 uint8_t unhandled = 0;
64 static size_t advanceCookie(Line& line) {
71 irq_id_t registerHandler(
Device* device,
IrqHandlerBase* handler, Mode mode,
bool& fallbackSafe);
72 bool disableSource(
Device* device,
bool msix, uint8_t msixIndex);
73 void quarantine(uint8_t slot,
size_t expectedCookie = 0);
74 void interrupt(
size_t interruptNumber, InterruptState& state)
override;
75 static void dispatchThreaded(
void* context, uint8_t slot,
size_t cookie);
77 Mutex m_RegistrationLock;
81 Line m_Lines[VectorCount];
82 uint8_t m_DestinationApicId;
Abstract base class for interrupt-handlers.