The Pedigree Project  0.1
nv10reg.h
1 /*
2  * Copyright (c) 2008-2014, Pedigree Developers
3  *
4  * Please see the CONTRIB file in the root of the source tree for a full
5  * list of contributors.
6  *
7  * Permission to use, copy, modify, and distribute this software for any
8  * purpose with or without fee is hereby granted, provided that the above
9  * copyright notice and this permission notice appear in all copies.
10  *
11  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18  */
19 
20 /*
21  * nv10reg.h -- nVidia constants
22  *
23  * This file has been generated and partly adjusted.
24  *
25  */
26 
27 #ifndef __NV10REG_H__
28 #define __NV10REG_H__ 1
29 
30 /* NV-Device NV_MEMORY */
31 #define NV_MEMORY 0x00000000 /* size: 0xFFFFFFFF */
32 
33 /* NV-Device NV_IO */
34 #define NV_IO 0x00000000 /* size: 0xFFFFFFFF */
35 
36 /* NV-Device NV_CONFIG */
37 #define NV_CONFIG 0x00000000 /* size: 0x000000FF */
38 
39 /* NV-Device NV_EXPROM */
40 #define NV_EXPROM 0x00000000 /* size: 0x0000FFFF */
41 
42 /* NV-Device NV_SPACE */
43 #define NV_SPACE 0x00000000 /* size: 0x01FFFFFF */
44 
45 /* NV-Device NV_RSPACE */
46 #define NV_RSPACE 0x00000000 /* size: 0x00FFFFFF */
47 
48 /* NV-Device NV_MSPACE */
49 #define NV_MSPACE 0x00000000 /* size: 0x07FFFFFF */
50 
51 /* NV-Device NV_PBUS */
52 #define NV_PBUS 0x00001000 /* size: 0x00000FFF */
53 
54 /* NV-Register NV_PBUS_DEBUG_0 */
55 #define NV_PBUS_DEBUG_0 0x00001080
56 #define NV_PBUS_DEBUG_0_FBIO_SCLK_DELAY 0x0000000F
57 #define NV_PBUS_DEBUG_0_FBIO_SCLK_DELAY_8 0x00000008
58 #define NV_PBUS_DEBUG_0_FBIO_SCLK_PC 0x00000010
59 #define NV_PBUS_DEBUG_0_FBIO_SCLK_PC_NORMAL 0xFFFFFFEF
60 #define NV_PBUS_DEBUG_0_FBIO_SCLK_PC_OVERRIDE 0x00000010
61 #define NV_PBUS_DEBUG_0_FBIO_FBCLK_DELAY 0x00000F00
62 #define NV_PBUS_DEBUG_0_FBIO_FBCLK_DELAY_4 0x00000400
63 #define NV_PBUS_DEBUG_0_FBIO_FBCLK_DELAY_8 0x00000800
64 #define NV_PBUS_DEBUG_0_FBIO_FBCLK_PC 0x00001000
65 #define NV_PBUS_DEBUG_0_FBIO_FBCLK_PC_NORMAL 0xFFFFEFFF
66 #define NV_PBUS_DEBUG_0_FBIO_FBCLK_PC_OVERRIDE 0x00001000
67 #define NV_PBUS_DEBUG_0_FBIO_ACLK_DELAY 0x000F0000
68 #define NV_PBUS_DEBUG_0_FBIO_ACLK_DELAY_8 0x00080000
69 #define NV_PBUS_DEBUG_0_FBIO_ACLK_DELAY_10 0x000A0000
70 #define NV_PBUS_DEBUG_0_FBIO_ACLK_PC 0x00100000
71 #define NV_PBUS_DEBUG_0_FBIO_ACLK_PC_NORMAL 0xFFEFFFFF
72 #define NV_PBUS_DEBUG_0_FBIO_ACLK_PC_OVERRIDE 0x00100000
73 #define NV_PBUS_DEBUG_0_FBIO_RCLK_DELAY 0x0F000000
74 #define NV_PBUS_DEBUG_0_FBIO_RCLK_DELAY_8 0x08000000
75 #define NV_PBUS_DEBUG_0_FBIO_RCLK_DELAY_14 0x0E000000
76 #define NV_PBUS_DEBUG_0_FBIO_RCLK_PC 0x10000000
77 #define NV_PBUS_DEBUG_0_FBIO_RCLK_PC_NORMAL 0xEFFFFFFF
78 #define NV_PBUS_DEBUG_0_FBIO_RCLK_PC_OVERRIDE 0x10000000
79 
80 /* NV-Register NV_PBUS_DEBUG_1 */
81 #define NV_PBUS_DEBUG_1 0x00001084
82 #define NV_PBUS_DEBUG_1_PCIM_THROTTLE 0x00000001
83 #define NV_PBUS_DEBUG_1_PCIM_THROTTLE_DISABLED 0xFFFFFFFE
84 #define NV_PBUS_DEBUG_1_PCIM_THROTTLE_ENABLED 0x00000001
85 #define NV_PBUS_DEBUG_1_PCIM_CMD 0x00000002
86 #define NV_PBUS_DEBUG_1_PCIM_CMD_SIZE_BASED 0xFFFFFFFD
87 #define NV_PBUS_DEBUG_1_PCIM_CMD_MRL_ONLY 0x00000002
88 #define NV_PBUS_DEBUG_1_HASH_DECODE 0x00000004
89 #define NV_PBUS_DEBUG_1_HASH_DECODE_1FF 0xFFFFFFFB
90 #define NV_PBUS_DEBUG_1_HASH_DECODE_2FF 0x00000004
91 #define NV_PBUS_DEBUG_1_AGPM_CMD 0x00000018
92 #define NV_PBUS_DEBUG_1_AGPM_CMD_HP_ON_1ST 0x00000000
93 #define NV_PBUS_DEBUG_1_AGPM_CMD_LP_ONLY 0x00000008
94 #define NV_PBUS_DEBUG_1_AGPM_CMD_HP_ONLY 0x00000010
95 #define NV_PBUS_DEBUG_1_PCIS_WRITE 0x00000020
96 #define NV_PBUS_DEBUG_1_PCIS_WRITE_0_CYCLE 0xFFFFFFDF
97 #define NV_PBUS_DEBUG_1_PCIS_WRITE_1_CYCLE 0x00000020
98 #define NV_PBUS_DEBUG_1_PCIS_2_1 0x00000040
99 #define NV_PBUS_DEBUG_1_PCIS_2_1_DISABLED 0xFFFFFFBF
100 #define NV_PBUS_DEBUG_1_PCIS_2_1_ENABLED 0x00000040
101 #define NV_PBUS_DEBUG_1_SPARE0 0x00000080
102 #define NV_PBUS_DEBUG_1_SPARE0_ZERO 0xFFFFFF7F
103 #define NV_PBUS_DEBUG_1_SPARE0_ONE 0x00000080
104 #define NV_PBUS_DEBUG_1_PCIS_RD_BURST 0x00000100
105 #define NV_PBUS_DEBUG_1_PCIS_RD_BURST_DISABLED 0xFFFFFEFF
106 #define NV_PBUS_DEBUG_1_PCIS_RD_BURST_ENABLED 0x00000100
107 #define NV_PBUS_DEBUG_1_PCIS_WR_BURST 0x00000200
108 #define NV_PBUS_DEBUG_1_PCIS_WR_BURST_DISABLED 0xFFFFFDFF
109 #define NV_PBUS_DEBUG_1_PCIS_WR_BURST_ENABLED 0x00000200
110 #define NV_PBUS_DEBUG_1_PCIS_EARLY_RTY 0x00000400
111 #define NV_PBUS_DEBUG_1_PCIS_EARLY_RTY_DISABLED 0xFFFFFBFF
112 #define NV_PBUS_DEBUG_1_PCIS_EARLY_RTY_ENABLED 0x00000400
113 #define NV_PBUS_DEBUG_1_PCIS_CPUQ 0x00001000
114 #define NV_PBUS_DEBUG_1_PCIS_CPUQ_DISABLED 0xFFFFEFFF
115 #define NV_PBUS_DEBUG_1_PCIS_CPUQ_ENABLED 0x00001000
116 #define NV_PBUS_DEBUG_1_DPSH_DECODE 0x00002000
117 #define NV_PBUS_DEBUG_1_DPSH_DECODE_NV4 0xFFFFDFFF
118 #define NV_PBUS_DEBUG_1_DPSH_DECODE_NV3 0x00002000
119 #define NV_PBUS_DEBUG_1_FBI_DIFFERENTIAL 0x00004000
120 #define NV_PBUS_DEBUG_1_FBI_DIFFERENTIAL_ENABLED 0xFFFFBFFF
121 #define NV_PBUS_DEBUG_1_FBI_DIFFERENTIAL_DISABLED 0x00004000
122 #define NV_PBUS_DEBUG_1_AGPFW_DWOD 0x00008000
123 #define NV_PBUS_DEBUG_1_AGPFW_DWOD_DISABLED 0xFFFF7FFF
124 #define NV_PBUS_DEBUG_1_AGPFW_DWOD_ENABLED 0x00008000
125 #define NV_PBUS_DEBUG_1_SPARE3 0x00010000
126 #define NV_PBUS_DEBUG_1_SPARE3_ZERO 0xFFFEFFFF
127 #define NV_PBUS_DEBUG_1_SPARE3_ONE 0x00010000
128 #define NV_PBUS_DEBUG_1_SPARE4 0x00020000
129 #define NV_PBUS_DEBUG_1_SPARE4_ZERO 0xFFFDFFFF
130 #define NV_PBUS_DEBUG_1_SPARE4_ONE 0x00020000
131 #define NV_PBUS_DEBUG_1_SPARE5 0x00040000
132 #define NV_PBUS_DEBUG_1_SPARE5_ZERO 0xFFFBFFFF
133 #define NV_PBUS_DEBUG_1_SPARE5_ONE 0x00040000
134 #define NV_PBUS_DEBUG_1_SPARE6 0x00080000
135 #define NV_PBUS_DEBUG_1_SPARE6_ZERO 0xFFF7FFFF
136 #define NV_PBUS_DEBUG_1_SPARE6_ONE 0x00080000
137 #define NV_PBUS_DEBUG_1_SPARE7 0x00100000
138 #define NV_PBUS_DEBUG_1_SPARE7_ZERO 0xFFEFFFFF
139 #define NV_PBUS_DEBUG_1_SPARE7_ONE 0x00100000
140 #define NV_PBUS_DEBUG_1_SPARE8 0x00200000
141 #define NV_PBUS_DEBUG_1_SPARE8_ZERO 0xFFDFFFFF
142 #define NV_PBUS_DEBUG_1_SPARE8_ONE 0x00200000
143 #define NV_PBUS_DEBUG_1_SPARE9 0x00400000
144 #define NV_PBUS_DEBUG_1_SPARE9_ZERO 0xFFBFFFFF
145 #define NV_PBUS_DEBUG_1_SPARE9_ONE 0x00400000
146 #define NV_PBUS_DEBUG_1_SPARE10 0x00800000
147 #define NV_PBUS_DEBUG_1_SPARE10_ZERO 0xFF7FFFFF
148 #define NV_PBUS_DEBUG_1_SPARE10_ONE 0x00800000
149 
150 /* NV-Register NV_PBUS_DEBUG_2 */
151 #define NV_PBUS_DEBUG_2 0x00001088
152 #define NV_PBUS_DEBUG_2_AGP_VREF 0x00000001
153 #define NV_PBUS_DEBUG_2_AGP_VREF_DISABLED 0xFFFFFFFE
154 #define NV_PBUS_DEBUG_2_AGP_VREF_ENABLED 0x00000001
155 #define NV_PBUS_DEBUG_2_AGP_SB_STB_DELAY 0x000003F0
156 #define NV_PBUS_DEBUG_2_AGP_SB_STB_DELAY_34 0x00000220
157 #define NV_PBUS_DEBUG_2_AGP_SB_STB_PC 0x00001000
158 #define NV_PBUS_DEBUG_2_AGP_SB_STB_PC_NORMAL 0xFFFFEFFF
159 #define NV_PBUS_DEBUG_2_AGP_SB_STB_PC_OVERRIDE 0x00001000
160 
161 /* NV-Register NV_PBUS_DEBUG_3 */
162 #define NV_PBUS_DEBUG_3 0x0000108C
163 #define NV_PBUS_DEBUG_3_AGP_MAX_SIZE 0x00000003
164 #define NV_PBUS_DEBUG_3_AGP_MAX_SIZE_UNLIMITED 0x00000000
165 #define NV_PBUS_DEBUG_3_AGP_MAX_SIZE_32_BYTES 0x00000001
166 #define NV_PBUS_DEBUG_3_AGP_MAX_SIZE_64_BYTES 0x00000002
167 #define NV_PBUS_DEBUG_3_AGP_4X_NVCLK 0x000000F0
168 #define NV_PBUS_DEBUG_3_AGP_4X_NVCLK_ABOVE_66MHZ 0x00000050
169 #define NV_PBUS_DEBUG_3_AGP_4X_NVCLK_ABOVE_73MHZ 0x00000060
170 #define NV_PBUS_DEBUG_3_AGP_4X_NVCLK_ABOVE_80MHZ 0x00000070
171 #define NV_PBUS_DEBUG_3_AGP_4X_NVCLK_ABOVE_87MHZ 0x00000080
172 #define NV_PBUS_DEBUG_3_AGP_4X_NVCLK_ABOVE_94MHZ 0x00000090
173 #define NV_PBUS_DEBUG_3_AGP_4X_NVCLK_ABOVE_100MHZ 0x000000A0
174 #define NV_PBUS_DEBUG_3_AGP_4X_NVCLK_ABOVE_106MHZ 0x000000B0
175 #define NV_PBUS_DEBUG_3_AGP_4X_NVCLK_ABOVE_113MHZ 0x000000C0
176 #define NV_PBUS_DEBUG_3_AGP_4X_NVCLK_ABOVE_120MHZ 0x000000D0
177 #define NV_PBUS_DEBUG_3_AGP_4X_NVCLK_ABOVE_126MHZ 0x000000E0
178 #define NV_PBUS_DEBUG_3_AGP_4X_NVCLK_ABOVE_133MHZ 0x000000F0
179 
180 /* NV-Register NV_PBUS_DEBUG_CTL */
181 #define NV_PBUS_DEBUG_CTL 0x00001090
182 #define NV_PBUS_DEBUG_CTL_MODE 0x00000001
183 #define NV_PBUS_DEBUG_CTL_MODE_DISABLED 0xFFFFFFFE
184 #define NV_PBUS_DEBUG_CTL_MODE_ENABLED 0x00000001
185 #define NV_PBUS_DEBUG_CTL_READ_SELECT 0x00000010
186 #define NV_PBUS_DEBUG_CTL_READ_SELECT_0 0xFFFFFFEF
187 #define NV_PBUS_DEBUG_CTL_READ_SELECT_1 0x00000010
188 
189 /* NV-Register NV_PBUS_DEBUG_READ */
190 #define NV_PBUS_DEBUG_READ 0x00001094
191 #define NV_PBUS_DEBUG_READ_DATA 0xFFFFFFFF
192 
193 /* NV-Register NV_PBUS_DEBUG_HOST */
194 #define NV_PBUS_DEBUG_HOST 0x0000109C
195 #define NV_PBUS_DEBUG_HOST_SEL 0x00000007
196 
197 /* NV-Register NV_PBUS_DEBUG_SEL_0 */
198 #define NV_PBUS_DEBUG_SEL_0 0x000010A0
199 #define NV_PBUS_DEBUG_SEL_0_X 0x00000007
200 
201 /* NV-Register NV_PBUS_DEBUG_SEL_1 */
202 #define NV_PBUS_DEBUG_SEL_1 0x000010A4
203 #define NV_PBUS_DEBUG_SEL_1_X 0x00000007
204 
205 /* NV-Register NV_PBUS_DEBUG_SEL_2 */
206 #define NV_PBUS_DEBUG_SEL_2 0x000010A8
207 #define NV_PBUS_DEBUG_SEL_2_X 0x00000007
208 
209 /* NV-Register NV_PBUS_DEBUG_SEL_3 */
210 #define NV_PBUS_DEBUG_SEL_3 0x000010AC
211 #define NV_PBUS_DEBUG_SEL_3_X 0x00000007
212 
213 /* NV-Register NV_PBUS_DEBUG_CTRIM_0 */
214 #define NV_PBUS_DEBUG_CTRIM_0 0x000010B0
215 #define NV_PBUS_DEBUG_CTRIM_0_NV_NE_DELAY 0x0000000F
216 #define NV_PBUS_DEBUG_CTRIM_0_NV_NE_DELAY_8 0x00000008
217 #define NV_PBUS_DEBUG_CTRIM_0_NV_SE_DELAY 0x000000F0
218 #define NV_PBUS_DEBUG_CTRIM_0_NV_SE_DELAY_8 0x00000080
219 #define NV_PBUS_DEBUG_CTRIM_0_NV_NW_DELAY 0x00000F00
220 #define NV_PBUS_DEBUG_CTRIM_0_NV_NW_DELAY_8 0x00000800
221 #define NV_PBUS_DEBUG_CTRIM_0_NV_SW_DELAY 0x0000F000
222 #define NV_PBUS_DEBUG_CTRIM_0_NV_SW_DELAY_8 0x00008000
223 #define NV_PBUS_DEBUG_CTRIM_0_M_NW_DELAY 0x000F0000
224 #define NV_PBUS_DEBUG_CTRIM_0_M_NW_DELAY_8 0x00080000
225 #define NV_PBUS_DEBUG_CTRIM_0_M_SW_DELAY 0x00F00000
226 #define NV_PBUS_DEBUG_CTRIM_0_M_SW_DELAY_8 0x00800000
227 #define NV_PBUS_DEBUG_CTRIM_0_U_NW_DELAY 0x0F000000
228 #define NV_PBUS_DEBUG_CTRIM_0_U_NW_DELAY_8 0x08000000
229 #define NV_PBUS_DEBUG_CTRIM_0_U_SW_DELAY 0xF0000000
230 #define NV_PBUS_DEBUG_CTRIM_0_U_SW_DELAY_8 0x80000000
231 #define NV_PBUS_DEBUG_CTRIM_0_NV_NE_TRIM 0x0000000F
232 #define NV_PBUS_DEBUG_CTRIM_0_NV_NE_TRIM_8 0x00000008
233 #define NV_PBUS_DEBUG_CTRIM_0_NV_SE_TRIM 0x000000F0
234 #define NV_PBUS_DEBUG_CTRIM_0_NV_SE_TRIM_8 0x00000080
235 #define NV_PBUS_DEBUG_CTRIM_0_NV_NW_TRIM 0x00000F00
236 #define NV_PBUS_DEBUG_CTRIM_0_NV_NW_TRIM_8 0x00000800
237 #define NV_PBUS_DEBUG_CTRIM_0_NV_SW_TRIM 0x0000F000
238 #define NV_PBUS_DEBUG_CTRIM_0_NV_SW_TRIM_8 0x00008000
239 #define NV_PBUS_DEBUG_CTRIM_0_M_NW_TRIM 0x000F0000
240 #define NV_PBUS_DEBUG_CTRIM_0_M_NW_TRIM_8 0x00080000
241 #define NV_PBUS_DEBUG_CTRIM_0_M_SW_TRIM 0x00F00000
242 #define NV_PBUS_DEBUG_CTRIM_0_M_SW_TRIM_8 0x00800000
243 #define NV_PBUS_DEBUG_CTRIM_0_NV_NC_TRIM 0x0F000000
244 #define NV_PBUS_DEBUG_CTRIM_0_NV_NC_TRIM_8 0x08000000
245 #define NV_PBUS_DEBUG_CTRIM_0_NV_SC_TRIM 0xF0000000
246 #define NV_PBUS_DEBUG_CTRIM_0_NV_SC_TRIM_8 0x80000000
247 
248 /* NV-Register NV_PBUS_DEBUG_CTRIM_1 */
249 #define NV_PBUS_DEBUG_CTRIM_1 0x000010B4
250 #define NV_PBUS_DEBUG_CTRIM_1_C0_DELAY 0x0000000F
251 #define NV_PBUS_DEBUG_CTRIM_1_C0_DELAY_0 0x00000000
252 #define NV_PBUS_DEBUG_CTRIM_1_C1_DELAY 0x000000F0
253 #define NV_PBUS_DEBUG_CTRIM_1_C1_DELAY_0 0x00000000
254 #define NV_PBUS_DEBUG_CTRIM_1_C2_DELAY 0x00000F00
255 #define NV_PBUS_DEBUG_CTRIM_1_C2_DELAY_0 0x00000000
256 #define NV_PBUS_DEBUG_CTRIM_1_C3_DELAY 0x0000F000
257 #define NV_PBUS_DEBUG_CTRIM_1_C3_DELAY_0 0x00000000
258 #define NV_PBUS_DEBUG_CTRIM_1_C4_DELAY 0x000F0000
259 #define NV_PBUS_DEBUG_CTRIM_1_C4_DELAY_0 0x00000000
260 #define NV_PBUS_DEBUG_CTRIM_1_C5_DELAY 0x00F00000
261 #define NV_PBUS_DEBUG_CTRIM_1_C5_DELAY_0 0x00000000
262 #define NV_PBUS_DEBUG_CTRIM_1_C6_DELAY 0x0F000000
263 #define NV_PBUS_DEBUG_CTRIM_1_C6_DELAY_0 0x00000000
264 #define NV_PBUS_DEBUG_CTRIM_1_C7_DELAY 0xF0000000
265 #define NV_PBUS_DEBUG_CTRIM_1_C7_DELAY_0 0x00000000
266 #define NV_PBUS_DEBUG_CTRIM_1_M_SHAPE 0x0000000F
267 #define NV_PBUS_DEBUG_CTRIM_1_M_SHAPE_0 0x00000000
268 #define NV_PBUS_DEBUG_CTRIM_1_N_SHAPE 0x000000F0
269 #define NV_PBUS_DEBUG_CTRIM_1_N_SHAPE_0 0x00000000
270 #define NV_PBUS_DEBUG_CTRIM_1_P_SHAPE 0x00000F00
271 #define NV_PBUS_DEBUG_CTRIM_1_P_SHAPE_0 0x00000000
272 #define NV_PBUS_DEBUG_CTRIM_1_SPARE0 0x0000F000
273 #define NV_PBUS_DEBUG_CTRIM_1_SPARE0_0 0x00000000
274 #define NV_PBUS_DEBUG_CTRIM_1_FP_SHAPE 0x000F0000
275 #define NV_PBUS_DEBUG_CTRIM_1_FP_SHAPE_0 0x00000000
276 #define NV_PBUS_DEBUG_CTRIM_1_FPDP_SHAPE 0x00F00000
277 #define NV_PBUS_DEBUG_CTRIM_1_FPDP_SHAPE_0 0x00000000
278 #define NV_PBUS_DEBUG_CTRIM_1_FPIO_SHAPE 0x0F000000
279 #define NV_PBUS_DEBUG_CTRIM_1_FPIO_SHAPE_00x00000000
280 #define NV_PBUS_DEBUG_CTRIM_1_SPARE1 0xF0000000
281 #define NV_PBUS_DEBUG_CTRIM_1_SPARE1_0 0x00000000
282 
283 /* NV-Register NV_PBUS_DEBUG_CTRIM_2 */
284 #define NV_PBUS_DEBUG_CTRIM_2 0x000010B8
285 #define NV_PBUS_DEBUG_CTRIM_2_C0_DELAY 0x0000000F
286 #define NV_PBUS_DEBUG_CTRIM_2_C0_DELAY_0 0x00000000
287 #define NV_PBUS_DEBUG_CTRIM_2_C1_DELAY 0x000000F0
288 #define NV_PBUS_DEBUG_CTRIM_2_C1_DELAY_0 0x00000000
289 #define NV_PBUS_DEBUG_CTRIM_2_C2_DELAY 0x00000F00
290 #define NV_PBUS_DEBUG_CTRIM_2_C2_DELAY_0 0x00000000
291 #define NV_PBUS_DEBUG_CTRIM_2_C3_DELAY 0x0000F000
292 #define NV_PBUS_DEBUG_CTRIM_2_C3_DELAY_0 0x00000000
293 #define NV_PBUS_DEBUG_CTRIM_2_C4_DELAY 0x000F0000
294 #define NV_PBUS_DEBUG_CTRIM_2_C4_DELAY_0 0x00000000
295 #define NV_PBUS_DEBUG_CTRIM_2_C5_DELAY 0x00F00000
296 #define NV_PBUS_DEBUG_CTRIM_2_C5_DELAY_0 0x00000000
297 #define NV_PBUS_DEBUG_CTRIM_2_C6_DELAY 0x0F000000
298 #define NV_PBUS_DEBUG_CTRIM_2_C6_DELAY_0 0x00000000
299 #define NV_PBUS_DEBUG_CTRIM_2_C7_DELAY 0xF0000000
300 #define NV_PBUS_DEBUG_CTRIM_2_C7_DELAY_0 0x00000000
301 #define NV_PBUS_DEBUG_CTRIM_2_M2I_0_SHAPE 0x0000000F
302 #define NV_PBUS_DEBUG_CTRIM_2_M2I_0_SHAPE_0 0x00000000
303 #define NV_PBUS_DEBUG_CTRIM_2_M2I_1_SHAPE 0x000000F0
304 #define NV_PBUS_DEBUG_CTRIM_2_M2I_1_SHAPE_0 0x00000000
305 #define NV_PBUS_DEBUG_CTRIM_2_M2I_2_SHAPE 0x00000F00
306 #define NV_PBUS_DEBUG_CTRIM_2_M2I_2_SHAPE_0 0x00000000
307 #define NV_PBUS_DEBUG_CTRIM_2_M2I_3_SHAPE 0x0000F000
308 #define NV_PBUS_DEBUG_CTRIM_2_M2I_3_SHAPE_0 0x00000000
309 #define NV_PBUS_DEBUG_CTRIM_2_M2O_0_SHAPE 0x000F0000
310 #define NV_PBUS_DEBUG_CTRIM_2_M2O_0_SHAPE_0 0x00000000
311 #define NV_PBUS_DEBUG_CTRIM_2_M2O_1_SHAPE 0x00F00000
312 #define NV_PBUS_DEBUG_CTRIM_2_M2O_1_SHAPE_0 0x00000000
313 #define NV_PBUS_DEBUG_CTRIM_2_M2O_2_SHAPE 0x0F000000
314 #define NV_PBUS_DEBUG_CTRIM_2_M2O_2_SHAPE_0 0x00000000
315 #define NV_PBUS_DEBUG_CTRIM_2_M2O_3_SHAPE 0xF0000000
316 #define NV_PBUS_DEBUG_CTRIM_2_M2O_3_SHAPE_0 0x00000000
317 
318 /* NV-Register NV_PBUS_DEBUG_CTRIM_3 */
319 #define NV_PBUS_DEBUG_CTRIM_3 0x000010BC
320 #define NV_PBUS_DEBUG_CTRIM_3_C0_DELAY 0x0000000F
321 #define NV_PBUS_DEBUG_CTRIM_3_C0_DELAY_8 0x00000008
322 #define NV_PBUS_DEBUG_CTRIM_3_C1_DELAY 0x000000F0
323 #define NV_PBUS_DEBUG_CTRIM_3_C1_DELAY_8 0x00000080
324 #define NV_PBUS_DEBUG_CTRIM_3_C2_DELAY 0x00000F00
325 #define NV_PBUS_DEBUG_CTRIM_3_C2_DELAY_8 0x00000800
326 #define NV_PBUS_DEBUG_CTRIM_3_C3_DELAY 0x0000F000
327 #define NV_PBUS_DEBUG_CTRIM_3_C3_DELAY_8 0x00008000
328 #define NV_PBUS_DEBUG_CTRIM_3_C4_DELAY 0x000F0000
329 #define NV_PBUS_DEBUG_CTRIM_3_C4_DELAY_8 0x00080000
330 #define NV_PBUS_DEBUG_CTRIM_3_C5_DELAY 0x00F00000
331 #define NV_PBUS_DEBUG_CTRIM_3_C5_DELAY_8 0x00800000
332 #define NV_PBUS_DEBUG_CTRIM_3_C6_DELAY 0x0F000000
333 #define NV_PBUS_DEBUG_CTRIM_3_C6_DELAY_F 0x0F000000
334 #define NV_PBUS_DEBUG_CTRIM_3_C7_DELAY 0xF0000000
335 #define NV_PBUS_DEBUG_CTRIM_3_C7_DELAY_F 0xF0000000
336 #define NV_PBUS_DEBUG_CTRIM_3_CCIR_CLK_OUT_TRIM 0x0000000F
337 #define NV_PBUS_DEBUG_CTRIM_3_CCIR_CLK_OUT_TRIM_8 0x00000008
338 #define NV_PBUS_DEBUG_CTRIM_3_PCLK_TRIM 0x000000F0
339 #define NV_PBUS_DEBUG_CTRIM_3_PCLK_TRIM_8 0x00000080
340 #define NV_PBUS_DEBUG_CTRIM_3_VCLK_TRIM 0x00000F00
341 #define NV_PBUS_DEBUG_CTRIM_3_VCLK_TRIM_8 0x00000800
342 #define NV_PBUS_DEBUG_CTRIM_3_VSCLK_TRIM 0x0000F000
343 #define NV_PBUS_DEBUG_CTRIM_3_VSCLK_TRIM_8 0x00008000
344 #define NV_PBUS_DEBUG_CTRIM_3_FPCLK_TRIM 0x000F0000
345 #define NV_PBUS_DEBUG_CTRIM_3_FPCLK_TRIM_8 0x00080000
346 #define NV_PBUS_DEBUG_CTRIM_3_FPDPCLK_TRIM 0x00F00000
347 #define NV_PBUS_DEBUG_CTRIM_3_FPDPCLK_TRIM_8 0x00800000
348 #define NV_PBUS_DEBUG_CTRIM_3_BYPASS_NVCLK 0x01000000
349 #define NV_PBUS_DEBUG_CTRIM_3_BYPASS_NVCLK_ENABLE 0x01000000
350 #define NV_PBUS_DEBUG_CTRIM_3_BYPASS_MCLK 0x02000000
351 #define NV_PBUS_DEBUG_CTRIM_3_BYPASS_MCLK_ENABLE 0x02000000
352 #define NV_PBUS_DEBUG_CTRIM_3_BYPASS_CLK4X 0x04000000
353 #define NV_PBUS_DEBUG_CTRIM_3_BYPASS_CLK4X_ENABLE 0x04000000
354 #define NV_PBUS_DEBUG_CTRIM_3_BYPASS_CCIR_O 0x08000000
355 #define NV_PBUS_DEBUG_CTRIM_3_BYPASS_CCIR_O_ENABLE 0x08000000
356 #define NV_PBUS_DEBUG_CTRIM_3_BYPASS_VIP_HCLK 0x10000000
357 #define NV_PBUS_DEBUG_CTRIM_3_BYPASS_VIP_HCLK_ENABLE 0x10000000
358 #define NV_PBUS_DEBUG_CTRIM_3_BYPASS_VCLK2 0x20000000
359 #define NV_PBUS_DEBUG_CTRIM_3_BYPASS_VCLK2_ENABLE 0x20000000
360 #define NV_PBUS_DEBUG_CTRIM_3_BYPASS_PCLK 0x40000000
361 #define NV_PBUS_DEBUG_CTRIM_3_BYPASS_PCLK_ENABLE 0x40000000
362 #define NV_PBUS_DEBUG_CTRIM_3_BYPASS_CCIR2 0x80000000
363 #define NV_PBUS_DEBUG_CTRIM_3_BYPASS_CCIR2_ENABLE 0x80000000
364 
365 /* NV-Register NV_PBUS_DEBUG_CTRIM_4 */
366 #define NV_PBUS_DEBUG_CTRIM_4 0x000010C4
367 #define NV_PBUS_DEBUG_CTRIM_4_C0_DELAY 0x0000000F
368 #define NV_PBUS_DEBUG_CTRIM_4_C0_DELAY_8 0x00000008
369 #define NV_PBUS_DEBUG_CTRIM_4_C1_DELAY 0x000000F0
370 #define NV_PBUS_DEBUG_CTRIM_4_C1_DELAY_8 0x00000080
371 #define NV_PBUS_DEBUG_CTRIM_4_C2_DELAY 0x00000F00
372 #define NV_PBUS_DEBUG_CTRIM_4_C2_DELAY_8 0x00000800
373 #define NV_PBUS_DEBUG_CTRIM_4_C3_DELAY 0x0000F000
374 #define NV_PBUS_DEBUG_CTRIM_4_C3_DELAY_8 0x00008000
375 #define NV_PBUS_DEBUG_CTRIM_4_C4_DELAY 0x000F0000
376 #define NV_PBUS_DEBUG_CTRIM_4_C4_DELAY_8 0x00080000
377 #define NV_PBUS_DEBUG_CTRIM_4_C5_DELAY 0x00F00000
378 #define NV_PBUS_DEBUG_CTRIM_4_C5_DELAY_8 0x00800000
379 #define NV_PBUS_DEBUG_CTRIM_4_C6_DELAY 0x0F000000
380 #define NV_PBUS_DEBUG_CTRIM_4_C6_DELAY_8 0x08000000
381 #define NV_PBUS_DEBUG_CTRIM_4_C7_DELAY 0xF0000000
382 #define NV_PBUS_DEBUG_CTRIM_4_C7_DELAY_8 0x80000000
383 #define NV_PBUS_DEBUG_CTRIM_4_M2I_0_TRIM 0x0000000F
384 #define NV_PBUS_DEBUG_CTRIM_4_M2I_0_TRIM_8 0x00000008
385 #define NV_PBUS_DEBUG_CTRIM_4_M2I_1_TRIM 0x000000F0
386 #define NV_PBUS_DEBUG_CTRIM_4_M2I_1_TRIM_8 0x00000080
387 #define NV_PBUS_DEBUG_CTRIM_4_M2I_2_TRIM 0x00000F00
388 #define NV_PBUS_DEBUG_CTRIM_4_M2I_2_TRIM_8 0x00000800
389 #define NV_PBUS_DEBUG_CTRIM_4_M2I_3_TRIM 0x0000F000
390 #define NV_PBUS_DEBUG_CTRIM_4_M2I_3_TRIM_8 0x00008000
391 #define NV_PBUS_DEBUG_CTRIM_4_M2O_0_TRIM 0x000F0000
392 #define NV_PBUS_DEBUG_CTRIM_4_M2O_0_TRIM_8 0x00080000
393 #define NV_PBUS_DEBUG_CTRIM_4_M2O_1_TRIM 0x00F00000
394 #define NV_PBUS_DEBUG_CTRIM_4_M2O_1_TRIM_8 0x00800000
395 #define NV_PBUS_DEBUG_CTRIM_4_M2O_2_TRIM 0x0F000000
396 #define NV_PBUS_DEBUG_CTRIM_4_M2O_2_TRIM_8 0x08000000
397 #define NV_PBUS_DEBUG_CTRIM_4_M2O_3_TRIM 0xF0000000
398 #define NV_PBUS_DEBUG_CTRIM_4_M2O_3_TRIM_8 0x80000000
399 
400 /* NV-Register NV_PBUS_DEBUG_CTRIM_5 */
401 #define NV_PBUS_DEBUG_CTRIM_5 0x000010C8
402 #define NV_PBUS_DEBUG_CTRIM_5_C0_DELAY 0x0000000F
403 #define NV_PBUS_DEBUG_CTRIM_5_C0_DELAY_8 0x00000008
404 #define NV_PBUS_DEBUG_CTRIM_5_C1_DELAY 0x000000F0
405 #define NV_PBUS_DEBUG_CTRIM_5_C1_DELAY_8 0x00000080
406 #define NV_PBUS_DEBUG_CTRIM_5_C2_DELAY 0x00000F00
407 #define NV_PBUS_DEBUG_CTRIM_5_C2_DELAY_8 0x00000800
408 #define NV_PBUS_DEBUG_CTRIM_5_C3_DELAY 0x0000F000
409 #define NV_PBUS_DEBUG_CTRIM_5_C3_DELAY_8 0x00008000
410 #define NV_PBUS_DEBUG_CTRIM_5_C4_DELAY 0x000F0000
411 #define NV_PBUS_DEBUG_CTRIM_5_C4_DELAY_0 0x00000000
412 #define NV_PBUS_DEBUG_CTRIM_5_C5_DELAY 0x00F00000
413 #define NV_PBUS_DEBUG_CTRIM_5_C5_DELAY_0 0x00000000
414 #define NV_PBUS_DEBUG_CTRIM_5_C6_DELAY 0x0F000000
415 #define NV_PBUS_DEBUG_CTRIM_5_C6_DELAY_0 0x00000000
416 #define NV_PBUS_DEBUG_CTRIM_5_C7_DELAY 0xF0000000
417 #define NV_PBUS_DEBUG_CTRIM_5_C7_DELAY_0 0x00000000
418 #define NV_PBUS_DEBUG_CTRIM_5_FPIOCLK_TRIM 0x0000000F
419 #define NV_PBUS_DEBUG_CTRIM_5_FPIOCLK_TRIM_8 0x00000008
420 #define NV_PBUS_DEBUG_CTRIM_5_SPARE0 0x000000F0
421 #define NV_PBUS_DEBUG_CTRIM_5_SPARE0_8 0x00000080
422 #define NV_PBUS_DEBUG_CTRIM_5_SPARE1 0x00000F00
423 #define NV_PBUS_DEBUG_CTRIM_5_SPARE1_8 0x00000800
424 #define NV_PBUS_DEBUG_CTRIM_5_SPARE2 0x0000F000
425 #define NV_PBUS_DEBUG_CTRIM_5_SPARE2_8 0x00008000
426 #define NV_PBUS_DEBUG_CTRIM_5_SPARE3 0x000F0000
427 #define NV_PBUS_DEBUG_CTRIM_5_SPARE3_0 0x00000000
428 #define NV_PBUS_DEBUG_CTRIM_5_SPARE4 0x00F00000
429 #define NV_PBUS_DEBUG_CTRIM_5_SPARE4_0 0x00000000
430 #define NV_PBUS_DEBUG_CTRIM_5_SPARE5 0x0F000000
431 #define NV_PBUS_DEBUG_CTRIM_5_SPARE5_0 0x00000000
432 #define NV_PBUS_DEBUG_CTRIM_5_M_DELAY 0xF0000000
433 #define NV_PBUS_DEBUG_CTRIM_5_M_DELAY_0 0x00000000
434 
435 /* NV-Register NV_PBUS_DEBUG_CTRIM_6 */
436 #define NV_PBUS_DEBUG_CTRIM_6 0x000010CC
437 #define NV_PBUS_DEBUG_CTRIM_6_C0_DELAY 0x0000000F
438 #define NV_PBUS_DEBUG_CTRIM_6_C0_DELAY_0 0x00000000
439 #define NV_PBUS_DEBUG_CTRIM_6_C1_DELAY 0x000000F0
440 #define NV_PBUS_DEBUG_CTRIM_6_C1_DELAY_0 0x00000000
441 #define NV_PBUS_DEBUG_CTRIM_6_C2_DELAY 0x00000F00
442 #define NV_PBUS_DEBUG_CTRIM_6_C2_DELAY_0 0x00000000
443 #define NV_PBUS_DEBUG_CTRIM_6_C3_DELAY 0x0000F000
444 #define NV_PBUS_DEBUG_CTRIM_6_C3_DELAY_0 0x00000000
445 #define NV_PBUS_DEBUG_CTRIM_6_C4_DELAY 0x000F0000
446 #define NV_PBUS_DEBUG_CTRIM_6_C4_DELAY_0 0x00000000
447 #define NV_PBUS_DEBUG_CTRIM_6_C5_DELAY 0x00F00000
448 #define NV_PBUS_DEBUG_CTRIM_6_C5_DELAY_0 0x00000000
449 #define NV_PBUS_DEBUG_CTRIM_6_C6_DELAY 0x0F000000
450 #define NV_PBUS_DEBUG_CTRIM_6_C6_DELAY_0 0x00000000
451 #define NV_PBUS_DEBUG_CTRIM_6_C7_DELAY 0xF0000000
452 #define NV_PBUS_DEBUG_CTRIM_6_C7_DELAY_0 0x00000000
453 #define NV_PBUS_DEBUG_CTRIM_6_FBIO_M2I_0_DELAY 0x0000000F
454 #define NV_PBUS_DEBUG_CTRIM_6_FBIO_M2I_0_DELAY_0 0x00000000
455 #define NV_PBUS_DEBUG_CTRIM_6_FBIO_M2I_1_DELAY 0x000000F0
456 #define NV_PBUS_DEBUG_CTRIM_6_FBIO_M2I_1_DELAY_0 0x00000000
457 #define NV_PBUS_DEBUG_CTRIM_6_FBIO_M2I_2_DELAY 0x00000F00
458 #define NV_PBUS_DEBUG_CTRIM_6_FBIO_M2I_2_DELAY_0 0x00000000
459 #define NV_PBUS_DEBUG_CTRIM_6_FBIO_M2I_3_DELAY 0x0000F000
460 #define NV_PBUS_DEBUG_CTRIM_6_FBIO_M2I_3_DELAY_0 0x00000000
461 #define NV_PBUS_DEBUG_CTRIM_6_FBIO_M2O_0_DELAY 0x000F0000
462 #define NV_PBUS_DEBUG_CTRIM_6_FBIO_M2O_0_DELAY_0 0x00000000
463 #define NV_PBUS_DEBUG_CTRIM_6_FBIO_M2O_1_DELAY 0x00F00000
464 #define NV_PBUS_DEBUG_CTRIM_6_FBIO_M2O_1_DELAY_0 0x00000000
465 #define NV_PBUS_DEBUG_CTRIM_6_FBIO_M2O_2_DELAY 0x0F000000
466 #define NV_PBUS_DEBUG_CTRIM_6_FBIO_M2O_2_DELAY_0 0x00000000
467 #define NV_PBUS_DEBUG_CTRIM_6_FBIO_M2O_3_DELAY 0xF0000000
468 #define NV_PBUS_DEBUG_CTRIM_6_FBIO_M2O_3_DELAY_0 0x00000000
469 
470 /* NV-Register NV_PBUS_DEBUG_AGPPLL */
471 #define NV_PBUS_DEBUG_AGPPLL 0x000010C0
472 #define NV_PBUS_DEBUG_AGPPLL_COEFF_MDIV 0x000000FF
473 #define NV_PBUS_DEBUG_AGPPLL_COEFF_MDIV_1 0x00000001
474 #define NV_PBUS_DEBUG_AGPPLL_COEFF_NDIV 0x0000FF00
475 #define NV_PBUS_DEBUG_AGPPLL_COEFF_NDIV_4 0x00000400
476 #define NV_PBUS_DEBUG_AGPPLL_SETUP 0x01FF0000
477 #define NV_PBUS_DEBUG_AGPPLL_SETUP_DEFAULT 0x011C0000
478 #define NV_PBUS_DEBUG_AGPPLL_PWRDWN 0x10000000
479 #define NV_PBUS_DEBUG_AGPPLL_PWRDWN_ON 0xEFFFFFFF
480 #define NV_PBUS_DEBUG_AGPPLL_PWRDWN_OFF 0x10000000
481 #define NV_PBUS_DEBUG_AGPPLL_STATUS 0x80000000
482 #define NV_PBUS_DEBUG_AGPPLL_STATUS_NOTLOCKED 0x7FFFFFFF
483 #define NV_PBUS_DEBUG_AGPPLL_STATUS_LOCKED 0x80000000
484 
485 /* NV-Register NV_PBUS_DEBUG_PORT */
486 #define NV_PBUS_DEBUG_PORT 0x000010D0
487 #define NV_PBUS_DEBUG_PORT_MODE 0x00000001
488 #define NV_PBUS_DEBUG_PORT_MODE_NORMAL 0xFFFFFFFE
489 #define NV_PBUS_DEBUG_PORT_MODE_AGP4X 0x00000001
490 
491 /* NV-Register NV_PBUS_DEBUG_PRIV_ASRC */
492 #define NV_PBUS_DEBUG_PRIV_ASRC 0x000010E0
493 #define NV_PBUS_DEBUG_PRIV_ASRC_BLAH 0xFFFFFFFF
494 #define NV_PBUS_DEBUG_PRIV_ASRC_BLAH_0 0x00000000
495 
496 /* NV-Register NV_PBUS_DEBUG_DUALHEAD_CTL */
497 #define NV_PBUS_DEBUG_DUALHEAD_CTL 0x000010F0
498 #define NV_PBUS_DEBUG_DUALHEAD_CTL_BLAH 0xFFFFFFFF
499 #define NV_PBUS_DEBUG_DUALHEAD_CTL_BLAH_0 0x00000000
500 
501 /* NV-Register NV_PBUS_INTR_0 */
502 #define NV_PBUS_INTR_0 0x00001100
503 #define NV_PBUS_INTR_0_PCI_BUS_ERROR 0x00000001
504 #define NV_PBUS_INTR_0_PCI_BUS_ERROR_NOT_PENDING 0xFFFFFFFE
505 #define NV_PBUS_INTR_0_PCI_BUS_ERROR_PENDING 0x00000001
506 #define NV_PBUS_INTR_0_PCI_BUS_ERROR_RESET 0x00000001
507 #define NV_PBUS_INTR_0_HOTPLUG 0x00000010
508 #define NV_PBUS_INTR_0_HOTPLUG_NOT_PENDING 0xFFFFFFEF
509 #define NV_PBUS_INTR_0_HOTPLUG_PENDING 0x00000010
510 #define NV_PBUS_INTR_0_HOTPLUG_RESET 0x00000010
511 
512 /* NV-Register NV_PBUS_INTR_EN_0 */
513 #define NV_PBUS_INTR_EN_0 0x00001140
514 #define NV_PBUS_INTR_EN_0_PCI_BUS_ERROR 0x00000001
515 #define NV_PBUS_INTR_EN_0_PCI_BUS_ERROR_DISABLED 0xFFFFFFFE
516 #define NV_PBUS_INTR_EN_0_PCI_BUS_ERROR_ENABLED 0x00000001
517 #define NV_PBUS_INTR_EN_0_HOTPLUG 0x00000010
518 #define NV_PBUS_INTR_EN_0_HOTPLUG_DISABLED 0xFFFFFFEF
519 #define NV_PBUS_INTR_EN_0_HOTPLUG_ENABLED 0x00000010
520 
521 /* NV-Register NV_PBUS_ROM_CONFIG */
522 #define NV_PBUS_ROM_CONFIG 0x00001200
523 #define NV_PBUS_ROM_CONFIG_TW1 0x0000003F
524 #define NV_PBUS_ROM_CONFIG_TW1_DEFAULT 0x0000000F
525 #define NV_PBUS_ROM_CONFIG_TW0 0x000000C0
526 #define NV_PBUS_ROM_CONFIG_TW0_DEFAULT 0x000000C0
527 
528 /* NV-Array NV_EXPROM_BIOS_ROM008 (1 byte access) */
529 #define NV_EXPROM_BIOS_ROM008 0x00000000
530 /* NV-Array size NV_EXPROM_BIOS_ROM008__SIZE_1 [0..65535] */
531 #define NV_EXPROM_BIOS_ROM008__SIZE_1 0x00010000
532 #define NV_EXPROM_BIOS_ROM008_VALUE 0x000000FF
533 
534 /* NV-Array NV_EXPROM_BIOS_ROM016 (2 byte access) */
535 #define NV_EXPROM_BIOS_ROM016 0x00000000
536 /* NV-Array size NV_EXPROM_BIOS_ROM016__SIZE_1 [0..32767] */
537 #define NV_EXPROM_BIOS_ROM016__SIZE_1 0x00008000
538 #define NV_EXPROM_BIOS_ROM016_VALUE 0x0000FFFF
539 
540 /* NV-Array NV_EXPROM_BIOS_ROM032 (4 byte access) */
541 #define NV_EXPROM_BIOS_ROM032 0x00000000
542 /* NV-Array size NV_EXPROM_BIOS_ROM032__SIZE_1 [0..16383] */
543 #define NV_EXPROM_BIOS_ROM032__SIZE_1 0x00004000
544 #define NV_EXPROM_BIOS_ROM032_VALUE 0xFFFFFFFF
545 
546 /* NV-Register NV_PRMIO_RMA_ID */
547 #define NV_PRMIO_RMA_ID 0x00007100
548 #define NV_PRMIO_RMA_ID_CODE 0xFFFFFFFF
549 #define NV_PRMIO_RMA_ID_CODE_VALID 0x2B16D065
550 
551 /* NV-Register NV_PRMIO_RMA_PTR */
552 #define NV_PRMIO_RMA_PTR 0x00007104
553 #define NV_PRMIO_RMA_PTR_SPACE 0x80000000
554 #define NV_PRMIO_RMA_PTR_SPACE_REGISTER 0x7FFFFFFF
555 #define NV_PRMIO_RMA_PTR_SPACE_MEMORY 0x80000000
556 #define NV_PRMIO_RMA_PTR_ADDRESS 0x07FFFFFC
557 #define NV_PRMIO_RMA_PTR_ADDRESS_0 0x00000000
558 
559 /* NV-Register NV_PRMIO_RMA_DATA */
560 #define NV_PRMIO_RMA_DATA 0x00007108
561 #define NV_PRMIO_RMA_DATA_PORT 0xFFFFFFFF
562 
563 /* NV-Register NV_PRMIO_RMA_DATA32 */
564 #define NV_PRMIO_RMA_DATA32 0x0000710C
565 #define NV_PRMIO_RMA_DATA32_BYTE2 0x00FF0000
566 #define NV_PRMIO_RMA_DATA32_BYTE1 0x0000FF00
567 #define NV_PRMIO_RMA_DATA32_BYTE0 0x000000FF
568 
569 /* NV-Register NV_PBUS_PCI_NV_0 */
570 #define NV_PBUS_PCI_NV_0 0x00001800
571 /* Alias NV_CONFIG_PCI_NV_0 */
572 /* Alias NV_CONFIG_PCI_NV_0 */
573 
574 /* NV-Register NV_CONFIG_PCI_NV_0 */
575 #define NV_CONFIG_PCI_NV_0 0x00000000
576 /* Alias NV_PBUS_PCI_NV_0 */
577 /* Alias NV_PBUS_PCI_NV_0 */
578 #define NV_PBUS_PCI_NV_0_VENDOR_ID 0x0000FFFF
579 #define NV_PBUS_PCI_NV_0_VENDOR_ID_NVIDIA_SGS 0x000012D2
580 #define NV_PBUS_PCI_NV_0_VENDOR_ID_NVIDIA 0x000010DE
581 #define NV_CONFIG_PCI_NV_0_DEVICE_ID 0xFFFF0000
582 #define NV_CONFIG_PCI_NV_0_DEVICE_ID_NV01_A 0x00090000
583 #define NV_CONFIG_PCI_NV_0_DEVICE_ID_NV01_B_B02_B03_C01 0x00080000
584 #define NV_CONFIG_PCI_NV_0_DEVICE_ID_NV02_A01 0x00100000
585 #define NV_CONFIG_PCI_NV_0_DEVICE_ID_NV03_NOACPI 0x00180000
586 #define NV_CONFIG_PCI_NV_0_DEVICE_ID_NV03_ACPI 0x00190000
587 #define NV_CONFIG_PCI_NV_0_DEVICE_ID_NV04 0x00200000
588 #define NV_CONFIG_PCI_NV_0_DEVICE_ID_NV05_DEVID0 0x00280000
589 #define NV_CONFIG_PCI_NV_0_DEVICE_ID_NV05_DEVID1 0x00290000
590 #define NV_CONFIG_PCI_NV_0_DEVICE_ID_NV05_DEVID2 0x002A0000
591 #define NV_CONFIG_PCI_NV_0_DEVICE_ID_NV05_DEVID3 0x002B0000
592 #define NV_CONFIG_PCI_NV_0_DEVICE_ID_NV06_DEVID0 0x002C0000
593 #define NV_CONFIG_PCI_NV_0_DEVICE_ID_NV06_DEVID1 0x002D0000
594 #define NV_CONFIG_PCI_NV_0_DEVICE_ID_NV06_DEVID2 0x002E0000
595 #define NV_CONFIG_PCI_NV_0_DEVICE_ID_NV06_DEVID3 0x002F0000
596 #define NV_CONFIG_PCI_NV_0_DEVICE_ID_NV0A_DEVID0 0x00A00000
597 #define NV_CONFIG_PCI_NV_0_DEVICE_ID_NV0A_DEVID1 0x00A10000
598 #define NV_CONFIG_PCI_NV_0_DEVICE_ID_NV0A_DEVID2 0x00A20000
599 #define NV_CONFIG_PCI_NV_0_DEVICE_ID_NV0A_DEVID3 0x00A30000
600 #define NV_CONFIG_PCI_NV_0_DEVICE_ID_NV10_DEVID0 0x01000000
601 #define NV_CONFIG_PCI_NV_0_DEVICE_ID_NV10_DEVID1 0x01010000
602 #define NV_CONFIG_PCI_NV_0_DEVICE_ID_NV10_DEVID2 0x01020000
603 #define NV_CONFIG_PCI_NV_0_DEVICE_ID_NV10_DEVID3 0x01030000
604 #define NV_CONFIG_PCI_NV_0_DEVICE_ID_NV15_DEVID0 0x01500000
605 #define NV_CONFIG_PCI_NV_0_DEVICE_ID_NV15_DEVID1 0x01510000
606 #define NV_CONFIG_PCI_NV_0_DEVICE_ID_NV15_DEVID2 0x01520000
607 #define NV_CONFIG_PCI_NV_0_DEVICE_ID_NV15_DEVID3 0x01530000
608 #define NV_CONFIG_PCI_NV_0_DEVICE_ID_NV20_DEVID0 0x02000000
609 #define NV_CONFIG_PCI_NV_0_DEVICE_ID_NV20_DEVID1 0x02010000
610 #define NV_CONFIG_PCI_NV_0_DEVICE_ID_NV20_DEVID2 0x02020000
611 #define NV_CONFIG_PCI_NV_0_DEVICE_ID_NV20_DEVID3 0x02030000
612 #define NV_PBUS_PCI_NV_0_DEVICE_ID_FUNC 0x00070000
613 #define NV_PBUS_PCI_NV_0_DEVICE_ID_FUNC_VGA 0x00000000
614 #define NV_PBUS_PCI_NV_0_DEVICE_ID_FUNC_ALT1 0x00010000
615 #define NV_PBUS_PCI_NV_0_DEVICE_ID_FUNC_ALT2 0x00020000
616 #define NV_PBUS_PCI_NV_0_DEVICE_ID_FUNC_ALT3 0x00030000
617 #define NV_PBUS_PCI_NV_0_DEVICE_ID_FUNC_LC0 0x00040000
618 #define NV_PBUS_PCI_NV_0_DEVICE_ID_FUNC_LC1 0x00050000
619 #define NV_PBUS_PCI_NV_0_DEVICE_ID_FUNC_LC2 0x00060000
620 #define NV_PBUS_PCI_NV_0_DEVICE_ID_FUNC_LC3 0x00070000
621 #define NV_PBUS_PCI_NV_0_DEVICE_ID_CHIP 0xFFF80000
622 #define NV_PBUS_PCI_NV_0_DEVICE_ID_CHIP_NV0 0x00000000
623 #define NV_PBUS_PCI_NV_0_DEVICE_ID_CHIP_NV1 0x00080000
624 #define NV_PBUS_PCI_NV_0_DEVICE_ID_CHIP_NV2 0x00100000
625 #define NV_PBUS_PCI_NV_0_DEVICE_ID_CHIP_NV3 0x00180000
626 #define NV_PBUS_PCI_NV_0_DEVICE_ID_CHIP_NV4 0x00200000
627 #define NV_PBUS_PCI_NV_0_DEVICE_ID_CHIP_NV5 0x00280000
628 #define NV_PBUS_PCI_NV_0_DEVICE_ID_CHIP_NV10 0x00800000
629 
630 /* NV-Register NV_PBUS_PCI_NV_1 */
631 #define NV_PBUS_PCI_NV_1 0x00001804
632 /* Alias NV_CONFIG_PCI_NV_1 */
633 /* Alias NV_CONFIG_PCI_NV_1 */
634 
635 /* NV-Register NV_CONFIG_PCI_NV_1 */
636 #define NV_CONFIG_PCI_NV_1 0x00000004
637 /* Alias NV_PBUS_PCI_NV_1 */
638 /* Alias NV_PBUS_PCI_NV_1 */
639 #define NV_PBUS_PCI_NV_1_IO_SPACE 0x00000001
640 #define NV_PBUS_PCI_NV_1_IO_SPACE_DISABLED 0xFFFFFFFE
641 #define NV_PBUS_PCI_NV_1_IO_SPACE_ENABLED 0x00000001
642 #define NV_PBUS_PCI_NV_1_MEMORY_SPACE 0x00000002
643 #define NV_PBUS_PCI_NV_1_MEMORY_SPACE_DISABLED 0xFFFFFFFD
644 #define NV_PBUS_PCI_NV_1_MEMORY_SPACE_ENABLED 0x00000002
645 #define NV_PBUS_PCI_NV_1_BUS_MASTER 0x00000004
646 #define NV_PBUS_PCI_NV_1_BUS_MASTER_DISABLED 0xFFFFFFFB
647 #define NV_PBUS_PCI_NV_1_BUS_MASTER_ENABLED 0x00000004
648 #define NV_PBUS_PCI_NV_1_WRITE_AND_INVAL 0x00000010
649 #define NV_PBUS_PCI_NV_1_WRITE_AND_INVAL_DISABLED 0xFFFFFFEF
650 #define NV_PBUS_PCI_NV_1_WRITE_AND_INVAL_ENABLED 0x00000010
651 #define NV_PBUS_PCI_NV_1_PALETTE_SNOOP 0x00000020
652 #define NV_PBUS_PCI_NV_1_PALETTE_SNOOP_DISABLED 0xFFFFFFDF
653 #define NV_PBUS_PCI_NV_1_PALETTE_SNOOP_ENABLED 0x00000020
654 #define NV_PBUS_PCI_NV_1_CAPLIST 0x00100000
655 #define NV_PBUS_PCI_NV_1_CAPLIST_NOT_PRESENT 0xFFEFFFFF
656 #define NV_PBUS_PCI_NV_1_CAPLIST_PRESENT 0x00100000
657 #define NV_PBUS_PCI_NV_1_66MHZ 0x00200000
658 #define NV_PBUS_PCI_NV_1_66MHZ_INCAPABLE 0xFFDFFFFF
659 #define NV_PBUS_PCI_NV_1_66MHZ_CAPABLE 0x00200000
660 #define NV_PBUS_PCI_NV_1_FAST_BACK2BACK 0x00800000
661 #define NV_PBUS_PCI_NV_1_FAST_BACK2BACK_INCAPABLE 0xFF7FFFFF
662 #define NV_PBUS_PCI_NV_1_FAST_BACK2BACK_CAPABLE 0x00800000
663 #define NV_PBUS_PCI_NV_1_DEVSEL_TIMING 0x06000000
664 #define NV_PBUS_PCI_NV_1_DEVSEL_TIMING_FAST 0x00000000
665 #define NV_PBUS_PCI_NV_1_DEVSEL_TIMING_MEDIUM 0x02000000
666 #define NV_PBUS_PCI_NV_1_DEVSEL_TIMING_SLOW 0x04000000
667 #define NV_PBUS_PCI_NV_1_SIGNALED_TARGET 0x08000000
668 #define NV_PBUS_PCI_NV_1_SIGNALED_TARGET_NO_ABORT 0xF7FFFFFF
669 #define NV_PBUS_PCI_NV_1_SIGNALED_TARGET_ABORT 0x08000000
670 #define NV_PBUS_PCI_NV_1_SIGNALED_TARGET_CLEAR 0x08000000
671 #define NV_PBUS_PCI_NV_1_RECEIVED_TARGET 0x10000000
672 #define NV_PBUS_PCI_NV_1_RECEIVED_TARGET_NO_ABORT 0xEFFFFFFF
673 #define NV_PBUS_PCI_NV_1_RECEIVED_TARGET_ABORT 0x10000000
674 #define NV_PBUS_PCI_NV_1_RECEIVED_TARGET_CLEAR 0x10000000
675 #define NV_PBUS_PCI_NV_1_RECEIVED_MASTER 0x20000000
676 #define NV_PBUS_PCI_NV_1_RECEIVED_MASTER_NO_ABORT 0xDFFFFFFF
677 #define NV_PBUS_PCI_NV_1_RECEIVED_MASTER_ABORT 0x20000000
678 #define NV_PBUS_PCI_NV_1_RECEIVED_MASTER_CLEAR 0x20000000
679 
680 /* NV-Register NV_PBUS_PCI_NV_2 */
681 #define NV_PBUS_PCI_NV_2 0x00001808
682 /* Alias NV_CONFIG_PCI_NV_2 */
683 /* Alias NV_CONFIG_PCI_NV_2 */
684 
685 /* NV-Register NV_CONFIG_PCI_NV_2 */
686 #define NV_CONFIG_PCI_NV_2 0x00000008
687 /* Alias NV_PBUS_PCI_NV_2 */
688 /* Alias NV_PBUS_PCI_NV_2 */
689 #define NV_PBUS_PCI_NV_2_REVISION_ID 0x000000FF
690 #define NV_PBUS_PCI_NV_2_REVISION_ID_A01 0x00000000
691 #define NV_PBUS_PCI_NV_2_REVISION_ID_B01 0x00000010
692 #define NV_PBUS_PCI_NV_2_CLASS_CODE 0xFFFFFF00
693 #define NV_PBUS_PCI_NV_2_CLASS_CODE_VGA 0x03000000
694 #define NV_PBUS_PCI_NV_2_CLASS_CODE_MULTIMEDIA 0x04800000
695 
696 /* NV-Register NV_PBUS_PCI_NV_3 */
697 #define NV_PBUS_PCI_NV_3 0x0000180C
698 /* Alias NV_CONFIG_PCI_NV_3 */
699 /* Alias NV_CONFIG_PCI_NV_3 */
700 
701 /* NV-Register NV_CONFIG_PCI_NV_3 */
702 #define NV_CONFIG_PCI_NV_3 0x0000000C
703 /* Alias NV_PBUS_PCI_NV_3 */
704 /* Alias NV_PBUS_PCI_NV_3 */
705 #define NV_PBUS_PCI_NV_3_LATENCY_TIMER 0x0000F800
706 #define NV_PBUS_PCI_NV_3_LATENCY_TIMER_0_CLOCKS 0x00000000
707 #define NV_PBUS_PCI_NV_3_LATENCY_TIMER_8_CLOCKS 0x00000800
708 #define NV_PBUS_PCI_NV_3_LATENCY_TIMER_240_CLOCKS 0x0000F000
709 #define NV_PBUS_PCI_NV_3_LATENCY_TIMER_248_CLOCKS 0x0000F800
710 #define NV_PBUS_PCI_NV_3_HEADER_TYPE 0x00FF0000
711 #define NV_PBUS_PCI_NV_3_HEADER_TYPE_SINGLEFUNC 0x00000000
712 #define NV_PBUS_PCI_NV_3_HEADER_TYPE_MULTIFUNC 0x00800000
713 
714 /* NV-Register NV_PBUS_PCI_NV_4 */
715 #define NV_PBUS_PCI_NV_4 0x00001810
716 /* Alias NV_CONFIG_PCI_NV_4 */
717 /* Alias NV_CONFIG_PCI_NV_4 */
718 
719 /* NV-Register NV_CONFIG_PCI_NV_4 */
720 #define NV_CONFIG_PCI_NV_4 0x00000010
721 /* Alias NV_PBUS_PCI_NV_4 */
722 /* Alias NV_PBUS_PCI_NV_4 */
723 #define NV_PBUS_PCI_NV_4_SPACE_TYPE 0x00000001
724 #define NV_PBUS_PCI_NV_4_SPACE_TYPE_MEMORY 0xFFFFFFFE
725 #define NV_PBUS_PCI_NV_4_SPACE_TYPE_IO 0x00000001
726 #define NV_PBUS_PCI_NV_4_ADDRESS_TYPE 0x00000006
727 #define NV_PBUS_PCI_NV_4_ADDRESS_TYPE_32_BIT 0x00000000
728 #define NV_PBUS_PCI_NV_4_ADDRESS_TYPE_20_BIT 0x00000002
729 #define NV_PBUS_PCI_NV_4_ADDRESS_TYPE_64_BIT 0x00000004
730 #define NV_PBUS_PCI_NV_4_PREFETCHABLE 0x00000008
731 #define NV_PBUS_PCI_NV_4_PREFETCHABLE_NOT 0xFFFFFFF7
732 #define NV_PBUS_PCI_NV_4_PREFETCHABLE_MERGABLE 0x00000008
733 #define NV_PBUS_PCI_NV_4_BASE_ADDRESS 0xFF000000
734 
735 /* NV-Register NV_PBUS_PCI_NV_5 */
736 #define NV_PBUS_PCI_NV_5 0x00001814
737 /* Alias NV_CONFIG_PCI_NV_5 */
738 /* Alias NV_CONFIG_PCI_NV_5 */
739 
740 /* NV-Register NV_CONFIG_PCI_NV_5 */
741 #define NV_CONFIG_PCI_NV_5 0x00000014
742 /* Alias NV_PBUS_PCI_NV_5 */
743 /* Alias NV_PBUS_PCI_NV_5 */
744 #define NV_PBUS_PCI_NV_5_SPACE_TYPE 0x00000001
745 #define NV_PBUS_PCI_NV_5_SPACE_TYPE_MEMORY 0xFFFFFFFE
746 #define NV_PBUS_PCI_NV_5_SPACE_TYPE_IO 0x00000001
747 #define NV_PBUS_PCI_NV_5_ADDRESS_TYPE 0x00000006
748 #define NV_PBUS_PCI_NV_5_ADDRESS_TYPE_32_BIT 0x00000000
749 #define NV_PBUS_PCI_NV_5_ADDRESS_TYPE_20_BIT 0x00000002
750 #define NV_PBUS_PCI_NV_5_ADDRESS_TYPE_64_BIT 0x00000004
751 #define NV_PBUS_PCI_NV_5_PREFETCHABLE 0x00000008
752 #define NV_PBUS_PCI_NV_5_PREFETCHABLE_NOT 0xFFFFFFF7
753 #define NV_PBUS_PCI_NV_5_PREFETCHABLE_MERGABLE 0x00000008
754 #define NV_PBUS_PCI_NV_5_BASE_ADDRESS 0xFF000000
755 
756 /* NV-Register NV_PBUS_PCI_NV_6 */
757 #define NV_PBUS_PCI_NV_6 0x00001818
758 /* Alias NV_CONFIG_PCI_NV_6 */
759 /* Alias NV_CONFIG_PCI_NV_6 */
760 
761 /* NV-Register NV_CONFIG_PCI_NV_6 */
762 #define NV_CONFIG_PCI_NV_6 0x00000018
763 /* Alias NV_PBUS_PCI_NV_6 */
764 /* Alias NV_PBUS_PCI_NV_6 */
765 #define NV_PBUS_PCI_NV_6_SPACE_TYPE 0x00000001
766 #define NV_PBUS_PCI_NV_6_SPACE_TYPE_MEMORY 0xFFFFFFFE
767 #define NV_PBUS_PCI_NV_6_SPACE_TYPE_IO 0x00000001
768 #define NV_PBUS_PCI_NV_6_ADDRESS_TYPE 0x00000006
769 #define NV_PBUS_PCI_NV_6_ADDRESS_TYPE_32_BIT 0x00000000
770 #define NV_PBUS_PCI_NV_6_ADDRESS_TYPE_20_BIT 0x00000002
771 #define NV_PBUS_PCI_NV_6_ADDRESS_TYPE_64_BIT 0x00000004
772 #define NV_PBUS_PCI_NV_6_PREFETCHABLE 0x00000008
773 #define NV_PBUS_PCI_NV_6_PREFETCHABLE_NOT 0xFFFFFFF7
774 #define NV_PBUS_PCI_NV_6_PREFETCHABLE_MERGABLE 0x00000008
775 #define NV_PBUS_PCI_NV_6_BASE_ADDRESS 0xFFFE0000
776 
777 /* NV-Array NV_PBUS_PCI_NV_7 (4 byte access) */
778 #define NV_PBUS_PCI_NV_7 0x0000181C
779 /* NV-Array size NV_PBUS_PCI_NV_7__SIZE_1 [0..3] */
780 #define NV_PBUS_PCI_NV_7__SIZE_1 0x00000004
781 /* Alias NV_CONFIG_PCI_NV_7 */
782 
783 /* NV-Array NV_CONFIG_PCI_NV_7 (4 byte access) */
784 #define NV_CONFIG_PCI_NV_7 0x0000001C
785 /* NV-Array size NV_CONFIG_PCI_NV_7__SIZE_1 [0..3] */
786 #define NV_CONFIG_PCI_NV_7__SIZE_1 0x00000004
787 /* Alias NV_PBUS_PCI_NV_7 */
788 #define NV_PBUS_PCI_NV_7_RESERVED 0xFFFFFFFF
789 #define NV_PBUS_PCI_NV_7_RESERVED_0 0x00000000
790 
791 /* NV-Register NV_PBUS_PCI_NV_11 */
792 #define NV_PBUS_PCI_NV_11 0x0000182C
793 /* Alias NV_CONFIG_PCI_NV_11 */
794 /* Alias NV_CONFIG_PCI_NV_11 */
795 
796 /* NV-Register NV_CONFIG_PCI_NV_11 */
797 #define NV_CONFIG_PCI_NV_11 0x0000002C
798 /* Alias NV_PBUS_PCI_NV_11 */
799 /* Alias NV_PBUS_PCI_NV_11 */
800 #define NV_PBUS_PCI_NV_11_SUBSYSTEM_VENDOR_ID 0x0000FFFF
801 #define NV_PBUS_PCI_NV_11_SUBSYSTEM_VENDOR_ID_NONE 0x00000000
802 #define NV_PBUS_PCI_NV_11_SUBSYSTEM_ID 0xFFFF0000
803 #define NV_PBUS_PCI_NV_11_SUBSYSTEM_ID_NONE 0x00000000
804 
805 /* NV-Register NV_PBUS_PCI_NV_12 */
806 #define NV_PBUS_PCI_NV_12 0x00001830
807 /* Alias NV_CONFIG_PCI_NV_12 */
808 /* Alias NV_CONFIG_PCI_NV_12 */
809 
810 /* NV-Register NV_CONFIG_PCI_NV_12 */
811 #define NV_CONFIG_PCI_NV_120x00000030
812 /* Alias NV_PBUS_PCI_NV_12 */
813 /* Alias NV_PBUS_PCI_NV_12 */
814 #define NV_PBUS_PCI_NV_12_ROM_DECODE 0x00000001
815 #define NV_PBUS_PCI_NV_12_ROM_DECODE_DISABLED 0xFFFFFFFE
816 #define NV_PBUS_PCI_NV_12_ROM_DECODE_ENABLED 0x00000001
817 #define NV_PBUS_PCI_NV_12_ROM_BASE 0xFFFF0000
818 
819 /* NV-Register NV_PBUS_PCI_NV_13 */
820 #define NV_PBUS_PCI_NV_13 0x00001834
821 /* Alias NV_CONFIG_PCI_NV_13 */
822 /* Alias NV_CONFIG_PCI_NV_13 */
823 
824 /* NV-Register NV_CONFIG_PCI_NV_13 */
825 #define NV_CONFIG_PCI_NV_13 0x00000034
826 /* Alias NV_PBUS_PCI_NV_13 */
827 /* Alias NV_PBUS_PCI_NV_13 */
828 #define NV_PBUS_PCI_NV_13_CAP_PTR 0x000000FF
829 #define NV_PBUS_PCI_NV_13_CAP_PTR_AGP 0x00000044
830 #define NV_PBUS_PCI_NV_13_CAP_PTR_POWER_MGMT 0x00000060
831 
832 /* NV-Register NV_PBUS_PCI_NV_14 */
833 #define NV_PBUS_PCI_NV_14 0x00001838
834 /* Alias NV_CONFIG_PCI_NV_14 */
835 /* Alias NV_CONFIG_PCI_NV_14 */
836 
837 /* NV-Register NV_CONFIG_PCI_NV_14 */
838 #define NV_CONFIG_PCI_NV_14 0x00000038
839 /* Alias NV_PBUS_PCI_NV_14 */
840 /* Alias NV_PBUS_PCI_NV_14 */
841 #define NV_PBUS_PCI_NV_14_RESERVED 0xFFFFFFFF
842 #define NV_PBUS_PCI_NV_14_RESERVED_0 0x00000000
843 
844 /* NV-Register NV_PBUS_PCI_NV_15 */
845 #define NV_PBUS_PCI_NV_15 0x0000183C
846 /* Alias NV_CONFIG_PCI_NV_15 */
847 /* Alias NV_CONFIG_PCI_NV_15 */
848 
849 /* NV-Register NV_CONFIG_PCI_NV_15 */
850 #define NV_CONFIG_PCI_NV_15 0x0000003C
851 /* Alias NV_PBUS_PCI_NV_15 */
852 /* Alias NV_PBUS_PCI_NV_15 */
853 #define NV_PBUS_PCI_NV_15_INTR_LINE 0x000000FF
854 #define NV_PBUS_PCI_NV_15_INTR_LINE_IRQ0 0x00000000
855 #define NV_PBUS_PCI_NV_15_INTR_LINE_IRQ1 0x00000001
856 #define NV_PBUS_PCI_NV_15_INTR_LINE_IRQ15 0x0000000F
857 #define NV_PBUS_PCI_NV_15_INTR_LINE_UNKNOWN 0x000000FF
858 #define NV_PBUS_PCI_NV_15_INTR_PIN 0x0000FF00
859 #define NV_PBUS_PCI_NV_15_INTR_PIN_INTA 0x00000100
860 #define NV_PBUS_PCI_NV_15_MIN_GNT 0x00FF0000
861 #define NV_PBUS_PCI_NV_15_MIN_GNT_NO_REQUIREMENTS 0x00000000
862 #define NV_PBUS_PCI_NV_15_MIN_GNT_750NS 0x00030000
863 #define NV_PBUS_PCI_NV_15_MIN_GNT_1250NS 0x00050000
864 #define NV_PBUS_PCI_NV_15_MAX_LAT 0xFF000000
865 #define NV_PBUS_PCI_NV_15_MAX_LAT_NO_REQUIREMENTS 0x00000000
866 #define NV_PBUS_PCI_NV_15_MAX_LAT_250NS 0x01000000
867 
868 /* NV-Register NV_PBUS_PCI_NV_16 */
869 #define NV_PBUS_PCI_NV_16 0x00001840
870 /* Alias NV_CONFIG_PCI_NV_16 */
871 /* Alias NV_CONFIG_PCI_NV_16 */
872 
873 /* NV-Register NV_CONFIG_PCI_NV_16 */
874 #define NV_CONFIG_PCI_NV_16 0x00000040
875 /* Alias NV_PBUS_PCI_NV_16 */
876 /* Alias NV_PBUS_PCI_NV_16 */
877 #define NV_PBUS_PCI_NV_16_SUBSYSTEM_VENDOR_ID 0x0000FFFF
878 #define NV_PBUS_PCI_NV_16_SUBSYSTEM_VENDOR_ID_NONE 0x00000000
879 #define NV_PBUS_PCI_NV_16_SUBSYSTEM_ID 0xFFFF0000
880 #define NV_PBUS_PCI_NV_16_SUBSYSTEM_ID_NONE 0x00000000
881 
882 /* NV-Register NV_PBUS_PCI_NV_17 */
883 #define NV_PBUS_PCI_NV_17 0x00001844
884 /* Alias NV_CONFIG_PCI_NV_17 */
885 /* Alias NV_CONFIG_PCI_NV_17 */
886 
887 /* NV-Register NV_CONFIG_PCI_NV_17 */
888 #define NV_CONFIG_PCI_NV_17 0x00000044
889 /* Alias NV_PBUS_PCI_NV_17 */
890 /* Alias NV_PBUS_PCI_NV_17 */
891 #define NV_PBUS_PCI_NV_17_AGP_REV_MAJOR 0x00F00000
892 #define NV_PBUS_PCI_NV_17_AGP_REV_MAJOR_1 0x00200000
893 #define NV_PBUS_PCI_NV_17_AGP_REV_MINOR 0x000F0000
894 #define NV_PBUS_PCI_NV_17_AGP_REV_MINOR_0 0x00000000
895 #define NV_PBUS_PCI_NV_17_NEXT_PTR 0x0000FF00
896 #define NV_PBUS_PCI_NV_17_NEXT_PTR_NULL 0x00000000
897 #define NV_PBUS_PCI_NV_17_CAP_ID 0x000000FF
898 #define NV_PBUS_PCI_NV_17_CAP_ID_AGP 0x00000002
899 
900 /* NV-Register NV_PBUS_PCI_NV_18 */
901 #define NV_PBUS_PCI_NV_18 0x00001848
902 /* Alias NV_CONFIG_PCI_NV_18 */
903 /* Alias NV_CONFIG_PCI_NV_18 */
904 
905 /* NV-Register NV_CONFIG_PCI_NV_18 */
906 #define NV_CONFIG_PCI_NV_18 0x00000048
907 /* Alias NV_PBUS_PCI_NV_18 */
908 /* Alias NV_PBUS_PCI_NV_18 */
909 #define NV_PBUS_PCI_NV_18_AGP_STATUS_RQ 0xFF000000
910 #define NV_PBUS_PCI_NV_18_AGP_STATUS_RQ_32 0x1F000000
911 #define NV_PBUS_PCI_NV_18_AGP_STATUS_SBA 0x00000200
912 #define NV_PBUS_PCI_NV_18_AGP_STATUS_SBA_NONE 0xFFFFFDFF
913 #define NV_PBUS_PCI_NV_18_AGP_STATUS_SBA_CAPABLE 0x00000200
914 #define NV_PBUS_PCI_NV_18_AGP_STATUS_FW 0x00000010
915 #define NV_PBUS_PCI_NV_18_AGP_STATUS_FW_NONE 0xFFFFFFEF
916 #define NV_PBUS_PCI_NV_18_AGP_STATUS_FW_CAPABLE 0x00000010
917 #define NV_PBUS_PCI_NV_18_AGP_STATUS_RATE 0x00000007
918 #define NV_PBUS_PCI_NV_18_AGP_STATUS_RATE_1X 0x00000001
919 #define NV_PBUS_PCI_NV_18_AGP_STATUS_RATE_2X 0x00000002
920 #define NV_PBUS_PCI_NV_18_AGP_STATUS_RATE_1X_AND_2X 0x00000003
921 #define NV_PBUS_PCI_NV_18_AGP_STATUS_RATE_4X 0x00000004
922 #define NV_PBUS_PCI_NV_18_AGP_STATUS_RATE_1X_2X_4X 0x00000007
923 
924 /* NV-Register NV_PBUS_PCI_NV_19 */
925 #define NV_PBUS_PCI_NV_19 0x0000184C
926 /* Alias NV_CONFIG_PCI_NV_19 */
927 /* Alias NV_CONFIG_PCI_NV_19 */
928 
929 /* NV-Register NV_CONFIG_PCI_NV_19 */
930 #define NV_CONFIG_PCI_NV_19 0x0000004C
931 /* Alias NV_PBUS_PCI_NV_19 */
932 /* Alias NV_PBUS_PCI_NV_19 */
933 #define NV_PBUS_PCI_NV_19_AGP_COMMAND_RQ_DEPTH 0x1F000000
934 #define NV_PBUS_PCI_NV_19_AGP_COMMAND_RQ_DEPTH_0 0x00000000
935 #define NV_PBUS_PCI_NV_19_AGP_COMMAND_SBA_ENABLE 0x00000200
936 #define NV_PBUS_PCI_NV_19_AGP_COMMAND_SBA_ENABLE_OFF 0xFFFFFDFF
937 #define NV_PBUS_PCI_NV_19_AGP_COMMAND_SBA_ENABLE_ON 0x00000200
938 #define NV_PBUS_PCI_NV_19_AGP_COMMAND_AGP_ENABLE 0x00000100
939 #define NV_PBUS_PCI_NV_19_AGP_COMMAND_AGP_ENABLE_OFF 0xFFFFFEFF
940 #define NV_PBUS_PCI_NV_19_AGP_COMMAND_AGP_ENABLE_ON 0x00000100
941 #define NV_PBUS_PCI_NV_19_AGP_COMMAND_FW_ENABLE 0x00000010
942 #define NV_PBUS_PCI_NV_19_AGP_COMMAND_FW_ENABLE_OFF 0xFFFFFFEF
943 #define NV_PBUS_PCI_NV_19_AGP_COMMAND_FW_ENABLE_ON 0x00000010
944 #define NV_PBUS_PCI_NV_19_AGP_COMMAND_DATA_RATE 0x00000007
945 #define NV_PBUS_PCI_NV_19_AGP_COMMAND_DATA_RATE_OFF 0x00000000
946 #define NV_PBUS_PCI_NV_19_AGP_COMMAND_DATA_RATE_1X 0x00000001
947 #define NV_PBUS_PCI_NV_19_AGP_COMMAND_DATA_RATE_2X 0x00000002
948 #define NV_PBUS_PCI_NV_19_AGP_COMMAND_DATA_RATE_4X 0x00000004
949 
950 /* NV-Register NV_PBUS_PCI_NV_20 */
951 #define NV_PBUS_PCI_NV_20 0x00001850
952 /* Alias NV_CONFIG_PCI_NV_20 */
953 /* Alias NV_CONFIG_PCI_NV_20 */
954 
955 /* NV-Register NV_CONFIG_PCI_NV_20 */
956 #define NV_CONFIG_PCI_NV_20 0x00000050
957 /* Alias NV_PBUS_PCI_NV_20 */
958 /* Alias NV_PBUS_PCI_NV_20 */
959 #define NV_PBUS_PCI_NV_20_ROM_SHADOW 0x00000001
960 #define NV_PBUS_PCI_NV_20_ROM_SHADOW_DISABLED 0xFFFFFFFE
961 #define NV_PBUS_PCI_NV_20_ROM_SHADOW_ENABLED 0x00000001
962 
963 /* NV-Register NV_PBUS_PCI_NV_21 */
964 #define NV_PBUS_PCI_NV_21 0x00001854
965 /* Alias NV_CONFIG_PCI_NV_21 */
966 /* Alias NV_CONFIG_PCI_NV_21 */
967 
968 /* NV-Register NV_CONFIG_PCI_NV_21 */
969 #define NV_CONFIG_PCI_NV_21 0x00000054
970 /* Alias NV_PBUS_PCI_NV_21 */
971 /* Alias NV_PBUS_PCI_NV_21 */
972 #define NV_PBUS_PCI_NV_21_VGA 0x00000001
973 #define NV_PBUS_PCI_NV_21_VGA_DISABLED 0xFFFFFFFE
974 #define NV_PBUS_PCI_NV_21_VGA_ENABLED 0x00000001
975 
976 /* NV-Register NV_PBUS_PCI_NV_22 */
977 #define NV_PBUS_PCI_NV_22 0x00001858
978 /* Alias NV_CONFIG_PCI_NV_22 */
979 /* Alias NV_CONFIG_PCI_NV_22 */
980 
981 /* NV-Register NV_CONFIG_PCI_NV_22 */
982 #define NV_CONFIG_PCI_NV_22 0x00000058
983 /* Alias NV_PBUS_PCI_NV_22 */
984 /* Alias NV_PBUS_PCI_NV_22 */
985 #define NV_PBUS_PCI_NV_22_SCRATCH 0x00FFFFFF
986 #define NV_PBUS_PCI_NV_22_SCRATCH_DEFAULT 0x0023D6CE
987 
988 /* NV-Register NV_PBUS_PCI_NV_23 */
989 #define NV_PBUS_PCI_NV_23 0x0000185C
990 /* Alias NV_CONFIG_PCI_NV_23 */
991 /* Alias NV_CONFIG_PCI_NV_23 */
992 
993 /* NV-Register NV_CONFIG_PCI_NV_23 */
994 #define NV_CONFIG_PCI_NV_23 0x0000005C
995 /* Alias NV_PBUS_PCI_NV_23 */
996 /* Alias NV_PBUS_PCI_NV_23 */
997 #define NV_PBUS_PCI_NV_23_DT_TIMEOUT 0x0000000F
998 #define NV_PBUS_PCI_NV_23_DT_TIMEOUT_16 0x0000000F
999 
1000 /* NV-Register NV_PBUS_PCI_NV_24 */
1001 #define NV_PBUS_PCI_NV_24 0x00001860
1002 /* Alias NV_CONFIG_PCI_NV_24 */
1003 /* Alias NV_CONFIG_PCI_NV_24 */
1004 
1005 /* NV-Register NV_CONFIG_PCI_NV_24 */
1006 #define NV_CONFIG_PCI_NV_24 0x00000060
1007 /* Alias NV_PBUS_PCI_NV_24 */
1008 /* Alias NV_PBUS_PCI_NV_24 */
1009 #define NV_PBUS_PCI_NV_24_PME_D3_COLD 0x80000000
1010 #define NV_PBUS_PCI_NV_24_PME_D3_COLD_SUPPORTED 0x80000000
1011 #define NV_PBUS_PCI_NV_24_PME_D3_COLD_NOT_SUPPORTED 0x7FFFFFFF
1012 #define NV_PBUS_PCI_NV_24_PME_D3_HOT 0x40000000
1013 #define NV_PBUS_PCI_NV_24_PME_D3_HOT_SUPPORTED 0x40000000
1014 #define NV_PBUS_PCI_NV_24_PME_D3_HOT_NOT_SUPPORTED 0xBFFFFFFF
1015 #define NV_PBUS_PCI_NV_24_PME_D2 0x20000000
1016 #define NV_PBUS_PCI_NV_24_PME_D2_SUPPORTED 0x20000000
1017 #define NV_PBUS_PCI_NV_24_PME_D2_NOT_SUPPORTED 0xDFFFFFFF
1018 #define NV_PBUS_PCI_NV_24_PME_D1 0x10000000
1019 #define NV_PBUS_PCI_NV_24_PME_D1_SUPPORTED 0x10000000
1020 #define NV_PBUS_PCI_NV_24_PME_D1_NOT_SUPPORTED 0xEFFFFFFF
1021 #define NV_PBUS_PCI_NV_24_PME_D0 0x08000000
1022 #define NV_PBUS_PCI_NV_24_PME_D0_SUPPORTED 0x08000000
1023 #define NV_PBUS_PCI_NV_24_PME_D0_NOT_SUPPORTED 0xF7FFFFFF
1024 #define NV_PBUS_PCI_NV_24_D2 0x04000000
1025 #define NV_PBUS_PCI_NV_24_D2_SUPPORTED 0x04000000
1026 #define NV_PBUS_PCI_NV_24_D2_NOT_SUPPORTED 0xFBFFFFFF
1027 #define NV_PBUS_PCI_NV_24_D1 0x02000000
1028 #define NV_PBUS_PCI_NV_24_D1_SUPPORTED 0x02000000
1029 #define NV_PBUS_PCI_NV_24_D1_NOT_SUPPORTED 0xFDFFFFFF
1030 #define NV_PBUS_PCI_NV_24_DSI 0x00200000
1031 #define NV_PBUS_PCI_NV_24_DSI_NOT_REQUIRED 0xFFDFFFFF
1032 #define NV_PBUS_PCI_NV_24_PME_CLOCK 0x00080000
1033 #define NV_PBUS_PCI_NV_24_PME_CLOCK_NOT_REQUIRED 0xFFF7FFFF
1034 #define NV_PBUS_PCI_NV_24_VERSION 0x00070000
1035 #define NV_PBUS_PCI_NV_24_VERSION_1 0x00010000
1036 #define NV_PBUS_PCI_NV_24_NEXT_PTR 0x0000FF00
1037 #define NV_PBUS_PCI_NV_24_NEXT_PTR_NULL 0x00000000
1038 #define NV_PBUS_PCI_NV_24_NEXT_PTR_AGP 0x00004400
1039 #define NV_PBUS_PCI_NV_24_CAP_ID 0x000000FF
1040 #define NV_PBUS_PCI_NV_24_CAP_ID_POWER_MGMT 0x00000001
1041 
1042 /* NV-Register NV_PBUS_PCI_NV_25 */
1043 #define NV_PBUS_PCI_NV_25 0x00001864
1044 /* Alias NV_CONFIG_PCI_NV_25 */
1045 /* Alias NV_CONFIG_PCI_NV_25 */
1046 
1047 /* NV-Register NV_CONFIG_PCI_NV_25 */
1048 #define NV_CONFIG_PCI_NV_25 0x00000064
1049 /* Alias NV_PBUS_PCI_NV_25 */
1050 /* Alias NV_PBUS_PCI_NV_25 */
1051 #define NV_PBUS_PCI_NV_25_POWER_STATE 0x00000003
1052 #define NV_PBUS_PCI_NV_25_POWER_STATE_D3_HOT 0x00000003
1053 #define NV_PBUS_PCI_NV_25_POWER_STATE_D2 0x00000002
1054 #define NV_PBUS_PCI_NV_25_POWER_STATE_D1 0x00000001
1055 #define NV_PBUS_PCI_NV_25_POWER_STATE_D0 0x00000000
1056 
1057 /* NV-Array NV_PBUS_PCI_NV_26 (4 byte access) */
1058 #define NV_PBUS_PCI_NV_26 0x00001868
1059 /* NV-Array size NV_PBUS_PCI_NV_26__SIZE_1 [0..37] */
1060 #define NV_PBUS_PCI_NV_26__SIZE_1 0x00000026
1061 /* Alias NV_CONFIG_PCI_NV_25 */
1062 
1063 /* NV-Array NV_CONFIG_PCI_NV_26 (4 byte access) */
1064 #define NV_CONFIG_PCI_NV_26 0x00000068
1065 /* NV-Array size NV_CONFIG_PCI_NV_26__SIZE_1 [0..37] */
1066 #define NV_CONFIG_PCI_NV_26__SIZE_1 0x00000026
1067 /* Alias NV_PBUS_PCI_NV_25 */
1068 #define NV_PBUS_PCI_NV_26_RESERVED 0xFFFFFFFF
1069 #define NV_PBUS_PCI_NV_26_RESERVED_0 0x00000000
1070 
1071 /* NV-Device NV_PRAMDAC */
1072 #define NV_PRAMDAC 0x00680300 /* size: 0x00000CFF */
1073 
1074 /* NV-Device NV_USER_DAC */
1075 #define NV_USER_DAC 0x00681200 /* size: 0x00000DFF */
1076 
1077 /* NV-Device NV_PDAC */
1078 #define NV_PDAC 0x00680000 /* size: 0x00000FFF */
1079 
1080 /* NV-Device NV_PRMDIO */
1081 #define NV_PRMDIO 0x00681000 /* size: 0x00000FFF */
1082 
1083 /* NV-Device NV_DIO */
1084 #define NV_DIO 0x000003C6 /* size: 0x00000003 */
1085 
1086 /* NV-Register NV_PRAMDAC_CU_START_POS */
1087 #define NV_PRAMDAC_CU_START_POS 0x00680300
1088 #define NV_PRAMDAC_CU_START_POS_X 0x00000FFF
1089 #define NV_PRAMDAC_CU_START_POS_Y 0x0FFF0000
1090 
1091 /* NV-Register NV_PRAMDAC_CURSOR_CNTRL */
1092 #define NV_PRAMDAC_CURSOR_CNTRL 0x00680320
1093 #define NV_PRAMDAC_CURSOR_CNTRL_ADDRESS 0x0000001F
1094 #define NV_PRAMDAC_CURSOR_CNTRL_RAM 0x00000100
1095 #define NV_PRAMDAC_CURSOR_CNTRL_RAM_RD 0x00000200
1096 #define NV_PRAMDAC_CURSOR_CNTR_TESTMODE 0x00010000
1097 #define NV_PRAMDAC_CURSOR_CNTR_TESTMODE_RD 0x00020000
1098 #define NV_PRAMDAC_CURSOR_CNTR_TESTMODE_ENABLE 0x00020000
1099 #define NV_PRAMDAC_CURSOR_CNTR_TESTMODE_DISABLE 0xFFFDFFFF
1100 
1101 /* NV-Register NV_PRAMDAC_CURSOR_DATA_31_0 */
1102 #define NV_PRAMDAC_CURSOR_DATA_31_0 0x00680324
1103 #define NV_PRAMDAC_CURSOR_DATA_31_0_VAL 0xFFFFFFFF
1104 
1105 /* NV-Register NV_PRAMDAC_CURSOR_DATA_63_32 */
1106 #define NV_PRAMDAC_CURSOR_DATA_63_32 0x00680328
1107 #define NV_PRAMDAC_CURSOR_DATA_63_32_VAL 0xFFFFFFFF
1108 
1109 /* NV-Register NV_PRAMDAC_NVPLL_COEFF */
1110 #define NV_PRAMDAC_NVPLL_COEFF 0x00680500
1111 #define NV_PRAMDAC_NVPLL_COEFF_MDIV 0x000000FF
1112 #define NV_PRAMDAC_NVPLL_COEFF_NDIV 0x0000FF00
1113 #define NV_PRAMDAC_NVPLL_COEFF_PDIV 0x00070000
1114 
1115 /* NV-Register NV_PRAMDAC_MPLL_COEFF */
1116 #define NV_PRAMDAC_MPLL_COEFF 0x00680504
1117 #define NV_PRAMDAC_MPLL_COEFF_MDIV 0x000000FF
1118 #define NV_PRAMDAC_MPLL_COEFF_NDIV 0x0000FF00
1119 #define NV_PRAMDAC_MPLL_COEFF_PDIV 0x00070000
1120 
1121 /* NV-Register NV_PRAMDAC_VPLL_COEFF */
1122 #define NV_PRAMDAC_VPLL_COEFF 0x00680508
1123 #define NV_PRAMDAC_VPLL_COEFF_MDIV 0x000000FF
1124 #define NV_PRAMDAC_VPLL_COEFF_NDIV 0x0000FF00
1125 #define NV_PRAMDAC_VPLL_COEFF_PDIV 0x00070000
1126 
1127 /* NV-Register NV_PRAMDAC_PLL_COEFF_SELECT */
1128 #define NV_PRAMDAC_PLL_COEFF_SELECT 0x0068050C
1129 #define NV_PRAMDAC_PLL_COEFF_SELECT_VPLL_SOURCE 0x00000001
1130 #define NV_PRAMDAC_PLL_COEFF_SELECT_VPLL_SOURCE_XTAL 0xFFFFFFFE
1131 #define NV_PRAMDAC_PLL_COEFF_SELECT_VPLL_SOURCE_VIP 0x00000001
1132 #define NV_PRAMDAC_PLL_COEFF_SELECT_SOURCE 0x00000700
1133 #define NV_PRAMDAC_PLL_COEFF_SELECT_SOURCE_DEFAULT 0x00000000
1134 #define NV_PRAMDAC_PLL_COEFF_SELECT_SOURCE_PROG_MPLL 0x00000100
1135 #define NV_PRAMDAC_PLL_COEFF_SELECT_SOURCE_PROG_VPLL 0x00000200
1136 #define NV_PRAMDAC_PLL_COEFF_SELECT_SOURCE_PROG_NVPLL 0x00000400
1137 #define NV_PRAMDAC_PLL_COEFF_SELECT_SOURCE_PROG_ALL 0x00000700
1138 #define NV_PRAMDAC_PLL_COEFF_SELECT_VS_PCLK_TV 0x00030000
1139 #define NV_PRAMDAC_PLL_COEFF_SELECT_VS_PCLK_TV_NONE 0x00000000
1140 #define NV_PRAMDAC_PLL_COEFF_SELECT_VS_PCLK_TV_VSCLK 0x00010000
1141 #define NV_PRAMDAC_PLL_COEFF_SELECT_VS_PCLK_TV_PCLK 0x00020000
1142 #define NV_PRAMDAC_PLL_COEFF_SELECT_VS_PCLK_TV_BOTH 0x00030000
1143 #define NV_PRAMDAC_PLL_COEFF_SELECT_TVCLK_SOURCE 0x00100000
1144 #define NV_PRAMDAC_PLL_COEFF_SELECT_TVCLK_SOURCE_EXT 0xFFEFFFFF
1145 #define NV_PRAMDAC_PLL_COEFF_SELECT_TVCLK_SOURCE_VIP 0x00100000
1146 #define NV_PRAMDAC_PLL_COEFF_SELECT_TVCLK_RATIO 0x01000000
1147 #define NV_PRAMDAC_PLL_COEFF_SELECT_TVCLK_RATIO_DB1 0xFEFFFFFF
1148 #define NV_PRAMDAC_PLL_COEFF_SELECT_TVCLK_RATIO_DB2 0x01000000
1149 #define NV_PRAMDAC_PLL_COEFF_SELECT_VCLK_RATIO 0x10000000
1150 #define NV_PRAMDAC_PLL_COEFF_SELECT_VCLK_RATIO_DB1 0xEFFFFFFF
1151 #define NV_PRAMDAC_PLL_COEFF_SELECT_VCLK_RATIO_DB2 0x10000000
1152 
1153 /* NV-Register NV_PRAMDAC_PLL_SETUP_CONTROL */
1154 #define NV_PRAMDAC_PLL_SETUP_CONTROL 0x00680510
1155 #define NV_PRAMDAC_PLL_SETUP_CONTROL_VALUE 0x000007FF
1156 #define NV_PRAMDAC_PLL_SETUP_CONTROL_VAL 0x0000044E
1157 #define NV_PRAMDAC_PLL_SETUP_CONTROL_PWRDWN 0x00007000
1158 #define NV_PRAMDAC_PLL_SETUP_CONTROL_PWRDWN_ON 0x00000000
1159 #define NV_PRAMDAC_PLL_SETUP_CONTROL_PWRDWN_MPLL 0x00001000
1160 #define NV_PRAMDAC_PLL_SETUP_CONTROL_PWRDWN_VPLL 0x00002000
1161 #define NV_PRAMDAC_PLL_SETUP_CONTROL_PWRDWN_NVPLL 0x00004000
1162 #define NV_PRAMDAC_PLL_SETUP_CONTROL_PWRDWN_OFF 0x00007000
1163 
1164 /* NV-Register NV_PRAMDAC_PLL_TEST_COUNTER */
1165 #define NV_PRAMDAC_PLL_TEST_COUNTER 0x00680514
1166 #define NV_PRAMDAC_PLL_TEST_COUNTER_NOOFIPCLKS 0x000003FF
1167 #define NV_PRAMDAC_PLL_TEST_COUNTER_VALUE 0x0000FFFF
1168 #define NV_PRAMDAC_PLL_TEST_COUNTER_ENABLE 0x00010000
1169 #define NV_PRAMDAC_PLL_TEST_COUNTER_ENABLE_DEASSERTED 0xFFFEFFFF
1170 #define NV_PRAMDAC_PLL_TEST_COUNTER_ENABLE_ASSERTED 0x00010000
1171 #define NV_PRAMDAC_PLL_TEST_COUNTER_RESET 0x00100000
1172 #define NV_PRAMDAC_PLL_TEST_COUNTER_RESET_DEASSERTED 0xFFEFFFFF
1173 #define NV_PRAMDAC_PLL_TEST_COUNTER_RESET_ASSERTED 0x00100000
1174 #define NV_PRAMDAC_PLL_TEST_COUNTER_SOURCE 0x03000000
1175 #define NV_PRAMDAC_PLL_TEST_COUNTER_SOURCE_MCLK 0x02000000
1176 #define NV_PRAMDAC_PLL_TEST_COUNTER_SOURCE_VCLK 0x01000000
1177 #define NV_PRAMDAC_PLL_TEST_COUNTER_SOURCE_NVCLK 0x00000000
1178 #define NV_PRAMDAC_PLL_TEST_COUNTER_PDIV_RST 0x10000000
1179 #define NV_PRAMDAC_PLL_TEST_COUNTER_PDIVRST_DEASSERTED 0xEFFFFFFF
1180 #define NV_PRAMDAC_PLL_TEST_COUNTER_PDIVRST_ASSERTED 0x10000000
1181 #define NV_PRAMDAC_PLL_TEST_COUNTER_NVPLL_LOCK 0x20000000
1182 #define NV_PRAMDAC_PLL_TEST_COUNTER_NVPLL_NOTLOCKED 0xDFFFFFFF
1183 #define NV_PRAMDAC_PLL_TEST_COUNTER_NVPLL_LOCKED 0x20000000
1184 #define NV_PRAMDAC_PLL_TEST_COUNTER_MPLL_LOCK 0x40000000
1185 #define NV_PRAMDAC_PLL_TEST_COUNTER_MPLL_NOTLOCKED 0xBFFFFFFF
1186 #define NV_PRAMDAC_PLL_TEST_COUNTER_MPLL_LOCKED 0x40000000
1187 #define NV_PRAMDAC_PLL_TEST_COUNTER_VPLL_LOCK 0x80000000
1188 #define NV_PRAMDAC_PLL_TEST_COUNTER_VPLL_NOTLOCKED 0x7FFFFFFF
1189 #define NV_PRAMDAC_PLL_TEST_COUNTER_VPLL_LOCKED 0x80000000
1190 
1191 /* NV-Register NV_PRAMDAC_PALETTE_TEST */
1192 #define NV_PRAMDAC_PALETTE_TEST 0x00680518
1193 #define NV_PRAMDAC_PALETTE_TEST_BLUE_DATA 0x000000FF
1194 #define NV_PRAMDAC_PALETTE_TEST_GREEN_DATA 0x0000FF00
1195 #define NV_PRAMDAC_PALETTE_TEST_RED_DATA 0x00FF0000
1196 #define NV_PRAMDAC_PALETTE_TEST_MODE 0x01000000
1197 #define NV_PRAMDAC_PALETTE_TEST_MODE_8BIT 0xFEFFFFFF
1198 #define NV_PRAMDAC_PALETTE_TEST_MODE_24BIT 0x01000000
1199 #define NV_PRAMDAC_PALETTE_TEST_ADDRINC 0x10000000
1200 #define NV_PRAMDAC_PALETTE_TEST_ADDRINC_READWRITE 0xEFFFFFFF
1201 #define NV_PRAMDAC_PALETTE_TEST_ADDRINC_WRITEONLY 0x10000000
1202 
1203 /* NV-Register NV_PRAMDAC_GENERAL_CONTROL */
1204 #define NV_PRAMDAC_GENERAL_CONTROL 0x00680600
1205 #define NV_PRAMDAC_GENERAL_CONTROL_PIXMIX32_BIT 0x00000001
1206 #define NV_PRAMDAC_GENERAL_CONTROL_PIXMIX32_BIT_24 0x00000001
1207 #define NV_PRAMDAC_GENERAL_CONTROL_PIXMIX32_BIT_31 0xFFFFFFFE
1208 #define NV_PRAMDAC_GENERAL_CONTROL_PIXMIX 0x00000030
1209 #define NV_PRAMDAC_GENERAL_CONTROL_PIXMIX_OFF 0x00000000
1210 #define NV_PRAMDAC_GENERAL_CONTROL_PIXMIX_POS 0x00000010
1211 #define NV_PRAMDAC_GENERAL_CONTROL_PIXMIX_NEG 0x00000020
1212 #define NV_PRAMDAC_GENERAL_CONTROL_PIXMIX_ON 0x00000030
1213 #define NV_PRAMDAC_GENERAL_CONTROL_VGA_STATE 0x00000100
1214 #define NV_PRAMDAC_GENERAL_CONTROL_VGA_STATE_NOTSEL 0xFFFFFEFF
1215 #define NV_PRAMDAC_GENERAL_CONTROL_VGA_STATE_SEL 0x00000100
1216 #define NV_PRAMDAC_GENERAL_CONTROL_ALT_MODE 0x00001000
1217 #define NV_PRAMDAC_GENERAL_CONTROL_ALT_MODE_NOTSEL 0xFFFFEFFF
1218 #define NV_PRAMDAC_GENERAL_CONTROL_ALT_MODE_SEL 0x00001000
1219 #define NV_PRAMDAC_GENERAL_CONTROL_ALT_MODE_15 0xFFFFEFFF
1220 #define NV_PRAMDAC_GENERAL_CONTROL_ALT_MODE_16 0x00001000
1221 #define NV_PRAMDAC_GENERAL_CONTROL_ALT_MODE_24 0xFFFFEFFF
1222 #define NV_PRAMDAC_GENERAL_CONTROL_ALT_MODE_30 0x00001000
1223 #define NV_PRAMDAC_GENERAL_CONTROL_BLK_PEDSTL 0x00010000
1224 #define NV_PRAMDAC_GENERAL_CONTROL_BLK_PEDSTL_OFF 0xFFFEFFFF
1225 #define NV_PRAMDAC_GENERAL_CONTROL_BLK_PEDSTL_ON 0x00010000
1226 #define NV_PRAMDAC_GENERAL_CONTROL_TERMINATION 0x00020000
1227 #define NV_PRAMDAC_GENERAL_CONTROL_TERMINATION_37OHM 0xFFFDFFFF
1228 #define NV_PRAMDAC_GENERAL_CONTROL_TERMINATION_75OHM 0x00020000
1229 #define NV_PRAMDAC_GENERAL_CONTROL_BPC 0x00100000
1230 #define NV_PRAMDAC_GENERAL_CONTROL_BPC_6BITS 0xFFEFFFFF
1231 #define NV_PRAMDAC_GENERAL_CONTROL_BPC_8BITS 0x00100000
1232 #define NV_PRAMDAC_GENERAL_CONTROL_DAC_SLEEP 0x01000000
1233 #define NV_PRAMDAC_GENERAL_CONTROL_DAC_SLEEP_DIS 0xFEFFFFFF
1234 #define NV_PRAMDAC_GENERAL_CONTROL_DAC_SLEEP_EN 0x01000000
1235 #define NV_PRAMDAC_GENERAL_CONTROL_PALETTE_CLK 0x10000000
1236 #define NV_PRAMDAC_GENERAL_CONTROL_PALETTE_CLK_EN 0xEFFFFFFF
1237 #define NV_PRAMDAC_GENERAL_CONTROL_PALETTE_CLK_DIS 0x10000000
1238 #define NV_PRAMDAC_GENERAL_CONTROL_PIPE 0x20000000
1239 #define NV_PRAMDAC_GENERAL_CONTROL_PIPE_SHORT 0xDFFFFFFF
1240 #define NV_PRAMDAC_GENERAL_CONTROL_PIPE_LONG 0x20000000
1241 
1242 /* NV-Register NV_PRAMDAC_PALETTE_RECOVERY */
1243 #define NV_PRAMDAC_PALETTE_RECOVERY 0x00680604
1244 #define NV_PRAMDAC_PALETTE_RECOVERY_ACTIVE_ADDRESS 0x000000FF
1245 #define NV_PRAMDAC_PALETTE_RECOVERY_RGB_POINTER 0x00000700
1246 #define NV_PRAMDAC_PALETTE_RECOVERY_RGB_POINTER_RED 0x00000100
1247 #define NV_PRAMDAC_PALETTE_RECOVERY_RGB_POINTER_GREEN 0x00000200
1248 #define NV_PRAMDAC_PALETTE_RECOVERY_RGB_POINTER_BLUE 0x00000400
1249 #define NV_PRAMDAC_PALETTE_RECOVERY_DAC_STATE 0x00003000
1250 #define NV_PRAMDAC_PALETTE_RECOVERY_DAC_STATE_WRITE 0x00000000
1251 #define NV_PRAMDAC_PALETTE_RECOVERY_DAC_STATE_READ 0x00003000
1252 #define NV_PRAMDAC_PALETTE_RECOVERY_RED_DATA 0x00FF0000
1253 #define NV_PRAMDAC_PALETTE_RECOVERY_GREEN_DATA 0xFF000000
1254 
1255 /* NV-Register NV_PRAMDAC_TEST_CONTROL */
1256 #define NV_PRAMDAC_TEST_CONTROL 0x00680608
1257 #define NV_PRAMDAC_TEST_CONTROL_CRC_RESET 0x00000001
1258 #define NV_PRAMDAC_TEST_CONTROL_CRC_RESET_DEASSERTED 0xFFFFFFFE
1259 #define NV_PRAMDAC_TEST_CONTROL_CRC_RESET_ASSERTED 0x00000001
1260 #define NV_PRAMDAC_TEST_CONTROL_CRC_ENABLE 0x00000010
1261 #define NV_PRAMDAC_TEST_CONTROL_CRC_ENABLE_DEASSERTED 0xFFFFFFEF
1262 #define NV_PRAMDAC_TEST_CONTROL_CRC_ENABLE_ASSERTED 0x00000010
1263 #define NV_PRAMDAC_TEST_CONTROL_CRC_CHANNEL 0x00000300
1264 #define NV_PRAMDAC_TEST_CONTROL_CRC_CHANNEL_BLUE 0x00000000
1265 #define NV_PRAMDAC_TEST_CONTROL_CRC_CHANNEL_GREEN 0x00000100
1266 #define NV_PRAMDAC_TEST_CONTROL_CRC_CHANNEL_RED 0x00000200
1267 #define NV_PRAMDAC_TEST_CONTROL_CRC_CAPTURE 0x00000400
1268 #define NV_PRAMDAC_TEST_CONTROL_CRC_CAPTURE_ALWAYS 0xFFFFFBFF
1269 #define NV_PRAMDAC_TEST_CONTROL_CRC_CAPTURE_ONE 0x00000400
1270 #define NV_PRAMDAC_TEST_CONTROL_TP_INS_EN 0x00001000
1271 #define NV_PRAMDAC_TEST_CONTROL_TP_INS_EN_DEASSERTED 0xFFFFEFFF
1272 #define NV_PRAMDAC_TEST_CONTROL_TP_INS_EN_ASSERTED 0x00001000
1273 #define NV_PRAMDAC_TEST_CONTROL_PWRDWN_DAC 0x00010000
1274 #define NV_PRAMDAC_TEST_CONTROL_PWRDWN_DAC_ON 0xFFFEFFFF
1275 #define NV_PRAMDAC_TEST_CONTROL_PWRDWN_DAC_OFF 0x00010000
1276 #define NV_PRAMDAC_TEST_CONTROL_DACTM 0x00100000
1277 #define NV_PRAMDAC_TEST_CONTROL_DACTM_NORMAL 0xFFEFFFFF
1278 #define NV_PRAMDAC_TEST_CONTROL_DACTM_TEST 0x00100000
1279 #define NV_PRAMDAC_TEST_CONTROL_TPATH1 0x01000000
1280 #define NV_PRAMDAC_TEST_CONTROL_TPATH1_CLEAR 0xFEFFFFFF
1281 #define NV_PRAMDAC_TEST_CONTROL_TPATH1_SET 0x01000000
1282 #define NV_PRAMDAC_TEST_CONTROL_TPATH31 0x02000000
1283 #define NV_PRAMDAC_TEST_CONTROL_TPATH31_CLEAR 0xFDFFFFFF
1284 #define NV_PRAMDAC_TEST_CONTROL_TPATH31_SET 0x02000000
1285 #define NV_PRAMDAC_TEST_CONTROL_SENSEB 0x10000000
1286 #define NV_PRAMDAC_TEST_CONTROL_SENSEB_SOMELO 0xEFFFFFFF
1287 #define NV_PRAMDAC_TEST_CONTROL_SENSEB_ALLHI 0x10000000
1288 
1289 /* NV-Register NV_PRAMDAC_CHECKSUM */
1290 #define NV_PRAMDAC_CHECKSUM 0x0068060C
1291 #define NV_PRAMDAC_CHECKSUM_STATUS 0x01000000
1292 #define NV_PRAMDAC_CHECKSUM_STATUS_CAPTURED 0x01000000
1293 #define NV_PRAMDAC_CHECKSUM_STATUS_WAITING 0xFEFFFFFF
1294 #define NV_PRAMDAC_CHECKSUM_VALUE 0x00FFFFFF
1295 
1296 /* NV-Register NV_PRAMDAC_TESTPOINT_DATA */
1297 #define NV_PRAMDAC_TESTPOINT_DATA 0x00680610
1298 #define NV_PRAMDAC_TESTPOINT_DATA_RED 0x000003FF
1299 #define NV_PRAMDAC_TESTPOINT_DATA_GREEN 0x000FFC00
1300 #define NV_PRAMDAC_TESTPOINT_DATA_BLUE 0x3FF00000
1301 #define NV_PRAMDAC_TESTPOINT_DATA_BLACK 0x40000000
1302 #define NV_PRAMDAC_TESTPOINT_DATA_NOTBLANK 0x80000000
1303 
1304 /* NV-Register NV_PRAMDAC_TV_SETUP */
1305 #define NV_PRAMDAC_TV_SETUP 0x00680700
1306 #define NV_PRAMDAC_TV_SETUP_DEV_TYPE 0x00000003
1307 #define NV_PRAMDAC_TV_SETUP_DEV_TYPE_SLAVE 0x00000000
1308 #define NV_PRAMDAC_TV_SETUP_DEV_TYPE_MASTER 0x00000001
1309 #define NV_PRAMDAC_TV_SETUP_DEV_TYPE_SLAVE_ALT 0x00000002
1310 #define NV_PRAMDAC_TV_SETUP_DEV_TYPE_MASTER_ALT 0x00000003
1311 #define NV_PRAMDAC_TV_SETUP_VS_PIXFMT 0x00000070
1312 #define NV_PRAMDAC_TV_SETUP_VS_PIXFMT_555 0x00000000
1313 #define NV_PRAMDAC_TV_SETUP_VS_PIXFMT_565 0x00000010
1314 #define NV_PRAMDAC_TV_SETUP_VS_PIXFMT_888 0x00000020
1315 #define NV_PRAMDAC_TV_SETUP_VS_PIXFMT_101010 0x00000030
1316 #define NV_PRAMDAC_TV_SETUP_VS_PIXFMT_YUV 0x00000040
1317 #define NV_PRAMDAC_TV_SETUP_DATA_SRC 0x00000300
1318 #define NV_PRAMDAC_TV_SETUP_DATA_SRC_COMP 0x00000000
1319 #define NV_PRAMDAC_TV_SETUP_DATA_SRC_SCALER 0x00000100
1320 #define NV_PRAMDAC_TV_SETUP_DATA_SRC_VIP 0x00000200
1321 #define NV_PRAMDAC_TV_SETUP_DATA_SRC_NONE 0x00000300
1322 #define NV_PRAMDAC_TV_SETUP_COMP_SRC 0x00001000
1323 #define NV_PRAMDAC_TV_SETUP_COMP_SRC_SCALER 0xFFFFEFFF
1324 #define NV_PRAMDAC_TV_SETUP_COMP_SRC_NO_SCALER 0x00001000
1325 #define NV_PRAMDAC_TV_SETUP_SYNC_POL 0x00030000
1326 #define NV_PRAMDAC_TV_SETUP_SYNC_POL_NEG_NONE 0x00000000
1327 #define NV_PRAMDAC_TV_SETUP_SYNC_POL_NEG_HSYNC 0x00010000
1328 #define NV_PRAMDAC_TV_SETUP_SYNC_POL_NEG_VSYNC 0x00020000
1329 #define NV_PRAMDAC_TV_SETUP_SYNC_POL_NEG_BOTH 0x00030000
1330 #define NV_PRAMDAC_TV_SETUP_VIP_VSYNC 0x00100000
1331 #define NV_PRAMDAC_TV_SETUP_VIP_VSYNC_LEAD 0xFFEFFFFF
1332 #define NV_PRAMDAC_TV_SETUP_VIP_VSYNC_TRAIL 0x00100000
1333 #define NV_PRAMDAC_TV_SETUP_VIP_DATAPOS 0x01000000
1334 #define NV_PRAMDAC_TV_SETUP_VIP_DATAPOS_7_0 0xFEFFFFFF
1335 #define NV_PRAMDAC_TV_SETUP_VIP_DATAPOS_11_4 0x01000000
1336 #define NV_PRAMDAC_TV_SETUP_VIP_FIELD 0x10000000
1337 #define NV_PRAMDAC_TV_SETUP_VIP_FIELD_0 0xEFFFFFFF
1338 #define NV_PRAMDAC_TV_SETUP_VIP_FIELD_1 0x10000000
1339 
1340 /* NV-Register NV_PRAMDAC_TV_VBLANK_START */
1341 #define NV_PRAMDAC_TV_VBLANK_START 0x00680704
1342 #define NV_PRAMDAC_TV_VBLANK_START_VAL 0x000007FF
1343 
1344 /* NV-Register NV_PRAMDAC_TV_VBLANK_END */
1345 #define NV_PRAMDAC_TV_VBLANK_END 0x00680708
1346 #define NV_PRAMDAC_TV_VBLANK_END_VAL 0x000007FF
1347 
1348 /* NV-Register NV_PRAMDAC_TV_HBLANK_START */
1349 #define NV_PRAMDAC_TV_HBLANK_START 0x0068070C
1350 #define NV_PRAMDAC_TV_HBLANK_START_VAL 0x000007FF
1351 
1352 /* NV-Register NV_PRAMDAC_TV_HBLANK_END */
1353 #define NV_PRAMDAC_TV_HBLANK_END 0x00680710
1354 #define NV_PRAMDAC_TV_HBLANK_END_VAL 0x000007FF
1355 
1356 /* NV-Register NV_PRAMDAC_BLANK_COLOR */
1357 #define NV_PRAMDAC_BLANK_COLOR 0x00680714
1358 #define NV_PRAMDAC_BLANK_COLOR_VAL 0x00FFFFFF
1359 
1360 /* NV-Register NV_PRAMDAC_TV_CHECKSUM */
1361 #define NV_PRAMDAC_TV_CHECKSUM 0x00680718
1362 #define NV_PRAMDAC_TV_CHECKSUM_VAL 0x00FFFFFF
1363 #define NV_PRAMDAC_TV_CHECKSUM_STATUS 0x01000000
1364 #define NV_PRAMDAC_TV_CHECKSUM_STATUS_CAPTURED 0x01000000
1365 #define NV_PRAMDAC_TV_CHECKSUM_STATUS_WAITING 0xFEFFFFFF
1366 #define NV_PRAMDAC_TV_VSYNC 0x10000000
1367 #define NV_PRAMDAC_TV_VSYNC_LOW 0xEFFFFFFF
1368 #define NV_PRAMDAC_TV_VSYNC_HIGH 0x10000000
1369 
1370 /* NV-Register NV_PRAMDAC_TV_TEST_CONTROL */
1371 #define NV_PRAMDAC_TV_TEST_CONTROL 0x0068071C
1372 #define NV_PRAMDAC_TV_TEST_CONTROL_CRC_RESET 0x00000001
1373 #define NV_PRAMDAC_TV_TEST_CONTROL_CRC_RESET_DEASSERTED 0xFFFFFFFE
1374 #define NV_PRAMDAC_TV_TEST_CONTROL_CRC_RESET_ASSERTED 0x00000001
1375 #define NV_PRAMDAC_TV_TEST_CONTROL_CRC_ENABLE 0x00000010
1376 #define NV_PRAMDAC_TV_TEST_CONTROL_CRC_ENABLE_DEASSERTED 0xFFFFFFEF
1377 #define NV_PRAMDAC_TV_TEST_CONTROL_CRC_ENABLE_ASSERTED 0x00000010
1378 #define NV_PRAMDAC_TV_TEST_CONTROL_CRC_CHANNEL 0x00000300
1379 #define NV_PRAMDAC_TV_TEST_CONTROL_CRC_CHANNEL_7_0 0x00000000
1380 #define NV_PRAMDAC_TV_TEST_CONTROL_CRC_CHANNEL_15_8 0x00000100
1381 #define NV_PRAMDAC_TV_TEST_CONTROL_CRC_CHANNEL_23_16 0x00000200
1382 #define NV_PRAMDAC_TV_TEST_CONTROL_CRC_CAPTURE 0x00000400
1383 #define NV_PRAMDAC_TV_TEST_CONTROL_CRC_CAPTURE_ALWAYS 0xFFFFFBFF
1384 #define NV_PRAMDAC_TV_TEST_CONTROL_CRC_CAPTURE_ONE 0x00000400
1385 
1386 /* NV-Register NV_PRAMDAC_FP_VDISPLAY_END */
1387 #define NV_PRAMDAC_FP_VDISPLAY_END 0x00680800
1388 #define NV_PRAMDAC_FP_VDISPLAY_END_VAL 0x0000FFFF
1389 
1390 /* NV-Register NV_PRAMDAC_FP_VTOTAL */
1391 #define NV_PRAMDAC_FP_VTOTAL 0x00680804
1392 #define NV_PRAMDAC_FP_VTOTAL_VAL 0x0000FFFF
1393 
1394 /* NV-Register NV_PRAMDAC_FP_VCRTC */
1395 #define NV_PRAMDAC_FP_VCRTC 0x00680808
1396 #define NV_PRAMDAC_FP_VCRTC_VAL 0x0000FFFF
1397 
1398 /* NV-Register NV_PRAMDAC_FP_VSYNC_START */
1399 #define NV_PRAMDAC_FP_VSYNC_START 0x0068080C
1400 #define NV_PRAMDAC_FP_VSYNC_START_VAL 0x0000FFFF
1401 
1402 /* NV-Register NV_PRAMDAC_FP_VSYNC_END */
1403 #define NV_PRAMDAC_FP_VSYNC_END 0x00680810
1404 #define NV_PRAMDAC_FP_VSYNC_END_VAL 0x0000FFFF
1405 
1406 /* NV-Register NV_PRAMDAC_FP_VVALID_START */
1407 #define NV_PRAMDAC_FP_VVALID_START 0x00680814
1408 #define NV_PRAMDAC_FP_VVALID_START_VAL 0x0000FFFF
1409 
1410 /* NV-Register NV_PRAMDAC_FP_VVALID_END */
1411 #define NV_PRAMDAC_FP_VVALID_END 0x00680818
1412 #define NV_PRAMDAC_FP_VVALID_END_VAL 0x0000FFFF
1413 
1414 /* NV-Register NV_PRAMDAC_FP_HDISPLAY_END */
1415 #define NV_PRAMDAC_FP_HDISPLAY_END 0x00680820
1416 #define NV_PRAMDAC_FP_HDISPLAY_END_VAL 0x0000FFFF
1417 
1418 /* NV-Register NV_PRAMDAC_FP_HTOTAL */
1419 #define NV_PRAMDAC_FP_HTOTAL 0x00680824
1420 #define NV_PRAMDAC_FP_HTOTAL_VAL 0x0000FFFF
1421 
1422 /* NV-Register NV_PRAMDAC_FP_HCRTC */
1423 #define NV_PRAMDAC_FP_HCRTC 0x00680828
1424 #define NV_PRAMDAC_FP_HCRTC_VAL 0x0000FFFF
1425 
1426 /* NV-Register NV_PRAMDAC_FP_HSYNC_START */
1427 #define NV_PRAMDAC_FP_HSYNC_START 0x0068082C
1428 #define NV_PRAMDAC_FP_HSYNC_START_VAL 0x0000FFFF
1429 
1430 /* NV-Register NV_PRAMDAC_FP_HSYNC_END */
1431 #define NV_PRAMDAC_FP_HSYNC_END 0x00680830
1432 #define NV_PRAMDAC_FP_HSYNC_END_VAL 0x0000FFFF
1433 
1434 /* NV-Register NV_PRAMDAC_FP_HVALID_START */
1435 #define NV_PRAMDAC_FP_HVALID_START 0x00680834
1436 #define NV_PRAMDAC_FP_HVALID_START_VAL 0x0000FFFF
1437 
1438 /* NV-Register NV_PRAMDAC_FP_HVALID_END */
1439 #define NV_PRAMDAC_FP_HVALID_END 0x00680838
1440 #define NV_PRAMDAC_FP_HVALID_END_VAL 0x0000FFFF
1441 
1442 /* NV-Register NV_PRAMDAC_FP_CHECKSUM */
1443 #define NV_PRAMDAC_FP_CHECKSUM 0x00680840
1444 #define NV_PRAMDAC_FP_CHECKSUM_VAL 0x00FFFFFF
1445 #define NV_PRAMDAC_FP_CHECKSUM_STATUS 0x01000000
1446 #define NV_PRAMDAC_FP_CHECKSUM_STATUS_CAPTURED 0x01000000
1447 #define NV_PRAMDAC_FP_CHECKSUM_STATUS_WAITING 0xFEFFFFFF
1448 #define NV_PRAMDAC_FP_VSYNC 0x10000000
1449 #define NV_PRAMDAC_FP_VSYNC_LOW 0xEFFFFFFF
1450 #define NV_PRAMDAC_FP_VSYNC_HIGH 0x10000000
1451 
1452 /* NV-Register NV_PRAMDAC_FP_TEST_CONTROL */
1453 #define NV_PRAMDAC_FP_TEST_CONTROL 0x00680844
1454 #define NV_PRAMDAC_FP_TEST_CONTROL_CRC_RESET 0x00000001
1455 #define NV_PRAMDAC_FP_TEST_CONTROL_CRC_RESET_DEASSERTED 0xFFFFFFFE
1456 #define NV_PRAMDAC_FP_TEST_CONTROL_CRC_RESET_ASSERTED 0x00000001
1457 #define NV_PRAMDAC_FP_TEST_CONTROL_CRC_ENABLE 0x00000010
1458 #define NV_PRAMDAC_FP_TEST_CONTROL_CRC_ENABLE_DEASSERTED 0xFFFFFFEF
1459 #define NV_PRAMDAC_FP_TEST_CONTROL_CRC_ENABLE_ASSERTED 0x00000010
1460 #define NV_PRAMDAC_FP_TEST_CONTROL_CRC_CHANNEL 0x00000300
1461 #define NV_PRAMDAC_FP_TEST_CONTROL_CRC_CHANNEL_7_0 0x00000000
1462 #define NV_PRAMDAC_FP_TEST_CONTROL_CRC_CHANNEL_15_8 0x00000100
1463 #define NV_PRAMDAC_FP_TEST_CONTROL_CRC_CHANNEL_23_16 0x00000200
1464 #define NV_PRAMDAC_FP_TEST_CONTROL_CRC_CAPTURE 0x00000400
1465 #define NV_PRAMDAC_FP_TEST_CONTROL_CRC_CAPTURE_ALWAYS 0xFFFFFBFF
1466 #define NV_PRAMDAC_FP_TEST_CONTROL_CRC_CAPTURE_ONE 0x00000400
1467 #define NV_PRAMDAC_FP_TEST_CONTROL_TMDS 0x00010000
1468 #define NV_PRAMDAC_FP_TEST_CONTROL_TMDS_INTERNAL 0xFFFEFFFF
1469 #define NV_PRAMDAC_FP_TEST_CONTROL_TMDS_EXTERNAL 0x00010000
1470 
1471 /* NV-Register NV_PRAMDAC_FP_TG_CONTROL */
1472 #define NV_PRAMDAC_FP_TG_CONTROL 0x00680848
1473 #define NV_PRAMDAC_FP_TG_CONTROL_VSYNC 0x00000003
1474 #define NV_PRAMDAC_FP_TG_CONTROL_VSYNC_NEG 0x00000000
1475 #define NV_PRAMDAC_FP_TG_CONTROL_VSYNC_POS 0x00000001
1476 #define NV_PRAMDAC_FP_TG_CONTROL_VSYNC_DISABLE 0x00000002
1477 #define NV_PRAMDAC_FP_TG_CONTROL_VSYNC_RSVD 0x00000003
1478 #define NV_PRAMDAC_FP_TG_CONTROL_HSYNC 0x00000030
1479 #define NV_PRAMDAC_FP_TG_CONTROL_HSYNC_NEG 0x00000000
1480 #define NV_PRAMDAC_FP_TG_CONTROL_HSYNC_POS 0x00000010
1481 #define NV_PRAMDAC_FP_TG_CONTROL_HSYNC_DISABLE 0x00000020
1482 #define NV_PRAMDAC_FP_TG_CONTROL_HSYNC_RSVD 0x00000030
1483 #define NV_PRAMDAC_FP_TG_CONTROL_MODE 0x00000300
1484 #define NV_PRAMDAC_FP_TG_CONTROL_MODE_SCALE 0x00000000
1485 #define NV_PRAMDAC_FP_TG_CONTROL_MODE_CENTER 0x00000100
1486 #define NV_PRAMDAC_FP_TG_CONTROL_MODE_NATIVE 0x00000200
1487 #define NV_PRAMDAC_FP_TG_CONTROL_CENTER 0x00003000
1488 #define NV_PRAMDAC_FP_TG_CONTROL_CENTER_NONE 0x00000000
1489 #define NV_PRAMDAC_FP_TG_CONTROL_CENTER_HORIZ 0x00001000
1490 #define NV_PRAMDAC_FP_TG_CONTROL_CENTER_VERT 0x00002000
1491 #define NV_PRAMDAC_FP_TG_CONTROL_CENTER_BOTH 0x00003000
1492 #define NV_PRAMDAC_FP_TG_CONTROL_NATIVE 0x00030000
1493 #define NV_PRAMDAC_FP_TG_CONTROL_NATIVE_NONE 0x00000000
1494 #define NV_PRAMDAC_FP_TG_CONTROL_NATIVE_HORIZ 0x00010000
1495 #define NV_PRAMDAC_FP_TG_CONTROL_NATIVE_VERT 0x00020000
1496 #define NV_PRAMDAC_FP_TG_CONTROL_NATIVE_BOTH 0x00030000
1497 #define NV_PRAMDAC_FP_TG_CONTROL_READ 0x00100000
1498 #define NV_PRAMDAC_FP_TG_CONTROL_READ_ACTUAL 0xFFEFFFFF
1499 #define NV_PRAMDAC_FP_TG_CONTROL_READ_PROG 0x00100000
1500 #define NV_PRAMDAC_FP_TG_CONTROL_WIDTH 0x01000000
1501 #define NV_PRAMDAC_FP_TG_CONTROL_WIDTH_24 0xFEFFFFFF
1502 #define NV_PRAMDAC_FP_TG_CONTROL_WIDTH_12 0x01000000
1503 #define NV_PRAMDAC_FP_TG_CONTROL_DISPEN 0x30000000
1504 #define NV_PRAMDAC_FP_TG_CONTROL_DISPEN_NEG 0x00000000
1505 #define NV_PRAMDAC_FP_TG_CONTROL_DISPEN_POS 0x10000000
1506 #define NV_PRAMDAC_FP_TG_CONTROL_DISPEN_DISABLE 0x20000000
1507 #define NV_PRAMDAC_FP_TG_CONTROL_DISPEN_RSVD 0x30000000
1508 
1509 /* NV-Register NV_PRAMDAC_FP_DEBUG_0 */
1510 #define NV_PRAMDAC_FP_DEBUG_0 0x00680880
1511 #define NV_PRAMDAC_FP_DEBUG_0_XSCALE 0x00000001
1512 #define NV_PRAMDAC_FP_DEBUG_0_XSCALE_DISABLE 0xFFFFFFFE
1513 #define NV_PRAMDAC_FP_DEBUG_0_XSCALE_ENABLE 0x00000001
1514 #define NV_PRAMDAC_FP_DEBUG_0_YSCALE 0x00000010
1515 #define NV_PRAMDAC_FP_DEBUG_0_YSCALE_DISABLE 0xFFFFFFEF
1516 #define NV_PRAMDAC_FP_DEBUG_0_YSCALE_ENABLE 0x00000010
1517 #define NV_PRAMDAC_FP_DEBUG_0_XINTERP 0x00000100
1518 #define NV_PRAMDAC_FP_DEBUG_0_XINTERP_TRUNCATE 0xFFFFFEFF
1519 #define NV_PRAMDAC_FP_DEBUG_0_XINTERP_BILINEAR 0x00000100
1520 #define NV_PRAMDAC_FP_DEBUG_0_YINTERP 0x00001000
1521 #define NV_PRAMDAC_FP_DEBUG_0_YINTERP_TRUNCATE 0xFFFFEFFF
1522 #define NV_PRAMDAC_FP_DEBUG_0_YINTERP_BILINEAR 0x00001000
1523 #define NV_PRAMDAC_FP_DEBUG_0_VCNTR 0x00030000
1524 #define NV_PRAMDAC_FP_DEBUG_0_TEST_NONE 0x00000000
1525 #define NV_PRAMDAC_FP_DEBUG_0_TEST_VCNTR 0x00010000
1526 #define NV_PRAMDAC_FP_DEBUG_0_TEST_NEWPIX 0x00020000
1527 #define NV_PRAMDAC_FP_DEBUG_0_TEST_BOTH 0x00030000
1528 #define NV_PRAMDAC_FP_DEBUG_0_XWEIGHT 0x00100000
1529 #define NV_PRAMDAC_FP_DEBUG_0_XWEIGHT_TRUNCATE 0xFFEFFFFF
1530 #define NV_PRAMDAC_FP_DEBUG_0_XWEIGHT_ROUND 0x00100000
1531 #define NV_PRAMDAC_FP_DEBUG_0_YWEIGHT 0x01000000
1532 #define NV_PRAMDAC_FP_DEBUG_0_YWEIGHT_TRUNCATE 0xFEFFFFFF
1533 #define NV_PRAMDAC_FP_DEBUG_0_YWEIGHT_ROUND 0x01000000
1534 #define NV_PRAMDAC_FP_DEBUG_0_PWRDOWN 0x30000000
1535 #define NV_PRAMDAC_FP_DEBUG_0_PWRDOWN_NONE 0x00000000
1536 #define NV_PRAMDAC_FP_DEBUG_0_PWRDOWN_FPCLK 0x10000000
1537 #define NV_PRAMDAC_FP_DEBUG_0_PWRDOWN_TMDS 0x20000000
1538 #define NV_PRAMDAC_FP_DEBUG_0_PWRDOWN_BOTH 0x30000000
1539 
1540 /* NV-Register NV_PRAMDAC_FP_DEBUG_1 */
1541 #define NV_PRAMDAC_FP_DEBUG_1 0x00680884
1542 #define NV_PRAMDAC_FP_DEBUG_1_XSCALE_VALUE 0x00000FFF
1543 #define NV_PRAMDAC_FP_DEBUG_1_XSCALE_VALUE_ZERO 0x00000000
1544 #define NV_PRAMDAC_FP_DEBUG_1_XSCALE_TESTMODE 0x00001000
1545 #define NV_PRAMDAC_FP_DEBUG_1_XSCALE_TESTMODE_DISABLE 0xFFFFEFFF
1546 #define NV_PRAMDAC_FP_DEBUG_1_XSCALE_TESTMODE_ENABLE 0x00001000
1547 #define NV_PRAMDAC_FP_DEBUG_1_YSCALE_VALUE 0x0FFF0000
1548 #define NV_PRAMDAC_FP_DEBUG_1_YSCALE_VALUE_ZERO 0x00000000
1549 #define NV_PRAMDAC_FP_DEBUG_1_YSCALE_TESTMODE 0x10000000
1550 #define NV_PRAMDAC_FP_DEBUG_1_YSCALE_TESTMODE_DISABLE 0xEFFFFFFF
1551 #define NV_PRAMDAC_FP_DEBUG_1_YSCALE_TESTMODE_ENABLE 0x10000000
1552 
1553 /* NV-Register NV_PRAMDAC_FP_DEBUG_2 */
1554 #define NV_PRAMDAC_FP_DEBUG_2 0x00680888
1555 #define NV_PRAMDAC_FP_DEBUG_2_HTOTAL_VALUE 0x00000FFF
1556 #define NV_PRAMDAC_FP_DEBUG_2_HTOTAL_TESTMODE 0x00001000
1557 #define NV_PRAMDAC_FP_DEBUG_2_HTOTAL_TESTMODE_DISABLE 0xFFFFEFFF
1558 #define NV_PRAMDAC_FP_DEBUG_2_HTOTAL_TESTMODE_ENABLE 0x00001000
1559 #define NV_PRAMDAC_FP_DEBUG_2_VTOTAL_VALUE 0x0FFF0000
1560 #define NV_PRAMDAC_FP_DEBUG_2_VTOTAL_TESTMODE 0x10000000
1561 #define NV_PRAMDAC_FP_DEBUG_2_VTOTAL_TESTMODE_DISABLE 0xEFFFFFFF
1562 #define NV_PRAMDAC_FP_DEBUG_2_VTOTAL_TESTMODE_ENABLE 0x10000000
1563 
1564 /* NV-Register NV_PRAMDAC_FP_DEBUG_3 */
1565 #define NV_PRAMDAC_FP_DEBUG_3 0x0068088C
1566 #define NV_PRAMDAC_FP_DEBUG_3_XSTEPSIZE 0x00001FFF
1567 #define NV_PRAMDAC_FP_DEBUG_3_YSTEPSIZE 0x1FFF0000
1568 
1569 /* NV-Register NV_PRAMDAC_FP_RAM_CONTROL */
1570 #define NV_PRAMDAC_FP_RAM_CONTROL 0x006808A0
1571 #define NV_PRAMDAC_FP_RAM_CONTROL_ADDRESS 0x000001FF
1572 #define NV_PRAMDAC_FP_RAM_CONTROL_TESTMODE 0x00010000
1573 #define NV_PRAMDAC_FP_RAM_CONTROL_TESTMODE_DISABLE 0xFFFEFFFF
1574 #define NV_PRAMDAC_FP_RAM_CONTROL_TESTMODE_ENABLE 0x00010000
1575 
1576 /* NV-Register NV_PRAMDAC_FP_RAM_DATA_0 */
1577 #define NV_PRAMDAC_FP_RAM_DATA_0 0x006808A4
1578 #define NV_PRAMDAC_FP_RAM_DATA_0_VAL 0xFFFFFFFF
1579 
1580 /* NV-Register NV_PRAMDAC_FP_RAM_DATA_1 */
1581 #define NV_PRAMDAC_FP_RAM_DATA_1 0x006808A8
1582 #define NV_PRAMDAC_FP_RAM_DATA_1_VAL 0xFFFFFFFF
1583 
1584 /* NV-Register NV_PRAMDAC_FP_RAM_DATA_2 */
1585 #define NV_PRAMDAC_FP_RAM_DATA_2 0x006808AC
1586 #define NV_PRAMDAC_FP_RAM_DATA_2_VAL 0x000000FF
1587 
1588 /* NV-Register NV_PRAMDAC_FP_TMDS_CONTROL */
1589 #define NV_PRAMDAC_FP_TMDS_CONTROL 0x006808B0
1590 #define NV_PRAMDAC_FP_TMDS_CONTROL_ADDRESS 0x000000FF
1591 #define NV_PRAMDAC_FP_TMDS_CONTROL_WRITE 0x00010000
1592 #define NV_PRAMDAC_FP_TMDS_CONTROL_WRITE_DISABLE 0xFFFEFFFF
1593 #define NV_PRAMDAC_FP_TMDS_CONTROL_WRITE_ENABLE 0x00010000
1594 
1595 /* NV-Register NV_PRAMDAC_FP_TMDS_DATA */
1596 #define NV_PRAMDAC_FP_TMDS_DATA 0x006808B0
1597 #define NV_PRAMDAC_FP_TMDS_DATA_DATA 0x000000FF
1598 
1599 /* NV-Register NV_USER_DAC_PIXEL_MASK */
1600 #define NV_USER_DAC_PIXEL_MASK 0x006813C6
1601 #define NV_USER_DAC_PIXEL_MASK_VALUE 0x000000FF
1602 #define NV_USER_DAC_PIXEL_MASK_MASK 0x000000FF
1603 
1604 /* NV-Register NV_USER_DAC_READ_MODE_ADDRESS */
1605 #define NV_USER_DAC_READ_MODE_ADDRESS 0x006813C7
1606 #define NV_USER_DAC_READ_MODE_ADDRESS_VALUE 0x000000FF
1607 #define NV_USER_DAC_READ_MODE_ADDRESS_WO_VALUE 0x000000FF
1608 #define NV_USER_DAC_READ_MODE_ADDRESS_RW_STATE 0x00000003
1609 #define NV_USER_DAC_READ_MODE_ADDRESS_RW_STATE_WRITE 0x00000000
1610 #define NV_USER_DAC_READ_MODE_ADDRESS_RW_STATE_READ 0x00000003
1611 
1612 /* NV-Register NV_USER_DAC_WRITE_MODE_ADDRESS */
1613 #define NV_USER_DAC_WRITE_MODE_ADDRESS 0x006813C8
1614 #define NV_USER_DAC_WRITE_MODE_ADDRESS_VALUE 0x000000FF
1615 
1616 /* NV-Register NV_USER_DAC_PALETTE_DATA */
1617 #define NV_USER_DAC_PALETTE_DATA 0x006813C9
1618 #define NV_USER_DAC_PALETTE_DATA_VALUE 0x000000FF
1619 
1620 /* NV-Register NV_PRAMDAC_INDIR_TMDS_PLL0 */
1621 #define NV_PRAMDAC_INDIR_TMDS_PLL0 0x00000000
1622 #define NV_PRAMDAC_INDIR_TMDS_PLL0_SEL10UA 0x00000001
1623 #define NV_PRAMDAC_INDIR_TMDS_PLL0_SEL10UA_RESET 0x00000001
1624 #define NV_PRAMDAC_INDIR_TMDS_PLL0_SEL50UA 0x00000002
1625 #define NV_PRAMDAC_INDIR_TMDS_PLL0_SEL50UA_RESET 0xFFFFFFFD
1626 #define NV_PRAMDAC_INDIR_TMDS_PLL0_SEL100UA 0x00000004
1627 #define NV_PRAMDAC_INDIR_TMDS_PLL0_SEL100UA_RESET 0xFFFFFFFB
1628 #define NV_PRAMDAC_INDIR_TMDS_PLL0_FILSEL 0x00000038
1629 #define NV_PRAMDAC_INDIR_TMDS_PLL0_FILSEL_RESET 0x00000000
1630 #define NV_PRAMDAC_INDIR_TMDS_PLL0_CONF 0x000000C0
1631 #define NV_PRAMDAC_INDIR_TMDS_PLL0_CONF_RESET 0x00000000
1632 
1633 /* NV-Register NV_PRAMDAC_INDIR_TMDS_PLL1 */
1634 #define NV_PRAMDAC_INDIR_TMDS_PLL1 0x00000001
1635 #define NV_PRAMDAC_INDIR_TMDS_PLL1_RSEL 0x00000007
1636 #define NV_PRAMDAC_INDIR_TMDS_PLL1_RSEL_RESET 0x00000007
1637 #define NV_PRAMDAC_INDIR_TMDS_PLL1_CSEL 0x00000018
1638 #define NV_PRAMDAC_INDIR_TMDS_PLL1_CSEL_RESET 0x00000018
1639 #define NV_PRAMDAC_INDIR_TMDS_PLL1_DIVBY1 0x00000020
1640 #define NV_PRAMDAC_INDIR_TMDS_PLL1_DIVBY1_RESET 0xFFFFFFDF
1641 #define NV_PRAMDAC_INDIR_TMDS_PLL1_DIVBY10 0x00000040
1642 #define NV_PRAMDAC_INDIR_TMDS_PLL1_DIVBY10_RESET 0x00000040
1643 #define NV_PRAMDAC_INDIR_TMDS_PLL1_IRSEL 0x00000080
1644 #define NV_PRAMDAC_INDIR_TMDS_PLL1_IRSEL_RESET 0x00000080
1645 
1646 /* NV-Register NV_PRAMDAC_INDIR_TMDS_IDLY */
1647 #define NV_PRAMDAC_INDIR_TMDS_IDLY 0x00000002
1648 #define NV_PRAMDAC_INDIR_TMDS_IDLY_IDEL 0x0000000F
1649 #define NV_PRAMDAC_INDIR_TMDS_IDLY_IDEL_RESET 0x00000000
1650 #define NV_PRAMDAC_INDIR_TMDS_IDLY_CDEL 0x000000F0
1651 #define NV_PRAMDAC_INDIR_TMDS_IDLY_CDEL_RESET 0x00000030
1652 
1653 /* NV-Register NV_PRAMDAC_INDIR_TMDS_TRIG0 */
1654 #define NV_PRAMDAC_INDIR_TMDS_TRIG0 0x00000003
1655 #define NV_PRAMDAC_INDIR_TMDS_TRIG0_VAL 0x000000FF
1656 #define NV_PRAMDAC_INDIR_TMDS_TRIG0_VAL_RESET 0x00000000
1657 
1658 /* NV-Register NV_PRAMDAC_INDIR_TMDS_TRIG1 */
1659 #define NV_PRAMDAC_INDIR_TMDS_TRIG1 0x00000004
1660 #define NV_PRAMDAC_INDIR_TMDS_TRIG1_VAL 0x000000FF
1661 #define NV_PRAMDAC_INDIR_TMDS_TRIG1_VAL_RESET 0x00000000
1662 
1663 /* NV-Register NV_PRAMDAC_INDIR_TMDS_TRIG2 */
1664 #define NV_PRAMDAC_INDIR_TMDS_TRIG2 0x00000005
1665 #define NV_PRAMDAC_INDIR_TMDS_TRIG2_VAL 0x000000FF
1666 #define NV_PRAMDAC_INDIR_TMDS_TRIG2_VAL_RESET 0x00000000
1667 
1668 /* NV-Register NV_PRAMDAC_INDIR_TMDS_VCRCO0 */
1669 #define NV_PRAMDAC_INDIR_TMDS_VCRCO0 0x00000006
1670 #define NV_PRAMDAC_INDIR_TMDS_VCRCO0_VAL 0x000000FF
1671 
1672 /* NV-Register NV_PRAMDAC_INDIR_TMDS_VCRCO1 */
1673 #define NV_PRAMDAC_INDIR_TMDS_VCRCO1 0x00000007
1674 #define NV_PRAMDAC_INDIR_TMDS_VCRCO1_VAL 0x000000FF
1675 
1676 /* NV-Register NV_PRAMDAC_INDIR_TMDS_VCRCO2 */
1677 #define NV_PRAMDAC_INDIR_TMDS_VCRCO2 0x00000008
1678 #define NV_PRAMDAC_INDIR_TMDS_VCRCO2_VAL 0x000000FF
1679 
1680 /* NV-Register NV_PRAMDAC_INDIR_TMDS_VCRCO3 */
1681 #define NV_PRAMDAC_INDIR_TMDS_VCRCO3 0x00000008
1682 #define NV_PRAMDAC_INDIR_TMDS_VCRCO3_VAL 0x000000FF
1683 
1684 /* NV-Register NV_PRAMDAC_INDIR_TMDS_VCRCE0 */
1685 #define NV_PRAMDAC_INDIR_TMDS_VCRCE0 0x0000000A
1686 #define NV_PRAMDAC_INDIR_TMDS_VCRCE0_VAL 0x000000FF
1687 
1688 /* NV-Register NV_PRAMDAC_INDIR_TMDS_VCRCE1 */
1689 #define NV_PRAMDAC_INDIR_TMDS_VCRCE1 0x0000000B
1690 #define NV_PRAMDAC_INDIR_TMDS_VCRCE1_VAL 0x000000FF
1691 
1692 /* NV-Register NV_PRAMDAC_INDIR_TMDS_VCRCE2 */
1693 #define NV_PRAMDAC_INDIR_TMDS_VCRCE2 0x0000000C
1694 #define NV_PRAMDAC_INDIR_TMDS_VCRCE2_VAL 0x000000FF
1695 
1696 /* NV-Register NV_PRAMDAC_INDIR_TMDS_VCRCE3 */
1697 #define NV_PRAMDAC_INDIR_TMDS_VCRCE3 0x0000000D
1698 #define NV_PRAMDAC_INDIR_TMDS_VCRCE3_VAL 0x000000FF
1699 
1700 /* NV-Register NV_PRAMDAC_INDIR_TMDS_IDATAO0 */
1701 #define NV_PRAMDAC_INDIR_TMDS_IDATAO0 0x0000000E
1702 #define NV_PRAMDAC_INDIR_TMDS_IDATAO0_VAL 0x000000FF
1703 
1704 /* NV-Register NV_PRAMDAC_INDIR_TMDS_IDATAO1 */
1705 #define NV_PRAMDAC_INDIR_TMDS_IDATAO1 0x0000000F
1706 #define NV_PRAMDAC_INDIR_TMDS_IDATAO1_VAL 0x000000FF
1707 
1708 /* NV-Register NV_PRAMDAC_INDIR_TMDS_IDATAO2 */
1709 #define NV_PRAMDAC_INDIR_TMDS_IDATAO2 0x00000010
1710 #define NV_PRAMDAC_INDIR_TMDS_IDATAO2_VAL 0x000000FF
1711 
1712 /* NV-Register NV_PRAMDAC_INDIR_TMDS_IDATAO3 */
1713 #define NV_PRAMDAC_INDIR_TMDS_IDATAO3 0x00000011
1714 #define NV_PRAMDAC_INDIR_TMDS_IDATAO3_VAL 0x000000FF
1715 
1716 /* NV-Register NV_PRAMDAC_INDIR_TMDS_IDATAE0 */
1717 #define NV_PRAMDAC_INDIR_TMDS_IDATAE0 0x00000012
1718 #define NV_PRAMDAC_INDIR_TMDS_IDATAE0_VAL 0x000000FF
1719 
1720 /* NV-Register NV_PRAMDAC_INDIR_TMDS_IDATAE1 */
1721 #define NV_PRAMDAC_INDIR_TMDS_IDATAE1 0x00000013
1722 #define NV_PRAMDAC_INDIR_TMDS_IDATAE1_VAL 0x000000FF
1723 
1724 /* NV-Register NV_PRAMDAC_INDIR_TMDS_IDATAE2 */
1725 #define NV_PRAMDAC_INDIR_TMDS_IDATAE2 0x00000014
1726 #define NV_PRAMDAC_INDIR_TMDS_IDATAE2_VAL 0x000000FF
1727 
1728 /* NV-Register NV_PRAMDAC_INDIR_TMDS_IDATAE3 */
1729 #define NV_PRAMDAC_INDIR_TMDS_IDATAE3 0x00000015
1730 #define NV_PRAMDAC_INDIR_TMDS_IDATAE3_VAL 0x000000FF
1731 
1732 /* NV-Register NV_PRAMDAC_INDIR_TMDS_EDATAO0 */
1733 #define NV_PRAMDAC_INDIR_TMDS_EDATAO0 0x00000016
1734 #define NV_PRAMDAC_INDIR_TMDS_EDATAO0_VAL 0x000000FF
1735 
1736 /* NV-Register NV_PRAMDAC_INDIR_TMDS_EDATAO1 */
1737 #define NV_PRAMDAC_INDIR_TMDS_EDATAO1 0x00000017
1738 #define NV_PRAMDAC_INDIR_TMDS_EDATAO1_VAL 0x000000FF
1739 
1740 /* NV-Register NV_PRAMDAC_INDIR_TMDS_EDATAO2 */
1741 #define NV_PRAMDAC_INDIR_TMDS_EDATAO2 0x00000018
1742 #define NV_PRAMDAC_INDIR_TMDS_EDATAO2_VAL 0x000000FF
1743 
1744 /* NV-Register NV_PRAMDAC_INDIR_TMDS_EDATAO3 */
1745 #define NV_PRAMDAC_INDIR_TMDS_EDATAO3 0x00000019
1746 #define NV_PRAMDAC_INDIR_TMDS_EDATAO3_VAL 0x000000FF
1747 
1748 /* NV-Register NV_PRAMDAC_INDIR_TMDS_EDATAE0 */
1749 #define NV_PRAMDAC_INDIR_TMDS_EDATAE0 0x0000001A
1750 #define NV_PRAMDAC_INDIR_TMDS_EDATAE0_VAL 0x000000FF
1751 
1752 /* NV-Register NV_PRAMDAC_INDIR_TMDS_EDATAE1 */
1753 #define NV_PRAMDAC_INDIR_TMDS_EDATAE1 0x0000001B
1754 #define NV_PRAMDAC_INDIR_TMDS_EDATAE1_VAL 0x000000FF
1755 
1756 /* NV-Register NV_PRAMDAC_INDIR_TMDS_EDATAE2 */
1757 #define NV_PRAMDAC_INDIR_TMDS_EDATAE2 0x0000001C
1758 #define NV_PRAMDAC_INDIR_TMDS_EDATAE2_VAL 0x000000FF
1759 
1760 /* NV-Register NV_PRAMDAC_INDIR_TMDS_EDATAE3 */
1761 #define NV_PRAMDAC_INDIR_TMDS_EDATAE3 0x0000001D
1762 #define NV_PRAMDAC_INDIR_TMDS_EDATAE3_VAL 0x000000FF
1763 
1764 /* NV-Register NV_PRAMDAC_INDIR_TMDS_CNTL0 */
1765 #define NV_PRAMDAC_INDIR_TMDS_CNTL0 0x0000001E
1766 #define NV_PRAMDAC_INDIR_TMDS_CNTL0_VAL 0x000000FF
1767 
1768 /* NV-Register NV_PRAMDAC_INDIR_TMDS_CNTH0 */
1769 #define NV_PRAMDAC_INDIR_TMDS_CNTH0 0x0000001F
1770 #define NV_PRAMDAC_INDIR_TMDS_CNTH0_VAL 0x000000FF
1771 
1772 /* NV-Register NV_PRAMDAC_INDIR_TMDS_CNTL1 */
1773 #define NV_PRAMDAC_INDIR_TMDS_CNTL1 0x00000020
1774 #define NV_PRAMDAC_INDIR_TMDS_CNTL1_VAL 0x000000FF
1775 
1776 /* NV-Register NV_PRAMDAC_INDIR_TMDS_CNTH1 */
1777 #define NV_PRAMDAC_INDIR_TMDS_CNTH1 0x00000021
1778 #define NV_PRAMDAC_INDIR_TMDS_CNTH1_VAL 0x000000FF
1779 
1780 /* NV-Register NV_PRAMDAC_INDIR_TMDS_CNTL2 */
1781 #define NV_PRAMDAC_INDIR_TMDS_CNTL2 0x00000022
1782 #define NV_PRAMDAC_INDIR_TMDS_CNTL2_VAL 0x000000FF
1783 
1784 /* NV-Register NV_PRAMDAC_INDIR_TMDS_CNTH2 */
1785 #define NV_PRAMDAC_INDIR_TMDS_CNTH2 0x00000023
1786 #define NV_PRAMDAC_INDIR_TMDS_CNTH2_VAL 0x000000FF
1787 
1788 /* NV-Register NV_PRAMDAC_INDIR_TMDS_CNTL3 */
1789 #define NV_PRAMDAC_INDIR_TMDS_CNTL3 0x00000024
1790 #define NV_PRAMDAC_INDIR_TMDS_CNTL3_VAL 0x000000FF
1791 
1792 /* NV-Register NV_PRAMDAC_INDIR_TMDS_CNTH3 */
1793 #define NV_PRAMDAC_INDIR_TMDS_CNTH3 0x00000025
1794 #define NV_PRAMDAC_INDIR_TMDS_CNTH3_VAL 0x000000FF
1795 
1796 /* NV-Register NV_PRAMDAC_INDIR_TMDS_CNTL4 */
1797 #define NV_PRAMDAC_INDIR_TMDS_CNTL4 0x00000026
1798 #define NV_PRAMDAC_INDIR_TMDS_CNTL4_VAL 0x000000FF
1799 
1800 /* NV-Register NV_PRAMDAC_INDIR_TMDS_CNTH4 */
1801 #define NV_PRAMDAC_INDIR_TMDS_CNTH4 0x00000027
1802 #define NV_PRAMDAC_INDIR_TMDS_CNTH4_VAL 0x000000FF
1803 
1804 /* NV-Register NV_PRAMDAC_INDIR_TMDS_CNTL5 */
1805 #define NV_PRAMDAC_INDIR_TMDS_CNTL5 0x00000028
1806 #define NV_PRAMDAC_INDIR_TMDS_CNTL5_VAL 0x000000FF
1807 
1808 /* NV-Register NV_PRAMDAC_INDIR_TMDS_CNTH5 */
1809 #define NV_PRAMDAC_INDIR_TMDS_CNTH5 0x00000029
1810 #define NV_PRAMDAC_INDIR_TMDS_CNTH5_VAL 0x000000FF
1811 
1812 /* NV-Register NV_PRAMDAC_INDIR_TMDS_CCRCO0 */
1813 #define NV_PRAMDAC_INDIR_TMDS_CCRCO0 0x0000002A
1814 #define NV_PRAMDAC_INDIR_TMDS_CCRCO0_VAL 0x000000FF
1815 
1816 /* NV-Register NV_PRAMDAC_INDIR_TMDS_CCRCO1 */
1817 #define NV_PRAMDAC_INDIR_TMDS_CCRCO1 0x0000002B
1818 #define NV_PRAMDAC_INDIR_TMDS_CCRCO1_VAL 0x000000FF
1819 
1820 /* NV-Register NV_PRAMDAC_INDIR_TMDS_CCRCO2 */
1821 #define NV_PRAMDAC_INDIR_TMDS_CCRCO2 0x0000002C
1822 #define NV_PRAMDAC_INDIR_TMDS_CCRCO2_VAL 0x000000FF
1823 
1824 /* NV-Register NV_PRAMDAC_INDIR_TMDS_CCRCO3 */
1825 #define NV_PRAMDAC_INDIR_TMDS_CCRCO3 0x0000002D
1826 #define NV_PRAMDAC_INDIR_TMDS_CCRCO3_VAL 0x000000FF
1827 
1828 /* NV-Register NV_PRAMDAC_INDIR_TMDS_CCRCE0 */
1829 #define NV_PRAMDAC_INDIR_TMDS_CCRCE0 0x0000002E
1830 #define NV_PRAMDAC_INDIR_TMDS_CCRCE0_VAL 0x000000FF
1831 
1832 /* NV-Register NV_PRAMDAC_INDIR_TMDS_CCRCE1 */
1833 #define NV_PRAMDAC_INDIR_TMDS_CCRCE1 0x0000002F
1834 #define NV_PRAMDAC_INDIR_TMDS_CCRCE1_VAL 0x000000FF
1835 
1836 /* NV-Register NV_PRAMDAC_INDIR_TMDS_CCRCE2 */
1837 #define NV_PRAMDAC_INDIR_TMDS_CCRCE2 0x00000030
1838 #define NV_PRAMDAC_INDIR_TMDS_CCRCE2_VAL 0x000000FF
1839 
1840 /* NV-Register NV_PRAMDAC_INDIR_TMDS_CCRCE3 */
1841 #define NV_PRAMDAC_INDIR_TMDS_CCRCE3 0x00000031
1842 #define NV_PRAMDAC_INDIR_TMDS_CCRCE3_VAL 0x000000FF
1843 
1844 /* NV-Device NV_PDVD */
1845 #define NV_PDVD 0x00700000 /* size: 0x00001FFF */
1846 
1847 /* NV-Register NV_PDVD_DEBUG_0 */
1848 #define NV_PDVD_DEBUG_0 0x00700080
1849 #define NV_PDVD_DEBUG_0_STATE 0x00000001
1850 #define NV_PDVD_DEBUG_0_STATE_NORMAL 0xFFFFFFFE
1851 #define NV_PDVD_DEBUG_0_STATE_RESET 0x00000001
1852 
1853 /* NV-Register NV_PDVD_INTR */
1854 #define NV_PDVD_INTR 0x00700100
1855 #define NV_PDVD_INTR_NOTIFY 0x00000001
1856 #define NV_PDVD_INTR_NOTIFY_NOT_PENDING 0xFFFFFFFE
1857 #define NV_PDVD_INTR_NOTIFY_PENDING 0x00000001
1858 #define NV_PDVD_INTR_NOTIFY_RESET 0x00000001
1859 
1860 /* NV-Register NV_PDVD_INTR_EN */
1861 #define NV_PDVD_INTR_EN 0x00700140
1862 #define NV_PDVD_INTR_EN_NOTIFY 0x00000001
1863 #define NV_PDVD_INTR_EN_NOTIFY_DISABLED 0xFFFFFFFE
1864 #define NV_PDVD_INTR_EN_NOTIFY_ENABLED 0x00000001
1865 
1866 /* NV-Register NV_PDVD_CTX_SWITCH */
1867 #define NV_PDVD_CTX_SWITCH 0x00700180
1868 #define NV_PDVD_CTX_SWITCH_INSTANCE 0x0000FFFF
1869 #define NV_PDVD_CTX_SWITCH_SUBCHID 0x00070000
1870 #define NV_PDVD_CTX_SWITCH_CHID 0x0F000000
1871 
1872 /* NV-Register NV_PDVD_NOTIFY */
1873 #define NV_PDVD_NOTIFY 0x00700184
1874 #define NV_PDVD_NOTIFY_STYLE 0xFFFFFFFF
1875 #define NV_PDVD_NOTIFY_STYLE_WRITE_ONLY 0x00000000
1876 #define NV_PDVD_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001
1877 
1878 /* NV-Register NV_PDVD_CTX_DMA_NOTIFIES */
1879 #define NV_PDVD_CTX_DMA_NOTIFIES 0x00700188
1880 #define NV_PDVD_CTX_DMA_NOTIFIES_INSTANCE 0x0000FFFF
1881 
1882 /* NV-Register NV_PDVD_CTX_DMA_0 */
1883 #define NV_PDVD_CTX_DMA_0 0x0070018C
1884 #define NV_PDVD_CTX_DMA_0_IN 0x0000FFFF
1885 #define NV_PDVD_CTX_DMA_0_OUT 0xFFFF0000
1886 
1887 /* NV-Register NV_PDVD_CTX_DMA_1 */
1888 #define NV_PDVD_CTX_DMA_1 0x00700190
1889 #define NV_PDVD_CTX_DMA_1_IN 0x0000FFFF
1890 #define NV_PDVD_CTX_DMA_1_IDCT 0xFFFF0000
1891 
1892 /* NV-Register NV_PDVD_CONTROL */
1893 #define NV_PDVD_CONTROL 0x00700194
1894 #define NV_PDVD_CONTROL_CTX_MAP_SLOT0 0x00000001
1895 #define NV_PDVD_CONTROL_CTX_MAP_SLOT0_IN0 0xFFFFFFFE
1896 #define NV_PDVD_CONTROL_CTX_MAP_SLOT0_IN1 0x00000001
1897 #define NV_PDVD_CONTROL_CTX_MAP_SLOT1 0x00000002
1898 #define NV_PDVD_CONTROL_CTX_MAP_SLOT1_IN0 0xFFFFFFFD
1899 #define NV_PDVD_CONTROL_CTX_MAP_SLOT1_IN1 0x00000002
1900 #define NV_PDVD_CONTROL_CTX_MAP_SLOT2 0x00000004
1901 #define NV_PDVD_CONTROL_CTX_MAP_SLOT2_IN0 0xFFFFFFFB
1902 #define NV_PDVD_CONTROL_CTX_MAP_SLOT2_IN1 0x00000004
1903 #define NV_PDVD_CONTROL_CTX_MAP_SLOT3 0x00000008
1904 #define NV_PDVD_CONTROL_CTX_MAP_SLOT3_IN0 0xFFFFFFF7
1905 #define NV_PDVD_CONTROL_CTX_MAP_SLOT3_IN1 0x00000008
1906 #define NV_PDVD_CONTROL_COMMAND 0x00000030
1907 #define NV_PDVD_CONTROL_COMMAND_DONE 0x00000000
1908 #define NV_PDVD_CONTROL_COMMAND_RD 0x00000010
1909 #define NV_PDVD_CONTROL_COMMAND_WR 0x00000020
1910 #define NV_PDVD_CONTROL_COMMAND_RDWR 0x00000030
1911 
1912 /* NV-Register NV_PDVD_IDCT_OFFSET */
1913 #define NV_PDVD_IDCT_OFFSET 0x00700198
1914 #define NV_PDVD_IDCT_OFFSET_VALUE 0xFFFFFFFF
1915 
1916 /* NV-Register NV_PDVD_RAMDVD_CTX_TABLE_BASE */
1917 #define NV_PDVD_RAMDVD_CTX_TABLE_BASE 0x00700200
1918 #define NV_PDVD_RAMDVD_CTX_TABLE_BASE_ADDRESS 0x0000FF00
1919 
1920 /* NV-Register NV_PDVD_FIFO_ACCESS */
1921 #define NV_PDVD_FIFO_ACCESS 0x00700300
1922 #define NV_PDVD_FIFO_ACCESS_ENABLE 0x00000001
1923 #define NV_PDVD_FIFO_ACCESS_BUSY 0x00000010
1924 
1925 /* NV-Register NV_PDVD_DMA_STATUS */
1926 #define NV_PDVD_DMA_STATUS 0x00700304
1927 #define NV_PDVD_DMA_STATUS_PMI 0x0000000F
1928 #define NV_PDVD_DMA_STATUS_FBI 0x000F0000
1929 
1930 /* NV-Register NV_PDVD_PMI_ADJ_OFFSET */
1931 #define NV_PDVD_PMI_ADJ_OFFSET 0x00700310
1932 #define NV_PDVD_PMI_ADJ_OFFSET_VALUE 0xFFFFFFFF
1933 
1934 /* NV-Register NV_PDVD_PMI_PT_PHYS */
1935 #define NV_PDVD_PMI_PT_PHYS 0x00700314
1936 #define NV_PDVD_PMI_PT_PHYS_PAGE 0x00000001
1937 #define NV_PDVD_PMI_PT_PHYS_PAGE_NOT_PRESENT 0xFFFFFFFE
1938 #define NV_PDVD_PMI_PT_PHYS_PAGE_PRESENT 0x00000001
1939 #define NV_PDVD_PMI_PT_PHYS_ACCESS 0x00000002
1940 #define NV_PDVD_PMI_PT_PHYS_ACCESS_READ_ONLY 0xFFFFFFFD
1941 #define NV_PDVD_PMI_PT_PHYS_ACCESS_READ_WRITE 0x00000002
1942 #define NV_PDVD_PMI_PT_PHYS_ADDRESS 0xFFFFF000
1943 
1944 /* NV-Register NV_PDVD_PMI_DMA_SIZE */
1945 #define NV_PDVD_PMI_DMA_SIZE 0x00700318
1946 #define NV_PDVD_PMI_DMA_SIZE_VALUE 0x00003FFF
1947 
1948 /* NV-Register NV_PDVD_FBI_ADJ_OFFSET */
1949 #define NV_PDVD_FBI_ADJ_OFFSET 0x0070031C
1950 #define NV_PDVD_FBI_ADJ_OFFSET_VALUE 0xFFFFFFFF
1951 
1952 /* NV-Register NV_PDVD_FBI_PT_PHYS */
1953 #define NV_PDVD_FBI_PT_PHYS 0x00700320
1954 #define NV_PDVD_FBI_PT_PHYS_PAGE 0x00000001
1955 #define NV_PDVD_FBI_PT_PHYS_PAGE_NOT_PRESENT 0xFFFFFFFE
1956 #define NV_PDVD_FBI_PT_PHYS_PAGE_PRESENT 0x00000001
1957 #define NV_PDVD_FBI_PT_PHYS_ACCESS 0x00000002
1958 #define NV_PDVD_FBI_PT_PHYS_ACCESS_READ_ONLY 0xFFFFFFFD
1959 #define NV_PDVD_FBI_PT_PHYS_ACCESS_READ_WRITE 0x00000002
1960 #define NV_PDVD_FBI_PT_PHYS_ADDRESS 0xFFFFF000
1961 
1962 /* NV-Register NV_PDVD_FBI_DMA_SIZE */
1963 #define NV_PDVD_FBI_DMA_SIZE 0x00700324
1964 #define NV_PDVD_FBI_DMA_SIZE_VALUE 0x00003FFF
1965 
1966 /* NV-Register NV_PDVD_OFFSET_IN */
1967 #define NV_PDVD_OFFSET_IN 0x00700328
1968 #define NV_PDVD_OFFSET_IN_VALUE 0xFFFFFFFF
1969 
1970 /* NV-Register NV_PDVD_OFFSET_OUT */
1971 #define NV_PDVD_OFFSET_OUT 0x0070032C
1972 #define NV_PDVD_OFFSET_OUT_VALUE 0xFFFFFFFF
1973 
1974 /* NV-Register NV_PDVD_PITCH_IN */
1975 #define NV_PDVD_PITCH_IN 0x00700330
1976 #define NV_PDVD_PITCH_IN_VALUE 0xFFFFFFFF
1977 
1978 /* NV-Register NV_PDVD_PITCH_OUT */
1979 #define NV_PDVD_PITCH_OUT 0x00700334
1980 #define NV_PDVD_PITCH_OUT_VALUE 0xFFFFFFFF
1981 
1982 /* NV-Register NV_PDVD_LINE_LENGTH_IN */
1983 #define NV_PDVD_LINE_LENGTH_IN 0x00700338
1984 #define NV_PDVD_LINE_LENGTH_IN_VALUE 0xFFFFFFFF
1985 
1986 /* NV-Register NV_PDVD_LINE_COUNT */
1987 #define NV_PDVD_LINE_COUNT 0x0070033C
1988 #define NV_PDVD_LINE_COUNT_VALUE 0xFFFFFFFF
1989 
1990 /* NV-Register NV_PDVD_FORMAT */
1991 #define NV_PDVD_FORMAT 0x00700340
1992 #define NV_PDVD_FORMAT_INPUT_INC 0x00000007
1993 #define NV_PDVD_FORMAT_INPUT_INC_1 0x00000001
1994 #define NV_PDVD_FORMAT_INPUT_INC_2 0x00000002
1995 #define NV_PDVD_FORMAT_INPUT_INC_4 0x00000004
1996 #define NV_PDVD_FORMAT_OUTPUT_INC 0x00000700
1997 #define NV_PDVD_FORMAT_OUTPUT_INC_1 0x00000100
1998 #define NV_PDVD_FORMAT_OUTPUT_INC_2 0x00000200
1999 #define NV_PDVD_FORMAT_OUTPUT_INC_4 0x00000400
2000 
2001 /* NV-Register NV_PDVD_TRAPPED_ADDR */
2002 #define NV_PDVD_TRAPPED_ADDR 0x00700704
2003 #define NV_PDVD_TRAPPED_ADDR_MTHD 0x00001FFC
2004 #define NV_PDVD_TRAPPED_ADDR_SUBCH 0x0000E000
2005 #define NV_PDVD_TRAPPED_ADDR_CHID 0x0F000000
2006 
2007 /* NV-Register NV_PDVD_TRAPPED_DATA */
2008 #define NV_PDVD_TRAPPED_DATA 0x00700708
2009 #define NV_PDVD_TRAPPED_DATA_VALUE 0xFFFFFFFF
2010 
2011 /* NV-Register NV_PDVD_NEXT_ADDR */
2012 #define NV_PDVD_NEXT_ADDR 0x0070070C
2013 #define NV_PDVD_NEXT_ADDR_MTHD 0x00001FFC
2014 #define NV_PDVD_NEXT_ADDR_SUBCH 0x0000E000
2015 #define NV_PDVD_NEXT_ADDR_CHID 0x0F000000
2016 
2017 /* NV-Register NV_PDVD_NEXT_DATA */
2018 #define NV_PDVD_NEXT_DATA 0x00700710
2019 #define NV_PDVD_NEXT_DATA_VALUE 0xFFFFFFFF
2020 
2021 /* NV-Device NV_PEXTDEV */
2022 #define NV_PEXTDEV 0x00101000 /* size: 0x00000FFF */
2023 
2024 /* NV-Device NV_PROM */
2025 #define NV_PROM 0x00300000 /* size: 0x0000FFFF */
2026 
2027 /* NV-Device NV_PDAC */
2028 #define NV_PDAC 0x00680000 /* size: 0x00000FFF */
2029 
2030 /* NV-Register NV_PEXTDEV_BOOT_0 */
2031 #define NV_PEXTDEV_BOOT_0 0x00101000
2032 #define NV_PEXTDEV_BOOT_0_STRAP_PCI_AD 0x00000001
2033 #define NV_PEXTDEV_BOOT_0_STRAP_PCI_AD_REVERSED 0xFFFFFFFE
2034 #define NV_PEXTDEV_BOOT_0_STRAP_PCI_AD_NORMAL 0x00000001
2035 #define NV_PEXTDEV_BOOT_0_STRAP_SUB_VENDOR 0x00000002
2036 #define NV_PEXTDEV_BOOT_0_STRAP_SUB_VENDOR_NO_BIOS 0xFFFFFFFD
2037 #define NV_PEXTDEV_BOOT_0_STRAP_SUB_VENDOR_BIOS 0x00000002
2038 #define NV_PEXTDEV_BOOT_0_STRAP_RAMCFG 0x0000003C
2039 #define NV_PEXTDEV_BOOT_0_STRAP_CRYSTAL 0x00000040
2040 #define NV_PEXTDEV_BOOT_0_STRAP_CRYSTAL_13500K 0xFFFFFFBF
2041 #define NV_PEXTDEV_BOOT_0_STRAP_CRYSTAL_14318180 0x00000040
2042 #define NV_PEXTDEV_BOOT_0_STRAP_TVMODE 0x00000180
2043 #define NV_PEXTDEV_BOOT_0_STRAP_TVMODE_SECAM 0x00000000
2044 #define NV_PEXTDEV_BOOT_0_STRAP_TVMODE_NTSC 0x00000080
2045 #define NV_PEXTDEV_BOOT_0_STRAP_TVMODE_PAL 0x00000100
2046 #define NV_PEXTDEV_BOOT_0_STRAP_TVMODE_DISABLED 0x00000180
2047 #define NV_PEXTDEV_BOOT_0_STRAP_AGP_4X 0x00000200
2048 #define NV_PEXTDEV_BOOT_0_STRAP_AGP_4X_ENABLED 0xFFFFFDFF
2049 #define NV_PEXTDEV_BOOT_0_STRAP_AGP_4X_DISABLED 0x00000200
2050 #define NV_PEXTDEV_BOOT_0_STRAP_AGP_SBA 0x00000400
2051 #define NV_PEXTDEV_BOOT_0_STRAP_AGP_SBA_ENABLED 0xFFFFFBFF
2052 #define NV_PEXTDEV_BOOT_0_STRAP_AGP_SBA_DISABLED 0x00000400
2053 #define NV_PEXTDEV_BOOT_0_STRAP_AGP_FASTWR 0x00000800
2054 #define NV_PEXTDEV_BOOT_0_STRAP_AGP_FASTWR_ENABLED 0xFFFFF7FF
2055 #define NV_PEXTDEV_BOOT_0_STRAP_AGP_FASTWR_DISABLED 0x00000800
2056 #define NV_PEXTDEV_BOOT_0_STRAP_PCI_DEVID 0x00003000
2057 #define NV_PEXTDEV_BOOT_0_STRAP_PCI_DEVID_0 0x00000000
2058 #define NV_PEXTDEV_BOOT_0_STRAP_PCI_DEVID_1 0x00001000
2059 #define NV_PEXTDEV_BOOT_0_STRAP_PCI_DEVID_2 0x00002000
2060 #define NV_PEXTDEV_BOOT_0_STRAP_PCI_DEVID_3 0x00003000
2061 #define NV_PEXTDEV_BOOT_0_STRAP_BUS_TYPE 0x00004000
2062 #define NV_PEXTDEV_BOOT_0_STRAP_BUS_TYPE_PCI 0xFFFFBFFF
2063 #define NV_PEXTDEV_BOOT_0_STRAP_BUS_TYPE_AGP 0x00004000
2064 #define NV_PEXTDEV_BOOT_0_STRAP_FP_IFACE 0x00008000
2065 #define NV_PEXTDEV_BOOT_0_STRAP_FP_IFACE_24BIT 0xFFFF7FFF
2066 #define NV_PEXTDEV_BOOT_0_STRAP_FP_IFACE_12BIT 0x00008000
2067 #define NV_PEXTDEV_BOOT_0_STRAP_FB 0x00030000
2068 #define NV_PEXTDEV_BOOT_0_STRAP_FB_64M 0x00000000
2069 #define NV_PEXTDEV_BOOT_0_STRAP_FB_128M 0x00010000
2070 #define NV_PEXTDEV_BOOT_0_STRAP_FB_256M 0x00020000
2071 #define NV_PEXTDEV_BOOT_0_STRAP_FB_512M 0x00030000
2072 #define NV_PEXTDEV_BOOT_0_STRAP_BR 0x00040000
2073 #define NV_PEXTDEV_BOOT_0_STRAP_BR_ENABLED 0xFFFBFFFF
2074 #define NV_PEXTDEV_BOOT_0_STRAP_BR_DISABLED 0x00040000
2075 #define NV_PEXTDEV_BOOT_0_STRAP_OVERWRITE 0x80000000
2076 #define NV_PEXTDEV_BOOT_0_STRAP_OVERWRITE_DISABLED 0x7FFFFFFF
2077 #define NV_PEXTDEV_BOOT_0_STRAP_OVERWRITE_ENABLED 0x80000000
2078 
2079 /* NV-Register NV_PEXTDEV_NEW_BOOT_0 */
2080 #define NV_PEXTDEV_NEW_BOOT_0 0x00101000
2081 #define NV_PEXTDEV_NEW_BOOT_0_STRAP_VALUE 0x0000FFFF
2082 #define NV_PEXTDEV_NEW_BOOT_0_STRAP_OVERWRITE 0x80000000
2083 #define NV_PEXTDEV_NEW_BOOT_0_STRAP_OVERWRITE_DISABLED 0x7FFFFFFF
2084 #define NV_PEXTDEV_NEW_BOOT_0_STRAP_OVERWRITE_ENABLED 0x80000000
2085 
2086 /* NV-Array NV_PDAC_DATA (4 byte access) */
2087 #define NV_PDAC_DATA 0x00680000
2088 /* NV-Array size NV_PDAC_DATA__SIZE_1 [0..15] */
2089 #define NV_PDAC_DATA__SIZE_1 0x00000010
2090 #define NV_PDAC_DATA_VALUE 0x000000FF
2091 
2092 /* NV-Array NV_PROM_DATA (1 byte access) */
2093 #define NV_PROM_DATA 0x00300000
2094 /* NV-Array size NV_PROM_DATA__SIZE_1 [0..65535] */
2095 #define NV_PROM_DATA__SIZE_1 0x00010000
2096 #define NV_PROM_DATA_VALUE 0x000000FF
2097 
2098 /* NV-Device NV_PFB */
2099 #define NV_PFB 0x00100000 /* size: 0x00000FFF */
2100 
2101 /* NV-Memory NV_PFBM */
2102 #define NV_PFBM 0x08000000 /* size: 0x37FFFFFF */
2103 
2104 /* NV-Memory NV_PFBIN */
2105 #define NV_PFBIN 0x00700000 /* size: 0x000FFFFF */
2106 
2107 /* NV-Register NV_PFB_DEBUG_0 */
2108 #define NV_PFB_DEBUG_0 0x00100080
2109 #define NV_PFB_DEBUG_0_CLM1 0x00000001
2110 #define NV_PFB_DEBUG_0_CLM1_DISABLED 0xFFFFFFFE
2111 #define NV_PFB_DEBUG_0_CLM1_ENABLED 0x00000001
2112 #define NV_PFB_DEBUG_0_CLP1 0x00000002
2113 #define NV_PFB_DEBUG_0_CLP1_DISABLED 0xFFFFFFFD
2114 #define NV_PFB_DEBUG_0_CLP1_ENABLED 0x00000002
2115 #define NV_PFB_DEBUG_0_MRS 0x00000010
2116 #define NV_PFB_DEBUG_0_MRS_256 0xFFFFFFEF
2117 #define NV_PFB_DEBUG_0_MRS_2 0x00000010
2118 #define NV_PFB_DEBUG_0_PREA 0x00000100
2119 #define NV_PFB_DEBUG_0_PREA_DISABLED 0xFFFFFEFF
2120 #define NV_PFB_DEBUG_0_PREA_ENABLED 0x00000100
2121 #define NV_PFB_DEBUG_0_PREL 0x00001000
2122 #define NV_PFB_DEBUG_0_PREL_DISABLED 0xFFFFEFFF
2123 #define NV_PFB_DEBUG_0_PREL_ENABLED 0x00001000
2124 #define NV_PFB_DEBUG_0_TC 0x00300000
2125 #define NV_PFB_DEBUG_0_TC_8 0x00000000
2126 #define NV_PFB_DEBUG_0_TC_4 0x00100000
2127 #define NV_PFB_DEBUG_0_TC_2 0x00200000
2128 #define NV_PFB_DEBUG_0_XTRA_SETTLE 0x01000000
2129 #define NV_PFB_DEBUG_0_XTRA_SETTLE_DISABLED 0xFEFFFFFF
2130 #define NV_PFB_DEBUG_0_XTRA_SETTLE_ENABLED 0x01000000
2131 
2132 /* NV-Register NV_PFB_CFG0 */
2133 #define NV_PFB_CFG0 0x00100200
2134 #define NV_PFB_CFG0_PART 0x00000007
2135 #define NV_PFB_CFG0_PART_1 0x00000001
2136 #define NV_PFB_CFG0_PART_2 0x00000002
2137 #define NV_PFB_CFG0_PART_4 0x00000004
2138 #define NV_PFB_CFG0_PARTSENSE 0x00000030
2139 #define NV_PFB_CFG0_PARTSENSE_00 0x00000000
2140 #define NV_PFB_CFG0_PARTSENSE_01 0x00000010
2141 #define NV_PFB_CFG0_PARTSENSE_10 0x00000020
2142 #define NV_PFB_CFG0_PARTSENSE_11 0x00000030
2143 #define NV_PFB_CFG0_EXTBANK 0x00000100
2144 #define NV_PFB_CFG0_EXTBANK_0 0xFFFFFEFF
2145 #define NV_PFB_CFG0_EXTBANK_1 0x00000100
2146 
2147 /* NV-Register NV_PFB_CFG1 */
2148 #define NV_PFB_CFG1 0x00100204
2149 #define NV_PFB_CFG1_TYPE 0x00000001
2150 #define NV_PFB_CFG1_TYPE_SDR 0xFFFFFFFE
2151 #define NV_PFB_CFG1_TYPE_DDR 0x00000001
2152 #define NV_PFB_CFG1_RAM 0x00000010
2153 #define NV_PFB_CFG1_RAM_8 0xFFFFFFEF
2154 #define NV_PFB_CFG1_RAM_32 0x00000010
2155 #define NV_PFB_CFG1_DQS 0x00000100
2156 #define NV_PFB_CFG1_DQS_NORMAL 0xFFFFFEFF
2157 #define NV_PFB_CFG1_DQS_EARLY 0x00000100
2158 #define NV_PFB_CFG1_COL 0x0000F000
2159 #define NV_PFB_CFG1_COL_8 0x00000000
2160 #define NV_PFB_CFG1_COL_9 0x00001000
2161 #define NV_PFB_CFG1_COL_10 0x00002000
2162 #define NV_PFB_CFG1_ROWA 0x000F0000
2163 #define NV_PFB_CFG1_ROWA_9 0x00010000
2164 #define NV_PFB_CFG1_ROWA_10 0x00020000
2165 #define NV_PFB_CFG1_ROWA_11 0x00030000
2166 #define NV_PFB_CFG1_ROWA_12 0x00040000
2167 #define NV_PFB_CFG1_ROWA_13 0x00050000
2168 #define NV_PFB_CFG1_ROWB 0x00F00000
2169 #define NV_PFB_CFG1_ROWB_9 0x00100000
2170 #define NV_PFB_CFG1_ROWB_10 0x00200000
2171 #define NV_PFB_CFG1_ROWB_11 0x00300000
2172 #define NV_PFB_CFG1_ROWB_12 0x00400000
2173 #define NV_PFB_CFG1_ROWB_13 0x00500000
2174 #define NV_PFB_CFG1_BANKA 0x01000000
2175 #define NV_PFB_CFG1_BANKA_1 0xFEFFFFFF
2176 #define NV_PFB_CFG1_BANKA_2 0x01000000
2177 #define NV_PFB_CFG1_BANKB 0x10000000
2178 #define NV_PFB_CFG1_BANKB_0 0xEFFFFFFF
2179 #define NV_PFB_CFG1_BANKB_1 0x10000000
2180 
2181 /* NV-Register NV_PFB_REFCTRL */
2182 #define NV_PFB_REFCTRL 0x00100210
2183 #define NV_PFB_REFCTRL_PUT 0x0000001F
2184 #define NV_PFB_REFCTRL_PUT_0 0x00000000
2185 #define NV_PFB_REFCTRL_GET 0x00001F00
2186 #define NV_PFB_REFCTRL_GET_0 0x00000000
2187 #define NV_PFB_REFCTRL_VALID 0x80000000
2188 #define NV_PFB_REFCTRL_VALID_0 0x7FFFFFFF
2189 #define NV_PFB_REFCTRL_VALID_1 0x80000000
2190 
2191 /* NV-Register NV_PFB_NVM */
2192 #define NV_PFB_NVM 0x00100214
2193 #define NV_PFB_NVM_MODE 0x00000001
2194 #define NV_PFB_NVM_MODE_DISABLE 0xFFFFFFFE
2195 #define NV_PFB_NVM_MODE_ENABLE 0x00000001
2196 #define NV_PFB_NVM_LIMIT 0x000000F0
2197 #define NV_PFB_NVM_LIMIT_64K 0x00000000
2198 #define NV_PFB_NVM_LIMIT_128K 0x00000010
2199 #define NV_PFB_NVM_LIMIT_192K 0x00000020
2200 #define NV_PFB_NVM_LIMIT_256K 0x00000030
2201 #define NV_PFB_NVM_LIMIT_320K 0x00000040
2202 #define NV_PFB_NVM_LIMIT_384K 0x00000050
2203 #define NV_PFB_NVM_LIMIT_448K 0x00000060
2204 #define NV_PFB_NVM_LIMIT_512K 0x00000070
2205 #define NV_PFB_NVM_LIMIT_576K 0x00000080
2206 #define NV_PFB_NVM_LIMIT_640K 0x00000090
2207 #define NV_PFB_NVM_LIMIT_704K 0x000000A0
2208 #define NV_PFB_NVM_LIMIT_768K 0x000000B0
2209 #define NV_PFB_NVM_LIMIT_832K 0x000000C0
2210 #define NV_PFB_NVM_LIMIT_896K 0x000000D0
2211 #define NV_PFB_NVM_LIMIT_960K 0x000000E0
2212 #define NV_PFB_NVM_LIMIT_1024K 0x000000F0
2213 
2214 /* NV-Register NV_PFB_PIN */
2215 #define NV_PFB_PIN 0x00100218
2216 #define NV_PFB_PIN_CKE 0x00000001
2217 #define NV_PFB_PIN_CKE_POWERDOWN 0xFFFFFFFE
2218 #define NV_PFB_PIN_CKE_NORMAL 0x00000001
2219 #define NV_PFB_PIN_DQM 0x00000010
2220 #define NV_PFB_PIN_DQM_NORMAL 0xFFFFFFEF
2221 #define NV_PFB_PIN_DQM_INACTIVE 0x00000010
2222 
2223 /* NV-Register NV_PFB_PAD */
2224 #define NV_PFB_PAD 0x0010021C
2225 #define NV_PFB_PAD_CKE 0x00000001
2226 #define NV_PFB_PAD_CKE_TRISTATE 0xFFFFFFFE
2227 #define NV_PFB_PAD_CKE_NORMAL 0x00000001
2228 
2229 /* NV-Register NV_PFB_TIMING0 */
2230 #define NV_PFB_TIMING0 0x00100220
2231 #define NV_PFB_TIMING0_RC 0x0000001F
2232 #define NV_PFB_TIMING0_RC_31 0x0000001F
2233 #define NV_PFB_TIMING0_RFC 0x00001F00
2234 #define NV_PFB_TIMING0_RFC_31 0x00001F00
2235 #define NV_PFB_TIMING0_RAS 0x001F0000
2236 #define NV_PFB_TIMING0_RAS_31 0x001F0000
2237 #define NV_PFB_TIMING0_RCD 0x0F000000
2238 #define NV_PFB_TIMING0_RCD_15 0x0F000000
2239 #define NV_PFB_TIMING0_RP 0xF0000000
2240 #define NV_PFB_TIMING0_RP_15 0xF0000000
2241 
2242 /* NV-Register NV_PFB_TIMING1 */
2243 #define NV_PFB_TIMING1 0x00100224
2244 #define NV_PFB_TIMING1_R2W 0x00000070
2245 #define NV_PFB_TIMING1_R2W_7 0x00000070
2246 #define NV_PFB_TIMING1_R2P 0x00000700
2247 #define NV_PFB_TIMING1_R2P_7 0x00000700
2248 #define NV_PFB_TIMING1_REXT 0x00003000
2249 #define NV_PFB_TIMING1_REXT_1 0x00001000
2250 #define NV_PFB_TIMING1_REXT_2 0x00002000
2251 #define NV_PFB_TIMING1_W2R 0x00070000
2252 #define NV_PFB_TIMING1_W2R_7 0x00070000
2253 #define NV_PFB_TIMING1_W2P 0x00700000
2254 #define NV_PFB_TIMING1_W2P_7 0x00700000
2255 #define NV_PFB_TIMING1_RRD 0x07000000
2256 #define NV_PFB_TIMING1_RRD_7 0x07000000
2257 
2258 /* NV-Register NV_PFB_TIMING2 */
2259 #define NV_PFB_TIMING2 0x00100228
2260 #define NV_PFB_TIMING2_REFRESH 0x0000FFE0
2261 #define NV_PFB_TIMING2_REFRESH_0 0x00000000
2262 #define NV_PFB_TIMING2_REFRESH_LO 0x0000001F
2263 #define NV_PFB_TIMING2_REFRESH_LO_1F 0x0000001F
2264 
2265 /* NV-Array NV_PFB_TILE (16 byte access) */
2266 #define NV_PFB_TILE 0x00100240
2267 /* NV-Array size NV_PFB_TILE__SIZE_1 [0..7] */
2268 #define NV_PFB_TILE__SIZE_1 0x00000008
2269 #define NV_PFB_TILE_REGION 0x00000001
2270 #define NV_PFB_TILE_REGION_INVALID 0xFFFFFFFE
2271 #define NV_PFB_TILE_REGION_VALID 0x00000001
2272 #define NV_PFB_TILE_BANK0_SENSE 0x00000002
2273 #define NV_PFB_TILE_BANK0_SENSE_0 0xFFFFFFFD
2274 #define NV_PFB_TILE_BANK0_SENSE_1 0x00000002
2275 #define NV_PFB_TILE_ADR 0xFFFFC000
2276 
2277 /* NV-Array NV_PFB_TLIMIT (16 byte access) */
2278 #define NV_PFB_TLIMIT 0x00100244
2279 /* NV-Array size NV_PFB_TLIMIT__SIZE_1 [0..7] */
2280 #define NV_PFB_TLIMIT__SIZE_1 0x00000008
2281 #define NV_PFB_TLIMIT_ADR 0xFFFFC000
2282 #define NV_PFB_TLIMIT_ADR_LO 0x00003FFF
2283 #define NV_PFB_TLIMIT_ADR_LO_3FFF 0x00003FFF
2284 
2285 /* NV-Array NV_PFB_TSIZE (16 byte access) */
2286 #define NV_PFB_TSIZE 0x00100248
2287 /* NV-Array size NV_PFB_TSIZE__SIZE_1 [0..7] */
2288 #define NV_PFB_TSIZE__SIZE_1 0x00000008
2289 #define NV_PFB_TSIZE_PITCH 0x0000FF00
2290 #define NV_PFB_TSIZE_PITCH_0200 0x00000200
2291 #define NV_PFB_TSIZE_PITCH_0300 0x00000300
2292 #define NV_PFB_TSIZE_PITCH_0400 0x00000400
2293 #define NV_PFB_TSIZE_PITCH_0500 0x00000500
2294 #define NV_PFB_TSIZE_PITCH_0600 0x00000600
2295 #define NV_PFB_TSIZE_PITCH_0700 0x00000700
2296 #define NV_PFB_TSIZE_PITCH_0800 0x00000800
2297 #define NV_PFB_TSIZE_PITCH_0A00 0x00000A00
2298 #define NV_PFB_TSIZE_PITCH_0C00 0x00000C00
2299 #define NV_PFB_TSIZE_PITCH_0E00 0x00000E00
2300 #define NV_PFB_TSIZE_PITCH_1000 0x00001000
2301 #define NV_PFB_TSIZE_PITCH_1400 0x00001400
2302 #define NV_PFB_TSIZE_PITCH_1800 0x00001800
2303 #define NV_PFB_TSIZE_PITCH_1C00 0x00001C00
2304 #define NV_PFB_TSIZE_PITCH_2000 0x00002000
2305 #define NV_PFB_TSIZE_PITCH_2800 0x00002800
2306 #define NV_PFB_TSIZE_PITCH_3000 0x00003000
2307 #define NV_PFB_TSIZE_PITCH_3800 0x00003800
2308 #define NV_PFB_TSIZE_PITCH_4000 0x00004000
2309 #define NV_PFB_TSIZE_PITCH_5000 0x00005000
2310 #define NV_PFB_TSIZE_PITCH_6000 0x00006000
2311 #define NV_PFB_TSIZE_PITCH_7000 0x00007000
2312 #define NV_PFB_TSIZE_PITCH_8000 0x00008000
2313 #define NV_PFB_TSIZE_PITCH_A000 0x0000A000
2314 #define NV_PFB_TSIZE_PITCH_C000 0x0000C000
2315 #define NV_PFB_TSIZE_PITCH_E000 0x0000E000
2316 
2317 /* NV-Array NV_PFB_TSTATUS (16 byte access) */
2318 #define NV_PFB_TSTATUS 0x0010024C
2319 /* NV-Array size NV_PFB_TSTATUS__SIZE_1 [0..7] */
2320 #define NV_PFB_TSTATUS__SIZE_1 0x00000008
2321 #define NV_PFB_TSTATUS_PRIME 0x00000003
2322 #define NV_PFB_TSTATUS_PRIME_1 0x00000000
2323 #define NV_PFB_TSTATUS_PRIME_3 0x00000001
2324 #define NV_PFB_TSTATUS_PRIME_5 0x00000002
2325 #define NV_PFB_TSTATUS_PRIME_7 0x00000003
2326 #define NV_PFB_TSTATUS_FACTOR 0x00000070
2327 #define NV_PFB_TSTATUS_FACTOR_1 0x00000000
2328 #define NV_PFB_TSTATUS_FACTOR_2 0x00000010
2329 #define NV_PFB_TSTATUS_FACTOR_4 0x00000020
2330 #define NV_PFB_TSTATUS_FACTOR_8 0x00000030
2331 #define NV_PFB_TSTATUS_FACTOR_16 0x00000040
2332 #define NV_PFB_TSTATUS_FACTOR_32 0x00000050
2333 #define NV_PFB_TSTATUS_FACTOR_64 0x00000060
2334 #define NV_PFB_TSTATUS_FACTOR_128 0x00000070
2335 #define NV_PFB_TSTATUS_REGION 0x80000000
2336 #define NV_PFB_TSTATUS_REGION_INVALID 0x7FFFFFFF
2337 #define NV_PFB_TSTATUS_REGION_VALID 0x80000000
2338 
2339 /* NV-Register NV_PFB_MRS */
2340 #define NV_PFB_MRS 0x001002C0
2341 #define NV_PFB_MRS_BL 0x00000007
2342 #define NV_PFB_MRS_BL_1 0x00000000
2343 #define NV_PFB_MRS_BL_2 0x00000001
2344 #define NV_PFB_MRS_BT 0x00000008
2345 #define NV_PFB_MRS_BT_SEQ 0xFFFFFFF7
2346 #define NV_PFB_MRS_CL 0x00000070
2347 #define NV_PFB_MRS_CL_2 0x00000020
2348 #define NV_PFB_MRS_CL_3 0x00000030
2349 #define NV_PFB_MRS_CL_4 0x00000040
2350 #define NV_PFB_MRS_R0 0x00000080
2351 #define NV_PFB_MRS_R0_NORMAL 0xFFFFFF7F
2352 #define NV_PFB_MRS_DLL 0x00000100
2353 #define NV_PFB_MRS_DLL_NORMAL 0xFFFFFEFF
2354 #define NV_PFB_MRS_DLL_RESET 0x00000100
2355 #define NV_PFB_MRS_R1 0x00000E00
2356 #define NV_PFB_MRS_R1_NORMAL 0x00000000
2357 
2358 /* NV-Register NV_PFB_EMRS */
2359 #define NV_PFB_EMRS 0x001002C4
2360 #define NV_PFB_EMRS_DLL 0x00000001
2361 #define NV_PFB_EMRS_DLL_ENABLE 0xFFFFFFFE
2362 #define NV_PFB_EMRS_DLL_DISABLE 0x00000001
2363 #define NV_PFB_EMRS_R0 0x00000FFE
2364 #define NV_PFB_EMRS_R0_NORMAL 0x00000000
2365 
2366 /* NV-Register NV_PFB_REF */
2367 #define NV_PFB_REF 0x001002D0
2368 #define NV_PFB_REF_CMD 0x00000001
2369 #define NV_PFB_REF_CMD_REFRESH 0x00000001
2370 
2371 /* NV-Register NV_PFB_PRE */
2372 #define NV_PFB_PRE 0x001002D4
2373 #define NV_PFB_PRE_CMD 0x00000001
2374 #define NV_PFB_PRE_CMD_PRECHARGE 0x00000001
2375 
2376 /* NV-Array NV_PFB_ZCOMP (4 byte access) */
2377 #define NV_PFB_ZCOMP 0x00100300
2378 /* NV-Array size NV_PFB_ZCOMP__SIZE_1 [0..7] */
2379 #define NV_PFB_ZCOMP__SIZE_1 0x00000008
2380 #define NV_PFB_ZCOMP_BASE_TAG_ADR 0x0003FFC0
2381 #define NV_PFB_ZCOMP_MODE 0x04000000
2382 #define NV_PFB_ZCOMP_MODE_16 0xFBFFFFFF
2383 #define NV_PFB_ZCOMP_MODE_32 0x04000000
2384 #define NV_PFB_ZCOMP_EN 0x80000000
2385 #define NV_PFB_ZCOMP_EN_FALSE 0x7FFFFFFF
2386 #define NV_PFB_ZCOMP_EN_TRUE 0x80000000
2387 
2388 /* NV-Register NV_PFB_ZCOMP_MAX_TAG */
2389 #define NV_PFB_ZCOMP_MAX_TAG 0x00100320
2390 #define NV_PFB_ZCOMP_MAX_TAG_ADR 0x0003FFC0
2391 
2392 /* NV-Register NV_PFB_ZCOMP_OFFSET */
2393 #define NV_PFB_ZCOMP_OFFSET 0x00100324
2394 #define NV_PFB_ZCOMP_OFFSET_ADR_SPACE 0x0000000F
2395 #define NV_PFB_ZCOMP_OFFSET_ADR 0x03FFC000
2396 #define NV_PFB_ZCOMP_OFFSET_EN 0x80000000
2397 #define NV_PFB_ZCOMP_OFFSET_EN_FALSE 0x7FFFFFFF
2398 #define NV_PFB_ZCOMP_OFFSET_EN_TRUE 0x80000000
2399 
2400 /* NV-Register NV_PFB_ARB_PREDIVIDER */
2401 #define NV_PFB_ARB_PREDIVIDER 0x00100328
2402 #define NV_PFB_ARB_PREDIVIDER_DIV 0x000000FF
2403 #define NV_PFB_ARB_PREDIVIDER_DIV_20 0x00000020
2404 
2405 /* NV-Register NV_PFB_ARB_TIMEOUT */
2406 #define NV_PFB_ARB_TIMEOUT 0x0010032C
2407 #define NV_PFB_ARB_TIMEOUT_LP 0x000000F0
2408 #define NV_PFB_ARB_TIMEOUT_LP_8 0x00000080
2409 #define NV_PFB_ARB_TIMEOUT_LP_DISABLE 0x000000F0
2410 #define NV_PFB_ARB_TIMEOUT_ZO 0x00000F00
2411 #define NV_PFB_ARB_TIMEOUT_ZO_8 0x00000800
2412 #define NV_PFB_ARB_TIMEOUT_ZO_DISABLE 0x00000F00
2413 #define NV_PFB_ARB_TIMEOUT_TX 0x0000F000
2414 #define NV_PFB_ARB_TIMEOUT_TX_8 0x00008000
2415 #define NV_PFB_ARB_TIMEOUT_TX_DISABLE 0x0000F000
2416 #define NV_PFB_ARB_TIMEOUT_ZR 0x000F0000
2417 #define NV_PFB_ARB_TIMEOUT_ZR_8 0x00080000
2418 #define NV_PFB_ARB_TIMEOUT_ZR_DISABLE 0x000F0000
2419 #define NV_PFB_ARB_TIMEOUT_ZW 0x00F00000
2420 #define NV_PFB_ARB_TIMEOUT_ZW_8 0x00800000
2421 #define NV_PFB_ARB_TIMEOUT_ZW_DISABLE 0x00F00000
2422 #define NV_PFB_ARB_TIMEOUT_CR 0x0F000000
2423 #define NV_PFB_ARB_TIMEOUT_CR_8 0x08000000
2424 #define NV_PFB_ARB_TIMEOUT_CR_DISABLE 0x0F000000
2425 #define NV_PFB_ARB_TIMEOUT_CW 0xF0000000
2426 #define NV_PFB_ARB_TIMEOUT_CW_8 0x80000000
2427 #define NV_PFB_ARB_TIMEOUT_CW_DISABLE 0xF0000000
2428 
2429 /* NV-Register NV_PFB_ARB_XFER_SZ */
2430 #define NV_PFB_ARB_XFER_SZ 0x00100330
2431 #define NV_PFB_ARB_XFER_SZ_HP 0x0000000F
2432 #define NV_PFB_ARB_XFER_SZ_HP_8 0x00000004
2433 #define NV_PFB_ARB_XFER_SZ_HP_MIN 0x00000000
2434 #define NV_PFB_ARB_XFER_SZ_HP_INF 0x0000000F
2435 #define NV_PFB_ARB_XFER_SZ_LP 0x000000F0
2436 #define NV_PFB_ARB_XFER_SZ_LP_8 0x00000040
2437 #define NV_PFB_ARB_XFER_SZ_LP_MIN 0x00000000
2438 #define NV_PFB_ARB_XFER_SZ_LP_INF 0x000000F0
2439 #define NV_PFB_ARB_XFER_SZ_ZO 0x00000F00
2440 #define NV_PFB_ARB_XFER_SZ_ZO_8 0x00000400
2441 #define NV_PFB_ARB_XFER_SZ_ZO_MIN 0x00000000
2442 #define NV_PFB_ARB_XFER_SZ_ZO_INF 0x00000F00
2443 #define NV_PFB_ARB_XFER_SZ_TX 0x0000F000
2444 #define NV_PFB_ARB_XFER_SZ_TX_8 0x00004000
2445 #define NV_PFB_ARB_XFER_SZ_TX_MIN 0x00000000
2446 #define NV_PFB_ARB_XFER_SZ_TX_INF 0x0000F000
2447 #define NV_PFB_ARB_XFER_SZ_ZR 0x000F0000
2448 #define NV_PFB_ARB_XFER_SZ_ZR_8 0x00040000
2449 #define NV_PFB_ARB_XFER_SZ_ZR_MIN 0x00000000
2450 #define NV_PFB_ARB_XFER_SZ_ZR_INF 0x000F0000
2451 #define NV_PFB_ARB_XFER_SZ_ZW 0x00F00000
2452 #define NV_PFB_ARB_XFER_SZ_ZW_8 0x00400000
2453 #define NV_PFB_ARB_XFER_SZ_ZW_MIN 0x00000000
2454 #define NV_PFB_ARB_XFER_SZ_ZW_INF 0x00F00000
2455 #define NV_PFB_ARB_XFER_SZ_CR 0x0F000000
2456 #define NV_PFB_ARB_XFER_SZ_CR_8 0x04000000
2457 #define NV_PFB_ARB_XFER_SZ_CR_MIN 0x00000000
2458 #define NV_PFB_ARB_XFER_SZ_CR_INF 0x0F000000
2459 #define NV_PFB_ARB_XFER_SZ_CW 0xF0000000
2460 #define NV_PFB_ARB_XFER_SZ_CW_8 0x40000000
2461 #define NV_PFB_ARB_XFER_SZ_CW_MIN 0x00000000
2462 #define NV_PFB_ARB_XFER_SZ_CW_INF 0xF0000000
2463 
2464 /* NV-Register NV_PFB_CLOSE_PAGE0 */
2465 #define NV_PFB_CLOSE_PAGE0 0x00100334
2466 #define NV_PFB_CLOSE_PAGE0_DIFF_ROW_HP 0x00000001
2467 #define NV_PFB_CLOSE_PAGE0_DIFF_ROW_HP_DISABLED 0xFFFFFFFE
2468 #define NV_PFB_CLOSE_PAGE0_DIFF_ROW_HP_ENABLED 0x00000001
2469 #define NV_PFB_CLOSE_PAGE0_DIFF_ROW_LP 0x00000002
2470 #define NV_PFB_CLOSE_PAGE0_DIFF_ROW_LP_DISABLED 0xFFFFFFFD
2471 #define NV_PFB_CLOSE_PAGE0_DIFF_ROW_LP_ENABLED 0x00000002
2472 #define NV_PFB_CLOSE_PAGE0_DIFF_ROW_ZO 0x00000004
2473 #define NV_PFB_CLOSE_PAGE0_DIFF_ROW_ZO_DISABLED 0xFFFFFFFB
2474 #define NV_PFB_CLOSE_PAGE0_DIFF_ROW_ZO_ENABLED 0x00000004
2475 #define NV_PFB_CLOSE_PAGE0_DIFF_ROW_TX 0x00000008
2476 #define NV_PFB_CLOSE_PAGE0_DIFF_ROW_TX_DISABLED 0xFFFFFFF7
2477 #define NV_PFB_CLOSE_PAGE0_DIFF_ROW_TX_ENABLED 0x00000008
2478 #define NV_PFB_CLOSE_PAGE0_DIFF_ROW_ZR 0x00000010
2479 #define NV_PFB_CLOSE_PAGE0_DIFF_ROW_ZR_DISABLED 0xFFFFFFEF
2480 #define NV_PFB_CLOSE_PAGE0_DIFF_ROW_ZR_ENABLED 0x00000010
2481 #define NV_PFB_CLOSE_PAGE0_DIFF_ROW_ZW 0x00000020
2482 #define NV_PFB_CLOSE_PAGE0_DIFF_ROW_ZW_DISABLED 0xFFFFFFDF
2483 #define NV_PFB_CLOSE_PAGE0_DIFF_ROW_ZW_ENABLED 0x00000020
2484 #define NV_PFB_CLOSE_PAGE0_DIFF_ROW_CR 0x00000040
2485 #define NV_PFB_CLOSE_PAGE0_DIFF_ROW_CR_DISABLED 0xFFFFFFBF
2486 #define NV_PFB_CLOSE_PAGE0_DIFF_ROW_CR_ENABLED 0x00000040
2487 #define NV_PFB_CLOSE_PAGE0_DIFF_ROW_CW 0x00000080
2488 #define NV_PFB_CLOSE_PAGE0_DIFF_ROW_CW_DISABLED 0xFFFFFF7F
2489 #define NV_PFB_CLOSE_PAGE0_DIFF_ROW_CW_ENABLED 0x00000080
2490 
2491 /* NV-Register NV_PFB_CLOSE_PAGE1 */
2492 #define NV_PFB_CLOSE_PAGE1 0x00100338
2493 #define NV_PFB_CLOSE_PAGE1_DIFF_BANK_HP 0x00000001
2494 #define NV_PFB_CLOSE_PAGE1_DIFF_BANK_HP_DISABLED 0xFFFFFFFE
2495 #define NV_PFB_CLOSE_PAGE1_DIFF_BANK_HP_ENABLED 0x00000001
2496 #define NV_PFB_CLOSE_PAGE1_DIFF_BANK_LP 0x00000002
2497 #define NV_PFB_CLOSE_PAGE1_DIFF_BANK_LP_DISABLED 0xFFFFFFFD
2498 #define NV_PFB_CLOSE_PAGE1_DIFF_BANK_LP_ENABLED 0x00000002
2499 #define NV_PFB_CLOSE_PAGE1_DIFF_BANK_ZO 0x00000004
2500 #define NV_PFB_CLOSE_PAGE1_DIFF_BANK_ZO_DISABLED 0xFFFFFFFB
2501 #define NV_PFB_CLOSE_PAGE1_DIFF_BANK_ZO_ENABLED 0x00000004
2502 #define NV_PFB_CLOSE_PAGE1_DIFF_BANK_TX 0x00000008
2503 #define NV_PFB_CLOSE_PAGE1_DIFF_BANK_TX_DISABLED 0xFFFFFFF7
2504 #define NV_PFB_CLOSE_PAGE1_DIFF_BANK_TX_ENABLED 0x00000008
2505 #define NV_PFB_CLOSE_PAGE1_DIFF_BANK_ZR 0x00000010
2506 #define NV_PFB_CLOSE_PAGE1_DIFF_BANK_ZR_DISABLED 0xFFFFFFEF
2507 #define NV_PFB_CLOSE_PAGE1_DIFF_BANK_ZR_ENABLED 0x00000010
2508 #define NV_PFB_CLOSE_PAGE1_DIFF_BANK_ZW 0x00000020
2509 #define NV_PFB_CLOSE_PAGE1_DIFF_BANK_ZW_DISABLED 0xFFFFFFDF
2510 #define NV_PFB_CLOSE_PAGE1_DIFF_BANK_ZW_ENABLED 0x00000020
2511 #define NV_PFB_CLOSE_PAGE1_DIFF_BANK_CR 0x00000040
2512 #define NV_PFB_CLOSE_PAGE1_DIFF_BANK_CR_DISABLED 0xFFFFFFBF
2513 #define NV_PFB_CLOSE_PAGE1_DIFF_BANK_CR_ENABLED 0x00000040
2514 #define NV_PFB_CLOSE_PAGE1_DIFF_BANK_CW 0x00000080
2515 #define NV_PFB_CLOSE_PAGE1_DIFF_BANK_CW_DISABLED 0xFFFFFF7F
2516 #define NV_PFB_CLOSE_PAGE1_DIFF_BANK_CW_ENABLED 0x00000080
2517 
2518 /* NV-Register NV_PFB_CLOSE_PAGE2 */
2519 #define NV_PFB_CLOSE_PAGE2 0x0010033C
2520 #define NV_PFB_CLOSE_PAGE2_Q_EMPTY_HP 0x00000001
2521 #define NV_PFB_CLOSE_PAGE2_Q_EMPTY_HP_DISABLED 0xFFFFFFFE
2522 #define NV_PFB_CLOSE_PAGE2_Q_EMPTY_HP_ENABLED 0x00000001
2523 #define NV_PFB_CLOSE_PAGE2_Q_EMPTY_LP 0x00000002
2524 #define NV_PFB_CLOSE_PAGE2_Q_EMPTY_LP_DISABLED 0xFFFFFFFD
2525 #define NV_PFB_CLOSE_PAGE2_Q_EMPTY_LP_ENABLED 0x00000002
2526 #define NV_PFB_CLOSE_PAGE2_Q_EMPTY_ZO 0x00000004
2527 #define NV_PFB_CLOSE_PAGE2_Q_EMPTY_ZO_DISABLED 0xFFFFFFFB
2528 #define NV_PFB_CLOSE_PAGE2_Q_EMPTY_ZO_ENABLED 0x00000004
2529 #define NV_PFB_CLOSE_PAGE2_Q_EMPTY_TX 0x00000008
2530 #define NV_PFB_CLOSE_PAGE2_Q_EMPTY_TX_DISABLED 0xFFFFFFF7
2531 #define NV_PFB_CLOSE_PAGE2_Q_EMPTY_TX_ENABLED 0x00000008
2532 #define NV_PFB_CLOSE_PAGE2_Q_EMPTY_ZR 0x00000010
2533 #define NV_PFB_CLOSE_PAGE2_Q_EMPTY_ZR_DISABLED 0xFFFFFFEF
2534 #define NV_PFB_CLOSE_PAGE2_Q_EMPTY_ZR_ENABLED 0x00000010
2535 #define NV_PFB_CLOSE_PAGE2_Q_EMPTY_ZW 0x00000020
2536 #define NV_PFB_CLOSE_PAGE2_Q_EMPTY_ZW_DISABLED 0xFFFFFFDF
2537 #define NV_PFB_CLOSE_PAGE2_Q_EMPTY_ZW_ENABLED 0x00000020
2538 #define NV_PFB_CLOSE_PAGE2_Q_EMPTY_CR 0x00000040
2539 #define NV_PFB_CLOSE_PAGE2_Q_EMPTY_CR_DISABLED 0xFFFFFFBF
2540 #define NV_PFB_CLOSE_PAGE2_Q_EMPTY_CR_ENABLED 0x00000040
2541 #define NV_PFB_CLOSE_PAGE2_Q_EMPTY_CW 0x00000080
2542 #define NV_PFB_CLOSE_PAGE2_Q_EMPTY_CW_DISABLED 0xFFFFFF7F
2543 #define NV_PFB_CLOSE_PAGE2_Q_EMPTY_CW_ENABLED 0x00000080
2544 
2545 /* NV-Register NV_PFB_STRAP */
2546 #define NV_PFB_STRAP 0x00101000
2547 #define NV_PFB_STRAP_PCI_AD 0x00000001
2548 #define NV_PFB_STRAP_PCI_AD_REVERSED 0xFFFFFFFE
2549 #define NV_PFB_STRAP_PCI_AD_NORMAL 0x00000001
2550 #define NV_PFB_STRAP_SUB_VENDOR 0x00000002
2551 #define NV_PFB_STRAP_SUB_VENDOR_NO_BIOS 0xFFFFFFFD
2552 #define NV_PFB_STRAP_SUB_VENDOR_BIOS 0x00000002
2553 #define NV_PFB_STRAP_RAMCFG 0x0000003C
2554 #define NV_PFB_STRAP_CRYSTAL 0x00000040
2555 #define NV_PFB_STRAP_CRYSTAL_13500K 0xFFFFFFBF
2556 #define NV_PFB_STRAP_CRYSTAL_14318180 0x00000040
2557 #define NV_PFB_STRAP_TVMODE 0x00000180
2558 #define NV_PFB_STRAP_TVMODE_SECAM 0x00000000
2559 #define NV_PFB_STRAP_TVMODE_NTSC 0x00000080
2560 #define NV_PFB_STRAP_TVMODE_PAL 0x00000100
2561 #define NV_PFB_STRAP_TVMODE_DISABLED 0x00000180
2562 #define NV_PFB_STRAP_AGP_4X 0x00000200
2563 #define NV_PFB_STRAP_AGP_4X_ENABLED 0xFFFFFDFF
2564 #define NV_PFB_STRAP_AGP_4X_DISABLED 0x00000200
2565 #define NV_PFB_STRAP_AGP_SBA 0x00000400
2566 #define NV_PFB_STRAP_AGP_SBA_ENABLED 0xFFFFFBFF
2567 #define NV_PFB_STRAP_AGP_SBA_DISABLED 0x00000400
2568 #define NV_PFB_STRAP_AGP_FASTWR 0x00000800
2569 #define NV_PFB_STRAP_AGP_FASTWR_ENABLED 0xFFFFF7FF
2570 #define NV_PFB_STRAP_AGP_FASTWR_DISABLED 0x00000800
2571 #define NV_PFB_STRAP_PCI_DEVID 0x00003000
2572 #define NV_PFB_STRAP_PCI_DEVID_20 0x00000000
2573 #define NV_PFB_STRAP_PCI_DEVID_21 0x00001000
2574 #define NV_PFB_STRAP_PCI_DEVID_22 0x00002000
2575 #define NV_PFB_STRAP_PCI_DEVID_23 0x00003000
2576 #define NV_PFB_STRAP_AGP 0x00004000
2577 #define NV_PFB_STRAP_AGP_DISABLED 0xFFFFBFFF
2578 #define NV_PFB_STRAP_AGP_ENABLED 0x00004000
2579 #define NV_PFB_STRAP_FP_IFACE 0x00008000
2580 #define NV_PFB_STRAP_FP_IFACE_24BIT 0xFFFF7FFF
2581 #define NV_PFB_STRAP_FP_IFACE_12BIT 0x00008000
2582 #define NV_PFB_STRAP_OVERWRITE 0x80000000
2583 #define NV_PFB_STRAP_OVERWRITE_DISABLED 0x7FFFFFFF
2584 #define NV_PFB_STRAP_OVERWRITE_ENABLED 0x80000000
2585 
2586 /* NV-Register NV_PFB_NEW_STRAP */
2587 #define NV_PFB_NEW_STRAP 0x00101000
2588 #define NV_PFB_NEW_STRAP_VALUE 0x0000FFFF
2589 #define NV_PFB_NEW_STRAP_OVERWRITE 0x80000000
2590 #define NV_PFB_NEW_STRAP_OVERWRITE_DISABLED 0x7FFFFFFF
2591 #define NV_PFB_NEW_STRAP_OVERWRITE_ENABLED 0x80000000
2592 
2593 /* NV-Device NV_PFIFO */
2594 #define NV_PFIFO 0x00002000 /* size: 0x00001FFF */
2595 
2596 /* NV-Device NV_USER */
2597 #define NV_USER 0x00800000 /* size: 0x007FFFFF */
2598 
2599 /* NV-Register NV_PFIFO_DELAY_0 */
2600 #define NV_PFIFO_DELAY_0 0x00002040
2601 #define NV_PFIFO_DELAY_0_WAIT_RETRY 0x000003FF
2602 #define NV_PFIFO_DELAY_0_WAIT_RETRY_0 0x00000000
2603 
2604 /* NV-Register NV_PFIFO_DMA_TIMESLICE */
2605 #define NV_PFIFO_DMA_TIMESLICE 0x00002044
2606 #define NV_PFIFO_DMA_TIMESLICE_SELECT 0x0001FFFF
2607 #define NV_PFIFO_DMA_TIMESLICE_SELECT_1 0x00000000
2608 #define NV_PFIFO_DMA_TIMESLICE_SELECT_16K 0x00003FFF
2609 #define NV_PFIFO_DMA_TIMESLICE_SELECT_32K 0x00007FFF
2610 #define NV_PFIFO_DMA_TIMESLICE_SELECT_64K 0x0000FFFF
2611 #define NV_PFIFO_DMA_TIMESLICE_SELECT_128K 0x0001FFFF
2612 #define NV_PFIFO_DMA_TIMESLICE_TIMEOUT 0x01000000
2613 #define NV_PFIFO_DMA_TIMESLICE_TIMEOUT_DISABLED 0xFEFFFFFF
2614 #define NV_PFIFO_DMA_TIMESLICE_TIMEOUT_ENABLED 0x01000000
2615 
2616 /* NV-Register NV_PFIFO_PIO_TIMESLICE */
2617 #define NV_PFIFO_PIO_TIMESLICE 0x00002048
2618 #define NV_PFIFO_PIO_TIMESLICE_SELECT 0x0001FFFF
2619 #define NV_PFIFO_PIO_TIMESLICE_SELECT_1 0x00000000
2620 #define NV_PFIFO_PIO_TIMESLICE_SELECT_16K 0x00003FFF
2621 #define NV_PFIFO_PIO_TIMESLICE_SELECT_32K 0x00007FFF
2622 #define NV_PFIFO_PIO_TIMESLICE_SELECT_64K 0x0000FFFF
2623 #define NV_PFIFO_PIO_TIMESLICE_SELECT_128K 0x0001FFFF
2624 #define NV_PFIFO_PIO_TIMESLICE_TIMEOUT 0x01000000
2625 #define NV_PFIFO_PIO_TIMESLICE_TIMEOUT_DISABLED 0xFEFFFFFF
2626 #define NV_PFIFO_PIO_TIMESLICE_TIMEOUT_ENABLED 0x01000000
2627 
2628 /* NV-Register NV_PFIFO_TIMESLICE */
2629 #define NV_PFIFO_TIMESLICE 0x0000204C
2630 #define NV_PFIFO_TIMESLICE_TIMER 0x0003FFFF
2631 #define NV_PFIFO_TIMESLICE_TIMER_EXPIRED 0x0003FFFF
2632 
2633 /* NV-Register NV_PFIFO_NEXT_CHANNEL */
2634 #define NV_PFIFO_NEXT_CHANNEL 0x00002050
2635 #define NV_PFIFO_NEXT_CHANNEL_CHID 0x0000001F
2636 #define NV_PFIFO_NEXT_CHANNEL_MODE 0x00000100
2637 #define NV_PFIFO_NEXT_CHANNEL_MODE_PIO 0xFFFFFEFF
2638 #define NV_PFIFO_NEXT_CHANNEL_MODE_DMA 0x00000100
2639 #define NV_PFIFO_NEXT_CHANNEL_SWITCH 0x00001000
2640 #define NV_PFIFO_NEXT_CHANNEL_SWITCH_NOT_PENDING 0xFFFFEFFF
2641 #define NV_PFIFO_NEXT_CHANNEL_SWITCH_PENDING 0x00001000
2642 
2643 /* NV-Register NV_PFIFO_DEBUG_0 */
2644 #define NV_PFIFO_DEBUG_0 0x00002080
2645 #define NV_PFIFO_DEBUG_0_CACHE_ERROR0 0x00000001
2646 #define NV_PFIFO_DEBUG_0_CACHE_ERROR0_NOT_PENDING 0xFFFFFFFE
2647 #define NV_PFIFO_DEBUG_0_CACHE_ERROR0_PENDING 0x00000001
2648 #define NV_PFIFO_DEBUG_0_CACHE_ERROR1 0x00000010
2649 #define NV_PFIFO_DEBUG_0_CACHE_ERROR1_NOT_PENDING 0xFFFFFFEF
2650 #define NV_PFIFO_DEBUG_0_CACHE_ERROR1_PENDING 0x00000010
2651 
2652 /* NV-Register NV_PFIFO_INTR_0 */
2653 #define NV_PFIFO_INTR_0 0x00002100
2654 #define NV_PFIFO_INTR_0_CACHE_ERROR 0x00000001
2655 #define NV_PFIFO_INTR_0_CACHE_ERROR_NOT_PENDING 0xFFFFFFFE
2656 #define NV_PFIFO_INTR_0_CACHE_ERROR_PENDING 0x00000001
2657 #define NV_PFIFO_INTR_0_CACHE_ERROR_RESET 0x00000001
2658 #define NV_PFIFO_INTR_0_RUNOUT 0x00000010
2659 #define NV_PFIFO_INTR_0_RUNOUT_NOT_PENDING 0xFFFFFFEF
2660 #define NV_PFIFO_INTR_0_RUNOUT_PENDING 0x00000010
2661 #define NV_PFIFO_INTR_0_RUNOUT_RESET 0x00000010
2662 #define NV_PFIFO_INTR_0_RUNOUT_OVERFLOW 0x00000100
2663 #define NV_PFIFO_INTR_0_RUNOUT_OVERFLOW_NOT_PENDING 0xFFFFFEFF
2664 #define NV_PFIFO_INTR_0_RUNOUT_OVERFLOW_PENDING 0x00000100
2665 #define NV_PFIFO_INTR_0_RUNOUT_OVERFLOW_RESET 0x00000100
2666 #define NV_PFIFO_INTR_0_DMA_PUSHER 0x00001000
2667 #define NV_PFIFO_INTR_0_DMA_PUSHER_NOT_PENDING 0xFFFFEFFF
2668 #define NV_PFIFO_INTR_0_DMA_PUSHER_PENDING 0x00001000
2669 #define NV_PFIFO_INTR_0_DMA_PUSHER_RESET 0x00001000
2670 #define NV_PFIFO_INTR_0_DMA_PT 0x00010000
2671 #define NV_PFIFO_INTR_0_DMA_PT_NOT_PENDING 0xFFFEFFFF
2672 #define NV_PFIFO_INTR_0_DMA_PT_PENDING 0x00010000
2673 #define NV_PFIFO_INTR_0_DMA_PT_RESET 0x00010000
2674 #define NV_PFIFO_INTR_0_SEMAPHORE 0x00100000
2675 #define NV_PFIFO_INTR_0_SEMAPHORE_NOT_PENDING 0xFFEFFFFF
2676 #define NV_PFIFO_INTR_0_SEMAPHORE_PENDING 0x00100000
2677 #define NV_PFIFO_INTR_0_SEMAPHORE_RESET 0x00100000
2678 #define NV_PFIFO_INTR_0_ACQUIRE_TIMEOUT 0x01000000
2679 #define NV_PFIFO_INTR_0_ACQUIRE_TIMEOUT_NOT_PENDING 0xFEFFFFFF
2680 #define NV_PFIFO_INTR_0_ACQUIRE_TIMEOUT_PENDING 0x01000000
2681 #define NV_PFIFO_INTR_0_ACQUIRE_TIMEOUT_RESET 0x01000000
2682 
2683 /* NV-Register NV_PFIFO_INTR_EN_0 */
2684 #define NV_PFIFO_INTR_EN_0 0x00002140
2685 #define NV_PFIFO_INTR_EN_0_CACHE_ERROR 0x00000001
2686 #define NV_PFIFO_INTR_EN_0_CACHE_ERROR_DISABLED 0xFFFFFFFE
2687 #define NV_PFIFO_INTR_EN_0_CACHE_ERROR_ENABLED 0x00000001
2688 #define NV_PFIFO_INTR_EN_0_RUNOUT 0x00000010
2689 #define NV_PFIFO_INTR_EN_0_RUNOUT_DISABLED 0xFFFFFFEF
2690 #define NV_PFIFO_INTR_EN_0_RUNOUT_ENABLED 0x00000010
2691 #define NV_PFIFO_INTR_EN_0_RUNOUT_OVERFLOW 0x00000100
2692 #define NV_PFIFO_INTR_EN_0_RUNOUT_OVERFLOW_DISABLED 0xFFFFFEFF
2693 #define NV_PFIFO_INTR_EN_0_RUNOUT_OVERFLOW_ENABLED 0x00000100
2694 #define NV_PFIFO_INTR_EN_0_DMA_PUSHER 0x00001000
2695 #define NV_PFIFO_INTR_EN_0_DMA_PUSHER_DISABLED 0xFFFFEFFF
2696 #define NV_PFIFO_INTR_EN_0_DMA_PUSHER_ENABLED 0x00001000
2697 #define NV_PFIFO_INTR_EN_0_DMA_PT 0x00010000
2698 #define NV_PFIFO_INTR_EN_0_DMA_PT_DISABLED 0xFFFEFFFF
2699 #define NV_PFIFO_INTR_EN_0_DMA_PT_ENABLED 0x00010000
2700 #define NV_PFIFO_INTR_EN_0_SEMAPHORE 0x00100000
2701 #define NV_PFIFO_INTR_EN_0_SEMAPHORE_DISABLED 0xFFEFFFFF
2702 #define NV_PFIFO_INTR_EN_0_SEMAPHORE_ENABLED 0x00100000
2703 #define NV_PFIFO_INTR_EN_0_ACQUIRE_TIMEOUT 0x01000000
2704 #define NV_PFIFO_INTR_EN_0_ACQUIRE_TIMEOUT_DISABLED 0xFEFFFFFF
2705 #define NV_PFIFO_INTR_EN_0_ACQUIRE_TIMEOUT_ENABLED 0x01000000
2706 
2707 /* NV-Register NV_PFIFO_RAMHT */
2708 #define NV_PFIFO_RAMHT 0x00002210
2709 #define NV_PFIFO_RAMHT_BASE_ADDRESS 0x000001F0
2710 #define NV_PFIFO_RAMHT_BASE_ADDRESS_10000 0x00000100
2711 #define NV_PFIFO_RAMHT_SIZE 0x00030000
2712 #define NV_PFIFO_RAMHT_SIZE_4K 0x00000000
2713 #define NV_PFIFO_RAMHT_SIZE_8K 0x00010000
2714 #define NV_PFIFO_RAMHT_SIZE_16K 0x00020000
2715 #define NV_PFIFO_RAMHT_SIZE_32K 0x00030000
2716 #define NV_PFIFO_RAMHT_SEARCH 0x03000000
2717 #define NV_PFIFO_RAMHT_SEARCH_16 0x00000000
2718 #define NV_PFIFO_RAMHT_SEARCH_32 0x01000000
2719 #define NV_PFIFO_RAMHT_SEARCH_64 0x02000000
2720 #define NV_PFIFO_RAMHT_SEARCH_128 0x03000000
2721 
2722 /* NV-Register NV_PFIFO_RAMFC */
2723 #define NV_PFIFO_RAMFC 0x00002214
2724 #define NV_PFIFO_RAMFC_BASE_ADDRESS 0x000001F8
2725 #define NV_PFIFO_RAMFC_BASE_ADDRESS_11000 0x00000110
2726 
2727 /* NV-Register NV_PFIFO_RAMRO */
2728 #define NV_PFIFO_RAMRO 0x00002218
2729 #define NV_PFIFO_RAMRO_BASE_ADDRESS 0x000001FE
2730 #define NV_PFIFO_RAMRO_BASE_ADDRESS_11800 0x00000118
2731 #define NV_PFIFO_RAMRO_BASE_ADDRESS_11400 0x00000114
2732 #define NV_PFIFO_RAMRO_BASE_ADDRESS_11200 0x00000112
2733 #define NV_PFIFO_RAMRO_BASE_ADDRESS_12000 0x00000120
2734 #define NV_PFIFO_RAMRO_SIZE 0x00010000
2735 #define NV_PFIFO_RAMRO_SIZE_512 0xFFFEFFFF
2736 #define NV_PFIFO_RAMRO_SIZE_8K 0x00010000
2737 
2738 /* NV-Register NV_PFIFO_CACHES */
2739 #define NV_PFIFO_CACHES 0x00002500
2740 #define NV_PFIFO_CACHES_REASSIGN 0x00000001
2741 #define NV_PFIFO_CACHES_REASSIGN_DISABLED 0xFFFFFFFE
2742 #define NV_PFIFO_CACHES_REASSIGN_ENABLED 0x00000001
2743 #define NV_PFIFO_CACHES_DMA_SUSPEND 0x00000010
2744 #define NV_PFIFO_CACHES_DMA_SUSPEND_IDLE 0xFFFFFFEF
2745 #define NV_PFIFO_CACHES_DMA_SUSPEND_BUSY 0x00000010
2746 
2747 /* NV-Register NV_PFIFO_MODE */
2748 #define NV_PFIFO_MODE 0x00002504
2749 #define NV_PFIFO_MODE_CHANNEL_0 0x00000001
2750 #define NV_PFIFO_MODE_CHANNEL_0_PIO 0xFFFFFFFE
2751 #define NV_PFIFO_MODE_CHANNEL_0_DMA 0x00000001
2752 #define NV_PFIFO_MODE_CHANNEL_1 0x00000002
2753 #define NV_PFIFO_MODE_CHANNEL_1_PIO 0xFFFFFFFD
2754 #define NV_PFIFO_MODE_CHANNEL_1_DMA 0x00000002
2755 #define NV_PFIFO_MODE_CHANNEL_2 0x00000004
2756 #define NV_PFIFO_MODE_CHANNEL_2_PIO 0xFFFFFFFB
2757 #define NV_PFIFO_MODE_CHANNEL_2_DMA 0x00000004
2758 #define NV_PFIFO_MODE_CHANNEL_3 0x00000008
2759 #define NV_PFIFO_MODE_CHANNEL_3_PIO 0xFFFFFFF7
2760 #define NV_PFIFO_MODE_CHANNEL_3_DMA 0x00000008
2761 #define NV_PFIFO_MODE_CHANNEL_4 0x00000010
2762 #define NV_PFIFO_MODE_CHANNEL_4_PIO 0xFFFFFFEF
2763 #define NV_PFIFO_MODE_CHANNEL_4_DMA 0x00000010
2764 #define NV_PFIFO_MODE_CHANNEL_5 0x00000020
2765 #define NV_PFIFO_MODE_CHANNEL_5_PIO 0xFFFFFFDF
2766 #define NV_PFIFO_MODE_CHANNEL_5_DMA 0x00000020
2767 #define NV_PFIFO_MODE_CHANNEL_6 0x00000040
2768 #define NV_PFIFO_MODE_CHANNEL_6_PIO 0xFFFFFFBF
2769 #define NV_PFIFO_MODE_CHANNEL_6_DMA 0x00000040
2770 #define NV_PFIFO_MODE_CHANNEL_7 0x00000080
2771 #define NV_PFIFO_MODE_CHANNEL_7_PIO 0xFFFFFF7F
2772 #define NV_PFIFO_MODE_CHANNEL_7_DMA 0x00000080
2773 #define NV_PFIFO_MODE_CHANNEL_8 0x00000100
2774 #define NV_PFIFO_MODE_CHANNEL_8_PIO 0xFFFFFEFF
2775 #define NV_PFIFO_MODE_CHANNEL_8_DMA 0x00000100
2776 #define NV_PFIFO_MODE_CHANNEL_9 0x00000200
2777 #define NV_PFIFO_MODE_CHANNEL_9_PIO 0xFFFFFDFF
2778 #define NV_PFIFO_MODE_CHANNEL_9_DMA 0x00000200
2779 #define NV_PFIFO_MODE_CHANNEL_10 0x00000400
2780 #define NV_PFIFO_MODE_CHANNEL_10_PIO 0xFFFFFBFF
2781 #define NV_PFIFO_MODE_CHANNEL_10_DMA 0x00000400
2782 #define NV_PFIFO_MODE_CHANNEL_11 0x00000800
2783 #define NV_PFIFO_MODE_CHANNEL_11_PIO 0xFFFFF7FF
2784 #define NV_PFIFO_MODE_CHANNEL_11_DMA 0x00000800
2785 #define NV_PFIFO_MODE_CHANNEL_12 0x00001000
2786 #define NV_PFIFO_MODE_CHANNEL_12_PIO 0xFFFFEFFF
2787 #define NV_PFIFO_MODE_CHANNEL_12_DMA 0x00001000
2788 #define NV_PFIFO_MODE_CHANNEL_13 0x00002000
2789 #define NV_PFIFO_MODE_CHANNEL_13_PIO 0xFFFFDFFF
2790 #define NV_PFIFO_MODE_CHANNEL_13_DMA 0x00002000
2791 #define NV_PFIFO_MODE_CHANNEL_14 0x00004000
2792 #define NV_PFIFO_MODE_CHANNEL_14_PIO 0xFFFFBFFF
2793 #define NV_PFIFO_MODE_CHANNEL_14_DMA 0x00004000
2794 #define NV_PFIFO_MODE_CHANNEL_15 0x00008000
2795 #define NV_PFIFO_MODE_CHANNEL_15_PIO 0xFFFF7FFF
2796 #define NV_PFIFO_MODE_CHANNEL_15_DMA 0x00008000
2797 #define NV_PFIFO_MODE_CHANNEL_16 0x00010000
2798 #define NV_PFIFO_MODE_CHANNEL_16_PIO 0xFFFEFFFF
2799 #define NV_PFIFO_MODE_CHANNEL_16_DMA 0x00010000
2800 #define NV_PFIFO_MODE_CHANNEL_17 0x00020000
2801 #define NV_PFIFO_MODE_CHANNEL_17_PIO 0xFFFDFFFF
2802 #define NV_PFIFO_MODE_CHANNEL_17_DMA 0x00020000
2803 #define NV_PFIFO_MODE_CHANNEL_18 0x00040000
2804 #define NV_PFIFO_MODE_CHANNEL_18_PIO 0xFFFBFFFF
2805 #define NV_PFIFO_MODE_CHANNEL_18_DMA 0x00040000
2806 #define NV_PFIFO_MODE_CHANNEL_19 0x00080000
2807 #define NV_PFIFO_MODE_CHANNEL_19_PIO 0xFFF7FFFF
2808 #define NV_PFIFO_MODE_CHANNEL_19_DMA 0x00080000
2809 #define NV_PFIFO_MODE_CHANNEL_20 0x00100000
2810 #define NV_PFIFO_MODE_CHANNEL_20_PIO 0xFFEFFFFF
2811 #define NV_PFIFO_MODE_CHANNEL_20_DMA 0x00100000
2812 #define NV_PFIFO_MODE_CHANNEL_21 0x00200000
2813 #define NV_PFIFO_MODE_CHANNEL_21_PIO 0xFFDFFFFF
2814 #define NV_PFIFO_MODE_CHANNEL_21_DMA 0x00200000
2815 #define NV_PFIFO_MODE_CHANNEL_22 0x00400000
2816 #define NV_PFIFO_MODE_CHANNEL_22_PIO 0xFFBFFFFF
2817 #define NV_PFIFO_MODE_CHANNEL_22_DMA 0x00400000
2818 #define NV_PFIFO_MODE_CHANNEL_23 0x00800000
2819 #define NV_PFIFO_MODE_CHANNEL_23_PIO 0xFF7FFFFF
2820 #define NV_PFIFO_MODE_CHANNEL_23_DMA 0x00800000
2821 #define NV_PFIFO_MODE_CHANNEL_24 0x01000000
2822 #define NV_PFIFO_MODE_CHANNEL_24_PIO 0xFEFFFFFF
2823 #define NV_PFIFO_MODE_CHANNEL_24_DMA 0x01000000
2824 #define NV_PFIFO_MODE_CHANNEL_25 0x02000000
2825 #define NV_PFIFO_MODE_CHANNEL_25_PIO 0xFDFFFFFF
2826 #define NV_PFIFO_MODE_CHANNEL_25_DMA 0x02000000
2827 #define NV_PFIFO_MODE_CHANNEL_26 0x04000000
2828 #define NV_PFIFO_MODE_CHANNEL_26_PIO 0xFBFFFFFF
2829 #define NV_PFIFO_MODE_CHANNEL_26_DMA 0x04000000
2830 #define NV_PFIFO_MODE_CHANNEL_27 0x08000000
2831 #define NV_PFIFO_MODE_CHANNEL_27_PIO 0xF7FFFFFF
2832 #define NV_PFIFO_MODE_CHANNEL_27_DMA 0x08000000
2833 #define NV_PFIFO_MODE_CHANNEL_28 0x10000000
2834 #define NV_PFIFO_MODE_CHANNEL_28_PIO 0xEFFFFFFF
2835 #define NV_PFIFO_MODE_CHANNEL_28_DMA 0x10000000
2836 #define NV_PFIFO_MODE_CHANNEL_29 0x20000000
2837 #define NV_PFIFO_MODE_CHANNEL_29_PIO 0xDFFFFFFF
2838 #define NV_PFIFO_MODE_CHANNEL_29_DMA 0x20000000
2839 #define NV_PFIFO_MODE_CHANNEL_30 0x40000000
2840 #define NV_PFIFO_MODE_CHANNEL_30_PIO 0xBFFFFFFF
2841 #define NV_PFIFO_MODE_CHANNEL_30_DMA 0x40000000
2842 #define NV_PFIFO_MODE_CHANNEL_31 0x80000000
2843 #define NV_PFIFO_MODE_CHANNEL_31_PIO 0x7FFFFFFF
2844 #define NV_PFIFO_MODE_CHANNEL_31_DMA 0x80000000
2845 
2846 /* NV-Register NV_PFIFO_DMA */
2847 #define NV_PFIFO_DMA 0x00002508
2848 #define NV_PFIFO_DMA_CHANNEL_0 0x00000001
2849 #define NV_PFIFO_DMA_CHANNEL_0_NOT_PENDING 0xFFFFFFFE
2850 #define NV_PFIFO_DMA_CHANNEL_0_PENDING 0x00000001
2851 #define NV_PFIFO_DMA_CHANNEL_1 0x00000002
2852 #define NV_PFIFO_DMA_CHANNEL_1_NOT_PENDING 0xFFFFFFFD
2853 #define NV_PFIFO_DMA_CHANNEL_1_PENDING 0x00000002
2854 #define NV_PFIFO_DMA_CHANNEL_2 0x00000004
2855 #define NV_PFIFO_DMA_CHANNEL_2_NOT_PENDING 0xFFFFFFFB
2856 #define NV_PFIFO_DMA_CHANNEL_2_PENDING 0x00000004
2857 #define NV_PFIFO_DMA_CHANNEL_3 0x00000008
2858 #define NV_PFIFO_DMA_CHANNEL_3_NOT_PENDING 0xFFFFFFF7
2859 #define NV_PFIFO_DMA_CHANNEL_3_PENDING 0x00000008
2860 #define NV_PFIFO_DMA_CHANNEL_4 0x00000010
2861 #define NV_PFIFO_DMA_CHANNEL_4_NOT_PENDING 0xFFFFFFEF
2862 #define NV_PFIFO_DMA_CHANNEL_4_PENDING 0x00000010
2863 #define NV_PFIFO_DMA_CHANNEL_5 0x00000020
2864 #define NV_PFIFO_DMA_CHANNEL_5_NOT_PENDING 0xFFFFFFDF
2865 #define NV_PFIFO_DMA_CHANNEL_5_PENDING 0x00000020
2866 #define NV_PFIFO_DMA_CHANNEL_6 0x00000040
2867 #define NV_PFIFO_DMA_CHANNEL_6_NOT_PENDING 0xFFFFFFBF
2868 #define NV_PFIFO_DMA_CHANNEL_6_PENDING 0x00000040
2869 #define NV_PFIFO_DMA_CHANNEL_7 0x00000080
2870 #define NV_PFIFO_DMA_CHANNEL_7_NOT_PENDING 0xFFFFFF7F
2871 #define NV_PFIFO_DMA_CHANNEL_7_PENDING 0x00000080
2872 #define NV_PFIFO_DMA_CHANNEL_8 0x00000100
2873 #define NV_PFIFO_DMA_CHANNEL_8_NOT_PENDING 0xFFFFFEFF
2874 #define NV_PFIFO_DMA_CHANNEL_8_PENDING 0x00000100
2875 #define NV_PFIFO_DMA_CHANNEL_9 0x00000200
2876 #define NV_PFIFO_DMA_CHANNEL_9_NOT_PENDING 0xFFFFFDFF
2877 #define NV_PFIFO_DMA_CHANNEL_9_PENDING 0x00000200
2878 #define NV_PFIFO_DMA_CHANNEL_10 0x00000400
2879 #define NV_PFIFO_DMA_CHANNEL_10_NOT_PENDING 0xFFFFFBFF
2880 #define NV_PFIFO_DMA_CHANNEL_10_PENDING 0x00000400
2881 #define NV_PFIFO_DMA_CHANNEL_11 0x00000800
2882 #define NV_PFIFO_DMA_CHANNEL_11_NOT_PENDING 0xFFFFF7FF
2883 #define NV_PFIFO_DMA_CHANNEL_11_PENDING 0x00000800
2884 #define NV_PFIFO_DMA_CHANNEL_12 0x00001000
2885 #define NV_PFIFO_DMA_CHANNEL_12_NOT_PENDING 0xFFFFEFFF
2886 #define NV_PFIFO_DMA_CHANNEL_12_PENDING 0x00001000
2887 #define NV_PFIFO_DMA_CHANNEL_13 0x00002000
2888 #define NV_PFIFO_DMA_CHANNEL_13_NOT_PENDING 0xFFFFDFFF
2889 #define NV_PFIFO_DMA_CHANNEL_13_PENDING 0x00002000
2890 #define NV_PFIFO_DMA_CHANNEL_14 0x00004000
2891 #define NV_PFIFO_DMA_CHANNEL_14_NOT_PENDING 0xFFFFBFFF
2892 #define NV_PFIFO_DMA_CHANNEL_14_PENDING 0x00004000
2893 #define NV_PFIFO_DMA_CHANNEL_15 0x00008000
2894 #define NV_PFIFO_DMA_CHANNEL_15_NOT_PENDING 0xFFFF7FFF
2895 #define NV_PFIFO_DMA_CHANNEL_15_PENDING 0x00008000
2896 #define NV_PFIFO_DMA_CHANNEL_16 0x00010000
2897 #define NV_PFIFO_DMA_CHANNEL_16_NOT_PENDING 0xFFFEFFFF
2898 #define NV_PFIFO_DMA_CHANNEL_16_PENDING 0x00010000
2899 #define NV_PFIFO_DMA_CHANNEL_17 0x00020000
2900 #define NV_PFIFO_DMA_CHANNEL_17_NOT_PENDING 0xFFFDFFFF
2901 #define NV_PFIFO_DMA_CHANNEL_17_PENDING 0x00020000
2902 #define NV_PFIFO_DMA_CHANNEL_18 0x00040000
2903 #define NV_PFIFO_DMA_CHANNEL_18_NOT_PENDING 0xFFFBFFFF
2904 #define NV_PFIFO_DMA_CHANNEL_18_PENDING 0x00040000
2905 #define NV_PFIFO_DMA_CHANNEL_19 0x00080000
2906 #define NV_PFIFO_DMA_CHANNEL_19_NOT_PENDING 0xFFF7FFFF
2907 #define NV_PFIFO_DMA_CHANNEL_19_PENDING 0x00080000
2908 #define NV_PFIFO_DMA_CHANNEL_20 0x00100000
2909 #define NV_PFIFO_DMA_CHANNEL_20_NOT_PENDING 0xFFEFFFFF
2910 #define NV_PFIFO_DMA_CHANNEL_20_PENDING 0x00100000
2911 #define NV_PFIFO_DMA_CHANNEL_21 0x00200000
2912 #define NV_PFIFO_DMA_CHANNEL_21_NOT_PENDING 0xFFDFFFFF
2913 #define NV_PFIFO_DMA_CHANNEL_21_PENDING 0x00200000
2914 #define NV_PFIFO_DMA_CHANNEL_22 0x00400000
2915 #define NV_PFIFO_DMA_CHANNEL_22_NOT_PENDING 0xFFBFFFFF
2916 #define NV_PFIFO_DMA_CHANNEL_22_PENDING 0x00400000
2917 #define NV_PFIFO_DMA_CHANNEL_23 0x00800000
2918 #define NV_PFIFO_DMA_CHANNEL_23_NOT_PENDING 0xFF7FFFFF
2919 #define NV_PFIFO_DMA_CHANNEL_23_PENDING 0x00800000
2920 #define NV_PFIFO_DMA_CHANNEL_24 0x01000000
2921 #define NV_PFIFO_DMA_CHANNEL_24_NOT_PENDING 0xFEFFFFFF
2922 #define NV_PFIFO_DMA_CHANNEL_24_PENDING 0x01000000
2923 #define NV_PFIFO_DMA_CHANNEL_25 0x02000000
2924 #define NV_PFIFO_DMA_CHANNEL_25_NOT_PENDING 0xFDFFFFFF
2925 #define NV_PFIFO_DMA_CHANNEL_25_PENDING 0x02000000
2926 #define NV_PFIFO_DMA_CHANNEL_26 0x04000000
2927 #define NV_PFIFO_DMA_CHANNEL_26_NOT_PENDING 0xFBFFFFFF
2928 #define NV_PFIFO_DMA_CHANNEL_26_PENDING 0x04000000
2929 #define NV_PFIFO_DMA_CHANNEL_27 0x08000000
2930 #define NV_PFIFO_DMA_CHANNEL_27_NOT_PENDING 0xF7FFFFFF
2931 #define NV_PFIFO_DMA_CHANNEL_27_PENDING 0x08000000
2932 #define NV_PFIFO_DMA_CHANNEL_28 0x10000000
2933 #define NV_PFIFO_DMA_CHANNEL_28_NOT_PENDING 0xEFFFFFFF
2934 #define NV_PFIFO_DMA_CHANNEL_28_PENDING 0x10000000
2935 #define NV_PFIFO_DMA_CHANNEL_29 0x20000000
2936 #define NV_PFIFO_DMA_CHANNEL_29_NOT_PENDING 0xDFFFFFFF
2937 #define NV_PFIFO_DMA_CHANNEL_29_PENDING 0x20000000
2938 #define NV_PFIFO_DMA_CHANNEL_30 0x40000000
2939 #define NV_PFIFO_DMA_CHANNEL_30_NOT_PENDING 0xBFFFFFFF
2940 #define NV_PFIFO_DMA_CHANNEL_30_PENDING 0x40000000
2941 #define NV_PFIFO_DMA_CHANNEL_31 0x80000000
2942 #define NV_PFIFO_DMA_CHANNEL_31_NOT_PENDING 0x7FFFFFFF
2943 #define NV_PFIFO_DMA_CHANNEL_31_PENDING 0x80000000
2944 
2945 /* NV-Register NV_PFIFO_SIZE */
2946 #define NV_PFIFO_SIZE 0x0000250C
2947 #define NV_PFIFO_SIZE_CHANNEL_0 0x00000001
2948 #define NV_PFIFO_SIZE_CHANNEL_0_124_BYTES 0xFFFFFFFE
2949 #define NV_PFIFO_SIZE_CHANNEL_0_512_BYTES 0x00000001
2950 #define NV_PFIFO_SIZE_CHANNEL_1 0x00000002
2951 #define NV_PFIFO_SIZE_CHANNEL_1_124_BYTES 0xFFFFFFFD
2952 #define NV_PFIFO_SIZE_CHANNEL_1_512_BYTES 0x00000002
2953 #define NV_PFIFO_SIZE_CHANNEL_2 0x00000004
2954 #define NV_PFIFO_SIZE_CHANNEL_2_124_BYTES 0xFFFFFFFB
2955 #define NV_PFIFO_SIZE_CHANNEL_2_512_BYTES 0x00000004
2956 #define NV_PFIFO_SIZE_CHANNEL_3 0x00000008
2957 #define NV_PFIFO_SIZE_CHANNEL_3_124_BYTES 0xFFFFFFF7
2958 #define NV_PFIFO_SIZE_CHANNEL_3_512_BYTES 0x00000008
2959 #define NV_PFIFO_SIZE_CHANNEL_4 0x00000010
2960 #define NV_PFIFO_SIZE_CHANNEL_4_124_BYTES 0xFFFFFFEF
2961 #define NV_PFIFO_SIZE_CHANNEL_4_512_BYTES 0x00000010
2962 #define NV_PFIFO_SIZE_CHANNEL_5 0x00000020
2963 #define NV_PFIFO_SIZE_CHANNEL_5_124_BYTES 0xFFFFFFDF
2964 #define NV_PFIFO_SIZE_CHANNEL_5_512_BYTES 0x00000020
2965 #define NV_PFIFO_SIZE_CHANNEL_6 0x00000040
2966 #define NV_PFIFO_SIZE_CHANNEL_6_124_BYTES 0xFFFFFFBF
2967 #define NV_PFIFO_SIZE_CHANNEL_6_512_BYTES 0x00000040
2968 #define NV_PFIFO_SIZE_CHANNEL_7 0x00000080
2969 #define NV_PFIFO_SIZE_CHANNEL_7_124_BYTES 0xFFFFFF7F
2970 #define NV_PFIFO_SIZE_CHANNEL_7_512_BYTES 0x00000080
2971 #define NV_PFIFO_SIZE_CHANNEL_8 0x00000100
2972 #define NV_PFIFO_SIZE_CHANNEL_8_124_BYTES 0xFFFFFEFF
2973 #define NV_PFIFO_SIZE_CHANNEL_8_512_BYTES 0x00000100
2974 #define NV_PFIFO_SIZE_CHANNEL_9 0x00000200
2975 #define NV_PFIFO_SIZE_CHANNEL_9_124_BYTES 0xFFFFFDFF
2976 #define NV_PFIFO_SIZE_CHANNEL_9_512_BYTES 0x00000200
2977 #define NV_PFIFO_SIZE_CHANNEL_10 0x00000400
2978 #define NV_PFIFO_SIZE_CHANNEL_10_124_BYTES 0xFFFFFBFF
2979 #define NV_PFIFO_SIZE_CHANNEL_10_512_BYTES 0x00000400
2980 #define NV_PFIFO_SIZE_CHANNEL_11 0x00000800
2981 #define NV_PFIFO_SIZE_CHANNEL_11_124_BYTES 0xFFFFF7FF
2982 #define NV_PFIFO_SIZE_CHANNEL_11_512_BYTES 0x00000800
2983 #define NV_PFIFO_SIZE_CHANNEL_12 0x00001000
2984 #define NV_PFIFO_SIZE_CHANNEL_12_124_BYTES 0xFFFFEFFF
2985 #define NV_PFIFO_SIZE_CHANNEL_12_512_BYTES 0x00001000
2986 #define NV_PFIFO_SIZE_CHANNEL_13 0x00002000
2987 #define NV_PFIFO_SIZE_CHANNEL_13_124_BYTES 0xFFFFDFFF
2988 #define NV_PFIFO_SIZE_CHANNEL_13_512_BYTES 0x00002000
2989 #define NV_PFIFO_SIZE_CHANNEL_14 0x00004000
2990 #define NV_PFIFO_SIZE_CHANNEL_14_124_BYTES 0xFFFFBFFF
2991 #define NV_PFIFO_SIZE_CHANNEL_14_512_BYTES 0x00004000
2992 #define NV_PFIFO_SIZE_CHANNEL_15 0x00008000
2993 #define NV_PFIFO_SIZE_CHANNEL_15_124_BYTES 0xFFFF7FFF
2994 #define NV_PFIFO_SIZE_CHANNEL_15_512_BYTES 0x00008000
2995 #define NV_PFIFO_SIZE_CHANNEL_16 0x00010000
2996 #define NV_PFIFO_SIZE_CHANNEL_16_124_BYTES 0xFFFEFFFF
2997 #define NV_PFIFO_SIZE_CHANNEL_16_512_BYTES 0x00010000
2998 #define NV_PFIFO_SIZE_CHANNEL_17 0x00020000
2999 #define NV_PFIFO_SIZE_CHANNEL_17_124_BYTES 0xFFFDFFFF
3000 #define NV_PFIFO_SIZE_CHANNEL_17_512_BYTES 0x00020000
3001 #define NV_PFIFO_SIZE_CHANNEL_18 0x00040000
3002 #define NV_PFIFO_SIZE_CHANNEL_18_124_BYTES 0xFFFBFFFF
3003 #define NV_PFIFO_SIZE_CHANNEL_18_512_BYTES 0x00040000
3004 #define NV_PFIFO_SIZE_CHANNEL_19 0x00080000
3005 #define NV_PFIFO_SIZE_CHANNEL_19_124_BYTES 0xFFF7FFFF
3006 #define NV_PFIFO_SIZE_CHANNEL_19_512_BYTES 0x00080000
3007 #define NV_PFIFO_SIZE_CHANNEL_20 0x00100000
3008 #define NV_PFIFO_SIZE_CHANNEL_20_124_BYTES 0xFFEFFFFF
3009 #define NV_PFIFO_SIZE_CHANNEL_20_512_BYTES 0x00100000
3010 #define NV_PFIFO_SIZE_CHANNEL_21 0x00200000
3011 #define NV_PFIFO_SIZE_CHANNEL_21_124_BYTES 0xFFDFFFFF
3012 #define NV_PFIFO_SIZE_CHANNEL_21_512_BYTES 0x00200000
3013 #define NV_PFIFO_SIZE_CHANNEL_22 0x00400000
3014 #define NV_PFIFO_SIZE_CHANNEL_22_124_BYTES 0xFFBFFFFF
3015 #define NV_PFIFO_SIZE_CHANNEL_22_512_BYTES 0x00400000
3016 #define NV_PFIFO_SIZE_CHANNEL_23 0x00800000
3017 #define NV_PFIFO_SIZE_CHANNEL_23_124_BYTES 0xFF7FFFFF
3018 #define NV_PFIFO_SIZE_CHANNEL_23_512_BYTES 0x00800000
3019 #define NV_PFIFO_SIZE_CHANNEL_24 0x01000000
3020 #define NV_PFIFO_SIZE_CHANNEL_24_124_BYTES 0xFEFFFFFF
3021 #define NV_PFIFO_SIZE_CHANNEL_24_512_BYTES 0x01000000
3022 #define NV_PFIFO_SIZE_CHANNEL_25 0x02000000
3023 #define NV_PFIFO_SIZE_CHANNEL_25_124_BYTES 0xFDFFFFFF
3024 #define NV_PFIFO_SIZE_CHANNEL_25_512_BYTES 0x02000000
3025 #define NV_PFIFO_SIZE_CHANNEL_26 0x04000000
3026 #define NV_PFIFO_SIZE_CHANNEL_26_124_BYTES 0xFBFFFFFF
3027 #define NV_PFIFO_SIZE_CHANNEL_26_512_BYTES 0x04000000
3028 #define NV_PFIFO_SIZE_CHANNEL_27 0x08000000
3029 #define NV_PFIFO_SIZE_CHANNEL_27_124_BYTES 0xF7FFFFFF
3030 #define NV_PFIFO_SIZE_CHANNEL_27_512_BYTES 0x08000000
3031 #define NV_PFIFO_SIZE_CHANNEL_28 0x10000000
3032 #define NV_PFIFO_SIZE_CHANNEL_28_124_BYTES 0xEFFFFFFF
3033 #define NV_PFIFO_SIZE_CHANNEL_28_512_BYTES 0x10000000
3034 #define NV_PFIFO_SIZE_CHANNEL_29 0x20000000
3035 #define NV_PFIFO_SIZE_CHANNEL_29_124_BYTES 0xDFFFFFFF
3036 #define NV_PFIFO_SIZE_CHANNEL_29_512_BYTES 0x20000000
3037 #define NV_PFIFO_SIZE_CHANNEL_30 0x40000000
3038 #define NV_PFIFO_SIZE_CHANNEL_30_124_BYTES 0xBFFFFFFF
3039 #define NV_PFIFO_SIZE_CHANNEL_30_512_BYTES 0x40000000
3040 #define NV_PFIFO_SIZE_CHANNEL_31 0x80000000
3041 #define NV_PFIFO_SIZE_CHANNEL_31_124_BYTES 0x7FFFFFFF
3042 #define NV_PFIFO_SIZE_CHANNEL_31_512_BYTES 0x80000000
3043 
3044 /* NV-Register NV_PFIFO_CACHE0_PUSH0 */
3045 #define NV_PFIFO_CACHE0_PUSH0 0x00003000
3046 #define NV_PFIFO_CACHE0_PUSH0_ACCESS 0x00000001
3047 #define NV_PFIFO_CACHE0_PUSH0_ACCESS_DISABLED 0xFFFFFFFE
3048 #define NV_PFIFO_CACHE0_PUSH0_ACCESS_ENABLED 0x00000001
3049 
3050 /* NV-Register NV_PFIFO_CACHE1_PUSH0 */
3051 #define NV_PFIFO_CACHE1_PUSH0 0x00003200
3052 #define NV_PFIFO_CACHE1_PUSH0_ACCESS 0x00000001
3053 #define NV_PFIFO_CACHE1_PUSH0_ACCESS_DISABLED 0xFFFFFFFE
3054 #define NV_PFIFO_CACHE1_PUSH0_ACCESS_ENABLED 0x00000001
3055 
3056 /* NV-Register NV_PFIFO_CACHE0_PUSH1 */
3057 #define NV_PFIFO_CACHE0_PUSH1 0x00003004
3058 #define NV_PFIFO_CACHE0_PUSH1_CHID 0x0000001F
3059 
3060 /* NV-Register NV_PFIFO_CACHE1_PUSH1 */
3061 #define NV_PFIFO_CACHE1_PUSH1 0x00003204
3062 #define NV_PFIFO_CACHE1_PUSH1_CHID 0x0000001F
3063 #define NV_PFIFO_CACHE1_PUSH1_MODE 0x00000100
3064 #define NV_PFIFO_CACHE1_PUSH1_MODE_PIO 0xFFFFFEFF
3065 #define NV_PFIFO_CACHE1_PUSH1_MODE_DMA 0x00000100
3066 
3067 /* NV-Register NV_PFIFO_CACHE1_DMA_PUSH */
3068 #define NV_PFIFO_CACHE1_DMA_PUSH 0x00003220
3069 #define NV_PFIFO_CACHE1_DMA_PUSH_ACCESS 0x00000001
3070 #define NV_PFIFO_CACHE1_DMA_PUSH_ACCESS_DISABLED 0xFFFFFFFE
3071 #define NV_PFIFO_CACHE1_DMA_PUSH_ACCESS_ENABLED 0x00000001
3072 #define NV_PFIFO_CACHE1_DMA_PUSH_STATE 0x00000010
3073 #define NV_PFIFO_CACHE1_DMA_PUSH_STATE_IDLE 0xFFFFFFEF
3074 #define NV_PFIFO_CACHE1_DMA_PUSH_STATE_BUSY 0x00000010
3075 #define NV_PFIFO_CACHE1_DMA_PUSH_BUFFER 0x00000100
3076 #define NV_PFIFO_CACHE1_DMA_PUSH_BUFFER_NOT_EMPTY 0xFFFFFEFF
3077 #define NV_PFIFO_CACHE1_DMA_PUSH_BUFFER_EMPTY 0x00000100
3078 #define NV_PFIFO_CACHE1_DMA_PUSH_STATUS 0x00001000
3079 #define NV_PFIFO_CACHE1_DMA_PUSH_STATUS_RUNNING 0xFFFFEFFF
3080 #define NV_PFIFO_CACHE1_DMA_PUSH_STATUS_SUSPENDED 0x00001000
3081 
3082 /* NV-Register NV_PFIFO_CACHE1_DMA_FETCH */
3083 #define NV_PFIFO_CACHE1_DMA_FETCH 0x00003224
3084 #define NV_PFIFO_CACHE1_DMA_FETCH_TRIG 0x000000F8
3085 #define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_8_BYTES 0x00000000
3086 #define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_16_BYTES 0x00000008
3087 #define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_24_BYTES 0x00000010
3088 #define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_32_BYTES 0x00000018
3089 #define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_40_BYTES 0x00000020
3090 #define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_48_BYTES 0x00000028
3091 #define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_56_BYTES 0x00000030
3092 #define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_64_BYTES 0x00000038
3093 #define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_72_BYTES 0x00000040
3094 #define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_80_BYTES 0x00000048
3095 #define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_88_BYTES 0x00000050
3096 #define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_96_BYTES 0x00000058
3097 #define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_104_BYTES 0x00000060
3098 #define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_112_BYTES 0x00000068
3099 #define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_120_BYTES 0x00000070
3100 #define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_128_BYTES 0x00000078
3101 #define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_136_BYTES 0x00000080
3102 #define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_144_BYTES 0x00000088
3103 #define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_152_BYTES 0x00000090
3104 #define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_160_BYTES 0x00000098
3105 #define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_168_BYTES 0x000000A0
3106 #define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_176_BYTES 0x000000A8
3107 #define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_184_BYTES 0x000000B0
3108 #define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_192_BYTES 0x000000B8
3109 #define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_200_BYTES 0x000000C0
3110 #define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_208_BYTES 0x000000C8
3111 #define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_216_BYTES 0x000000D0
3112 #define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_224_BYTES 0x000000D8
3113 #define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_232_BYTES 0x000000E0
3114 #define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_240_BYTES 0x000000E8
3115 #define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_248_BYTES 0x000000F0
3116 #define NV_PFIFO_CACHE1_DMA_FETCH_TRIG_256_BYTES 0x000000F8
3117 #define NV_PFIFO_CACHE1_DMA_FETCH_SIZE 0x0000E000
3118 #define NV_PFIFO_CACHE1_DMA_FETCH_SIZE_32_BYTES 0x00000000
3119 #define NV_PFIFO_CACHE1_DMA_FETCH_SIZE_64_BYTES 0x00002000
3120 #define NV_PFIFO_CACHE1_DMA_FETCH_SIZE_96_BYTES 0x00004000
3121 #define NV_PFIFO_CACHE1_DMA_FETCH_SIZE_128_BYTES 0x00006000
3122 #define NV_PFIFO_CACHE1_DMA_FETCH_SIZE_160_BYTES 0x00008000
3123 #define NV_PFIFO_CACHE1_DMA_FETCH_SIZE_192_BYTES 0x0000A000
3124 #define NV_PFIFO_CACHE1_DMA_FETCH_SIZE_224_BYTES 0x0000C000
3125 #define NV_PFIFO_CACHE1_DMA_FETCH_SIZE_256_BYTES 0x0000E000
3126 #define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS 0x001F0000
3127 #define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_0 0x00000000
3128 #define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_1 0x00010000
3129 #define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_2 0x00020000
3130 #define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_3 0x00030000
3131 #define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_4 0x00040000
3132 #define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_5 0x00050000
3133 #define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_6 0x00060000
3134 #define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_7 0x00070000
3135 #define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_8 0x00080000
3136 #define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_9 0x00090000
3137 #define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_10 0x000A0000
3138 #define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_11 0x000B0000
3139 #define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_12 0x000C0000
3140 #define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_13 0x000D0000
3141 #define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_14 0x000E0000
3142 #define NV_PFIFO_CACHE1_DMA_FETCH_MAX_REQS_15 0x000F0000
3143 #define NV_PFIFO_CACHE1_ENDIAN 0x80000000
3144 #define NV_PFIFO_CACHE1_LITTLE_ENDIAN 0x7FFFFFFF
3145 #define NV_PFIFO_CACHE1_BIG_ENDIAN 0x80000000
3146 
3147 /* NV-Register NV_PFIFO_CACHE1_DMA_PUT */
3148 #define NV_PFIFO_CACHE1_DMA_PUT 0x00003240
3149 #define NV_PFIFO_CACHE1_DMA_PUT_OFFSET 0x1FFFFFFC
3150 
3151 /* NV-Register NV_PFIFO_CACHE1_DMA_GET */
3152 #define NV_PFIFO_CACHE1_DMA_GET 0x00003244
3153 #define NV_PFIFO_CACHE1_DMA_GET_OFFSET 0x1FFFFFFC
3154 
3155 /* NV-Register NV_PFIFO_CACHE1_REF */
3156 #define NV_PFIFO_CACHE1_REF 0x00003248
3157 #define NV_PFIFO_CACHE1_REF_CNT 0xFFFFFFFF
3158 
3159 /* NV-Register NV_PFIFO_CACHE1_DMA_SUBROUTINE */
3160 #define NV_PFIFO_CACHE1_DMA_SUBROUTINE 0x0000324C
3161 #define NV_PFIFO_CACHE1_DMA_SUBROUTINE_RETURN_OFFSET 0x1FFFFFFC
3162 #define NV_PFIFO_CACHE1_DMA_SUBROUTINE_STATE 0x00000001
3163 #define NV_PFIFO_CACHE1_DMA_SUBROUTINE_STATE_INACTIVE 0xFFFFFFFE
3164 #define NV_PFIFO_CACHE1_DMA_SUBROUTINE_STATE_ACTIVE 0x00000001
3165 
3166 /* NV-Register NV_PFIFO_CACHE1_DMA_DCOUNT */
3167 #define NV_PFIFO_CACHE1_DMA_DCOUNT 0x000032A0
3168 #define NV_PFIFO_CACHE1_DMA_DCOUNT_VALUE 0x00001FFC
3169 
3170 /* NV-Register NV_PFIFO_CACHE1_DMA_GET_JMP_SHADOW */
3171 #define NV_PFIFO_CACHE1_DMA_GET_JMP_SHADOW 0x000032A4
3172 #define NV_PFIFO_CACHE1_DMA_GET_JMP_SHADOW_OFFSET 0x1FFFFFFC
3173 
3174 /* NV-Register NV_PFIFO_CACHE1_DMA_RSVD_SHADOW */
3175 #define NV_PFIFO_CACHE1_DMA_RSVD_SHADOW 0x000032A8
3176 #define NV_PFIFO_CACHE1_DMA_RSVD_SHADOW_CMD 0xFFFFFFFF
3177 
3178 /* NV-Register NV_PFIFO_CACHE1_DMA_DATA_SHADOW */
3179 #define NV_PFIFO_CACHE1_DMA_DATA_SHADOW 0x000032AC
3180 #define NV_PFIFO_CACHE1_DMA_DATA_SHADOW_VALUE 0xFFFFFFFF
3181 
3182 /* NV-Register NV_PFIFO_CACHE1_DMA_STATE */
3183 #define NV_PFIFO_CACHE1_DMA_STATE 0x00003228
3184 #define NV_PFIFO_CACHE1_DMA_STATE_METHOD_TYPE 0x00000001
3185 #define NV_PFIFO_CACHE1_DMA_STATE_METHOD_TYPE_INC 0xFFFFFFFE
3186 #define NV_PFIFO_CACHE1_DMA_STATE_METHOD_TYPE_NON_INC 0x00000001
3187 #define NV_PFIFO_CACHE1_DMA_STATE_METHOD 0x00001FFC
3188 #define NV_PFIFO_CACHE1_DMA_STATE_SUBCHANNEL 0x0000E000
3189 #define NV_PFIFO_CACHE1_DMA_STATE_METHOD_COUNT 0x1FFC0000
3190 #define NV_PFIFO_CACHE1_DMA_STATE_METHOD_COUNT_0 0x00000000
3191 #define NV_PFIFO_CACHE1_DMA_STATE_ERROR 0xE0000000
3192 #define NV_PFIFO_CACHE1_DMA_STATE_ERROR_NONE 0x00000000
3193 #define NV_PFIFO_CACHE1_DMA_STATE_ERROR_CALL 0x20000000
3194 #define NV_PFIFO_CACHE1_DMA_STATE_ERROR_NON_CACHE 0x40000000
3195 #define NV_PFIFO_CACHE1_DMA_STATE_ERROR_RETURN 0x60000000
3196 #define NV_PFIFO_CACHE1_DMA_STATE_ERROR_RESERVED_CMD 0x80000000
3197 #define NV_PFIFO_CACHE1_DMA_STATE_ERROR_PROTECTION 0xC0000000
3198 
3199 /* NV-Register NV_PFIFO_CACHE1_DMA_INSTANCE */
3200 #define NV_PFIFO_CACHE1_DMA_INSTANCE 0x0000322C
3201 #define NV_PFIFO_CACHE1_DMA_INSTANCE_ADDRESS 0x0000FFFF
3202 
3203 /* NV-Register NV_PFIFO_CACHE1_DMA_CTL */
3204 #define NV_PFIFO_CACHE1_DMA_CTL 0x00003230
3205 #define NV_PFIFO_CACHE1_DMA_CTL_ADJUST 0x00000FFC
3206 #define NV_PFIFO_CACHE1_DMA_CTL_PAGE_TABLE 0x00001000
3207 #define NV_PFIFO_CACHE1_DMA_CTL_PAGE_TABLE_NOT_PRESENT 0xFFFFEFFF
3208 #define NV_PFIFO_CACHE1_DMA_CTL_PAGE_TABLE_PRESENT 0x00001000
3209 #define NV_PFIFO_CACHE1_DMA_CTL_PAGE_ENTRY 0x00002000
3210 #define NV_PFIFO_CACHE1_DMA_CTL_PAGE_ENTRY_NOT_LINEAR 0xFFFFDFFF
3211 #define NV_PFIFO_CACHE1_DMA_CTL_PAGE_ENTRY_LINEAR 0x00002000
3212 #define NV_PFIFO_CACHE1_DMA_CTL_TARGET_NODE 0x00030000
3213 #define NV_PFIFO_CACHE1_DMA_CTL_TARGET_NODE_NVM 0x00000000
3214 #define NV_PFIFO_CACHE1_DMA_CTL_TARGET_NODE_PCI 0x00020000
3215 #define NV_PFIFO_CACHE1_DMA_CTL_TARGET_NODE_AGP 0x00030000
3216 #define NV_PFIFO_CACHE1_DMA_CTL_AT_INFO 0x80000000
3217 #define NV_PFIFO_CACHE1_DMA_CTL_AT_INFO_INVALID 0x7FFFFFFF
3218 #define NV_PFIFO_CACHE1_DMA_CTL_AT_INFO_VALID 0x80000000
3219 
3220 /* NV-Register NV_PFIFO_CACHE1_DMA_LIMIT */
3221 #define NV_PFIFO_CACHE1_DMA_LIMIT 0x00003234
3222 #define NV_PFIFO_CACHE1_DMA_LIMIT_OFFSET 0x1FFFFFFC
3223 
3224 /* NV-Register NV_PFIFO_CACHE1_DMA_TLB_TAG */
3225 #define NV_PFIFO_CACHE1_DMA_TLB_TAG 0x00003238
3226 #define NV_PFIFO_CACHE1_DMA_TLB_TAG_ADDRESS 0x1FFFF000
3227 #define NV_PFIFO_CACHE1_DMA_TLB_TAG_STATE 0x00000001
3228 #define NV_PFIFO_CACHE1_DMA_TLB_TAG_STATE_INVALID 0xFFFFFFFE
3229 #define NV_PFIFO_CACHE1_DMA_TLB_TAG_STATE_VALID 0x00000001
3230 
3231 /* NV-Register NV_PFIFO_CACHE1_DMA_TLB_PTE */
3232 #define NV_PFIFO_CACHE1_DMA_TLB_PTE 0x0000323C
3233 #define NV_PFIFO_CACHE1_DMA_TLB_PTE_FRAME_ADDRESS 0xFFFFF000
3234 
3235 /* NV-Register NV_PFIFO_CACHE0_PULL0 */
3236 #define NV_PFIFO_CACHE0_PULL0 0x00003050
3237 #define NV_PFIFO_CACHE0_PULL0_ACCESS 0x00000001
3238 #define NV_PFIFO_CACHE0_PULL0_ACCESS_DISABLED 0xFFFFFFFE
3239 #define NV_PFIFO_CACHE0_PULL0_ACCESS_ENABLED 0x00000001
3240 #define NV_PFIFO_CACHE0_PULL0_HASH 0x00000010
3241 #define NV_PFIFO_CACHE0_PULL0_HASH_SUCCEEDED 0xFFFFFFEF
3242 #define NV_PFIFO_CACHE0_PULL0_HASH_FAILED 0x00000010
3243 #define NV_PFIFO_CACHE0_PULL0_DEVICE 0x00000100
3244 #define NV_PFIFO_CACHE0_PULL0_DEVICE_HARDWARE 0xFFFFFEFF
3245 #define NV_PFIFO_CACHE0_PULL0_DEVICE_SOFTWARE 0x00000100
3246 #define NV_PFIFO_CACHE0_PULL0_HASH_STATE 0x00001000
3247 #define NV_PFIFO_CACHE0_PULL0_HASH_STATE_IDLE 0xFFFFEFFF
3248 #define NV_PFIFO_CACHE0_PULL0_HASH_STATE_BUSY 0x00001000
3249 
3250 /* NV-Register NV_PFIFO_CACHE1_PULL0 */
3251 #define NV_PFIFO_CACHE1_PULL0 0x00003250
3252 #define NV_PFIFO_CACHE1_PULL0_ACCESS 0x00000001
3253 #define NV_PFIFO_CACHE1_PULL0_ACCESS_DISABLED 0xFFFFFFFE
3254 #define NV_PFIFO_CACHE1_PULL0_ACCESS_ENABLED 0x00000001
3255 #define NV_PFIFO_CACHE1_PULL0_HASH 0x00000010
3256 #define NV_PFIFO_CACHE1_PULL0_HASH_SUCCEEDED 0xFFFFFFEF
3257 #define NV_PFIFO_CACHE1_PULL0_HASH_FAILED 0x00000010
3258 #define NV_PFIFO_CACHE1_PULL0_DEVICE 0x00000100
3259 #define NV_PFIFO_CACHE1_PULL0_DEVICE_HARDWARE 0xFFFFFEFF
3260 #define NV_PFIFO_CACHE1_PULL0_DEVICE_SOFTWARE 0x00000100
3261 #define NV_PFIFO_CACHE1_PULL0_HASH_STATE 0x00001000
3262 #define NV_PFIFO_CACHE1_PULL0_HASH_STATE_IDLE 0xFFFFEFFF
3263 #define NV_PFIFO_CACHE1_PULL0_HASH_STATE_BUSY 0x00001000
3264 #define NV_PFIFO_CACHE1_PULL0_ACQUIRE_STATE 0x00010000
3265 #define NV_PFIFO_CACHE1_PULL0_ACQUIRE_STATE_IDLE 0xFFFEFFFF
3266 #define NV_PFIFO_CACHE1_PULL0_ACQUIRE_STATE_BUSY 0x00010000
3267 #define NV_PFIFO_CACHE1_PULL0_SEMAPHORE 0x00300000
3268 #define NV_PFIFO_CACHE1_PULL0_SEMAPHORE_NO_ERROR 0x00000000
3269 #define NV_PFIFO_CACHE1_PULL0_SEMAPHORE_BAD_ARG 0x00100000
3270 #define NV_PFIFO_CACHE1_PULL0_SEMAPHORE_INV_STATE 0x00200000
3271 
3272 /* NV-Register NV_PFIFO_CACHE0_PULL1 */
3273 #define NV_PFIFO_CACHE0_PULL1 0x00003054
3274 #define NV_PFIFO_CACHE0_PULL1_ENGINE 0x00000003
3275 #define NV_PFIFO_CACHE0_PULL1_ENGINE_SW 0x00000000
3276 #define NV_PFIFO_CACHE0_PULL1_ENGINE_GRAPHICS 0x00000001
3277 #define NV_PFIFO_CACHE0_PULL1_ENGINE_DVD 0x00000002
3278 
3279 /* NV-Register NV_PFIFO_CACHE1_PULL1 */
3280 #define NV_PFIFO_CACHE1_PULL1 0x00003254
3281 #define NV_PFIFO_CACHE1_PULL1_ENGINE 0x00000003
3282 #define NV_PFIFO_CACHE1_PULL1_ENGINE_SW 0x00000000
3283 #define NV_PFIFO_CACHE1_PULL1_ENGINE_GRAPHICS 0x00000001
3284 #define NV_PFIFO_CACHE1_PULL1_ENGINE_DVD 0x00000002
3285 
3286 /* NV-Register NV_PFIFO_CACHE1_PULL1 [0x1C] @ 0x00003270 */
3287 #define NV_PFIFO_CACHE1_PULL1_ACQUIRE 0x00000010
3288 #define NV_PFIFO_CACHE1_PULL1_ACQUIRE_INACTIVE 0xFFFFFFEF
3289 #define NV_PFIFO_CACHE1_PULL1_ACQUIRE_ACTIVE 0x00000010
3290 
3291 /* NV-Register NV_PFIFO_CACHE1_PULL1 [0x1C] @ 0x00003270 */
3292 #define NV_PFIFO_CACHE1_PULL1_SEM_TARGET_NODE 0x00030000
3293 #define NV_PFIFO_CACHE1_PULL1_SEM_TARGET_NODE_NVM 0x00000000
3294 #define NV_PFIFO_CACHE1_PULL1_SEM_TARGET_NODE_PCI 0x00020000
3295 #define NV_PFIFO_CACHE1_PULL1_SEM_TARGET_NODE_AGP 0x00030000
3296 
3297 /* NV-Register NV_PFIFO_CACHE0_HASH */
3298 #define NV_PFIFO_CACHE0_HASH 0x00003058
3299 #define NV_PFIFO_CACHE0_HASH_INSTANCE 0x0000FFFF
3300 #define NV_PFIFO_CACHE0_HASH_VALID 0x00010000
3301 
3302 /* NV-Register NV_PFIFO_CACHE1_HASH */
3303 #define NV_PFIFO_CACHE1_HASH 0x00003258
3304 #define NV_PFIFO_CACHE1_HASH_INSTANCE 0x0000FFFF
3305 #define NV_PFIFO_CACHE1_HASH_VALID 0x00010000
3306 
3307 /* NV-Register NV_PFIFO_CACHE1_ACQUIRE_0 */
3308 #define NV_PFIFO_CACHE1_ACQUIRE_0 0x00003260
3309 #define NV_PFIFO_CACHE1_ACQUIRE_0_TIMEOUT 0xFFFFFFFF
3310 
3311 /* NV-Register NV_PFIFO_CACHE1_ACQUIRE_1 */
3312 #define NV_PFIFO_CACHE1_ACQUIRE_1 0x00003264
3313 #define NV_PFIFO_CACHE1_ACQUIRE_1_TIMESTAMP 0xFFFFFFFF
3314 
3315 /* NV-Register NV_PFIFO_CACHE1_ACQUIRE_2 */
3316 #define NV_PFIFO_CACHE1_ACQUIRE_2 0x00003268
3317 #define NV_PFIFO_CACHE1_ACQUIRE_2_VALUE 0x7FFFFFFF
3318 
3319 /* NV-Register NV_PFIFO_CACHE1_SEMAPHORE */
3320 #define NV_PFIFO_CACHE1_SEMAPHORE 0x0000326C
3321 #define NV_PFIFO_CACHE1_SEMAPHORE_CTXDMA 0x00000001
3322 #define NV_PFIFO_CACHE1_SEMAPHORE_CTXDMA_INVALID 0xFFFFFFFE
3323 #define NV_PFIFO_CACHE1_SEMAPHORE_CTXDMA_VALID 0x00000001
3324 #define NV_PFIFO_CACHE1_SEMAPHORE_OFFSET 0x00000FFC
3325 #define NV_PFIFO_CACHE1_SEMAPHORE_PAGE_ADDRESS 0xFFFFF000
3326 
3327 /* NV-Register NV_PFIFO_CACHE0_STATUS */
3328 #define NV_PFIFO_CACHE0_STATUS 0x00003014
3329 #define NV_PFIFO_CACHE0_STATUS_LOW_MARK 0x00000010
3330 #define NV_PFIFO_CACHE0_STATUS_LOW_MARK_NOT_EMPTY 0xFFFFFFEF
3331 #define NV_PFIFO_CACHE0_STATUS_LOW_MARK_EMPTY 0x00000010
3332 #define NV_PFIFO_CACHE0_STATUS_HIGH_MARK 0x00000100
3333 #define NV_PFIFO_CACHE0_STATUS_HIGH_MARK_NOT_FULL 0xFFFFFEFF
3334 #define NV_PFIFO_CACHE0_STATUS_HIGH_MARK_FULL 0x00000100
3335 
3336 /* NV-Register NV_PFIFO_CACHE1_STATUS */
3337 #define NV_PFIFO_CACHE1_STATUS 0x00003214
3338 #define NV_PFIFO_CACHE1_STATUS_LOW_MARK 0x00000010
3339 #define NV_PFIFO_CACHE1_STATUS_LOW_MARK_NOT_EMPTY 0xFFFFFFEF
3340 #define NV_PFIFO_CACHE1_STATUS_LOW_MARK_EMPTY 0x00000010
3341 #define NV_PFIFO_CACHE1_STATUS_HIGH_MARK 0x00000100
3342 #define NV_PFIFO_CACHE1_STATUS_HIGH_MARK_NOT_FULL 0xFFFFFEFF
3343 #define NV_PFIFO_CACHE1_STATUS_HIGH_MARK_FULL 0x00000100
3344 
3345 /* NV-Register NV_PFIFO_CACHE1_STATUS1 */
3346 #define NV_PFIFO_CACHE1_STATUS1 0x00003218
3347 #define NV_PFIFO_CACHE1_STATUS1_RANOUT 0x00000001
3348 #define NV_PFIFO_CACHE1_STATUS1_RANOUT_FALSE 0xFFFFFFFE
3349 #define NV_PFIFO_CACHE1_STATUS1_RANOUT_TRUE 0x00000001
3350 
3351 /* NV-Register NV_PFIFO_CACHE0_PUT */
3352 #define NV_PFIFO_CACHE0_PUT 0x00003010
3353 #define NV_PFIFO_CACHE0_PUT_ADDRESS 0x00000004
3354 
3355 /* NV-Register NV_PFIFO_CACHE1_PUT */
3356 #define NV_PFIFO_CACHE1_PUT 0x00003210
3357 #define NV_PFIFO_CACHE1_PUT_ADDRESS 0x000003FC
3358 
3359 /* NV-Register NV_PFIFO_CACHE0_GET */
3360 #define NV_PFIFO_CACHE0_GET 0x00003070
3361 #define NV_PFIFO_CACHE0_GET_ADDRESS 0x00000004
3362 
3363 /* NV-Register NV_PFIFO_CACHE1_GET */
3364 #define NV_PFIFO_CACHE1_GET 0x00003270
3365 #define NV_PFIFO_CACHE1_GET_ADDRESS 0x000003FC
3366 
3367 /* NV-Register NV_PFIFO_CACHE0_ENGINE */
3368 #define NV_PFIFO_CACHE0_ENGINE 0x00003080
3369 #define NV_PFIFO_CACHE0_ENGINE_0 0x00000003
3370 #define NV_PFIFO_CACHE0_ENGINE_0_SW 0x00000000
3371 #define NV_PFIFO_CACHE0_ENGINE_0_GRAPHICS 0x00000001
3372 #define NV_PFIFO_CACHE0_ENGINE_0_DVD 0x00000002
3373 #define NV_PFIFO_CACHE0_ENGINE_1 0x00000030
3374 #define NV_PFIFO_CACHE0_ENGINE_1_SW 0x00000000
3375 #define NV_PFIFO_CACHE0_ENGINE_1_GRAPHICS 0x00000010
3376 #define NV_PFIFO_CACHE0_ENGINE_1_DVD 0x00000020
3377 #define NV_PFIFO_CACHE0_ENGINE_2 0x00000300
3378 #define NV_PFIFO_CACHE0_ENGINE_2_SW 0x00000000
3379 #define NV_PFIFO_CACHE0_ENGINE_2_GRAPHICS 0x00000100
3380 #define NV_PFIFO_CACHE0_ENGINE_2_DVD 0x00000200
3381 #define NV_PFIFO_CACHE0_ENGINE_3 0x00003000
3382 #define NV_PFIFO_CACHE0_ENGINE_3_SW 0x00000000
3383 #define NV_PFIFO_CACHE0_ENGINE_3_GRAPHICS 0x00001000
3384 #define NV_PFIFO_CACHE0_ENGINE_3_DVD 0x00002000
3385 #define NV_PFIFO_CACHE0_ENGINE_4 0x00030000
3386 #define NV_PFIFO_CACHE0_ENGINE_4_SW 0x00000000
3387 #define NV_PFIFO_CACHE0_ENGINE_4_GRAPHICS 0x00010000
3388 #define NV_PFIFO_CACHE0_ENGINE_4_DVD 0x00020000
3389 #define NV_PFIFO_CACHE0_ENGINE_5 0x00300000
3390 #define NV_PFIFO_CACHE0_ENGINE_5_SW 0x00000000
3391 #define NV_PFIFO_CACHE0_ENGINE_5_GRAPHICS 0x00100000
3392 #define NV_PFIFO_CACHE0_ENGINE_5_DVD 0x00200000
3393 #define NV_PFIFO_CACHE0_ENGINE_6 0x03000000
3394 #define NV_PFIFO_CACHE0_ENGINE_6_SW 0x00000000
3395 #define NV_PFIFO_CACHE0_ENGINE_6_GRAPHICS 0x01000000
3396 #define NV_PFIFO_CACHE0_ENGINE_6_DVD 0x02000000
3397 #define NV_PFIFO_CACHE0_ENGINE_7 0x30000000
3398 #define NV_PFIFO_CACHE0_ENGINE_7_SW 0x00000000
3399 #define NV_PFIFO_CACHE0_ENGINE_7_GRAPHICS 0x10000000
3400 #define NV_PFIFO_CACHE0_ENGINE_7_DVD 0x20000000
3401 
3402 /* NV-Register NV_PFIFO_CACHE1_ENGINE */
3403 #define NV_PFIFO_CACHE1_ENGINE 0x00003280
3404 #define NV_PFIFO_CACHE1_ENGINE_0 0x00000003
3405 #define NV_PFIFO_CACHE1_ENGINE_0_SW 0x00000000
3406 #define NV_PFIFO_CACHE1_ENGINE_0_GRAPHICS 0x00000001
3407 #define NV_PFIFO_CACHE1_ENGINE_0_DVD 0x00000002
3408 #define NV_PFIFO_CACHE1_ENGINE_1 0x00000030
3409 #define NV_PFIFO_CACHE1_ENGINE_1_SW 0x00000000
3410 #define NV_PFIFO_CACHE1_ENGINE_1_GRAPHICS 0x00000010
3411 #define NV_PFIFO_CACHE1_ENGINE_1_DVD 0x00000020
3412 #define NV_PFIFO_CACHE1_ENGINE_2 0x00000300
3413 #define NV_PFIFO_CACHE1_ENGINE_2_SW 0x00000000
3414 #define NV_PFIFO_CACHE1_ENGINE_2_GRAPHICS 0x00000100
3415 #define NV_PFIFO_CACHE1_ENGINE_2_DVD 0x00000200
3416 #define NV_PFIFO_CACHE1_ENGINE_3 0x00003000
3417 #define NV_PFIFO_CACHE1_ENGINE_3_SW 0x00000000
3418 #define NV_PFIFO_CACHE1_ENGINE_3_GRAPHICS 0x00001000
3419 #define NV_PFIFO_CACHE1_ENGINE_3_DVD 0x00002000
3420 #define NV_PFIFO_CACHE1_ENGINE_4 0x00030000
3421 #define NV_PFIFO_CACHE1_ENGINE_4_SW 0x00000000
3422 #define NV_PFIFO_CACHE1_ENGINE_4_GRAPHICS 0x00010000
3423 #define NV_PFIFO_CACHE1_ENGINE_4_DVD 0x00020000
3424 #define NV_PFIFO_CACHE1_ENGINE_5 0x00300000
3425 #define NV_PFIFO_CACHE1_ENGINE_5_SW 0x00000000
3426 #define NV_PFIFO_CACHE1_ENGINE_5_GRAPHICS 0x00100000
3427 #define NV_PFIFO_CACHE1_ENGINE_5_DVD 0x00200000
3428 #define NV_PFIFO_CACHE1_ENGINE_6 0x03000000
3429 #define NV_PFIFO_CACHE1_ENGINE_6_SW 0x00000000
3430 #define NV_PFIFO_CACHE1_ENGINE_6_GRAPHICS 0x01000000
3431 #define NV_PFIFO_CACHE1_ENGINE_6_DVD 0x02000000
3432 #define NV_PFIFO_CACHE1_ENGINE_7 0x30000000
3433 #define NV_PFIFO_CACHE1_ENGINE_7_SW 0x00000000
3434 #define NV_PFIFO_CACHE1_ENGINE_7_GRAPHICS 0x10000000
3435 #define NV_PFIFO_CACHE1_ENGINE_7_DVD 0x20000000
3436 
3437 /* NV-Array NV_PFIFO_CACHE0_METHOD (8 byte access) */
3438 #define NV_PFIFO_CACHE0_METHOD 0x00003100
3439 /* NV-Array size NV_PFIFO_CACHE0_METHOD__SIZE_1 [0..0] */
3440 #define NV_PFIFO_CACHE0_METHOD__SIZE_1 0x00000001
3441 #define NV_PFIFO_CACHE0_METHOD_ADDRESS 0x00001FFC
3442 #define NV_PFIFO_CACHE0_METHOD_SUBCHANNEL 0x0000E000
3443 
3444 /* NV-Array NV_PFIFO_CACHE1_METHOD (8 byte access) */
3445 #define NV_PFIFO_CACHE1_METHOD 0x00003800
3446 /* NV-Array size NV_PFIFO_CACHE1_METHOD__SIZE_1 [0..127] */
3447 #define NV_PFIFO_CACHE1_METHOD__SIZE_1 0x00000080
3448 #define NV_PFIFO_CACHE1_METHOD_TYPE 0x00000001
3449 #define NV_PFIFO_CACHE1_METHOD_ADDRESS 0x00001FFC
3450 #define NV_PFIFO_CACHE1_METHOD_SUBCHANNEL 0x0000E000
3451 
3452 /* NV-Array NV_PFIFO_CACHE1_METHOD_ALIAS (8 byte access) */
3453 #define NV_PFIFO_CACHE1_METHOD_ALIAS 0x00003C00
3454 /* NV-Array size NV_PFIFO_CACHE1_METHOD_ALIAS__SIZE_1 [0..127] */
3455 #define NV_PFIFO_CACHE1_METHOD_ALIAS__SIZE_1 0x00000080
3456 
3457 /* NV-Array NV_PFIFO_CACHE0_DATA (8 byte access) */
3458 #define NV_PFIFO_CACHE0_DATA 0x00003104
3459 /* NV-Array size NV_PFIFO_CACHE0_DATA__SIZE_1 [0..0] */
3460 #define NV_PFIFO_CACHE0_DATA__SIZE_1 0x00000001
3461 #define NV_PFIFO_CACHE0_DATA_VALUE 0xFFFFFFFF
3462 
3463 /* NV-Array NV_PFIFO_CACHE1_DATA (8 byte access) */
3464 #define NV_PFIFO_CACHE1_DATA 0x00003804
3465 /* NV-Array size NV_PFIFO_CACHE1_DATA__SIZE_1 [0..127] */
3466 #define NV_PFIFO_CACHE1_DATA__SIZE_1 0x00000080
3467 #define NV_PFIFO_CACHE1_DATA_VALUE 0xFFFFFFFF
3468 
3469 /* NV-Array NV_PFIFO_CACHE1_DATA_ALIAS (8 byte access) */
3470 #define NV_PFIFO_CACHE1_DATA_ALIAS 0x00003C04
3471 /* NV-Array size NV_PFIFO_CACHE1_DATA_ALIAS__SIZE_1 [0..127] */
3472 #define NV_PFIFO_CACHE1_DATA_ALIAS__SIZE_1 0x00000080
3473 
3474 /* NV-Array NV_PFIFO_DEVICE (4 byte access) */
3475 #define NV_PFIFO_DEVICE 0x00002800
3476 /* NV-Array size NV_PFIFO_DEVICE__SIZE_1 [0..127] */
3477 #define NV_PFIFO_DEVICE__SIZE_1 0x00000080
3478 #define NV_PFIFO_DEVICE_CHID 0x0000001F
3479 #define NV_PFIFO_DEVICE_SWITCH 0x01000000
3480 #define NV_PFIFO_DEVICE_SWITCH_UNAVAILABLE 0xFEFFFFFF
3481 #define NV_PFIFO_DEVICE_SWITCH_AVAILABLE 0x01000000
3482 
3483 /* NV-Register NV_PFIFO_RUNOUT_STATUS */
3484 #define NV_PFIFO_RUNOUT_STATUS 0x00002400
3485 #define NV_PFIFO_RUNOUT_STATUS_RANOUT 0x00000001
3486 #define NV_PFIFO_RUNOUT_STATUS_RANOUT_FALSE 0xFFFFFFFE
3487 #define NV_PFIFO_RUNOUT_STATUS_RANOUT_TRUE 0x00000001
3488 #define NV_PFIFO_RUNOUT_STATUS_LOW_MARK 0x00000010
3489 #define NV_PFIFO_RUNOUT_STATUS_LOW_MARK_NOT_EMPTY 0xFFFFFFEF
3490 #define NV_PFIFO_RUNOUT_STATUS_LOW_MARK_EMPTY 0x00000010
3491 #define NV_PFIFO_RUNOUT_STATUS_HIGH_MARK 0x00000100
3492 #define NV_PFIFO_RUNOUT_STATUS_HIGH_MARK_NOT_FULL 0xFFFFFEFF
3493 #define NV_PFIFO_RUNOUT_STATUS_HIGH_MARK_FULL 0x00000100
3494 
3495 /* NV-Register NV_PFIFO_RUNOUT_PUT */
3496 #define NV_PFIFO_RUNOUT_PUT 0x00002410
3497 #define NV_PFIFO_RUNOUT_PUT_ADDRESS 0x00001FF8
3498 #define NV_PFIFO_RUNOUT_PUT_ADDRESS__SIZE_0 0x000001F8
3499 #define NV_PFIFO_RUNOUT_PUT_ADDRESS__SIZE_1 0x00001FF8
3500 
3501 /* NV-Register NV_PFIFO_RUNOUT_GET */
3502 #define NV_PFIFO_RUNOUT_GET 0x00002420
3503 #define NV_PFIFO_RUNOUT_GET_ADDRESS 0x00003FF8
3504 
3505 /* NV-Array NV_USER_OBJECT (65536 byte access) */
3506 #define NV_USER_OBJECT 0x00800000
3507 /* NV-Array size NV_USER_OBJECT__SIZE_1 [0..31] */
3508 #define NV_USER_OBJECT__SIZE_1 0x00000020
3509 /* NV-Array size NV_USER_OBJECT__SIZE_2 [0..7] */
3510 #define NV_USER_OBJECT__SIZE_2 0x00000008
3511 #define NV_USER_OBJECT_HANDLE 0xFFFFFFFF
3512 
3513 /* NV-Array NV_USER_FREE016 (65536 byte access) */
3514 #define NV_USER_FREE016 0x00800010
3515 /* NV-Array size NV_USER_FREE016__SIZE_1 [0..31] */
3516 #define NV_USER_FREE016__SIZE_1 0x00000020
3517 /* NV-Array size NV_USER_FREE016__SIZE_2 [0..7] */
3518 #define NV_USER_FREE016__SIZE_2 0x00000008
3519 #define NV_USER_FREE016_COUNT_LO 0x00000003
3520 #define NV_USER_FREE016_COUNT_LO_0 0x00000000
3521 #define NV_USER_FREE016_COUNT 0x000003FC
3522 #define NV_USER_FREE016_COUNT_HI 0x0000FC00
3523 #define NV_USER_FREE016_COUNT_HI_0 0x00000000
3524 
3525 /* NV-Array NV_USER_FREE032 (65536 byte access) */
3526 #define NV_USER_FREE032 0x00800010
3527 /* NV-Array size NV_USER_FREE032__SIZE_1 [0..31] */
3528 #define NV_USER_FREE032__SIZE_1 0x00000020
3529 /* NV-Array size NV_USER_FREE032__SIZE_2 [0..7] */
3530 #define NV_USER_FREE032__SIZE_2 0x00000008
3531 #define NV_USER_FREE032_COUNT_LO 0x00000003
3532 #define NV_USER_FREE032_COUNT_LO_0 0x00000000
3533 #define NV_USER_FREE032_COUNT 0x000003FC
3534 #define NV_USER_FREE032_COUNT_HI 0xFFFFFC00
3535 #define NV_USER_FREE032_COUNT_HI_0 0x00000000
3536 
3537 /* NV-Array NV_USER_ZERO016 (65536 byte access) */
3538 #define NV_USER_ZERO016 0x00800012
3539 /* NV-Array size NV_USER_ZERO016__SIZE_1 [0..31] */
3540 #define NV_USER_ZERO016__SIZE_1 0x00000020
3541 /* NV-Array size NV_USER_ZERO016__SIZE_2 [0..7] */
3542 #define NV_USER_ZERO016__SIZE_2 0x00000008
3543 /* NV-Array size NV_USER_ZERO016__SIZE_3 [0..6] */
3544 #define NV_USER_ZERO016__SIZE_3 0x00000007
3545 #define NV_USER_ZERO016_COUNT 0x0000FFFF
3546 #define NV_USER_ZERO016_COUNT_0 0x00000000
3547 
3548 /* NV-Array NV_USER_ZERO032 (65536 byte access) */
3549 #define NV_USER_ZERO032 0x00800014
3550 /* NV-Array size NV_USER_ZERO032__SIZE_1 [0..31] */
3551 #define NV_USER_ZERO032__SIZE_1 0x00000020
3552 /* NV-Array size NV_USER_ZERO032__SIZE_2 [0..7] */
3553 #define NV_USER_ZERO032__SIZE_2 0x00000008
3554 /* NV-Array size NV_USER_ZERO032__SIZE_3 [0..2] */
3555 #define NV_USER_ZERO032__SIZE_3 0x00000003
3556 #define NV_USER_ZERO032_COUNT 0xFFFFFFFF
3557 #define NV_USER_ZERO032_COUNT_0 0x00000000
3558 
3559 /* NV-Array NV_USER_DMA_PUT (65536 byte access) */
3560 #define NV_USER_DMA_PUT 0x00800040
3561 /* NV-Array size NV_USER_DMA_PUT__SIZE_1 [0..31] */
3562 #define NV_USER_DMA_PUT__SIZE_1 0x00000020
3563 /* NV-Array size NV_USER_DMA_PUT__SIZE_2 [0..7] */
3564 #define NV_USER_DMA_PUT__SIZE_2 0x00000008
3565 #define NV_USER_DMA_PUT_OFFSET 0x1FFFFFFC
3566 
3567 /* NV-Array NV_USER_DMA_GET (65536 byte access) */
3568 #define NV_USER_DMA_GET 0x00800044
3569 /* NV-Array size NV_USER_DMA_GET__SIZE_1 [0..31] */
3570 #define NV_USER_DMA_GET__SIZE_1 0x00000020
3571 /* NV-Array size NV_USER_DMA_GET__SIZE_2 [0..7] */
3572 #define NV_USER_DMA_GET__SIZE_2 0x00000008
3573 #define NV_USER_DMA_GET_OFFSET 0x1FFFFFFC
3574 
3575 /* NV-Array NV_USER_REF (65536 byte access) */
3576 #define NV_USER_REF 0x00800048
3577 /* NV-Array size NV_USER_REF__SIZE_1 [0..31] */
3578 #define NV_USER_REF__SIZE_1 0x00000020
3579 /* NV-Array size NV_USER_REF__SIZE_2 [0..7] */
3580 #define NV_USER_REF__SIZE_2 0x00000008
3581 #define NV_USER_REF_CNT 0xFFFFFFFF
3582 
3583 /* NV-Array NV_USER_SEM_CTXDMA (65536 byte access) */
3584 #define NV_USER_SEM_CTXDMA 0x00800060
3585 /* NV-Array size NV_USER_SEM_CTXDMA__SIZE_1 [0..31] */
3586 #define NV_USER_SEM_CTXDMA__SIZE_1 0x00000020
3587 /* NV-Array size NV_USER_SEM_CTXDMA__SIZE_2 [0..7] */
3588 #define NV_USER_SEM_CTXDMA__SIZE_2 0x00000008
3589 #define NV_USER_SEM_CTXDMA_HANDLE 0xFFFFFFFF
3590 
3591 /* NV-Array NV_USER_SEM_OFFSET (65536 byte access) */
3592 #define NV_USER_SEM_OFFSET 0x00800064
3593 /* NV-Array size NV_USER_SEM_OFFSET__SIZE_1 [0..31] */
3594 #define NV_USER_SEM_OFFSET__SIZE_1 0x00000020
3595 /* NV-Array size NV_USER_SEM_OFFSET__SIZE_2 [0..7] */
3596 #define NV_USER_SEM_OFFSET__SIZE_2 0x00000008
3597 #define NV_USER_SEM_OFFSET_ADDRESS 0x00000FFC
3598 
3599 /* NV-Array NV_USER_SEM_ACQUIRE (65536 byte access) */
3600 #define NV_USER_SEM_ACQUIRE 0x00800068
3601 /* NV-Array size NV_USER_SEM_ACQUIRE__SIZE_1 [0..31] */
3602 #define NV_USER_SEM_ACQUIRE__SIZE_1 0x00000020
3603 /* NV-Array size NV_USER_SEM_ACQUIRE__SIZE_2 [0..7] */
3604 #define NV_USER_SEM_ACQUIRE__SIZE_2 0x00000008
3605 #define NV_USER_SEM_ACQUIRE_VALUE 0xFFFFFFFF
3606 
3607 /* NV-Array NV_USER_SEM_RELEASE (65536 byte access) */
3608 #define NV_USER_SEM_RELEASE 0x0080006C
3609 /* NV-Array size NV_USER_SEM_RELEASE__SIZE_1 [0..31] */
3610 #define NV_USER_SEM_RELEASE__SIZE_1 0x00000020
3611 /* NV-Array size NV_USER_SEM_RELEASE__SIZE_2 [0..7] */
3612 #define NV_USER_SEM_RELEASE__SIZE_2 0x00000008
3613 #define NV_USER_SEM_RELEASE_VALUE 0xFFFFFFFF
3614 
3615 /* NV-Memory NV_PNVM */
3616 #define NV_PNVM 0x08000000 /* size: 0x07FFFFFF */
3617 
3618 /* NV-Memory NV_PRAMIN */
3619 #define NV_PRAMIN 0x00700000 /* size: 0x000FFFFF */
3620 
3621 /* NV-Device NV_PFB */
3622 #define NV_PFB 0x00100000 /* size: 0x00000FFF */
3623 
3624 /* NV-Device NV_PDFB */
3625 #define NV_PDFB 0x08000000 /* size: 0x07FFFFFF */
3626 
3627 /* NV-Register NV_PFB_BOOT_0 */
3628 #define NV_PFB_BOOT_0 0x00100000
3629 #define NV_PFB_BOOT_0_RAM_AMOUNT 0x00000003
3630 #define NV_PFB_BOOT_0_RAM_AMOUNT_32MB 0x00000000
3631 #define NV_PFB_BOOT_0_RAM_AMOUNT_4MB 0x00000001
3632 #define NV_PFB_BOOT_0_RAM_AMOUNT_8MB 0x00000002
3633 #define NV_PFB_BOOT_0_RAM_AMOUNT_16MB 0x00000003
3634 #define NV_PFB_BOOT_0_RAM_WIDTH_128 0x00000004
3635 #define NV_PFB_BOOT_0_RAM_WIDTH_128_OFF 0xFFFFFFFB
3636 #define NV_PFB_BOOT_0_RAM_WIDTH_128_ON 0x00000004
3637 #define NV_PFB_BOOT_0_RAM_TYPE 0x00000038
3638 #define NV_PFB_BOOT_0_RAM_TYPE_SGRAM_8MBIT 0x00000000
3639 #define NV_PFB_BOOT_0_RAM_TYPE_SGRAM_16MBIT 0x00000008
3640 #define NV_PFB_BOOT_0_RAM_TYPE_SGRAM_16MBIT_4BANK 0x00000010
3641 #define NV_PFB_BOOT_0_RAM_TYPE_SDRAM_16MBIT 0x00000018
3642 #define NV_PFB_BOOT_0_RAM_TYPE_SDRAM_64MBIT 0x00000020
3643 #define NV_PFB_BOOT_0_RAM_TYPE_SDRAM_64MBITX16 0x00000028
3644 
3645 /* NV-Register NV_PFB_DEBUG_0 */
3646 #define NV_PFB_DEBUG_0 0x00100080
3647 #define NV_PFB_DEBUG_0_PAGE_MODE 0x00000001
3648 #define NV_PFB_DEBUG_0_PAGE_MODE_ENABLED 0xFFFFFFFE
3649 #define NV_PFB_DEBUG_0_PAGE_MODE_DISABLED 0x00000001
3650 #define NV_PFB_DEBUG_0_REFRESH 0x00000010
3651 #define NV_PFB_DEBUG_0_REFRESH_ENABLED 0xFFFFFFEF
3652 #define NV_PFB_DEBUG_0_REFRESH_DISABLED 0x00000010
3653 #define NV_PFB_DEBUG_0_REFRESH_COUNTX64 0x00003F00
3654 #define NV_PFB_DEBUG_0_REFRESH_COUNTX64_DEFAULT 0x00001000
3655 #define NV_PFB_DEBUG_0_REFRESH_SLOW_CLK 0x00004000
3656 #define NV_PFB_DEBUG_0_REFRESH_SLOW_CLK_DISABLED 0xFFFFBFFF
3657 #define NV_PFB_DEBUG_0_REFRESH_SLOW_CLK_ENABLED 0x00004000
3658 #define NV_PFB_DEBUG_0_SAFE_MODE 0x00008000
3659 #define NV_PFB_DEBUG_0_SAFE_MODE_DISABLED 0xFFFF7FFF
3660 #define NV_PFB_DEBUG_0_SAFE_MODE_ENABLED 0x00008000
3661 #define NV_PFB_DEBUG_0_ALOM_ENABLE 0x00010000
3662 #define NV_PFB_DEBUG_0_ALOM_ENABLE_DISABLED 0xFFFEFFFF
3663 #define NV_PFB_DEBUG_0_ALOM_ENABLE_ENABLED 0x00010000
3664 #define NV_PFB_DEBUG_0_CASOE 0x00100000
3665 #define NV_PFB_DEBUG_0_CASOE_ENABLED 0xFFEFFFFF
3666 #define NV_PFB_DEBUG_0_CASOE_DISABLED 0x00100000
3667 #define NV_PFB_DEBUG_0_CKE_INVERT 0x10000000
3668 #define NV_PFB_DEBUG_0_CKE_INVERT_OFF 0xEFFFFFFF
3669 #define NV_PFB_DEBUG_0_CKE_INVERT_ON 0x10000000
3670 #define NV_PFB_DEBUG_0_REFINC 0x20000000
3671 #define NV_PFB_DEBUG_0_REFINC_DISABLED 0xDFFFFFFF
3672 #define NV_PFB_DEBUG_0_REFINC_ENABLED 0x20000000
3673 #define NV_PFB_DEBUG_0_SAVE_POWER 0x40000000
3674 #define NV_PFB_DEBUG_0_SAVE_POWER_ON 0xBFFFFFFF
3675 #define NV_PFB_DEBUG_0_SAVE_POWER_OFF 0x40000000
3676 
3677 /* NV-Register NV_PFB_CONFIG_0 */
3678 #define NV_PFB_CONFIG_0 0x00100200
3679 #define NV_PFB_CONFIG_0_TYPE 0x00007FFF
3680 #define NV_PFB_CONFIG_0_TYPE_OLD1024_FIXED_8BPP 0x00000120
3681 #define NV_PFB_CONFIG_0_TYPE_OLD1024_FIXED_16BPP 0x00000220
3682 #define NV_PFB_CONFIG_0_TYPE_OLD1024_FIXED_32BPP 0x00000320
3683 #define NV_PFB_CONFIG_0_TYPE_OLD1024_VAR_8BPP 0x00004120
3684 #define NV_PFB_CONFIG_0_TYPE_OLD1024_VAR_16BPP 0x00004220
3685 #define NV_PFB_CONFIG_0_TYPE_OLD1024_VAR_32BPP 0x00004320
3686 #define NV_PFB_CONFIG_0_TYPE_TETRIS 0x00002000
3687 #define NV_PFB_CONFIG_0_TYPE_NOTILING 0x00001114
3688 #define NV_PFB_CONFIG_0_TETRIS_MODE 0x00038000
3689 #define NV_PFB_CONFIG_0_TETRIS_MODE_PASS 0x00000000
3690 #define NV_PFB_CONFIG_0_TETRIS_MODE_1 0x00008000
3691 #define NV_PFB_CONFIG_0_TETRIS_MODE_2 0x00010000
3692 #define NV_PFB_CONFIG_0_TETRIS_MODE_3 0x00018000
3693 #define NV_PFB_CONFIG_0_TETRIS_MODE_4 0x00020000
3694 #define NV_PFB_CONFIG_0_TETRIS_MODE_5 0x00028000
3695 #define NV_PFB_CONFIG_0_TETRIS_MODE_6 0x00030000
3696 #define NV_PFB_CONFIG_0_TETRIS_MODE_7 0x00038000
3697 #define NV_PFB_CONFIG_0_TETRIS_SHIFT 0x000C0000
3698 #define NV_PFB_CONFIG_0_TETRIS_SHIFT_0 0x00000000
3699 #define NV_PFB_CONFIG_0_TETRIS_SHIFT_1 0x00040000
3700 #define NV_PFB_CONFIG_0_TETRIS_SHIFT_2 0x00080000
3701 #define NV_PFB_CONFIG_0_UNUSED 0x00800000
3702 #define NV_PFB_CONFIG_0_PRAMIN_WR_MASK 0x0F000000
3703 #define NV_PFB_CONFIG_0_PRAMIN_WR_MASK_INIT 0x00000000
3704 #define NV_PFB_CONFIG_0_PRAMIN_WR_MASK_CLEAR 0x0F000000
3705 #define NV_PFB_CONFIG_0_PRAMIN_WR 0x10000000
3706 #define NV_PFB_CONFIG_0_PRAMIN_WR_INIT 0xEFFFFFFF
3707 #define NV_PFB_CONFIG_0_PRAMIN_WR_DISABLED 0x10000000
3708 #define NV_PFB_CONFIG_0_SCRAMBLE_EN 0x20000000
3709 #define NV_PFB_CONFIG_0_SCRAMBLE_EN_INIT 0xDFFFFFFF
3710 #define NV_PFB_CONFIG_0_SCRAMBLE_ACTIVE 0x20000000
3711 #define NV_PFB_CONFIG_0_SCRAMBLE_EN_ACTIVE 0x20000000
3712 
3713 /* NV-Register NV_PFB_CONFIG_1 */
3714 #define NV_PFB_CONFIG_1 0x00100204
3715 #define NV_PFB_CONFIG_1_CAS_LATENCY 0x00000007
3716 #define NV_PFB_CONFIG_1_CAS_LATENCY_3 0x00000003
3717 #define NV_PFB_CONFIG_1_CAS_LATENCY_2 0x00000002
3718 #define NV_PFB_CONFIG_1_CAS_LATENCY_4 0x00000004
3719 #define NV_PFB_CONFIG_1_RAS_RAS 0x000000F0
3720 #define NV_PFB_CONFIG_1_RAS_RAS_DEFAULT 0x00000090
3721 #define NV_PFB_CONFIG_1_RAS_RAS_9CYCLES 0x00000080
3722 #define NV_PFB_CONFIG_1_RAS_RAS_8CYCLES 0x00000070
3723 #define NV_PFB_CONFIG_1_RAS_RAS_7CYCLES 0x00000060
3724 #define NV_PFB_CONFIG_1_RAS_PCHG 0x00000700
3725 #define NV_PFB_CONFIG_1_RAS_PCHG_DEFAULT 0x00000200
3726 #define NV_PFB_CONFIG_1_RAS_PCHG_2CYCLES 0x00000100
3727 #define NV_PFB_CONFIG_1_RAS_LOW 0x00007000
3728 #define NV_PFB_CONFIG_1_RAS_LOW_DEFAULT 0x00006000
3729 #define NV_PFB_CONFIG_1_RAS_LOW_7CYCLES 0x00007000
3730 #define NV_PFB_CONFIG_1_RAS_LOW_5CYCLES 0x00005000
3731 #define NV_PFB_CONFIG_1_RAS_LOW_4CYCLES 0x00004000
3732 #define NV_PFB_CONFIG_1_MRS_TO_RAS 0x00070000
3733 #define NV_PFB_CONFIG_1_MRS_TO_RAS_DEFAULT 0x00010000
3734 #define NV_PFB_CONFIG_1_MRS_TO_RAS_2CYCLES 0x00020000
3735 #define NV_PFB_CONFIG_1_MRS_TO_RAS_0CYCLES 0x00000000
3736 #define NV_PFB_CONFIG_1_WRITE_TO_READ 0x00700000
3737 #define NV_PFB_CONFIG_1_WRITE_TO_READ_DEFAULT 0x00000000
3738 #define NV_PFB_CONFIG_1_RAS_TO_CAS_M1 0x07000000
3739 #define NV_PFB_CONFIG_1_RAS_TO_CAS_M1_DEFAULT 0x02000000
3740 #define NV_PFB_CONFIG_1_RAS_TO_CAS_M1_2CYCLES 0x02000000
3741 #define NV_PFB_CONFIG_1_RAS_TO_CAS_M1_0CYCLES 0x00000000
3742 #define NV_PFB_CONFIG_1_READ_TO_WRITE 0x70000000
3743 #define NV_PFB_CONFIG_1_READ_TO_WRITE_DEFAULT 0x40000000
3744 #define NV_PFB_CONFIG_1_READ_TO_WRITE_5CYCLES 0x50000000
3745 #define NV_PFB_CONFIG_1_READ_TO_WRITE_3CYCLES 0x30000000
3746 #define NV_PFB_CONFIG_1_READ_TO_WRITE_2CYCLES 0x20000000
3747 #define NV_PFB_CONFIG_1_READ_TO_PCHG 0x80000000
3748 #define NV_PFB_CONFIG_1_READ_TO_PCHG_ON 0x80000000
3749 #define NV_PFB_CONFIG_1_READ_TO_PCHG_OFF 0x7FFFFFFF
3750 
3751 /* NV-Register NV_PFB_RTL */
3752 #define NV_PFB_RTL 0x00100300
3753 #define NV_PFB_RTL_H 0x00000001
3754 #define NV_PFB_RTL_H_DEFAULT 0xFFFFFFFE
3755 #define NV_PFB_RTL_MC 0x00000002
3756 #define NV_PFB_RTL_MC_DEFAULT 0xFFFFFFFD
3757 #define NV_PFB_RTL_V 0x00000004
3758 #define NV_PFB_RTL_V_DEFAULT 0xFFFFFFFB
3759 #define NV_PFB_RTL_G 0x00000008
3760 #define NV_PFB_RTL_G_DEFAULT 0xFFFFFFF7
3761 #define NV_PFB_RTL_GB 0x00000010
3762 #define NV_PFB_RTL_GB_DEFAULT 0xFFFFFFEF
3763 #define NV_PFB_RTL_SCRAMBLE_MODE 0x00000700
3764 #define NV_PFB_RTL_SCRAMBLE_MODE_DEFAULT 0x00000000
3765 #define NV_PFB_RTL_SCRAMBLE_MODE_128K_RES 0x00000100
3766 #define NV_PFB_RTL_SCRAMBLE_MODE_256K_RES 0x00000200
3767 #define NV_PFB_RTL_SCRAMBLE_MODE_512K_RES 0x00000300
3768 #define NV_PFB_RTL_SCRAMBLE_MODE_1024K_RES 0x00000400
3769 #define NV_PFB_RTL_GB_ALOM_BURST 0x00001000
3770 #define NV_PFB_RTL_GB_ALOM_BURST_DEFAULT 0xFFFFEFFF
3771 #define NV_PFB_RTL_GB_ALOM_BURST_ENABLE 0x00001000
3772 
3773 /* NV-Array NV_PNVM_DATA032 (4 byte access) */
3774 #define NV_PNVM_DATA032 0x08000000
3775 /* NV-Array size NV_PNVM_DATA032__SIZE_1 [0..2097151] */
3776 #define NV_PNVM_DATA032__SIZE_1 0x00200000
3777 #define NV_PNVM_DATA032_VALUE 0xFFFFFFFF
3778 
3779 /* NV-Array NV_PNVM_DATA024 (4 byte access) */
3780 #define NV_PNVM_DATA024 0x08000000
3781 /* NV-Array size NV_PNVM_DATA024__SIZE_1 [0..4194303] */
3782 #define NV_PNVM_DATA024__SIZE_1 0x00400000
3783 #define NV_PNVM_DATA024_VALUE 0x00FFFFFF
3784 
3785 /* NV-Array NV_PNVM_DATA016 (4 byte access) */
3786 #define NV_PNVM_DATA016 0x08000000
3787 /* NV-Array size NV_PNVM_DATA016__SIZE_1 [0..6291455] */
3788 #define NV_PNVM_DATA016__SIZE_1 0x00600000
3789 #define NV_PNVM_DATA016_VALUE 0x0000FFFF
3790 
3791 /* NV-Array NV_PNVM_DATA008 (1 byte access) */
3792 #define NV_PNVM_DATA008 0x08000000
3793 /* NV-Array size NV_PNVM_DATA008__SIZE_1 [0..8388607] */
3794 #define NV_PNVM_DATA008__SIZE_1 0x00800000
3795 #define NV_PNVM_DATA008_VALUE 0x000000FF
3796 
3797 /* NV-Array NV_PRAMIN_DATA032 (4 byte access) */
3798 #define NV_PRAMIN_DATA032 0x00700000
3799 /* NV-Array size NV_PRAMIN_DATA032__SIZE_1 [0..524287] */
3800 #define NV_PRAMIN_DATA032__SIZE_1 0x00080000
3801 #define NV_PRAMIN_DATA032_VALUE 0xFFFFFFFF
3802 
3803 /* NV-Array NV_PRAMIN_DATA024 (4 byte access) */
3804 #define NV_PRAMIN_DATA024 0x00700000
3805 /* NV-Array size NV_PRAMIN_DATA024__SIZE_1 [0..1048575] */
3806 #define NV_PRAMIN_DATA024__SIZE_1 0x00100000
3807 #define NV_PRAMIN_DATA024_VALUE 0x00FFFFFF
3808 
3809 /* NV-Array NV_PRAMIN_DATA016 (4 byte access) */
3810 #define NV_PRAMIN_DATA016 0x00700000
3811 /* NV-Array size NV_PRAMIN_DATA016__SIZE_1 [0..1572863] */
3812 #define NV_PRAMIN_DATA016__SIZE_1 0x00180000
3813 #define NV_PRAMIN_DATA016_VALUE 0x0000FFFF
3814 
3815 /* NV-Array NV_PRAMIN_DATA008 (1 byte access) */
3816 #define NV_PRAMIN_DATA008 0x00700000
3817 /* NV-Array size NV_PRAMIN_DATA008__SIZE_1 [0..2097151] */
3818 #define NV_PRAMIN_DATA008__SIZE_1 0x00200000
3819 #define NV_PRAMIN_DATA008_VALUE 0x000000FF
3820 
3821 /* NV-Array NV_PDFB_DATA032 (4 byte access) */
3822 #define NV_PDFB_DATA032 0x08000000
3823 /* NV-Array size NV_PDFB_DATA032__SIZE_1 [0..2097151] */
3824 #define NV_PDFB_DATA032__SIZE_1 0x00200000
3825 #define NV_PDFB_DATA032_VALUE 0xFFFFFFFF
3826 
3827 /* NV-Array NV_PDFB_DATA024 (4 byte access) */
3828 #define NV_PDFB_DATA024 0x08000000
3829 /* NV-Array size NV_PDFB_DATA024__SIZE_1 [0..4194303] */
3830 #define NV_PDFB_DATA024__SIZE_1 0x00400000
3831 #define NV_PDFB_DATA024_VALUE 0x00FFFFFF
3832 
3833 /* NV-Array NV_PDFB_DATA016 (4 byte access) */
3834 #define NV_PDFB_DATA016 0x08000000
3835 /* NV-Array size NV_PDFB_DATA016__SIZE_1 [0..6291455] */
3836 #define NV_PDFB_DATA016__SIZE_1 0x00600000
3837 #define NV_PDFB_DATA016_VALUE 0x0000FFFF
3838 
3839 /* NV-Array NV_PDFB_DATA008 (1 byte access) */
3840 #define NV_PDFB_DATA008 0x08000000
3841 /* NV-Array size NV_PDFB_DATA008__SIZE_1 [0..8388607] */
3842 #define NV_PDFB_DATA008__SIZE_1 0x00800000
3843 #define NV_PDFB_DATA008_VALUE 0x000000FF
3844 
3845 /* NV-Array NV_PFB_SCRAMBLE (4 byte access) */
3846 #define NV_PFB_SCRAMBLE 0x00100400
3847 /* NV-Array size NV_PFB_SCRAMBLE__SIZE_1 [0..7] */
3848 #define NV_PFB_SCRAMBLE__SIZE_1 0x00000008
3849 #define NV_PFB_SCRAMBLE_w0 0x0000001F
3850 #define NV_PFB_SCRAMBLE_w1 0x00001F00
3851 #define NV_PFB_SCRAMBLE_w2 0x001F0000
3852 #define NV_PFB_SCRAMBLE_w3 0x1F000000
3853 #define NV_PFB_SCRAMBLE_VALUE_0 0x00000000
3854 #define NV_PFB_SCRAMBLE_VALUE_1 0x04000000
3855 #define NV_PFB_SCRAMBLE_VALUE_2 0x08000000
3856 #define NV_PFB_SCRAMBLE_VALUE_3 0x0C000000
3857 #define NV_PFB_SCRAMBLE_VALUE_4 0x10000000
3858 #define NV_PFB_SCRAMBLE_VALUE_5 0x14000000
3859 #define NV_PFB_SCRAMBLE_VALUE_6 0x18000000
3860 #define NV_PFB_SCRAMBLE_VALUE_7 0x1C000000
3861 
3862 /* NV-Register NV_PFB_FIFO_CTL */
3863 #define NV_PFB_FIFO_CTL 0x00100208
3864 #define NV_PFB_FIFO_CTL_TEST 0x00000001
3865 #define NV_PFB_FIFO_CTL_TEST_DISABLE 0xFFFFFFFE
3866 #define NV_PFB_FIFO_CTL_TEST_ENABLE 0x00000001
3867 #define NV_PFB_FIFO_CTL_MEM_SEL 0x000000F0
3868 #define NV_PFB_FIFO_CTL_MEM_SEL_RT0_REQ 0x00000000
3869 #define NV_PFB_FIFO_CTL_MEM_SEL_RT1_REQ 0x00000010
3870 #define NV_PFB_FIFO_CTL_MEM_SEL_RT2_REQ 0x00000020
3871 #define NV_PFB_FIFO_CTL_MEM_SEL_NRT_REQ 0x00000030
3872 #define NV_PFB_FIFO_CTL_MEM_SEL_RT_DATA 0x00000040
3873 #define NV_PFB_FIFO_CTL_MEM_SEL_NRT_DATA 0x00000050
3874 #define NV_PFB_FIFO_CTL_MEM_SEL_RD_DATA 0x00000060
3875 #define NV_PFB_FIFO_CTL_BIT_SEL 0x00000F00
3876 #define NV_PFB_FIFO_CTL_BIT_SEL_31_0 0x00000000
3877 #define NV_PFB_FIFO_CTL_BIT_SEL_63_32 0x00000100
3878 #define NV_PFB_FIFO_CTL_BIT_SEL_95_64 0x00000200
3879 #define NV_PFB_FIFO_CTL_BIT_SEL_127_96 0x00000300
3880 #define NV_PFB_FIFO_CTL_BIT_SEL_159_128 0x00000400
3881 #define NV_PFB_FIFO_CTL_ADDR_SEL 0x0000F000
3882 
3883 /* NV-Register NV_PFB_FIFO_DATA */
3884 #define NV_PFB_FIFO_DATA 0x0010020C
3885 #define NV_PFB_CONFIG_0_RESOLUTION 0x0000003F
3886 #define NV_PFB_CONFIG_0_RESOLUTION_320_PIXELS 0x0000000A
3887 #define NV_PFB_CONFIG_0_RESOLUTION_400_PIXELS 0x0000000D
3888 #define NV_PFB_CONFIG_0_RESOLUTION_480_PIXELS 0x0000000F
3889 #define NV_PFB_CONFIG_0_RESOLUTION_512_PIXELS 0x00000010
3890 #define NV_PFB_CONFIG_0_RESOLUTION_640_PIXELS 0x00000014
3891 #define NV_PFB_CONFIG_0_RESOLUTION_800_PIXELS 0x00000019
3892 #define NV_PFB_CONFIG_0_RESOLUTION_960_PIXELS 0x0000001E
3893 #define NV_PFB_CONFIG_0_RESOLUTION_1024_PIXELS 0x00000020
3894 #define NV_PFB_CONFIG_0_RESOLUTION_1152_PIXELS 0x00000024
3895 #define NV_PFB_CONFIG_0_RESOLUTION_1280_PIXELS 0x00000028
3896 #define NV_PFB_CONFIG_0_RESOLUTION_1600_PIXELS 0x00000032
3897 #define NV_PFB_CONFIG_0_RESOLUTION_DEFAULT 0x00000014
3898 #define NV_PFB_CONFIG_0_PIXEL_DEPTH 0x00000300
3899 #define NV_PFB_CONFIG_0_PIXEL_DEPTH_8_BITS 0x00000100
3900 #define NV_PFB_CONFIG_0_PIXEL_DEPTH_16_BITS 0x00000200
3901 #define NV_PFB_CONFIG_0_PIXEL_DEPTH_32_BITS 0x00000300
3902 #define NV_PFB_CONFIG_0_PIXEL_DEPTH_DEFAULT 0x00000100
3903 #define NV_PFB_CONFIG_0_TILING 0x00001000
3904 #define NV_PFB_CONFIG_0_TILING_ENABLED 0xFFFFEFFF
3905 #define NV_PFB_CONFIG_0_TILING_DISABLED 0x00001000
3906 #define NV_PFB_CONFIG_0_TILING_DEBUG 0x00FFE000
3907 #define NV_PFB_CONFIG_0_TILING_DEBUG_DISABLED 0x00000000
3908 #define NV_PFB_CONFIG_0_TILE 0x00007000
3909 #define NV_PFB_CONFIG_0_TILE_OLD1024_FIXED 0x00000000
3910 #define NV_PFB_CONFIG_0_TILE_OLD1024_VARIABLE 0x00004000
3911 #define NV_PFB_CONFIG_0_TILE_TETRIS_ALLOW 0x00001000
3912 #define NV_PFB_CONFIG_0_TILE_TETRIS_REDUNDANT 0x00002000
3913 #define NV_PFB_CONFIG_0_TILE_TETRIS_REDUNDANT2 0x00003000
3914 #define NV_PFB_CONFIG_0_TILING_DEBUG_ON 0x00002000
3915 #define NV_PFB_CONFIG_0_TILING_DEBUG_ON_ENABLED 0xFFFFDFFF
3916 #define NV_PFB_CONFIG_0_TILING_DEBUG_ON_DISABLED 0x00002000
3917 #define NV_PFB_CONFIG_0_TILING_DEBUG_TILESIZE 0x00004000
3918 #define NV_PFB_CONFIG_0_TILING_DEBUG_TILESIZE_FIXED 0xFFFFBFFF
3919 #define NV_PFB_CONFIG_0_TILING_DEBUG_TILESIZE_VARIABLE 0x00004000
3920 #define NV_PFB_CONFIG_0_TILING_DEBUG_TETRIS_MODE 0x00038000
3921 #define NV_PFB_CONFIG_0_TILING_DEBUG_TETRIS_MODE_PASS 0x00000000
3922 #define NV_PFB_CONFIG_0_TILING_DEBUG_TETRIS_MODE_1 0x00008000
3923 #define NV_PFB_CONFIG_0_TILING_DEBUG_TETRIS_MODE_2 0x00010000
3924 #define NV_PFB_CONFIG_0_TILING_DEBUG_TETRIS_MODE_3 0x00018000
3925 #define NV_PFB_CONFIG_0_TILING_DEBUG_TETRIS_MODE_4 0x00020000
3926 #define NV_PFB_CONFIG_0_TILING_DEBUG_TETRIS_MODE_5 0x00028000
3927 #define NV_PFB_CONFIG_0_TILING_DEBUG_TETRIS_MODE_6 0x00030000
3928 #define NV_PFB_CONFIG_0_TILING_DEBUG_TETRIS_MODE_7 0x00038000
3929 #define NV_PFB_CONFIG_0_TILING_DEBUG_TETRIS_SHIFT 0x000C0000
3930 #define NV_PFB_CONFIG_0_TILING_DEBUG_TETRIS_SHIFT_0 0x00000000
3931 #define NV_PFB_CONFIG_0_TILING_DEBUG_TETRIS_SHIFT_1 0x00040000
3932 #define NV_PFB_CONFIG_0_TILING_DEBUG_TETRIS_SHIFT_2 0x00080000
3933 #define NV_PFB_CONFIG_0_TILING_DEBUG_BANK_SWAP 0x00100000
3934 #define NV_PFB_CONFIG_0_TILING_DEBUG_BANK_SWAP_OFF 0xFFEFFFFF
3935 #define NV_PFB_CONFIG_0_TILING_DEBUG_BANK_SWAP_ON 0x00100000
3936 #define NV_PFB_CONFIG_0_TILING_DEBUG_BANK_SWAP_MSB 0x00600000
3937 #define NV_PFB_CONFIG_0_TILING_DEBUG_BANK_SWAP_MSB_1M 0x00000000
3938 #define NV_PFB_CONFIG_0_TILING_DEBUG_BANK_SWAP_MSB_2M 0x00400000
3939 #define NV_PFB_CONFIG_0_TILING_DEBUG_BANK_SWAP_MSB_4M 0x00600000
3940 #define NV_PFB_CONFIG_0_TILING_DEBUG_UNUSED 0x00800000
3941 #define NV_PFB_CONFIG_1_SGRAM100 0x00000008
3942 #define NV_PFB_CONFIG_1_SGRAM100_ENABLED 0xFFFFFFF7
3943 #define NV_PFB_CONFIG_1_SGRAM100_DISABLED 0x00000008
3944 #define NV_PFB_DEBUG_0_CKE_ALWAYSON 0x20000000
3945 #define NV_PFB_DEBUG_0_CKE_ALWAYSON_OFF 0xDFFFFFFF
3946 #define NV_PFB_DEBUG_0_CKE_ALWAYSON_ON 0x20000000
3947 #define RAM_CONFIG 0xFFFFFFFF
3948 #define SGRAM8MBIT_128_4MB 0x00000104
3949 #define SGRAM8MBIT_128_8MB 0x00000108
3950 #define SGRAM16MBIT_64_4MB 0x00001004
3951 #define SGRAM16MBIT_64_8MB 0x00001008
3952 #define SGRAM16MBIT_128_8MB 0x00001108
3953 #define SGRAM16MBIT_128_16MB 0x00001110
3954 #define SGRAM16MBIT4B_64_4MB 0x00002004
3955 #define SGRAM16MBIT4B_64_8MB 0x00002008
3956 #define SGRAM16MBIT4B_128_8MB 0x00002108
3957 #define SGRAM16MBIT4B_128_16MB 0x00002110
3958 #define SDRAM16MBIT_64_8MB 0x00003008
3959 #define SDRAM16MBIT_64_16MB 0x00003010
3960 #define SDRAM16MBIT_128_16MB 0x00003110
3961 #define SDRAM64MBIT_64_16MB 0x00004010
3962 #define SDRAM64MBIT_64_32MB 0x00004020
3963 #define SDRAM64MBIT_128_32MB 0x00004120
3964 #define SDRAM64MBITX16_64_32MB 0x00005020
3965 
3966 /* NV-Device NV_PGRAPH */
3967 #define NV_PGRAPH 0x00400000 /* size: 0x00001FFF */
3968 
3969 /* NV-Register NV_PGRAPH_DEBUG_0 */
3970 #define NV_PGRAPH_DEBUG_0 0x00400080
3971 #define NV_PGRAPH_DEBUG_0_STATE 0x00000001
3972 #define NV_PGRAPH_DEBUG_0_STATE_NORMAL 0xFFFFFFFE
3973 #define NV_PGRAPH_DEBUG_0_STATE_RESET 0x00000001
3974 #define NV_PGRAPH_DEBUG_0_FE_2D_STATE 0x00000002
3975 #define NV_PGRAPH_DEBUG_0_FE_2D_STATE_NORMAL 0xFFFFFFFD
3976 #define NV_PGRAPH_DEBUG_0_FE_2D_STATE_RESET 0x00000002
3977 #define NV_PGRAPH_DEBUG_0_FE_3D_STATE 0x00000004
3978 #define NV_PGRAPH_DEBUG_0_FE_3D_STATE_NORMAL 0xFFFFFFFB
3979 #define NV_PGRAPH_DEBUG_0_FE_3D_STATE_RESET 0x00000004
3980 #define NV_PGRAPH_DEBUG_0_CACHE_STATE 0x00000008
3981 #define NV_PGRAPH_DEBUG_0_CACHE_STATE_NORMAL 0xFFFFFFF7
3982 #define NV_PGRAPH_DEBUG_0_CACHE_STATE_RESET 0x00000008
3983 #define NV_PGRAPH_DEBUG_0_PREROP_STATE 0x00000010
3984 #define NV_PGRAPH_DEBUG_0_PREROP_STATE_NORMAL 0xFFFFFFEF
3985 #define NV_PGRAPH_DEBUG_0_PREROP_STATE_RESET 0x00000010
3986 #define NV_PGRAPH_DEBUG_0_ROP_STATE 0x00000020
3987 #define NV_PGRAPH_DEBUG_0_ROP_STATE_NORMAL 0xFFFFFFDF
3988 #define NV_PGRAPH_DEBUG_0_ROP_STATE_RESET 0x00000020
3989 #define NV_PGRAPH_DEBUG_0_FINE_RSTR_STATE 0x00000040
3990 #define NV_PGRAPH_DEBUG_0_FINE_RSTR_STATE_NORMAL 0xFFFFFFBF
3991 #define NV_PGRAPH_DEBUG_0_FINE_RSTR_STATE_RESET 0x00000040
3992 #define NV_PGRAPH_DEBUG_0_COARSE_RSTR_STATE 0x00000080
3993 #define NV_PGRAPH_DEBUG_0_COARSE_RSTR_STATE_NORMAL 0xFFFFFF7F
3994 #define NV_PGRAPH_DEBUG_0_COARSE_RSTR_STATE_RESET 0x00000080
3995 #define NV_PGRAPH_DEBUG_0_DMA_STATE 0x00000100
3996 #define NV_PGRAPH_DEBUG_0_DMA_STATE_NORMAL 0xFFFFFEFF
3997 #define NV_PGRAPH_DEBUG_0_DMA_STATE_RESET 0x00000100
3998 #define NV_PGRAPH_DEBUG_0_RSTR_2D_STATE 0x00000200
3999 #define NV_PGRAPH_DEBUG_0_RSTR_2D_STATE_NORMAL 0xFFFFFDFF
4000 #define NV_PGRAPH_DEBUG_0_RSTR_2D_STATE_RESET 0x00000200
4001 #define NV_PGRAPH_DEBUG_0_SETUP_STATE 0x00000400
4002 #define NV_PGRAPH_DEBUG_0_SETUP_STATE_NORMAL 0xFFFFFBFF
4003 #define NV_PGRAPH_DEBUG_0_SETUP_STATE_RESET 0x00000400
4004 #define NV_PGRAPH_DEBUG_0_ZCULL_STATE 0x00000800
4005 #define NV_PGRAPH_DEBUG_0_ZCULL_STATE_NORMAL 0xFFFFF7FF
4006 #define NV_PGRAPH_DEBUG_0_ZCULL_STATE_RESET 0x00000800
4007 #define NV_PGRAPH_DEBUG_0_SHD_STATE 0x00002000
4008 #define NV_PGRAPH_DEBUG_0_SHD_STATE_NORMAL 0xFFFFDFFF
4009 #define NV_PGRAPH_DEBUG_0_SHD_STATE_RESET 0x00002000
4010 #define NV_PGRAPH_DEBUG_0_SHDBE_STATE 0x00004000
4011 #define NV_PGRAPH_DEBUG_0_SHDBE_STATE_NORMAL 0xFFFFBFFF
4012 #define NV_PGRAPH_DEBUG_0_SHDBE_STATE_RESET 0x00004000
4013 #define NV_PGRAPH_DEBUG_0_XF_STATE 0x00008000
4014 #define NV_PGRAPH_DEBUG_0_XF_STATE_NORMAL 0xFFFF7FFF
4015 #define NV_PGRAPH_DEBUG_0_XF_STATE_RESET 0x00008000
4016 #define NV_PGRAPH_DEBUG_0_IDX_STATE 0x00010000
4017 #define NV_PGRAPH_DEBUG_0_IDX_STATE_NORMAL 0xFFFEFFFF
4018 #define NV_PGRAPH_DEBUG_0_IDX_STATE_RESET 0x00010000
4019 #define NV_PGRAPH_DEBUG_0_VTX_STATE 0x00020000
4020 #define NV_PGRAPH_DEBUG_0_VTX_STATE_NORMAL 0xFFFDFFFF
4021 #define NV_PGRAPH_DEBUG_0_VTX_STATE_RESET 0x00020000
4022 #define NV_PGRAPH_DEBUG_0_CAS_STATE 0x00040000
4023 #define NV_PGRAPH_DEBUG_0_CAS_STATE_NORMAL 0xFFFBFFFF
4024 #define NV_PGRAPH_DEBUG_0_CAS_STATE_RESET 0x00040000
4025 #define NV_PGRAPH_DEBUG_0_FD_STATE 0x00080000
4026 #define NV_PGRAPH_DEBUG_0_FD_STATE_NORMAL 0xFFF7FFFF
4027 #define NV_PGRAPH_DEBUG_0_FD_STATE_RESET 0x00080000
4028 #define NV_PGRAPH_DEBUG_0_CMB_STATE 0x00100000
4029 #define NV_PGRAPH_DEBUG_0_CMB_STATE_NORMAL 0xFFEFFFFF
4030 #define NV_PGRAPH_DEBUG_0_CMB_STATE_RESET 0x00100000
4031 
4032 /* NV-Register NV_PGRAPH_DEBUG_1 */
4033 #define NV_PGRAPH_DEBUG_1 0x00400084
4034 #define NV_PGRAPH_DEBUG_1_VOLATILE_RESET 0x00000001
4035 #define NV_PGRAPH_DEBUG_1_VOLATILE_RESET_NOT_LAST 0xFFFFFFFE
4036 #define NV_PGRAPH_DEBUG_1_VOLATILE_RESET_LAST 0x00000001
4037 #define NV_PGRAPH_DEBUG_1_VOLATILE_RESET_INIT 0xFFFFFFFE
4038 #define NV_PGRAPH_DEBUG_1_DMA_ACTIVITY 0x00000010
4039 #define NV_PGRAPH_DEBUG_1_DMA_ACTIVITY_IGNORE 0xFFFFFFEF
4040 #define NV_PGRAPH_DEBUG_1_DMA_ACTIVITY_CANCEL 0x00000010
4041 #define NV_PGRAPH_DEBUG_1_PM 0x00000020
4042 #define NV_PGRAPH_DEBUG_1_PM_IGNORE 0xFFFFFFDF
4043 #define NV_PGRAPH_DEBUG_1_PM_TRIGGER 0x00000020
4044 #define NV_PGRAPH_DEBUG_1_VTX_PTE 0x00000100
4045 #define NV_PGRAPH_DEBUG_1_VTX_PTE_DISABLED 0xFFFFFEFF
4046 #define NV_PGRAPH_DEBUG_1_VTX_PTE_ENABLED 0x00000100
4047 #define NV_PGRAPH_DEBUG_1_VTX_PTE_INIT 0x00000100
4048 #define NV_PGRAPH_DEBUG_1_VTX_CACHE 0x00000200
4049 #define NV_PGRAPH_DEBUG_1_VTX_CACHE_DISABLED 0xFFFFFDFF
4050 #define NV_PGRAPH_DEBUG_1_VTX_CACHE_ENABLED 0x00000200
4051 #define NV_PGRAPH_DEBUG_1_VTX_CACHE_INIT 0x00000200
4052 #define NV_PGRAPH_DEBUG_1_VTX_FILE 0x00000400
4053 #define NV_PGRAPH_DEBUG_1_VTX_FILE_DISABLED 0xFFFFFBFF
4054 #define NV_PGRAPH_DEBUG_1_VTX_FILE_ENABLED 0x00000400
4055 #define NV_PGRAPH_DEBUG_1_VTX_FILE_INIT 0x00000400
4056 #define NV_PGRAPH_DEBUG_1_XF_ASYNC 0x00001000
4057 #define NV_PGRAPH_DEBUG_1_XF_ASYNC_DISABLED 0xFFFFEFFF
4058 #define NV_PGRAPH_DEBUG_1_XF_ASYNC_ENABLED 0x00001000
4059 #define NV_PGRAPH_DEBUG_1_LT_ASYNC 0x00002000
4060 #define NV_PGRAPH_DEBUG_1_LT_ASYNC_DISABLED 0xFFFFDFFF
4061 #define NV_PGRAPH_DEBUG_1_LT_ASYNC_ENABLED 0x00002000
4062 #define NV_PGRAPH_DEBUG_1_DRAWDIR_AUTO 0x00004000
4063 #define NV_PGRAPH_DEBUG_1_DRAWDIR_AUTO_DISABLED 0xFFFFBFFF
4064 #define NV_PGRAPH_DEBUG_1_DRAWDIR_AUTO_ENABLED 0x00004000
4065 #define NV_PGRAPH_DEBUG_1_DRAWDIR_AUTO_INIT 0xFFFFBFFF
4066 #define NV_PGRAPH_DEBUG_1_DRAWDIR_Y 0x00008000
4067 #define NV_PGRAPH_DEBUG_1_DRAWDIR_Y_DECR 0xFFFF7FFF
4068 #define NV_PGRAPH_DEBUG_1_DRAWDIR_Y_INCR 0x00008000
4069 #define NV_PGRAPH_DEBUG_1_DRAWDIR_Y_INIT 0x00008000
4070 #define NV_PGRAPH_DEBUG_1_INSTANCE 0x00010000
4071 #define NV_PGRAPH_DEBUG_1_INSTANCE_DISABLED 0xFFFEFFFF
4072 #define NV_PGRAPH_DEBUG_1_INSTANCE_ENABLED 0x00010000
4073 #define NV_PGRAPH_DEBUG_1_INSTANCE_INIT 0x00010000
4074 #define NV_PGRAPH_DEBUG_1_CTX 0x00100000
4075 #define NV_PGRAPH_DEBUG_1_CTX_DISABLED 0xFFEFFFFF
4076 #define NV_PGRAPH_DEBUG_1_CTX_ENABLED 0x00100000
4077 #define NV_PGRAPH_DEBUG_1_CTX_INIT 0x00100000
4078 #define NV_PGRAPH_DEBUG_1_CACHE 0x01000000
4079 #define NV_PGRAPH_DEBUG_1_CACHE_IGNORE 0xFEFFFFFF
4080 #define NV_PGRAPH_DEBUG_1_CACHE_INVALIDATE 0x01000000
4081 #define NV_PGRAPH_DEBUG_1_CACHE_COUNTERS 0x02000000
4082 #define NV_PGRAPH_DEBUG_1_CACHE_COUNTERS_DISABLED 0xFDFFFFFF
4083 #define NV_PGRAPH_DEBUG_1_CACHE_COUNTERS_ENABLED 0x02000000
4084 #define NV_PGRAPH_DEBUG_1_CACHE_NO_COALESCE 0x04000000
4085 #define NV_PGRAPH_DEBUG_1_CACHE_NO_COALESC_DISABLED 0xFBFFFFFF
4086 #define NV_PGRAPH_DEBUG_1_CACHE_NO_COALESC_ENABLED 0x04000000
4087 #define NV_PGRAPH_DEBUG_1_CACHE_FORCE_MISS 0x08000000
4088 #define NV_PGRAPH_DEBUG_1_CACHE_FORCE_MISS_DISABLED 0xF7FFFFFF
4089 #define NV_PGRAPH_DEBUG_1_CACHE_FORCE_MISS_ENABLED 0x08000000
4090 #define NV_PGRAPH_DEBUG_1_CACHE_FORCE_HIT 0x10000000
4091 #define NV_PGRAPH_DEBUG_1_CACHE_FORCE_HIT_DISABLED 0xEFFFFFFF
4092 #define NV_PGRAPH_DEBUG_1_CACHE_FORCE_HIT_ENABLED 0x10000000
4093 #define NV_PGRAPH_DEBUG_1_TEXTURE_BYPASS 0x20000000
4094 #define NV_PGRAPH_DEBUG_1_TEXTURE_BYPASS_DISABLED 0xDFFFFFFF
4095 #define NV_PGRAPH_DEBUG_1_TEXTURE_BYPASS_ENABLED 0x20000000
4096 #define NV_PGRAPH_DEBUG_1_TEXTURE_CHECKERBOARD 0x40000000
4097 #define NV_PGRAPH_DEBUG_1_TEXTURE_CHECKERBOARD_DISABLED 0xBFFFFFFF
4098 #define NV_PGRAPH_DEBUG_1_TEXTURE_CHECKERBOARD_ENABLED 0x40000000
4099 #define NV_PGRAPH_DEBUG_1_SMART_PALETTE_LOAD 0x80000000
4100 #define NV_PGRAPH_DEBUG_1_SMART_PALETTE_LOAD_DISABLED 0x7FFFFFFF
4101 #define NV_PGRAPH_DEBUG_1_SMART_PALETTE_LOAD_ENABLED 0x80000000
4102 
4103 /* NV-Register NV_PGRAPH_DEBUG_2 */
4104 #define NV_PGRAPH_DEBUG_2 0x00400620
4105 #define NV_PGRAPH_DEBUG_2_PREROP_LIMIT_CHECK 0x00000001
4106 #define NV_PGRAPH_DEBUG_2_PREROP_LIMIT_CHECK_DISABLED 0xFFFFFFFE
4107 #define NV_PGRAPH_DEBUG_2_PREROP_LIMIT_CHECK_ENABLED 0x00000001
4108 #define NV_PGRAPH_DEBUG_2_PREROP_LIMIT_CHECK_INIT 0x00000001
4109 #define NV_PGRAPH_DEBUG_2_PREROP_LIMIT_INT 0x00000002
4110 #define NV_PGRAPH_DEBUG_2_PREROP_LIMIT_INT_DISABLED 0xFFFFFFFD
4111 #define NV_PGRAPH_DEBUG_2_PREROP_LIMIT_INT_ENABLED 0x00000002
4112 #define NV_PGRAPH_DEBUG_2_PREROP_LIMIT_INT_INIT 0xFFFFFFFD
4113 #define NV_PGRAPH_DEBUG_2_PREROP_OVRFLW_INT 0x00000004
4114 #define NV_PGRAPH_DEBUG_2_PREROP_OVRFLW_INT_DISABLED 0xFFFFFFFB
4115 #define NV_PGRAPH_DEBUG_2_PREROP_OVRFLW_INT_ENABLED 0x00000004
4116 #define NV_PGRAPH_DEBUG_2_PREROP_OVRFLW_INT_INIT 0xFFFFFFFB
4117 #define NV_PGRAPH_DEBUG_2_PREROP_TRIEND_FLUSH 0x00000020
4118 #define NV_PGRAPH_DEBUG_2_PREROP_TRIEND_FLUSH_DISABLED 0xFFFFFFDF
4119 #define NV_PGRAPH_DEBUG_2_PREROP_TRIEND_FLUSH_ENABLED 0x00000020
4120 #define NV_PGRAPH_DEBUG_2_PREROP_TRIEND_FLUSH_INIT 0xFFFFFFDF
4121 #define NV_PGRAPH_DEBUG_2_PREROP_DITHER_3D 0x00000040
4122 #define NV_PGRAPH_DEBUG_2_PREROP_DITHER_3D_DISABLED 0xFFFFFFBF
4123 #define NV_PGRAPH_DEBUG_2_PREROP_DITHER_3D_ENABLED 0x00000040
4124 #define NV_PGRAPH_DEBUG_2_PREROP_DITHER_3D_INIT 0x00000040
4125 #define NV_PGRAPH_DEBUG_2_PREROP_DITHER_2D 0x00000080
4126 #define NV_PGRAPH_DEBUG_2_PREROP_DITHER_2D_DISABLED 0xFFFFFF7F
4127 #define NV_PGRAPH_DEBUG_2_PREROP_DITHER_2D_ENABLED 0x00000080
4128 #define NV_PGRAPH_DEBUG_2_PREROP_DITHER_2D_INIT 0x00000080
4129 #define NV_PGRAPH_DEBUG_2_PREROP_TILE3D2HIGH 0x00000300
4130 #define NV_PGRAPH_DEBUG_2_PREROP_TILE3D2HIGH_DISABLED 0x00000000
4131 #define NV_PGRAPH_DEBUG_2_PREROP_TILE3D2HIGH_AUTO1 0x00000100
4132 #define NV_PGRAPH_DEBUG_2_PREROP_TILE3D2HIGH_AUTO2 0x00000200
4133 #define NV_PGRAPH_DEBUG_2_PREROP_TILE3D2HIGH_ENABLED 0x00000300
4134 #define NV_PGRAPH_DEBUG_2_PREROP_TILE3D2HIGH_INIT 0x00000200
4135 #define NV_PGRAPH_DEBUG_2_PREROP_SWALLOW_REQS 0x00000400
4136 #define NV_PGRAPH_DEBUG_2_PREROP_SWALLOW_REQS_DISABLED 0xFFFFFBFF
4137 #define NV_PGRAPH_DEBUG_2_PREROP_SWALLOW_REQS_ENABLED 0x00000400
4138 #define NV_PGRAPH_DEBUG_2_PREROP_SWALLOW_REQS_INIT 0xFFFFFBFF
4139 #define NV_PGRAPH_DEBUG_2_PREROP_ALPHA_ABORT 0x00000800
4140 #define NV_PGRAPH_DEBUG_2_PREROP_ALPHA_ABORT_DISABLED 0xFFFFF7FF
4141 #define NV_PGRAPH_DEBUG_2_PREROP_ALPHA_ABORT_ENABLED 0x00000800
4142 #define NV_PGRAPH_DEBUG_2_PREROP_ALPHA_ABORT_INIT 0x00000800
4143 #define NV_PGRAPH_DEBUG_2_PREROP_FIXED_ADRS 0x00001000
4144 #define NV_PGRAPH_DEBUG_2_PREROP_FIXED_ADRS_DISABLED 0xFFFFEFFF
4145 #define NV_PGRAPH_DEBUG_2_PREROP_FIXED_ADRS_ENABLED 0x00001000
4146 #define NV_PGRAPH_DEBUG_2_PREROP_FIXED_ADRS_INIT 0xFFFFEFFF
4147 #define NV_PGRAPH_DEBUG_2_PREROP_DITHER_RANGE 0x00002000
4148 #define NV_PGRAPH_DEBUG_2_PREROP_DITHER_RANGE_DISABLED 0xFFFFDFFF
4149 #define NV_PGRAPH_DEBUG_2_PREROP_DITHER_RANGE_ENABLED 0x00002000
4150 #define NV_PGRAPH_DEBUG_2_PREROP_DITHER_RANGE_INIT 0x00002000
4151 #define NV_PGRAPH_DEBUG_2_PREROP_PITCH_CHECK_2D 0x00004000
4152 #define NV_PGRAPH_DEBUG_2_PREROP_PITCH_CHECK_2D_DISABLED 0xFFFFBFFF
4153 #define NV_PGRAPH_DEBUG_2_PREROP_PITCH_CHECK_2D_ENABLED 0x00004000
4154 #define NV_PGRAPH_DEBUG_2_PREROP_PITCH_CHECK_2D_INIT 0xFFFFBFFF
4155 #define NV_PGRAPH_DEBUG_2_PREROP_PITCH_CHECK_3D 0x00008000
4156 #define NV_PGRAPH_DEBUG_2_PREROP_PITCH_CHECK_3D_DISABLED 0xFFFF7FFF
4157 #define NV_PGRAPH_DEBUG_2_PREROP_PITCH_CHECK_3D_ENABLED 0x00008000
4158 #define NV_PGRAPH_DEBUG_2_PREROP_PITCH_CHECK_3D_INIT 0xFFFF7FFF
4159 #define NV_PGRAPH_DEBUG_2_PREROP_SPARE 0xFFFF0000
4160 #define NV_PGRAPH_DEBUG_2_PREROP_SPARE_DISABLED 0x00000000
4161 
4162 /* NV-Register NV_PGRAPH_DEBUG_3 */
4163 #define NV_PGRAPH_DEBUG_3 0x0040008C
4164 #define NV_PGRAPH_DEBUG_3_FLUSHING 0x00000001
4165 #define NV_PGRAPH_DEBUG_3_FLUSHING_DISABLED 0xFFFFFFFE
4166 #define NV_PGRAPH_DEBUG_3_FLUSHING_ENABLED 0x00000001
4167 #define NV_PGRAPH_DEBUG_3_FLUSHING_INIT 0x00000001
4168 #define NV_PGRAPH_DEBUG_3_ZCULLFLUSH 0x00000002
4169 #define NV_PGRAPH_DEBUG_3_ZCULLFLUSH_IGNORE 0xFFFFFFFD
4170 #define NV_PGRAPH_DEBUG_3_ZCULLFLUSH_ACTIVATE 0x00000002
4171 #define NV_PGRAPH_DEBUG_3_HW_CONTEXT_SWITCH 0x00000004
4172 #define NV_PGRAPH_DEBUG_3_HW_CONTEXT_SWITCH_DISABLED 0xFFFFFFFB
4173 #define NV_PGRAPH_DEBUG_3_HW_CONTEXT_SWITCH_ENABLED 0x00000004
4174 #define NV_PGRAPH_DEBUG_3_HW_CONTEXT_SWITCH_INIT 0x00000004
4175 #define NV_PGRAPH_DEBUG_3_SYNC_TO_CRTC 0x00000008
4176 #define NV_PGRAPH_DEBUG_3_SYNC_TO_CRTC_DISABLED 0xFFFFFFF7
4177 #define NV_PGRAPH_DEBUG_3_SYNC_TO_CRTC_ENABLED 0x00000008
4178 #define NV_PGRAPH_DEBUG_3_SYNC_TO_CRTC_INIT 0x00000008
4179 #define NV_PGRAPH_DEBUG_3_FAST_DATA_STRTCH 0x00000010
4180 #define NV_PGRAPH_DEBUG_3_FAST_DATA_STRTCH_DISABLED 0xFFFFFFEF
4181 #define NV_PGRAPH_DEBUG_3_FAST_DATA_STRTCH_ENABLED 0x00000010
4182 #define NV_PGRAPH_DEBUG_3_FAST_DATA_STRTCH_INIT 0x00000010
4183 #define NV_PGRAPH_DEBUG_3_FAST_3D_SHADOW_DATA 0x00000020
4184 #define NV_PGRAPH_DEBUG_3_FAST_3D_SHADOW_DATA_DISABLED 0xFFFFFFDF
4185 #define NV_PGRAPH_DEBUG_3_FAST_3D_SHADOW_DATA_ENABLED 0x00000020
4186 #define NV_PGRAPH_DEBUG_3_FAST_3D_SHADOW_DATA_INIT 0x00000020
4187 #define NV_PGRAPH_DEBUG_3_FAST_DMA_READ 0x00000040
4188 #define NV_PGRAPH_DEBUG_3_FAST_DMA_READ_DISABLED 0xFFFFFFBF
4189 #define NV_PGRAPH_DEBUG_3_FAST_DMA_READ_ENABLED 0x00000040
4190 #define NV_PGRAPH_DEBUG_3_FAST_DMA_READ_INIT 0xFFFFFFBF
4191 #define NV_PGRAPH_DEBUG_3_ZFLUSH 0x00000080
4192 #define NV_PGRAPH_DEBUG_3_ZFLUSH_IGNORE 0xFFFFFF7F
4193 #define NV_PGRAPH_DEBUG_3_ZFLUSH_ACTIVATE 0x00000080
4194 #define NV_PGRAPH_DEBUG_3_SINGLE_STEP 0x00000100
4195 #define NV_PGRAPH_DEBUG_3_SINGLE_STEP_DISABLED 0xFFFFFEFF
4196 #define NV_PGRAPH_DEBUG_3_SINGLE_STEP_ENABLED 0x00000100
4197 #define NV_PGRAPH_DEBUG_3_SINGLE_STEP_INIT 0xFFFFFEFF
4198 #define NV_PGRAPH_DEBUG_3_CH_STATE3D 0x00000200
4199 #define NV_PGRAPH_DEBUG_3_CH_STATE3D_DISABLED 0xFFFFFDFF
4200 #define NV_PGRAPH_DEBUG_3_CH_STATE3D_ENABLED 0x00000200
4201 #define NV_PGRAPH_DEBUG_3_CH_STATE3D_INIT 0xFFFFFDFF
4202 #define NV_PGRAPH_DEBUG_3_IDLE_FILTER 0x00000400
4203 #define NV_PGRAPH_DEBUG_3_IDLE_FILTER_DISABLED 0xFFFFFBFF
4204 #define NV_PGRAPH_DEBUG_3_IDLE_FILTER_ENABLED 0x00000400
4205 #define NV_PGRAPH_DEBUG_3_IDLE_FILTER_INIT 0xFFFFFBFF
4206 #define NV_PGRAPH_DEBUG_3_INHIBIT_IMCLASS_BLOCK 0x00000800
4207 #define NV_PGRAPH_DEBUG_3_INHIBIT_IMCLASS_BLOCK_DISABLED 0xFFFFF7FF
4208 #define NV_PGRAPH_DEBUG_3_INHIBIT_IMCLASS_BLOCK_ENABLED 0x00000800
4209 #define NV_PGRAPH_DEBUG_3_INHIBIT_IMCLASS_BLOCK_INIT 0xFFFFF7FF
4210 #define NV_PGRAPH_DEBUG_3_SYNCHRONIZE 0x00001000
4211 #define NV_PGRAPH_DEBUG_3_SYNCHRONIZE_DISABLED 0xFFFFEFFF
4212 #define NV_PGRAPH_DEBUG_3_SYNCHRONIZE_ENABLED 0x00001000
4213 #define NV_PGRAPH_DEBUG_3_SYNCHRONIZE_INIT 0xFFFFEFFF
4214 #define NV_PGRAPH_DEBUG_3_D3D_STATE3D 0x00002000
4215 #define NV_PGRAPH_DEBUG_3_D3D_STATE3D_DISABLED 0xFFFFDFFF
4216 #define NV_PGRAPH_DEBUG_3_D3D_STATE3D_ENABLED 0x00002000
4217 #define NV_PGRAPH_DEBUG_3_D3D_STATE3D_INIT 0xFFFFDFFF
4218 #define NV_PGRAPH_DEBUG_3_OBJECT_RELOAD 0x00004000
4219 #define NV_PGRAPH_DEBUG_3_OBJECT_RELOAD_DISABLED 0xFFFFBFFF
4220 #define NV_PGRAPH_DEBUG_3_OBJECT_RELOAD_ENABLED 0x00004000
4221 #define NV_PGRAPH_DEBUG_3_OBJECT_RELOAD_INIT 0xFFFFBFFF
4222 #define NV_PGRAPH_DEBUG_3_PM_TRIGGER 0x00008000
4223 #define NV_PGRAPH_DEBUG_3_PM_TRIGGER_DISABLED 0xFFFF7FFF
4224 #define NV_PGRAPH_DEBUG_3_PM_TRIGGER_ENABLED 0x00008000
4225 #define NV_PGRAPH_DEBUG_3_PM_TRIGGER_INIT 0xFFFF7FFF
4226 #define NV_PGRAPH_DEBUG_3_ALTARCH 0x00010000
4227 #define NV_PGRAPH_DEBUG_3_ALTARCH_DISABLED 0xFFFEFFFF
4228 #define NV_PGRAPH_DEBUG_3_ALTARCH_ENABLED 0x00010000
4229 #define NV_PGRAPH_DEBUG_3_ALTARCH_INIT 0xFFFEFFFF
4230 #define NV_PGRAPH_DEBUG_3_SINGLE_CYCLE_LOAD 0x00020000
4231 #define NV_PGRAPH_DEBUG_3_SINGLE_CYCLE_LOAD_DISABLED 0xFFFDFFFF
4232 #define NV_PGRAPH_DEBUG_3_SINGLE_CYCLE_LOAD_ENABLED 0x00020000
4233 #define NV_PGRAPH_DEBUG_3_SINGLE_CYCLE_LOAD_INIT 0x00020000
4234 #define NV_PGRAPH_DEBUG_3_BILINEAR_3D 0x00040000
4235 #define NV_PGRAPH_DEBUG_3_BILINEAR_3D_DISABLED 0xFFFBFFFF
4236 #define NV_PGRAPH_DEBUG_3_BILINEAR_3D_ENABLED 0x00040000
4237 #define NV_PGRAPH_DEBUG_3_BILINEAR_3D_INIT 0x00040000
4238 #define NV_PGRAPH_DEBUG_3_VOLATILE_RESET 0x00080000
4239 #define NV_PGRAPH_DEBUG_3_VOLATILE_RESET_DISABLED 0xFFF7FFFF
4240 #define NV_PGRAPH_DEBUG_3_VOLATILE_RESET_ENABLED 0x00080000
4241 #define NV_PGRAPH_DEBUG_3_VOLATILE_RESET_INIT 0x00080000
4242 #define NV_PGRAPH_DEBUG_3_DATA_CHECK 0x00100000
4243 #define NV_PGRAPH_DEBUG_3_DATA_CHECK_DISABLED 0xFFEFFFFF
4244 #define NV_PGRAPH_DEBUG_3_DATA_CHECK_ENABLED 0x00100000
4245 #define NV_PGRAPH_DEBUG_3_DATA_CHECK_INIT 0x00100000
4246 #define NV_PGRAPH_DEBUG_3_DATA_CHECK_FAIL 0x00200000
4247 #define NV_PGRAPH_DEBUG_3_DATA_CHECK_FAIL_DISABLED 0xFFDFFFFF
4248 #define NV_PGRAPH_DEBUG_3_DATA_CHECK_FAIL_ENABLED 0x00200000
4249 #define NV_PGRAPH_DEBUG_3_DATA_CHECK_FAIL_INIT 0xFFDFFFFF
4250 #define NV_PGRAPH_DEBUG_3_FORMAT_CHECK 0x00400000
4251 #define NV_PGRAPH_DEBUG_3_FORMAT_CHECK_DISABLED 0xFFBFFFFF
4252 #define NV_PGRAPH_DEBUG_3_FORMAT_CHECK_ENABLED 0x00400000
4253 #define NV_PGRAPH_DEBUG_3_FORMAT_CHECK_INIT 0x00400000
4254 #define NV_PGRAPH_DEBUG_3_DMA_CHECK 0x00800000
4255 #define NV_PGRAPH_DEBUG_3_DMA_CHECK_DISABLED 0xFF7FFFFF
4256 #define NV_PGRAPH_DEBUG_3_DMA_CHECK_ENABLED 0x00800000
4257 #define NV_PGRAPH_DEBUG_3_DMA_CHECK_INIT 0x00800000
4258 #define NV_PGRAPH_DEBUG_3_STATE_CHECK 0x01000000
4259 #define NV_PGRAPH_DEBUG_3_STATE_CHECK_DISABLED 0xFEFFFFFF
4260 #define NV_PGRAPH_DEBUG_3_STATE_CHECK_ENABLED 0x01000000
4261 #define NV_PGRAPH_DEBUG_3_STATE_CHECK_INIT 0x01000000
4262 #define NV_PGRAPH_DEBUG_3_IMAGE_64BIT 0x02000000
4263 #define NV_PGRAPH_DEBUG_3_IMAGE_64BIT_DISABLED 0xFDFFFFFF
4264 #define NV_PGRAPH_DEBUG_3_IMAGE_64BIT_ENABLED 0x02000000
4265 #define NV_PGRAPH_DEBUG_3_IMAGE_64BIT_INIT 0xFDFFFFFF
4266 #define NV_PGRAPH_DEBUG_3_CELSIUS_64BIT 0x04000000
4267 #define NV_PGRAPH_DEBUG_3_CELSIUS_64BIT_DISABLED 0xFBFFFFFF
4268 #define NV_PGRAPH_DEBUG_3_CELSIUS_64BIT_ENABLED 0x04000000
4269 #define NV_PGRAPH_DEBUG_3_CELSIUS_64BIT_INIT 0x04000000
4270 #define NV_PGRAPH_DEBUG_3_STATE3D_CHECK 0x08000000
4271 #define NV_PGRAPH_DEBUG_3_STATE3D_CHECK_DISABLED 0xF7FFFFFF
4272 #define NV_PGRAPH_DEBUG_3_STATE3D_CHECK_ENABLED 0x08000000
4273 #define NV_PGRAPH_DEBUG_3_STATE3D_CHECK_INIT 0xF7FFFFFF
4274 #define NV_PGRAPH_DEBUG_3_XFMODE_COALESCE 0x10000000
4275 #define NV_PGRAPH_DEBUG_3_XFMODE_COALESCE_DISABLED 0xEFFFFFFF
4276 #define NV_PGRAPH_DEBUG_3_XFMODE_COALESCE_ENABLED 0x10000000
4277 #define NV_PGRAPH_DEBUG_3_XFMODE_COALESCE_INIT 0x10000000
4278 #define NV_PGRAPH_DEBUG_3_CTX_METHODS 0x20000000
4279 #define NV_PGRAPH_DEBUG_3_CTX_METHODS_DISABLED 0xDFFFFFFF
4280 #define NV_PGRAPH_DEBUG_3_CTX_METHODS_ENABLED 0x20000000
4281 #define NV_PGRAPH_DEBUG_3_CTX_METHODS_INIT 0x20000000
4282 #define NV_PGRAPH_DEBUG_3_OP_METHODS 0x40000000
4283 #define NV_PGRAPH_DEBUG_3_OP_METHODS_DISABLED 0xBFFFFFFF
4284 #define NV_PGRAPH_DEBUG_3_OP_METHODS_ENABLED 0x40000000
4285 #define NV_PGRAPH_DEBUG_3_OP_METHODS_INIT 0x40000000
4286 #define NV_PGRAPH_DEBUG_3_IGNORE_PATCHVALID 0x80000000
4287 #define NV_PGRAPH_DEBUG_3_IGNORE_PATCHVALID_DISABLED 0x7FFFFFFF
4288 #define NV_PGRAPH_DEBUG_3_IGNORE_PATCHVALID_ENABLED 0x80000000
4289 #define NV_PGRAPH_DEBUG_3_IGNORE_PATCHVALID_INIT 0x80000000
4290 
4291 /* NV-Register NV_PGRAPH_DEBUG_4 */
4292 #define NV_PGRAPH_DEBUG_4 0x00400090
4293 #define NV_PGRAPH_DEBUG_4_FD_SPARE1 0x00000001
4294 #define NV_PGRAPH_DEBUG_4_FD_SPARE1_DISABLED 0xFFFFFFFE
4295 #define NV_PGRAPH_DEBUG_4_FD_SPARE1_ENABLED 0x00000001
4296 #define NV_PGRAPH_DEBUG_4_FD_SPARE2 0x00000002
4297 #define NV_PGRAPH_DEBUG_4_FD_SPARE2_DISABLE 0xFFFFFFFD
4298 #define NV_PGRAPH_DEBUG_4_FD_SPARE2_ENABLED 0x00000002
4299 #define NV_PGRAPH_DEBUG_4_COARSE_RSTR_SPARE1 0x00000004
4300 #define NV_PGRAPH_DEBUG_4_COARSE_RSTR_SPARE1_DISABLED 0xFFFFFFFB
4301 #define NV_PGRAPH_DEBUG_4_COARSE_RSTR_SPARE1_ENABLED 0x00000004
4302 #define NV_PGRAPH_DEBUG_4_COARSE_RSTR_SPARE2 0x00000008
4303 #define NV_PGRAPH_DEBUG_4_COARSE_RSTR_SPARE2_DISABLE 0xFFFFFFF7
4304 #define NV_PGRAPH_DEBUG_4_COARSE_RSTR_SPARE2_ENABLED 0x00000008
4305 #define NV_PGRAPH_DEBUG_4_RSTR2D_SPARE1 0x00000010
4306 #define NV_PGRAPH_DEBUG_4_RSTR2D_SPARE1_DISABLED 0xFFFFFFEF
4307 #define NV_PGRAPH_DEBUG_4_RSTR2D_SPARE1_ENABLED 0x00000010
4308 #define NV_PGRAPH_DEBUG_4_RSTR2D_SPARE2 0x00000020
4309 #define NV_PGRAPH_DEBUG_4_RSTR2D_SPARE2_DISABLE 0xFFFFFFDF
4310 #define NV_PGRAPH_DEBUG_4_RSTR2D_SPARE2_ENABLED 0x00000020
4311 #define NV_PGRAPH_DEBUG_4_FINE_RSTR_SPARE1 0x00000040
4312 #define NV_PGRAPH_DEBUG_4_FINE_RSTR_SPARE1_DISABLED 0xFFFFFFBF
4313 #define NV_PGRAPH_DEBUG_4_FINE_RSTR_SPARE1_ENABLED 0x00000040
4314 #define NV_PGRAPH_DEBUG_4_FINE_RSTR_SPARE2 0x00000080
4315 #define NV_PGRAPH_DEBUG_4_FINE_RSTR_SPARE2_DISABLE 0xFFFFFF7F
4316 #define NV_PGRAPH_DEBUG_4_FINE_RSTR_SPARE2_ENABLED 0x00000080
4317 #define NV_PGRAPH_DEBUG_4_TEX_SPARE1 0x00000100
4318 #define NV_PGRAPH_DEBUG_4_TEX_SPARE1_DISABLED 0xFFFFFEFF
4319 #define NV_PGRAPH_DEBUG_4_TEX_SPARE1_ENABLED 0x00000100
4320 #define NV_PGRAPH_DEBUG_4_TEX_SPARE2 0x00000200
4321 #define NV_PGRAPH_DEBUG_4_TEX_SPARE2_DISABLE 0xFFFFFDFF
4322 #define NV_PGRAPH_DEBUG_4_TEX_SPARE2_ENABLED 0x00000200
4323 #define NV_PGRAPH_DEBUG_4_COMB_SPARE1 0x00001000
4324 #define NV_PGRAPH_DEBUG_4_COMB_SPARE1_DISABLED 0xFFFFEFFF
4325 #define NV_PGRAPH_DEBUG_4_COMB_SPARE1_ENABLED 0x00001000
4326 #define NV_PGRAPH_DEBUG_4_COMB_SPARE2 0x00002000
4327 #define NV_PGRAPH_DEBUG_4_COMB_SPARE2_DISABLE 0xFFFFDFFF
4328 #define NV_PGRAPH_DEBUG_4_COMB_SPARE2_ENABLED 0x00002000
4329 #define NV_PGRAPH_DEBUG_4_SETUP_SPARE1 0x00004000
4330 #define NV_PGRAPH_DEBUG_4_SETUP_SPARE1_DISABLED 0xFFFFBFFF
4331 #define NV_PGRAPH_DEBUG_4_SETUP_SPARE1_ENABLED 0x00004000
4332 #define NV_PGRAPH_DEBUG_4_SETUP_SPARE2 0x00008000
4333 #define NV_PGRAPH_DEBUG_4_SETUP_SPARE2_DISABLE 0xFFFF7FFF
4334 #define NV_PGRAPH_DEBUG_4_SETUP_SPARE2_ENABLED 0x00008000
4335 #define NV_PGRAPH_DEBUG_4_XF_SPARE1 0x00010000
4336 #define NV_PGRAPH_DEBUG_4_XF_SPARE1_DISABLED 0xFFFEFFFF
4337 #define NV_PGRAPH_DEBUG_4_XF_SPARE1_ENABLED 0x00010000
4338 #define NV_PGRAPH_DEBUG_4_XF_SPARE2 0x00020000
4339 #define NV_PGRAPH_DEBUG_4_XF_SPARE2_DISABLE 0xFFFDFFFF
4340 #define NV_PGRAPH_DEBUG_4_XF_SPARE2_ENABLED 0x00020000
4341 #define NV_PGRAPH_DEBUG_4_IDX_SPARE1 0x00100000
4342 #define NV_PGRAPH_DEBUG_4_IDX_SPARE1_DISABLED 0xFFEFFFFF
4343 #define NV_PGRAPH_DEBUG_4_IDX_SPARE1_ENABLED 0x00100000
4344 #define NV_PGRAPH_DEBUG_4_IDX_SPARE2 0x00200000
4345 #define NV_PGRAPH_DEBUG_4_IDX_SPARE2_DISABLE 0xFFDFFFFF
4346 #define NV_PGRAPH_DEBUG_4_IDX_SPARE2_ENABLED 0x00200000
4347 #define NV_PGRAPH_DEBUG_4_VTX_SPARE1 0x00400000
4348 #define NV_PGRAPH_DEBUG_4_VTX_SPARE1_DISABLED 0xFFBFFFFF
4349 #define NV_PGRAPH_DEBUG_4_VTX_SPARE1_ENABLED 0x00400000
4350 #define NV_PGRAPH_DEBUG_4_VTX_SPARE2 0x00800000
4351 #define NV_PGRAPH_DEBUG_4_VTX_SPARE2_DISABLE 0xFF7FFFFF
4352 #define NV_PGRAPH_DEBUG_4_VTX_SPARE2_ENABLED 0x00800000
4353 #define NV_PGRAPH_DEBUG_4_CAS_SPARE1 0x01000000
4354 #define NV_PGRAPH_DEBUG_4_CAS_SPARE1_DISABLED 0xFEFFFFFF
4355 #define NV_PGRAPH_DEBUG_4_CAS_SPARE1_ENABLED 0x01000000
4356 #define NV_PGRAPH_DEBUG_4_CAS_SPARE2 0x02000000
4357 #define NV_PGRAPH_DEBUG_4_CAS_SPARE2_DISABLE 0xFDFFFFFF
4358 #define NV_PGRAPH_DEBUG_4_CAS_SPARE2_ENABLED 0x02000000
4359 #define NV_PGRAPH_DEBUG_4_SHD_SPARE1 0x04000000
4360 #define NV_PGRAPH_DEBUG_4_SHD_SPARE1_DISABLED 0xFBFFFFFF
4361 #define NV_PGRAPH_DEBUG_4_SHD_SPARE1_ENABLED 0x04000000
4362 #define NV_PGRAPH_DEBUG_4_SHD_SPARE2 0x08000000
4363 #define NV_PGRAPH_DEBUG_4_SHD_SPARE2_DISABLE 0xF7FFFFFF
4364 #define NV_PGRAPH_DEBUG_4_SHD_SPARE2_ENABLED 0x08000000
4365 #define NV_PGRAPH_DEBUG_4_SHDBE_SPARE1 0x10000000
4366 #define NV_PGRAPH_DEBUG_4_SHDBE_SPARE1_DISABLED 0xEFFFFFFF
4367 #define NV_PGRAPH_DEBUG_4_SHDBE_SPARE1_ENABLED 0x10000000
4368 #define NV_PGRAPH_DEBUG_4_SHDBE_SPARE2 0x20000000
4369 #define NV_PGRAPH_DEBUG_4_SHDBE_SPARE2_DISABLE 0xDFFFFFFF
4370 #define NV_PGRAPH_DEBUG_4_SHDBE_SPARE2_ENABLED 0x20000000
4371 
4372 /* NV-Register NV_PGRAPH_DEBUG_5 */
4373 #define NV_PGRAPH_DEBUG_5 0x00400094
4374 #define NV_PGRAPH_DEBUG_5_ZCULL_SPARE0 0x00000001
4375 #define NV_PGRAPH_DEBUG_5_ZCULL_SPARE0_DISABLED 0xFFFFFFFE
4376 #define NV_PGRAPH_DEBUG_5_ZCULL_SPARE0_ENABLED 0x00000001
4377 #define NV_PGRAPH_DEBUG_5_ZCULL_SPARE1 0x00000002
4378 #define NV_PGRAPH_DEBUG_5_ZCULL_SPARE1_DISABLED 0xFFFFFFFD
4379 #define NV_PGRAPH_DEBUG_5_ZCULL_SPARE1_ENABLED 0x00000002
4380 #define NV_PGRAPH_DEBUG_5_ZCULL_SPARE2 0x00000004
4381 #define NV_PGRAPH_DEBUG_5_ZCULL_SPARE2_DISABLED 0xFFFFFFFB
4382 #define NV_PGRAPH_DEBUG_5_ZCULL_SPARE2_ENABLED 0x00000004
4383 #define NV_PGRAPH_DEBUG_5_ZCULL_SPARE3 0x00000008
4384 #define NV_PGRAPH_DEBUG_5_ZCULL_SPARE3_DISABLED 0xFFFFFFF7
4385 #define NV_PGRAPH_DEBUG_5_ZCULL_SPARE3_ENABLED 0x00000008
4386 #define NV_PGRAPH_DEBUG_5_ZCULL_SPARE4 0x00000010
4387 #define NV_PGRAPH_DEBUG_5_ZCULL_SPARE4_DISABLED 0xFFFFFFEF
4388 #define NV_PGRAPH_DEBUG_5_ZCULL_SPARE4_ENABLED 0x00000010
4389 #define NV_PGRAPH_DEBUG_5_ZCULL_SPARE5 0x00000020
4390 #define NV_PGRAPH_DEBUG_5_ZCULL_SPARE5_DISABLED 0xFFFFFFDF
4391 #define NV_PGRAPH_DEBUG_5_ZCULL_SPARE5_ENABLED 0x00000020
4392 #define NV_PGRAPH_DEBUG_5_ZCULL_SPARE6 0x00000040
4393 #define NV_PGRAPH_DEBUG_5_ZCULL_SPARE6_DISABLED 0xFFFFFFBF
4394 #define NV_PGRAPH_DEBUG_5_ZCULL_SPARE6_ENABLED 0x00000040
4395 #define NV_PGRAPH_DEBUG_5_ZCULL_SPARE7 0x00000080
4396 #define NV_PGRAPH_DEBUG_5_ZCULL_SPARE7_DISABLED 0xFFFFFF7F
4397 #define NV_PGRAPH_DEBUG_5_ZCULL_SPARE7_ENABLED 0x00000080
4398 
4399 /* NV-Register NV_PGRAPH_DEBUG_6 */
4400 #define NV_PGRAPH_DEBUG_6 0x00400820
4401 #define NV_PGRAPH_DEBUG_6_ROP_TILEVIOL 0x00000001
4402 #define NV_PGRAPH_DEBUG_6_ROP_TILEVIOL_DISABLED 0xFFFFFFFE
4403 #define NV_PGRAPH_DEBUG_6_ROP_TILEVIOL_ENABLED 0x00000001
4404 #define NV_PGRAPH_DEBUG_6_ROP_TILEVIOL_INIT 0xFFFFFFFE
4405 #define NV_PGRAPH_DEBUG_6_ROP_SEP_ZC_READS 0x00000002
4406 #define NV_PGRAPH_DEBUG_6_ROP_SEP_ZC_READS_DISABLED 0xFFFFFFFD
4407 #define NV_PGRAPH_DEBUG_6_ROP_SEP_ZC_READS_ENABLED 0x00000002
4408 #define NV_PGRAPH_DEBUG_6_ROP_SEP_ZC_READS_INIT 0xFFFFFFFD
4409 #define NV_PGRAPH_DEBUG_6_ROP_DITHER_3D 0x00000004
4410 #define NV_PGRAPH_DEBUG_6_ROP_DITHER_3D_DISABLED 0xFFFFFFFB
4411 #define NV_PGRAPH_DEBUG_6_ROP_DITHER_3D_ENABLED 0x00000004
4412 #define NV_PGRAPH_DEBUG_6_ROP_DITHER_3D_INIT 0x00000004
4413 #define NV_PGRAPH_DEBUG_6_ROP_DITHER_2D 0x00000008
4414 #define NV_PGRAPH_DEBUG_6_ROP_DITHER_2D_DISABLED 0xFFFFFFF7
4415 #define NV_PGRAPH_DEBUG_6_ROP_DITHER_2D_ENABLED 0x00000008
4416 #define NV_PGRAPH_DEBUG_6_ROP_DITHER_2D_INIT 0x00000008
4417 #define NV_PGRAPH_DEBUG_6_ROP_EARLY_ZABORT 0x00000010
4418 #define NV_PGRAPH_DEBUG_6_ROP_EARLY_ZABORT_DISABLED 0xFFFFFFEF
4419 #define NV_PGRAPH_DEBUG_6_ROP_EARLY_ZABORT_ENABLED 0x00000010
4420 #define NV_PGRAPH_DEBUG_6_ROP_EARLY_ZABORT_INIT 0x00000010
4421 #define NV_PGRAPH_DEBUG_6_ROP_BLIT_MULTILINE 0x00000020
4422 #define NV_PGRAPH_DEBUG_6_ROP_BLIT_MULTILINE_DISABLED 0xFFFFFFDF
4423 #define NV_PGRAPH_DEBUG_6_ROP_BLIT_MULTILINE_ENABLED 0x00000020
4424 #define NV_PGRAPH_DEBUG_6_ROP_BLIT_MULTILINE_INIT 0x00000020
4425 #define NV_PGRAPH_DEBUG_6_ROP_BLIT_DST_LIMIT 0x00000040
4426 #define NV_PGRAPH_DEBUG_6_ROP_BLIT_DST_LIMIT_DISABLED 0xFFFFFFBF
4427 #define NV_PGRAPH_DEBUG_6_ROP_BLIT_DST_LIMIT_ENABLED 0x00000040
4428 #define NV_PGRAPH_DEBUG_6_ROP_BLIT_DST_LIMIT_INIT 0x00000040
4429 #define NV_PGRAPH_DEBUG_6_ROP_FAST_SYNC 0x00000080
4430 #define NV_PGRAPH_DEBUG_6_ROP_FAST_SYNC_DISABLED 0xFFFFFF7F
4431 #define NV_PGRAPH_DEBUG_6_ROP_FAST_SYNC_ENABLED 0x00000080
4432 #define NV_PGRAPH_DEBUG_6_ROP_FAST_SYNC_INIT 0xFFFFFF7F
4433 #define NV_PGRAPH_DEBUG_6_ROP_2D_FAST_CONV 0x00000100
4434 #define NV_PGRAPH_DEBUG_6_ROP_2D_FAST_CONV_DISABLED 0xFFFFFEFF
4435 #define NV_PGRAPH_DEBUG_6_ROP_2D_FAST_CONV_ENABLED 0x00000100
4436 #define NV_PGRAPH_DEBUG_6_ROP_2D_FAST_CONV_INIT 0xFFFFFEFF
4437 #define NV_PGRAPH_DEBUG_6_ROP_HPREQ 0x00000200
4438 #define NV_PGRAPH_DEBUG_6_ROP_HPREQ_DISABLED 0xFFFFFDFF
4439 #define NV_PGRAPH_DEBUG_6_ROP_HPREQ_ENABLED 0x00000200
4440 #define NV_PGRAPH_DEBUG_6_ROP_HPREQ_INIT 0x00000200
4441 #define NV_PGRAPH_DEBUG_6_ROP_BITBUCKET 0x00000400
4442 #define NV_PGRAPH_DEBUG_6_ROP_BITBUCKET_DISABLED 0xFFFFFBFF
4443 #define NV_PGRAPH_DEBUG_6_ROP_BITBUCKET_ENABLED 0x00000400
4444 #define NV_PGRAPH_DEBUG_6_ROP_BITBUCKET_INIT 0xFFFFFBFF
4445 #define NV_PGRAPH_DEBUG_6_ROP_FIXED_ADRS 0x00000800
4446 #define NV_PGRAPH_DEBUG_6_ROP_FIXED_ADRS_DISABLED 0xFFFFF7FF
4447 #define NV_PGRAPH_DEBUG_6_ROP_FIXED_ADRS_ENABLED 0x00000800
4448 #define NV_PGRAPH_DEBUG_6_ROP_FIXED_ADRS_INIT 0xFFFFF7FF
4449 #define NV_PGRAPH_DEBUG_6_ROP_FAST_KEEP_DST 0x00001000
4450 #define NV_PGRAPH_DEBUG_6_ROP_FAST_KEEP_DST_DISABLED 0xFFFFEFFF
4451 #define NV_PGRAPH_DEBUG_6_ROP_FAST_KEEP_DST_ENABLED 0x00001000
4452 #define NV_PGRAPH_DEBUG_6_ROP_FAST_KEEP_DST_INIT 0x00001000
4453 #define NV_PGRAPH_DEBUG_6_ROP_FORCE_CREAD 0x00002000
4454 #define NV_PGRAPH_DEBUG_6_ROP_FORCE_CREAD_DISABLED 0xFFFFDFFF
4455 #define NV_PGRAPH_DEBUG_6_ROP_FORCE_CREAD_ENABLED 0x00002000
4456 #define NV_PGRAPH_DEBUG_6_ROP_FORCE_CREAD_INIT 0xFFFFDFFF
4457 #define NV_PGRAPH_DEBUG_6_ROP_FORCE_ZREAD 0x00004000
4458 #define NV_PGRAPH_DEBUG_6_ROP_FORCE_ZREAD_DISABLED 0xFFFFBFFF
4459 #define NV_PGRAPH_DEBUG_6_ROP_FORCE_ZREAD_ENABLED 0x00004000
4460 #define NV_PGRAPH_DEBUG_6_ROP_FORCE_ZREAD_INIT 0xFFFFBFFF
4461 #define NV_PGRAPH_DEBUG_6_ROP_ZCOMPRESS_EN 0x00008000
4462 #define NV_PGRAPH_DEBUG_6_ROP_ZCOMPRESS_EN_DISABLED 0xFFFF7FFF
4463 #define NV_PGRAPH_DEBUG_6_ROP_ZCOMPRESS_EN_ENABLED 0x00008000
4464 #define NV_PGRAPH_DEBUG_6_ROP_ZCOMPRESS_EN_INIT 0x00008000
4465 #define NV_PGRAPH_DEBUG_6_ROP_CBUF_HIGHWATER 0x001F0000
4466 #define NV_PGRAPH_DEBUG_6_ROP_CBUF_HIGHWATER_INIT 0x001F0000
4467 #define NV_PGRAPH_DEBUG_6_ROP_COALESCE_3D 0x00200000
4468 #define NV_PGRAPH_DEBUG_6_ROP_COALESCE_3D_DISABLED 0xFFDFFFFF
4469 #define NV_PGRAPH_DEBUG_6_ROP_COALESCE_3D_ENABLED 0x00200000
4470 #define NV_PGRAPH_DEBUG_6_ROP_COALESCE_3D_INIT 0x00200000
4471 #define NV_PGRAPH_DEBUG_6_ROP_COALESCE_2D 0x00400000
4472 #define NV_PGRAPH_DEBUG_6_ROP_COALESCE_2D_DISABLED 0xFFBFFFFF
4473 #define NV_PGRAPH_DEBUG_6_ROP_COALESCE_2D_ENABLED 0x00400000
4474 #define NV_PGRAPH_DEBUG_6_ROP_COALESCE_2D_INIT 0x00400000
4475 #define NV_PGRAPH_DEBUG_6_ROP_SPARE 0xFF800000
4476 #define NV_PGRAPH_DEBUG_6_ROP_SPARE_DISABLED 0x00000000
4477 
4478 /* NV-Register NV_PGRAPH_INTR */
4479 #define NV_PGRAPH_INTR 0x00400100
4480 #define NV_PGRAPH_INTR_NOTIFY 0x00000001
4481 #define NV_PGRAPH_INTR_NOTIFY_NOT_PENDING 0xFFFFFFFE
4482 #define NV_PGRAPH_INTR_NOTIFY_PENDING 0x00000001
4483 #define NV_PGRAPH_INTR_NOTIFY_RESET 0x00000001
4484 #define NV_PGRAPH_INTR_MISSING_HW 0x00000010
4485 #define NV_PGRAPH_INTR_MISSING_HW_NOT_PENDING 0xFFFFFFEF
4486 #define NV_PGRAPH_INTR_MISSING_HW_PENDING 0x00000010
4487 #define NV_PGRAPH_INTR_MISSING_HW_RESET 0x00000010
4488 #define NV_PGRAPH_INTR_TLB_PRESENT_A 0x00000100
4489 #define NV_PGRAPH_INTR_TLB_PRESENT_A_NOT_PENDING 0xFFFFFEFF
4490 #define NV_PGRAPH_INTR_TLB_PRESENT_A_PENDING 0x00000100
4491 #define NV_PGRAPH_INTR_TLB_PRESENT_A_RESET 0x00000100
4492 #define NV_PGRAPH_INTR_TLB_PRESENT_B 0x00000200
4493 #define NV_PGRAPH_INTR_TLB_PRESENT_B_NOT_PENDING 0xFFFFFDFF
4494 #define NV_PGRAPH_INTR_TLB_PRESENT_B_PENDING 0x00000200
4495 #define NV_PGRAPH_INTR_TLB_PRESENT_B_RESET 0x00000200
4496 #define NV_PGRAPH_INTR_TLB_PRESENT_VTX 0x00000400
4497 #define NV_PGRAPH_INTR_TLB_PRESENT_VTX_NOT_PENDING 0xFFFFFBFF
4498 #define NV_PGRAPH_INTR_TLB_PRESENT_VTX_PENDING 0x00000400
4499 #define NV_PGRAPH_INTR_TLB_PRESENT_VTX_RESET 0x00000400
4500 #define NV_PGRAPH_INTR_CONTEXT_SWITCH 0x00001000
4501 #define NV_PGRAPH_INTR_CONTEXT_SWITCH_NOT_PENDING 0xFFFFEFFF
4502 #define NV_PGRAPH_INTR_CONTEXT_SWITCH_PENDING 0x00001000
4503 #define NV_PGRAPH_INTR_CONTEXT_SWITCH_RESET 0x00001000
4504 #define NV_PGRAPH_INTR_STATE3D 0x00002000
4505 #define NV_PGRAPH_INTR_STATE3D_NOT_PENDING 0xFFFFDFFF
4506 #define NV_PGRAPH_INTR_STATE3D_PENDING 0x00002000
4507 #define NV_PGRAPH_INTR_STATE3D_RESET 0x00002000
4508 #define NV_PGRAPH_INTR_BUFFER_NOTIFY 0x00010000
4509 #define NV_PGRAPH_INTR_BUFFER_NOTIFY_NOT_PENDING 0xFFFEFFFF
4510 #define NV_PGRAPH_INTR_BUFFER_NOTIFY_PENDING 0x00010000
4511 #define NV_PGRAPH_INTR_BUFFER_NOTIFY_RESET 0x00010000
4512 #define NV_PGRAPH_INTR_ERROR 0x00100000
4513 #define NV_PGRAPH_INTR_ERROR_NOT_PENDING 0xFFEFFFFF
4514 #define NV_PGRAPH_INTR_ERROR_PENDING 0x00100000
4515 #define NV_PGRAPH_INTR_ERROR_RESET 0x00100000
4516 #define NV_PGRAPH_INTR_SINGLE_STEP 0x01000000
4517 #define NV_PGRAPH_INTR_SINGLE_STEP_NOT_PENDING 0xFEFFFFFF
4518 #define NV_PGRAPH_INTR_SINGLE_STEP_PENDING 0x01000000
4519 #define NV_PGRAPH_INTR_SINGLE_STEP_RESET 0x01000000
4520 
4521 /* NV-Register NV_PGRAPH_NSTATUS */
4522 #define NV_PGRAPH_NSTATUS 0x00400104
4523 #define NV_PGRAPH_NSTATUS_STATE_IN_USE 0x00800000
4524 #define NV_PGRAPH_NSTATUS_STATE_IN_USE_NOT_PENDING 0xFF7FFFFF
4525 #define NV_PGRAPH_NSTATUS_STATE_IN_USE_PENDING 0x00800000
4526 #define NV_PGRAPH_NSTATUS_INVALID_STATE 0x01000000
4527 #define NV_PGRAPH_NSTATUS_INVALID_STATE_NOT_PENDING 0xFEFFFFFF
4528 #define NV_PGRAPH_NSTATUS_INVALID_STATE_PENDING 0x01000000
4529 #define NV_PGRAPH_NSTATUS_BAD_ARGUMENT 0x02000000
4530 #define NV_PGRAPH_NSTATUS_BAD_ARGUMENT_NOT_PENDING 0xFDFFFFFF
4531 #define NV_PGRAPH_NSTATUS_BAD_ARGUMENT_PENDING 0x02000000
4532 #define NV_PGRAPH_NSTATUS_PROTECTION_FAULT 0x04000000
4533 #define NV_PGRAPH_NSTATUS_PROTECTION_FAULT_NOT_PENDING 0xFBFFFFFF
4534 #define NV_PGRAPH_NSTATUS_PROTECTION_FAULT_PENDING 0x04000000
4535 
4536 /* NV-Register NV_PGRAPH_NSOURCE */
4537 #define NV_PGRAPH_NSOURCE 0x00400108
4538 #define NV_PGRAPH_NSOURCE_NOTIFICATION 0x00000001
4539 #define NV_PGRAPH_NSOURCE_NOTIFICATION_NOT_PENDING 0xFFFFFFFE
4540 #define NV_PGRAPH_NSOURCE_NOTIFICATION_PENDING 0x00000001
4541 #define NV_PGRAPH_NSOURCE_DATA_ERROR 0x00000002
4542 #define NV_PGRAPH_NSOURCE_DATA_ERROR_NOT_PENDING 0xFFFFFFFD
4543 #define NV_PGRAPH_NSOURCE_DATA_ERROR_PENDING 0x00000002
4544 #define NV_PGRAPH_NSOURCE_PROTECTION_ERROR 0x00000004
4545 #define NV_PGRAPH_NSOURCE_PROTECTION_ERROR_NOT_PENDING 0xFFFFFFFB
4546 #define NV_PGRAPH_NSOURCE_PROTECTION_ERROR_PENDING 0x00000004
4547 #define NV_PGRAPH_NSOURCE_RANGE_EXCEPTION 0x00000008
4548 #define NV_PGRAPH_NSOURCE_RANGE_EXCEPTION_NOT_PENDING 0xFFFFFFF7
4549 #define NV_PGRAPH_NSOURCE_RANGE_EXCEPTION_PENDING 0x00000008
4550 #define NV_PGRAPH_NSOURCE_LIMIT_COLOR 0x00000010
4551 #define NV_PGRAPH_NSOURCE_LIMIT_COLOR_NOT_PENDING 0xFFFFFFEF
4552 #define NV_PGRAPH_NSOURCE_LIMIT_COLOR_PENDING 0x00000010
4553 #define NV_PGRAPH_NSOURCE_LIMIT_ZETA 0x00000020
4554 #define NV_PGRAPH_NSOURCE_LIMIT_ZETA_NOT_PENDING 0xFFFFFFDF
4555 #define NV_PGRAPH_NSOURCE_LIMIT_ZETA_PENDING 0x00000020
4556 #define NV_PGRAPH_NSOURCE_ILLEGAL_MTHD 0x00000040
4557 #define NV_PGRAPH_NSOURCE_ILLEGAL_MTHD_NOT_PENDING 0xFFFFFFBF
4558 #define NV_PGRAPH_NSOURCE_ILLEGAL_MTHD_PENDING 0x00000040
4559 #define NV_PGRAPH_NSOURCE_DMA_R_PROTECTION 0x00000080
4560 #define NV_PGRAPH_NSOURCE_DMA_R_PROTECTION_NOT_PENDING 0xFFFFFF7F
4561 #define NV_PGRAPH_NSOURCE_DMA_R_PROTECTION_PENDING 0x00000080
4562 #define NV_PGRAPH_NSOURCE_DMA_W_PROTECTION 0x00000100
4563 #define NV_PGRAPH_NSOURCE_DMA_W_PROTECTION_NOT_PENDING 0xFFFFFEFF
4564 #define NV_PGRAPH_NSOURCE_DMA_W_PROTECTION_PENDING 0x00000100
4565 #define NV_PGRAPH_NSOURCE_FORMAT_EXCEPTION 0x00000200
4566 #define NV_PGRAPH_NSOURCE_FORMAT_EXCEPTION_NOT_PENDING 0xFFFFFDFF
4567 #define NV_PGRAPH_NSOURCE_FORMAT_EXCEPTION_PENDING 0x00000200
4568 #define NV_PGRAPH_NSOURCE_PATCH_EXCEPTION 0x00000400
4569 #define NV_PGRAPH_NSOURCE_PATCH_EXCEPTION_NOT_PENDING 0xFFFFFBFF
4570 #define NV_PGRAPH_NSOURCE_PATCH_EXCEPTION_PENDING 0x00000400
4571 #define NV_PGRAPH_NSOURCE_STATE_INVALID 0x00000800
4572 #define NV_PGRAPH_NSOURCE_STATE_INVALID_NOT_PENDING 0xFFFFF7FF
4573 #define NV_PGRAPH_NSOURCE_STATE_INVALID_PENDING 0x00000800
4574 #define NV_PGRAPH_NSOURCE_DOUBLE_NOTIFY 0x00001000
4575 #define NV_PGRAPH_NSOURCE_DOUBLE_NOTIFY_NOT_PENDING 0xFFFFEFFF
4576 #define NV_PGRAPH_NSOURCE_DOUBLE_NOTIFY_PENDING 0x00001000
4577 #define NV_PGRAPH_NSOURCE_NOTIFY_IN_USE 0x00002000
4578 #define NV_PGRAPH_NSOURCE_NOTIFY_IN_USE_NOT_PENDING 0xFFFFDFFF
4579 #define NV_PGRAPH_NSOURCE_NOTIFY_IN_USE_PENDING 0x00002000
4580 #define NV_PGRAPH_NSOURCE_METHOD_CNT 0x00004000
4581 #define NV_PGRAPH_NSOURCE_METHOD_CNT_NOT_PENDING 0xFFFFBFFF
4582 #define NV_PGRAPH_NSOURCE_METHOD_CNT_PENDING 0x00004000
4583 #define NV_PGRAPH_NSOURCE_BFR_NOTIFICATION 0x00008000
4584 #define NV_PGRAPH_NSOURCE_BFR_NOTIFICATION_NOT_PENDING 0xFFFF7FFF
4585 #define NV_PGRAPH_NSOURCE_BFR_NOTIFICATION_PENDING 0x00008000
4586 #define NV_PGRAPH_NSOURCE_DMA_VTX_PROTECTION 0x00010000
4587 #define NV_PGRAPH_NSOURCE_DMA_VTX_PROTECTION_NOT_PENDING 0xFFFEFFFF
4588 #define NV_PGRAPH_NSOURCE_DMA_VTX_PROTECTION_PENDING 0x00010000
4589 #define NV_PGRAPH_NSOURCE_DMA_WIDTH_A 0x00020000
4590 #define NV_PGRAPH_NSOURCE_DMA_WIDTH_A_NOT_PENDING 0xFFFDFFFF
4591 #define NV_PGRAPH_NSOURCE_DMA_WIDTH_A_PENDING 0x00020000
4592 #define NV_PGRAPH_NSOURCE_DMA_WIDTH_B 0x00040000
4593 #define NV_PGRAPH_NSOURCE_DMA_WIDTH_B_NOT_PENDING 0xFFFBFFFF
4594 #define NV_PGRAPH_NSOURCE_DMA_WIDTH_B_PENDING 0x00040000
4595 
4596 /* NV-Register NV_PGRAPH_INTR_EN */
4597 #define NV_PGRAPH_INTR_EN 0x00400140
4598 #define NV_PGRAPH_INTR_EN_NOTIFY 0x00000001
4599 #define NV_PGRAPH_INTR_EN_NOTIFY_DISABLED 0xFFFFFFFE
4600 #define NV_PGRAPH_INTR_EN_NOTIFY_ENABLED 0x00000001
4601 #define NV_PGRAPH_INTR_EN_MISSING_HW 0x00000010
4602 #define NV_PGRAPH_INTR_EN_MISSING_HW_DISABLED 0xFFFFFFEF
4603 #define NV_PGRAPH_INTR_EN_MISSING_HW_ENABLED 0x00000010
4604 #define NV_PGRAPH_INTR_EN_TLB_PRESENT_A 0x00000100
4605 #define NV_PGRAPH_INTR_EN_TLB_PRESENT_A_DISABLED 0xFFFFFEFF
4606 #define NV_PGRAPH_INTR_EN_TLB_PRESENT_A_ENABLED 0x00000100
4607 #define NV_PGRAPH_INTR_EN_TLB_PRESENT_B 0x00000200
4608 #define NV_PGRAPH_INTR_EN_TLB_PRESENT_B_DISABLED 0xFFFFFDFF
4609 #define NV_PGRAPH_INTR_EN_TLB_PRESENT_B_ENABLED 0x00000200
4610 #define NV_PGRAPH_INTR_EN_TLB_PRESENT_VTX 0x00000400
4611 #define NV_PGRAPH_INTR_EN_TLB_PRESENT_VTX_DISABLED 0xFFFFFBFF
4612 #define NV_PGRAPH_INTR_EN_TLB_PRESENT_VTX_ENABLED 0x00000400
4613 #define NV_PGRAPH_INTR_EN_CONTEXT_SWITCH 0x00001000
4614 #define NV_PGRAPH_INTR_EN_CONTEXT_SWITCH_DISABLED 0xFFFFEFFF
4615 #define NV_PGRAPH_INTR_EN_CONTEXT_SWITCH_ENABLED 0x00001000
4616 #define NV_PGRAPH_INTR_EN_STATE3D 0x00002000
4617 #define NV_PGRAPH_INTR_EN_STATE3D_DISABLED 0xFFFFDFFF
4618 #define NV_PGRAPH_INTR_EN_STATE3D_ENABLED 0x00002000
4619 #define NV_PGRAPH_INTR_EN_BUFFER_NOTIFY 0x00010000
4620 #define NV_PGRAPH_INTR_EN_BUFFER_NOTIFY_DISABLED 0xFFFEFFFF
4621 #define NV_PGRAPH_INTR_EN_BUFFER_NOTIFY_ENABLED 0x00010000
4622 #define NV_PGRAPH_INTR_EN_ERROR 0x00100000
4623 #define NV_PGRAPH_INTR_EN_ERROR_DISABLED 0xFFEFFFFF
4624 #define NV_PGRAPH_INTR_EN_ERROR_ENABLED 0x00100000
4625 #define NV_PGRAPH_INTR_EN_SINGLE_STEP 0x01000000
4626 #define NV_PGRAPH_INTR_EN_SINGLE_STEP_DISABLED 0xFEFFFFFF
4627 #define NV_PGRAPH_INTR_EN_SINGLE_STEP_ENABLED 0x01000000
4628 
4629 /* NV-Register NV_PGRAPH_CTX_CONTROL */
4630 #define NV_PGRAPH_CTX_CONTROL 0x00400144
4631 #define NV_PGRAPH_CTX_CONTROL_MINIMUM_TIME 0x00000003
4632 #define NV_PGRAPH_CTX_CONTROL_MINIMUM_TIME_33US 0x00000000
4633 #define NV_PGRAPH_CTX_CONTROL_MINIMUM_TIME_262US 0x00000001
4634 #define NV_PGRAPH_CTX_CONTROL_MINIMUM_TIME_2MS 0x00000002
4635 #define NV_PGRAPH_CTX_CONTROL_MINIMUM_TIME_17MS 0x00000003
4636 #define NV_PGRAPH_CTX_CONTROL_TIME 0x00000100
4637 #define NV_PGRAPH_CTX_CONTROL_TIME_EXPIRED 0xFFFFFEFF
4638 #define NV_PGRAPH_CTX_CONTROL_TIME_NOT_EXPIRED 0x00000100
4639 #define NV_PGRAPH_CTX_CONTROL_CHID 0x00010000
4640 #define NV_PGRAPH_CTX_CONTROL_CHID_INVALID 0xFFFEFFFF
4641 #define NV_PGRAPH_CTX_CONTROL_CHID_VALID 0x00010000
4642 #define NV_PGRAPH_CTX_CONTROL_CHANGE 0x00100000
4643 #define NV_PGRAPH_CTX_CONTROL_CHANGE_UNAVAILABLE 0xFFEFFFFF
4644 #define NV_PGRAPH_CTX_CONTROL_CHANGE_AVAILABLE 0x00100000
4645 #define NV_PGRAPH_CTX_CONTROL_SWITCHING 0x01000000
4646 #define NV_PGRAPH_CTX_CONTROL_SWITCHING_IDLE 0xFEFFFFFF
4647 #define NV_PGRAPH_CTX_CONTROL_SWITCHING_BUSY 0x01000000
4648 #define NV_PGRAPH_CTX_CONTROL_DEVICE 0x10000000
4649 #define NV_PGRAPH_CTX_CONTROL_DEVICE_DISABLED 0xEFFFFFFF
4650 #define NV_PGRAPH_CTX_CONTROL_DEVICE_ENABLED 0x10000000
4651 
4652 /* NV-Register NV_PGRAPH_CTX_USER */
4653 #define NV_PGRAPH_CTX_USER 0x00400148
4654 #define NV_PGRAPH_CTX_USER_SUBCH 0x0000E000
4655 #define NV_PGRAPH_CTX_USER_SUBCH_0 0x00000000
4656 #define NV_PGRAPH_CTX_USER_CHID 0x1F000000
4657 #define NV_PGRAPH_CTX_USER_CHID_0 0x00000000
4658 #define NV_PGRAPH_CTX_USER_SINGLE_STEP 0x80000000
4659 #define NV_PGRAPH_CTX_USER_SINGLE_STEP_DISABLED 0x7FFFFFFF
4660 #define NV_PGRAPH_CTX_USER_SINGLE_STEP_ENABLED 0x80000000
4661 
4662 /* NV-Register NV_PGRAPH_CTX_SWITCH1 */
4663 #define NV_PGRAPH_CTX_SWITCH1 0x0040014C
4664 #define NV_PGRAPH_CTX_SWITCH1_GRCLASS 0x000000FF
4665 #define NV_PGRAPH_CTX_SWITCH1_CHROMA_KEY 0x00001000
4666 #define NV_PGRAPH_CTX_SWITCH1_CHROMA_KEY_DISABLE 0xFFFFEFFF
4667 #define NV_PGRAPH_CTX_SWITCH1_CHROMA_KEY_ENABLE 0x00001000
4668 #define NV_PGRAPH_CTX_SWITCH1_USER_CLIP 0x00002000
4669 #define NV_PGRAPH_CTX_SWITCH1_USER_CLIP_DISABLE 0xFFFFDFFF
4670 #define NV_PGRAPH_CTX_SWITCH1_USER_CLIP_ENABLE 0x00002000
4671 #define NV_PGRAPH_CTX_SWITCH1_SWIZZLE 0x00004000
4672 #define NV_PGRAPH_CTX_SWITCH1_SWIZZLE_DISABLE 0xFFFFBFFF
4673 #define NV_PGRAPH_CTX_SWITCH1_SWIZZLE_ENABLE 0x00004000
4674 #define NV_PGRAPH_CTX_SWITCH1_PATCH_CONFIG 0x00038000
4675 #define NV_PGRAPH_CTX_SWITCH1_PATCH_CONFIG_SRCCOPY_AND 0x00000000
4676 #define NV_PGRAPH_CTX_SWITCH1_PATCH_CONFIG_ROP_AND 0x00008000
4677 #define NV_PGRAPH_CTX_SWITCH1_PATCH_CONFIG_BLEND_AND 0x00010000
4678 #define NV_PGRAPH_CTX_SWITCH1_PATCH_CONFIG_SRCCOPY 0x00018000
4679 #define NV_PGRAPH_CTX_SWITCH1_PATCH_CONFIG_SRCCOPY_PRE 0x00020000
4680 #define NV_PGRAPH_CTX_SWITCH1_PATCH_CONFIG_BLEND_PRE 0x00028000
4681 #define NV_PGRAPH_CTX_SWITCH1_SYNCHRONIZE 0x00040000
4682 #define NV_PGRAPH_CTX_SWITCH1_SYNCHRONIZE_DISABLE 0xFFFBFFFF
4683 #define NV_PGRAPH_CTX_SWITCH1_SYNCHRONIZE_ENABLE 0x00040000
4684 #define NV_PGRAPH_CTX_SWITCH1_ENDIAN_MODE 0x00080000
4685 #define NV_PGRAPH_CTX_SWITCH1_ENDIAN_MODE_LITTLE 0xFFF7FFFF
4686 #define NV_PGRAPH_CTX_SWITCH1_ENDIAN_MODE_BIG 0x00080000
4687 #define NV_PGRAPH_CTX_SWITCH1_DITHER_MODE 0x00300000
4688 #define NV_PGRAPH_CTX_SWITCH1_DITHER_MODE_COMPATIBILITY 0x00000000
4689 #define NV_PGRAPH_CTX_SWITCH1_DITHER_MODE_DITHER 0x00100000
4690 #define NV_PGRAPH_CTX_SWITCH1_DITHER_MODE_TRUNCATE 0x00200000
4691 #define NV_PGRAPH_CTX_SWITCH1_DITHER_MODE_MS 0x00300000
4692 #define NV_PGRAPH_CTX_SWITCH1_SINGLE_STEP 0x00800000
4693 #define NV_PGRAPH_CTX_SWITCH1_SINGLE_STEP_DISABLED 0xFF7FFFFF
4694 #define NV_PGRAPH_CTX_SWITCH1_SINGLE_STEP_ENABLED 0x00800000
4695 #define NV_PGRAPH_CTX_SWITCH1_PATCH_STATUS 0x01000000
4696 #define NV_PGRAPH_CTX_SWITCH1_PATCH_STATUS_INVALID 0xFEFFFFFF
4697 #define NV_PGRAPH_CTX_SWITCH1_PATCH_STATUS_VALID 0x01000000
4698 #define NV_PGRAPH_CTX_SWITCH1_CONTEXT_SURFACE0 0x02000000
4699 #define NV_PGRAPH_CTX_SWITCH1_CONTEXT_SURFACE0_INVALID 0xFDFFFFFF
4700 #define NV_PGRAPH_CTX_SWITCH1_CONTEXT_SURFACE0_VALID 0x02000000
4701 #define NV_PGRAPH_CTX_SWITCH1_CONTEXT_SURFACE1 0x04000000
4702 #define NV_PGRAPH_CTX_SWITCH1_CONTEXT_SURFACE1_INVALID 0xFBFFFFFF
4703 #define NV_PGRAPH_CTX_SWITCH1_CONTEXT_SURFACE1_VALID 0x04000000
4704 #define NV_PGRAPH_CTX_SWITCH1_CONTEXT_PATTERN 0x08000000
4705 #define NV_PGRAPH_CTX_SWITCH1_CONTEXT_PATTERN_INVALID 0xF7FFFFFF
4706 #define NV_PGRAPH_CTX_SWITCH1_CONTEXT_PATTERN_VALID 0x08000000
4707 #define NV_PGRAPH_CTX_SWITCH1_CONTEXT_ROP 0x10000000
4708 #define NV_PGRAPH_CTX_SWITCH1_CONTEXT_ROP_INVALID 0xEFFFFFFF
4709 #define NV_PGRAPH_CTX_SWITCH1_CONTEXT_ROP_VALID 0x10000000
4710 #define NV_PGRAPH_CTX_SWITCH1_CONTEXT_BETA1 0x20000000
4711 #define NV_PGRAPH_CTX_SWITCH1_CONTEXT_BETA1_INVALID 0xDFFFFFFF
4712 #define NV_PGRAPH_CTX_SWITCH1_CONTEXT_BETA1_VALID 0x20000000
4713 #define NV_PGRAPH_CTX_SWITCH1_CONTEXT_BETA4 0x40000000
4714 #define NV_PGRAPH_CTX_SWITCH1_CONTEXT_BETA4_INVALID 0xBFFFFFFF
4715 #define NV_PGRAPH_CTX_SWITCH1_CONTEXT_BETA4_VALID 0x40000000
4716 #define NV_PGRAPH_CTX_SWITCH1_VOLATILE_RESET 0x80000000
4717 #define NV_PGRAPH_CTX_SWITCH1_VOLATILE_RESET_IGNORE 0x7FFFFFFF
4718 #define NV_PGRAPH_CTX_SWITCH1_VOLATILE_RESET_ENABLED 0x80000000
4719 
4720 /* NV-Register NV_PGRAPH_CTX_SWITCH2 */
4721 #define NV_PGRAPH_CTX_SWITCH2 0x00400150
4722 #define NV_PGRAPH_CTX_SWITCH2_MONO_FORMAT 0x00000003
4723 #define NV_PGRAPH_CTX_SWITCH2_MONO_FORMAT_INVALID 0x00000000
4724 #define NV_PGRAPH_CTX_SWITCH2_MONO_FORMAT_CGA6_M1 0x00000001
4725 #define NV_PGRAPH_CTX_SWITCH2_MONO_FORMAT_LE_M1 0x00000002
4726 #define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT 0x00003F00
4727 #define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_INVALID 0x00000000
4728 #define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_Y8 0x00000100
4729 #define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_X16A8Y8 0x00000200
4730 #define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_X24Y8 0x00000300
4731 #define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_A1R5G5B5 0x00000600
4732 #define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_X1R5G5B5 0x00000700
4733 #define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_X16A1R5G5B5 0x00000800
4734 #define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_X17R5G5B5 0x00000900
4735 #define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_R5G6B5 0x00000A00
4736 #define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_A16R5G6B5 0x00000B00
4737 #define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_X16R5G6B5 0x00000C00
4738 #define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_A8R8G8B8 0x00000D00
4739 #define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_X8R8G8B8 0x00000E00
4740 #define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_Y16 0x00000F00
4741 #define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_A16Y16 0x00001000
4742 #define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_X16Y16 0x00001100
4743 #define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_V8YB8U8YA8 0x00001200
4744 #define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_YB8V8YA8U8 0x00001300
4745 #define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_Y32 0x00001400
4746 #define NV_PGRAPH_CTX_SWITCH2_COLOR_FORMAT_LE_AY8 0x00001500
4747 #define NV_PGRAPH_CTX_SWITCH2_NOTIFY_INSTANCE 0xFFFF0000
4748 #define NV_PGRAPH_CTX_SWITCH2_NOTIFY_INSTANCE_INVALID 0x00000000
4749 
4750 /* NV-Register NV_PGRAPH_CTX_SWITCH3 */
4751 #define NV_PGRAPH_CTX_SWITCH3 0x00400154
4752 #define NV_PGRAPH_CTX_SWITCH3_DMA_INSTANCE_0 0x0000FFFF
4753 #define NV_PGRAPH_CTX_SWITCH3_DMA_INSTANCE_0_INVALID 0x00000000
4754 #define NV_PGRAPH_CTX_SWITCH3_DMA_INSTANCE_1 0xFFFF0000
4755 #define NV_PGRAPH_CTX_SWITCH3_DMA_INSTANCE_1_INVALID 0x00000000
4756 
4757 /* NV-Register NV_PGRAPH_CTX_SWITCH4 */
4758 #define NV_PGRAPH_CTX_SWITCH4 0x00400158
4759 #define NV_PGRAPH_CTX_SWITCH4_USER_INSTANCE 0x0000FFFF
4760 #define NV_PGRAPH_CTX_SWITCH4_USER_INSTANCE_INVALID 0x00000000
4761 
4762 /* NV-Register NV_PGRAPH_CTX_SWITCH5 */
4763 #define NV_PGRAPH_CTX_SWITCH5 0x0040015C
4764 #define NV_PGRAPH_CTX_SWITCH5_TRAP_BITS 0xFFFFFFFF
4765 #define NV_PGRAPH_CTX_SWITCH5_TRAP_BITS_DISABLED 0x00000000
4766 
4767 /* NV-Array NV_PGRAPH_CTX_CACHE1 (4 byte access) */
4768 #define NV_PGRAPH_CTX_CACHE1 0x00400160
4769 /* NV-Array size NV_PGRAPH_CTX_CACHE1__SIZE_1 [0..7] */
4770 #define NV_PGRAPH_CTX_CACHE1__SIZE_1 0x00000008
4771 #define NV_PGRAPH_CTX_CACHE1_GRCLASS 0x000000FF
4772 #define NV_PGRAPH_CTX_CACHE1_CHROMA_KEY 0x00001000
4773 #define NV_PGRAPH_CTX_CACHE1_USER_CLIP 0x00002000
4774 #define NV_PGRAPH_CTX_CACHE1_SWIZZLE 0x00004000
4775 #define NV_PGRAPH_CTX_CACHE1_PATCH_CONFIG 0x00038000
4776 #define NV_PGRAPH_CTX_CACHE1_SYNCHRONIZE 0x00040000
4777 #define NV_PGRAPH_CTX_CACHE1_ENDIAN_MODE 0x00080000
4778 #define NV_PGRAPH_CTX_CACHE1_DITHER_MODE 0x00300000
4779 #define NV_PGRAPH_CTX_CACHE1_SINGLE_STEP 0x00800000
4780 #define NV_PGRAPH_CTX_CACHE1_PATCH_STATUS 0x01000000
4781 #define NV_PGRAPH_CTX_CACHE1_CONTEXT_SURFACE0 0x02000000
4782 #define NV_PGRAPH_CTX_CACHE1_CONTEXT_SURFACE1 0x04000000
4783 #define NV_PGRAPH_CTX_CACHE1_CONTEXT_PATTERN 0x08000000
4784 #define NV_PGRAPH_CTX_CACHE1_CONTEXT_ROP 0x10000000
4785 #define NV_PGRAPH_CTX_CACHE1_CONTEXT_BETA1 0x20000000
4786 #define NV_PGRAPH_CTX_CACHE1_CONTEXT_BETA4 0x40000000
4787 
4788 /* NV-Array NV_PGRAPH_CTX_CACHE2 (4 byte access) */
4789 #define NV_PGRAPH_CTX_CACHE2 0x00400180
4790 /* NV-Array size NV_PGRAPH_CTX_CACHE2__SIZE_1 [0..7] */
4791 #define NV_PGRAPH_CTX_CACHE2__SIZE_1 0x00000008
4792 #define NV_PGRAPH_CTX_CACHE2_MONO_FORMAT 0x00000003
4793 #define NV_PGRAPH_CTX_CACHE2_COLOR_FORMAT 0x00003F00
4794 #define NV_PGRAPH_CTX_CACHE2_NOTIFY_INSTANCE 0xFFFF0000
4795 
4796 /* NV-Array NV_PGRAPH_CTX_CACHE3 (4 byte access) */
4797 #define NV_PGRAPH_CTX_CACHE3 0x004001A0
4798 /* NV-Array size NV_PGRAPH_CTX_CACHE3__SIZE_1 [0..7] */
4799 #define NV_PGRAPH_CTX_CACHE3__SIZE_1 0x00000008
4800 #define NV_PGRAPH_CTX_CACHE3_DMA_INSTANCE_0 0x0000FFFF
4801 #define NV_PGRAPH_CTX_CACHE3_DMA_INSTANCE_1 0xFFFF0000
4802 
4803 /* NV-Array NV_PGRAPH_CTX_CACHE4 (4 byte access) */
4804 #define NV_PGRAPH_CTX_CACHE4 0x004001C0
4805 /* NV-Array size NV_PGRAPH_CTX_CACHE4__SIZE_1 [0..7] */
4806 #define NV_PGRAPH_CTX_CACHE4__SIZE_1 0x00000008
4807 #define NV_PGRAPH_CTX_CACHE4_USER_INSTANCE 0x0000FFFF
4808 
4809 /* NV-Array NV_PGRAPH_CTX_CACHE5 (4 byte access) */
4810 #define NV_PGRAPH_CTX_CACHE5 0x004001E0
4811 /* NV-Array size NV_PGRAPH_CTX_CACHE5__SIZE_1 [0..7] */
4812 #define NV_PGRAPH_CTX_CACHE5__SIZE_1 0x00000008
4813 #define NV_PGRAPH_CTX_CACHE5_TRAP_BITS 0xFFFFFFFF
4814 
4815 /* NV-Register NV_PGRAPH_FIFO */
4816 #define NV_PGRAPH_FIFO 0x00400720
4817 #define NV_PGRAPH_FIFO_ACCESS 0x00000001
4818 #define NV_PGRAPH_FIFO_ACCESS_DISABLED 0xFFFFFFFE
4819 #define NV_PGRAPH_FIFO_ACCESS_ENABLED 0x00000001
4820 
4821 /* NV-Array NV_PGRAPH_FFINTFC_FIFO_0 (4 byte access) */
4822 #define NV_PGRAPH_FFINTFC_FIFO_0 0x004007A0
4823 /* NV-Array size NV_PGRAPH_FFINTFC_FIFO_0__SIZE_1 [0..7] */
4824 #define NV_PGRAPH_FFINTFC_FIFO_0__SIZE_1 0x00000008
4825 #define NV_PGRAPH_FFINTFC_FIFO_0_MTHD 0x00001FFC
4826 #define NV_PGRAPH_FFINTFC_FIFO_0_MTHD_CTX_SWITCH 0x00000000
4827 #define NV_PGRAPH_FFINTFC_FIFO_0_SUBCH 0x00070000
4828 #define NV_PGRAPH_FFINTFC_FIFO_0_SUBCH_0 0x00000000
4829 #define NV_PGRAPH_FFINTFC_FIFO_0_SUBCH_1 0x00010000
4830 #define NV_PGRAPH_FFINTFC_FIFO_0_SUBCH_2 0x00020000
4831 #define NV_PGRAPH_FFINTFC_FIFO_0_SUBCH_3 0x00030000
4832 #define NV_PGRAPH_FFINTFC_FIFO_0_SUBCH_4 0x00040000
4833 #define NV_PGRAPH_FFINTFC_FIFO_0_SUBCH_5 0x00050000
4834 #define NV_PGRAPH_FFINTFC_FIFO_0_SUBCH_6 0x00060000
4835 #define NV_PGRAPH_FFINTFC_FIFO_0_SUBCH_7 0x00070000
4836 #define NV_PGRAPH_FFINTFC_FIFO_0_CODE 0x00300000
4837 #define NV_PGRAPH_FFINTFC_FIFO_0_CODE_DOUBLE_NONINCR 0x00000000
4838 #define NV_PGRAPH_FFINTFC_FIFO_0_CODE_DOUBLE_INCR 0x00100000
4839 #define NV_PGRAPH_FFINTFC_FIFO_0_CODE_SINGLE 0x00200000
4840 #define NV_PGRAPH_FFINTFC_FIFO_0_CODE_CHSW 0x00300000
4841 
4842 /* NV-Array NV_PGRAPH_FFINTFC_FIFO_1 (4 byte access) */
4843 #define NV_PGRAPH_FFINTFC_FIFO_1 0x004007C0
4844 /* NV-Array size NV_PGRAPH_FFINTFC_FIFO_1__SIZE_1 [0..7] */
4845 #define NV_PGRAPH_FFINTFC_FIFO_1__SIZE_1 0x00000008
4846 #define NV_PGRAPH_FFINTFC_FIFO_1_ARGUMENT 0xFFFFFFFF
4847 
4848 /* NV-Array NV_PGRAPH_FFINTFC_FIFO_2 (4 byte access) */
4849 #define NV_PGRAPH_FFINTFC_FIFO_2 0x004007E0
4850 /* NV-Array size NV_PGRAPH_FFINTFC_FIFO_2__SIZE_1 [0..7] */
4851 #define NV_PGRAPH_FFINTFC_FIFO_2__SIZE_1 0x00000008
4852 #define NV_PGRAPH_FFINTFC_FIFO_2_ARGUMENT 0xFFFFFFFF
4853 
4854 /* NV-Register NV_PGRAPH_FFINTFC_FIFO_PTR */
4855 #define NV_PGRAPH_FFINTFC_FIFO_PTR 0x00400760
4856 #define NV_PGRAPH_FFINTFC_FIFO_PTR_WRITE 0x0000000F
4857 #define NV_PGRAPH_FFINTFC_FIFO_PTR_WRITE_0 0x00000000
4858 #define NV_PGRAPH_FFINTFC_FIFO_PTR_READ 0x000000F0
4859 #define NV_PGRAPH_FFINTFC_FIFO_PTR_READ_0 0x00000000
4860 
4861 /* NV-Register NV_PGRAPH_FFINTFC_ST2 */
4862 #define NV_PGRAPH_FFINTFC_ST2 0x00400764
4863 #define NV_PGRAPH_FFINTFC_ST2_MTHD 0x00001FFC
4864 #define NV_PGRAPH_FFINTFC_ST2_MTHD_CTX_SWITCH 0x00000000
4865 #define NV_PGRAPH_FFINTFC_ST2_SUBCH 0x00070000
4866 #define NV_PGRAPH_FFINTFC_ST2_SUBCH_0 0x00000000
4867 #define NV_PGRAPH_FFINTFC_ST2_SUBCH_1 0x00010000
4868 #define NV_PGRAPH_FFINTFC_ST2_SUBCH_2 0x00020000
4869 #define NV_PGRAPH_FFINTFC_ST2_SUBCH_3 0x00030000
4870 #define NV_PGRAPH_FFINTFC_ST2_SUBCH_4 0x00040000
4871 #define NV_PGRAPH_FFINTFC_ST2_SUBCH_5 0x00050000
4872 #define NV_PGRAPH_FFINTFC_ST2_SUBCH_6 0x00060000
4873 #define NV_PGRAPH_FFINTFC_ST2_SUBCH_7 0x00070000
4874 #define NV_PGRAPH_FFINTFC_ST2_CHID 0x01F00000
4875 #define NV_PGRAPH_FFINTFC_ST2_CHID_0 0x00000000
4876 #define NV_PGRAPH_FFINTFC_ST2_CHID_1 0x00100000
4877 #define NV_PGRAPH_FFINTFC_ST2_CHID_2 0x00200000
4878 #define NV_PGRAPH_FFINTFC_ST2_CHID_3 0x00300000
4879 #define NV_PGRAPH_FFINTFC_ST2_CHID_4 0x00400000
4880 #define NV_PGRAPH_FFINTFC_ST2_CHID_5 0x00500000
4881 #define NV_PGRAPH_FFINTFC_ST2_CHID_6 0x00600000
4882 #define NV_PGRAPH_FFINTFC_ST2_CHID_7 0x00700000
4883 #define NV_PGRAPH_FFINTFC_ST2_CHID_8 0x00800000
4884 #define NV_PGRAPH_FFINTFC_ST2_CHID_9 0x00900000
4885 #define NV_PGRAPH_FFINTFC_ST2_CHID_10 0x00A00000
4886 #define NV_PGRAPH_FFINTFC_ST2_CHID_11 0x00B00000
4887 #define NV_PGRAPH_FFINTFC_ST2_CHID_12 0x00C00000
4888 #define NV_PGRAPH_FFINTFC_ST2_CHID_13 0x00D00000
4889 #define NV_PGRAPH_FFINTFC_ST2_CHID_14 0x00E00000
4890 #define NV_PGRAPH_FFINTFC_ST2_CHID_15 0x00F00000
4891 #define NV_PGRAPH_FFINTFC_ST2_CHID_16 0x01000000
4892 #define NV_PGRAPH_FFINTFC_ST2_CHID_17 0x01100000
4893 #define NV_PGRAPH_FFINTFC_ST2_CHID_18 0x01200000
4894 #define NV_PGRAPH_FFINTFC_ST2_CHID_19 0x01300000
4895 #define NV_PGRAPH_FFINTFC_ST2_CHID_20 0x01400000
4896 #define NV_PGRAPH_FFINTFC_ST2_CHID_21 0x01500000
4897 #define NV_PGRAPH_FFINTFC_ST2_CHID_22 0x01600000
4898 #define NV_PGRAPH_FFINTFC_ST2_CHID_23 0x01700000
4899 #define NV_PGRAPH_FFINTFC_ST2_CHID_24 0x01800000
4900 #define NV_PGRAPH_FFINTFC_ST2_CHID_25 0x01900000
4901 #define NV_PGRAPH_FFINTFC_ST2_CHID_26 0x01A00000
4902 #define NV_PGRAPH_FFINTFC_ST2_CHID_27 0x01B00000
4903 #define NV_PGRAPH_FFINTFC_ST2_CHID_28 0x01C00000
4904 #define NV_PGRAPH_FFINTFC_ST2_CHID_29 0x01D00000
4905 #define NV_PGRAPH_FFINTFC_ST2_CHID_30 0x01E00000
4906 #define NV_PGRAPH_FFINTFC_ST2_CHID_31 0x01F00000
4907 #define NV_PGRAPH_FFINTFC_ST2_DATAHIGH 0x02000000
4908 #define NV_PGRAPH_FFINTFC_ST2_DATAHIGH_INVALID 0xFDFFFFFF
4909 #define NV_PGRAPH_FFINTFC_ST2_DATAHIGH_VALID 0x02000000
4910 #define NV_PGRAPH_FFINTFC_ST2_STATUS 0x04000000
4911 #define NV_PGRAPH_FFINTFC_ST2_STATUS_INVALID 0xFBFFFFFF
4912 #define NV_PGRAPH_FFINTFC_ST2_STATUS_VALID 0x04000000
4913 #define NV_PGRAPH_FFINTFC_ST2_CHID_STATUS 0x08000000
4914 #define NV_PGRAPH_FFINTFC_ST2_CHID_STATUS_INVALID 0xF7FFFFFF
4915 #define NV_PGRAPH_FFINTFC_ST2_CHID_STATUS_VALID 0x08000000
4916 #define NV_PGRAPH_FFINTFC_ST2_CHSWITCH 0x10000000
4917 #define NV_PGRAPH_FFINTFC_ST2_CHSWITCH_CLEAR 0xEFFFFFFF
4918 #define NV_PGRAPH_FFINTFC_ST2_CHSWITCH_SET 0x10000000
4919 #define NV_PGRAPH_FFINTFC_ST2_FIFOHOLD 0x20000000
4920 #define NV_PGRAPH_FFINTFC_ST2_FIFOHOLD_CLEAR 0xDFFFFFFF
4921 #define NV_PGRAPH_FFINTFC_ST2_FIFOHOLD_SET 0x20000000
4922 #define NV_PGRAPH_FFINTFC_ST2_MODE 0x40000000
4923 #define NV_PGRAPH_FFINTFC_ST2_MODE_NONINCREMENTING 0xBFFFFFFF
4924 #define NV_PGRAPH_FFINTFC_ST2_MODE_INCREMENTING 0x40000000
4925 
4926 /* NV-Register NV_PGRAPH_FFINTFC_ST2_DL */
4927 #define NV_PGRAPH_FFINTFC_ST2_DL 0x00400768
4928 #define NV_PGRAPH_FFINTFC_ST2_DL_ARGUMENT 0xFFFFFFFF
4929 #define NV_PGRAPH_FFINTFC_ST2_DL_ARGUMENT_0 0x00000000
4930 
4931 /* NV-Register NV_PGRAPH_FFINTFC_ST2_DH */
4932 #define NV_PGRAPH_FFINTFC_ST2_DH 0x0040076C
4933 #define NV_PGRAPH_FFINTFC_ST2_DH_ARGUMENT 0xFFFFFFFF
4934 #define NV_PGRAPH_FFINTFC_ST2_DH_ARGUMENT_0 0x00000000
4935 
4936 /* NV-Register NV_PGRAPH_STATUS */
4937 #define NV_PGRAPH_STATUS 0x00400700
4938 #define NV_PGRAPH_STATUS_STATE 0x00000001
4939 #define NV_PGRAPH_STATUS_STATE_IDLE 0xFFFFFFFE
4940 #define NV_PGRAPH_STATUS_STATE_BUSY 0x00000001
4941 #define NV_PGRAPH_STATUS_FINE_RASTERIZER 0x00000002
4942 #define NV_PGRAPH_STATUS_FINE_RASTERIZER_IDLE 0xFFFFFFFD
4943 #define NV_PGRAPH_STATUS_FINE_RASTERIZER_BUSY 0x00000002
4944 #define NV_PGRAPH_STATUS_COARSE_RASTERIZER 0x00000004
4945 #define NV_PGRAPH_STATUS_COARSE_RASTERIZER_IDLE 0xFFFFFFFB
4946 #define NV_PGRAPH_STATUS_COARSE_RASTERIZER_BUSY 0x00000004
4947 #define NV_PGRAPH_STATUS_FE_3D 0x00000008
4948 #define NV_PGRAPH_STATUS_FE_3D_IDLE 0xFFFFFFF7
4949 #define NV_PGRAPH_STATUS_FE_3D_BUSY 0x00000008
4950 #define NV_PGRAPH_STATUS_FE_2D 0x00000010
4951 #define NV_PGRAPH_STATUS_FE_2D_IDLE 0xFFFFFFEF
4952 #define NV_PGRAPH_STATUS_FE_2D_BUSY 0x00000010
4953 #define NV_PGRAPH_STATUS_XY_LOGIC 0x00000020
4954 #define NV_PGRAPH_STATUS_XY_LOGIC_IDLE 0xFFFFFFDF
4955 #define NV_PGRAPH_STATUS_XY_LOGIC_BUSY 0x00000020
4956 #define NV_PGRAPH_STATUS_RASTERIZER_2D 0x00000080
4957 #define NV_PGRAPH_STATUS_RASTERIZER_2D_IDLE 0xFFFFFF7F
4958 #define NV_PGRAPH_STATUS_RASTERIZER_2D_BUSY 0x00000080
4959 #define NV_PGRAPH_STATUS_IDX 0x00000100
4960 #define NV_PGRAPH_STATUS_IDX_IDLE 0xFFFFFEFF
4961 #define NV_PGRAPH_STATUS_IDX_BUSY 0x00000100
4962 #define NV_PGRAPH_STATUS_XF 0x00000200
4963 #define NV_PGRAPH_STATUS_XF_IDLE 0xFFFFFDFF
4964 #define NV_PGRAPH_STATUS_XF_BUSY 0x00000200
4965 #define NV_PGRAPH_STATUS_VTX 0x00000400
4966 #define NV_PGRAPH_STATUS_VTX_IDLE 0xFFFFFBFF
4967 #define NV_PGRAPH_STATUS_VTX_BUSY 0x00000400
4968 #define NV_PGRAPH_STATUS_CAS 0x00000800
4969 #define NV_PGRAPH_STATUS_CAS_IDLE 0xFFFFF7FF
4970 #define NV_PGRAPH_STATUS_CAS_BUSY 0x00000800
4971 #define NV_PGRAPH_STATUS_PORT_NOTIFY 0x00001000
4972 #define NV_PGRAPH_STATUS_PORT_NOTIFY_IDLE 0xFFFFEFFF
4973 #define NV_PGRAPH_STATUS_PORT_NOTIFY_BUSY 0x00001000
4974 #define NV_PGRAPH_STATUS_SHADER 0x00002000
4975 #define NV_PGRAPH_STATUS_SHADER_IDLE 0xFFFFDFFF
4976 #define NV_PGRAPH_STATUS_SHADER_BUSY 0x00002000
4977 #define NV_PGRAPH_STATUS_SHADER_BE 0x00004000
4978 #define NV_PGRAPH_STATUS_SHADER_BE_IDLE 0xFFFFBFFF
4979 #define NV_PGRAPH_STATUS_SHADER_BE_BUSY 0x00004000
4980 #define NV_PGRAPH_STATUS_PORT_DMA 0x00010000
4981 #define NV_PGRAPH_STATUS_PORT_DMA_IDLE 0xFFFEFFFF
4982 #define NV_PGRAPH_STATUS_PORT_DMA_BUSY 0x00010000
4983 #define NV_PGRAPH_STATUS_DMA_ENGINE 0x00020000
4984 #define NV_PGRAPH_STATUS_DMA_ENGINE_IDLE 0xFFFDFFFF
4985 #define NV_PGRAPH_STATUS_DMA_ENGINE_BUSY 0x00020000
4986 #define NV_PGRAPH_STATUS_DMA_NOTIFY 0x00100000
4987 #define NV_PGRAPH_STATUS_DMA_NOTIFY_IDLE 0xFFEFFFFF
4988 #define NV_PGRAPH_STATUS_DMA_NOTIFY_BUSY 0x00100000
4989 #define NV_PGRAPH_STATUS_DMA_BUFFER_NOTIFY 0x00200000
4990 #define NV_PGRAPH_STATUS_DMA_BUFFER_NOTIFY_IDLE 0xFFDFFFFF
4991 #define NV_PGRAPH_STATUS_DMA_BUFFER_NOTIFY_BUSY 0x00200000
4992 #define NV_PGRAPH_STATUS_DMA_WARNING_NOTIFY 0x00400000
4993 #define NV_PGRAPH_STATUS_DMA_WARNING_NOTIFY_IDLE 0xFFBFFFFF
4994 #define NV_PGRAPH_STATUS_DMA_WARNING_NOTIFY_BUSY 0x00400000
4995 #define NV_PGRAPH_STATUS_ZCULL 0x00800000
4996 #define NV_PGRAPH_STATUS_ZCULL_IDLE 0xFF7FFFFF
4997 #define NV_PGRAPH_STATUS_ZCULL_BUSY 0x00800000
4998 #define NV_PGRAPH_STATUS_FDIFF 0x01000000
4999 #define NV_PGRAPH_STATUS_FDIFF_IDLE 0xFEFFFFFF
5000 #define NV_PGRAPH_STATUS_FDIFF_BUSY 0x01000000
5001 #define NV_PGRAPH_STATUS_SETUP 0x02000000
5002 #define NV_PGRAPH_STATUS_SETUP_IDLE 0xFDFFFFFF
5003 #define NV_PGRAPH_STATUS_SETUP_BUSY 0x02000000
5004 #define NV_PGRAPH_STATUS_CACHE 0x04000000
5005 #define NV_PGRAPH_STATUS_CACHE_IDLE 0xFBFFFFFF
5006 #define NV_PGRAPH_STATUS_CACHE_BUSY 0x04000000
5007 #define NV_PGRAPH_STATUS_COMBINER 0x08000000
5008 #define NV_PGRAPH_STATUS_COMBINER_IDLE 0xF7FFFFFF
5009 #define NV_PGRAPH_STATUS_COMBINER_BUSY 0x08000000
5010 #define NV_PGRAPH_STATUS_PREROP 0x10000000
5011 #define NV_PGRAPH_STATUS_PREROP_IDLE 0xEFFFFFFF
5012 #define NV_PGRAPH_STATUS_PREROP_BUSY 0x10000000
5013 #define NV_PGRAPH_STATUS_ROP 0x20000000
5014 #define NV_PGRAPH_STATUS_ROP_IDLE 0xDFFFFFFF
5015 #define NV_PGRAPH_STATUS_ROP_BUSY 0x20000000
5016 #define NV_PGRAPH_STATUS_PORT_USER 0x40000000
5017 #define NV_PGRAPH_STATUS_PORT_USER_IDLE 0xBFFFFFFF
5018 #define NV_PGRAPH_STATUS_PORT_USER_BUSY 0x40000000
5019 #define NV_PGRAPH_STATUS_PORT_FB 0x80000000
5020 #define NV_PGRAPH_STATUS_PORT_FB_IDLE 0x7FFFFFFF
5021 #define NV_PGRAPH_STATUS_PORT_FB_BUSY 0x80000000
5022 
5023 /* NV-Register NV_PGRAPH_TRAPPED_ADDR */
5024 #define NV_PGRAPH_TRAPPED_ADDR 0x00400704
5025 #define NV_PGRAPH_TRAPPED_ADDR_MTHD 0x00001FFC
5026 #define NV_PGRAPH_TRAPPED_ADDR_SUBCH 0x00070000
5027 #define NV_PGRAPH_TRAPPED_ADDR_CHID 0x01F00000
5028 #define NV_PGRAPH_TRAPPED_ADDR_DHV 0x10000000
5029 
5030 /* NV-Register NV_PGRAPH_TRAPPED_DATA_LOW */
5031 #define NV_PGRAPH_TRAPPED_DATA_LOW 0x00400708
5032 #define NV_PGRAPH_TRAPPED_DATA_LOW_VALUE 0xFFFFFFFF
5033 
5034 /* NV-Register NV_PGRAPH_TRAPPED_DATA_HIGH */
5035 #define NV_PGRAPH_TRAPPED_DATA_HIGH 0x0040070C
5036 #define NV_PGRAPH_TRAPPED_DATA_HIGH_VALUE 0xFFFFFFFF
5037 
5038 /* NV-Register NV_PGRAPH_SURFACE */
5039 #define NV_PGRAPH_SURFACE 0x00400710
5040 #define NV_PGRAPH_SURFACE_TYPE 0x00000003
5041 #define NV_PGRAPH_SURFACE_TYPE_INVALID 0x00000000
5042 #define NV_PGRAPH_SURFACE_TYPE_NON_SWIZZLE 0x00000001
5043 #define NV_PGRAPH_SURFACE_TYPE_SWIZZLE 0x00000002
5044 #define NV_PGRAPH_SURFACE_TYPE_053 0x00000001
5045 #define NV_PGRAPH_SURFACE_ANTIALIASING 0x00000030
5046 #define NV_PGRAPH_SURFACE_ANTIALIASING_CENTER_1 0x00000000
5047 #define NV_PGRAPH_SURFACE_ANTIALIASING_CENTER_CORNER_2 0x00000010
5048 #define NV_PGRAPH_SURFACE_ANTIALIASING_SQUARE_OFFSET_4 0x00000020
5049 #define NV_PGRAPH_SURFACE_WRITE_3D 0x00700000
5050 #define NV_PGRAPH_SURFACE_WRITE_3D_0 0x00000000
5051 #define NV_PGRAPH_SURFACE_READ_3D 0x07000000
5052 #define NV_PGRAPH_SURFACE_READ_3D_0 0x00000000
5053 #define NV_PGRAPH_SURFACE_MODULO_3D 0x70000000
5054 #define NV_PGRAPH_SURFACE_MODULO_3D_0 0x00000000
5055 
5056 /* NV-Register NV_PGRAPH_INCREMENT */
5057 #define NV_PGRAPH_INCREMENT 0x0040071C
5058 #define NV_PGRAPH_INCREMENT_READ_3D 0x00000002
5059 #define NV_PGRAPH_INCREMENT_READ_3D_IGNORE 0xFFFFFFFD
5060 #define NV_PGRAPH_INCREMENT_READ_3D_TRIGGER 0x00000002
5061 
5062 /* NV-Register NV_PGRAPH_NOTIFY */
5063 #define NV_PGRAPH_NOTIFY 0x00400718
5064 #define NV_PGRAPH_NOTIFY_BUFFER_REQ 0x00000001
5065 #define NV_PGRAPH_NOTIFY_BUFFER_REQ_NOT_PENDING 0xFFFFFFFE
5066 #define NV_PGRAPH_NOTIFY_BUFFER_REQ_PENDING 0x00000001
5067 #define NV_PGRAPH_NOTIFY_BUFFER_STYLE 0x00000100
5068 #define NV_PGRAPH_NOTIFY_BUFFER_STYLE_WRITE_ONLY 0xFFFFFEFF
5069 #define NV_PGRAPH_NOTIFY_BUFFER_STYLE_WRITE_THEN_AWAKEN 0x00000100
5070 #define NV_PGRAPH_NOTIFY_REQ 0x00010000
5071 #define NV_PGRAPH_NOTIFY_REQ_NOT_PENDING 0xFFFEFFFF
5072 #define NV_PGRAPH_NOTIFY_REQ_PENDING 0x00010000
5073 #define NV_PGRAPH_NOTIFY_STYLE 0x00100000
5074 #define NV_PGRAPH_NOTIFY_STYLE_WRITE_ONLY 0xFFEFFFFF
5075 #define NV_PGRAPH_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00100000
5076 #define NV_PGRAPH_NOTIFY_WARNING_REQ 0x01000000
5077 #define NV_PGRAPH_NOTIFY_WARNING_REQ_NOT_PENDING 0xFEFFFFFF
5078 #define NV_PGRAPH_NOTIFY_WARNING_REQ_PENDING 0x01000000
5079 #define NV_PGRAPH_NOTIFY_WARNING_STYLE 0x02000000
5080 #define NV_PGRAPH_NOTIFY_WARNING_STYLE_WRITE_ONLY 0xFDFFFFFF
5081 #define NV_PGRAPH_NOTIFY_WARNING_STYLE_WRITE_THEN_AWAKEN 0x02000000
5082 #define NV_PGRAPH_NOTIFY_WARNING_STATUS 0x70000000
5083 #define NV_PGRAPH_NOTIFY_WARNING_STATUS_NO_WARNING 0x00000000
5084 #define NV_PGRAPH_NOTIFY_WARNING_STATUS_INVALID_ENUM 0x10000000
5085 #define NV_PGRAPH_NOTIFY_WARNING_STATUS_INVALID_VALUE 0x20000000
5086 #define NV_PGRAPH_NOTIFY_WARNING_STATUS_INVALID_OP 0x40000000
5087 
5088 /* NV-Array NV_PGRAPH_BOFFSET (4 byte access) */
5089 #define NV_PGRAPH_BOFFSET 0x00400640
5090 /* NV-Array size NV_PGRAPH_BOFFSET__SIZE_1 [0..5] */
5091 #define NV_PGRAPH_BOFFSET__SIZE_1 0x00000006
5092 #define NV_PGRAPH_BOFFSET_LINADRS 0x1FFFFFFF
5093 #define NV_PGRAPH_BOFFSET_LINADRS_0 0x00000000
5094 
5095 /* NV-Register NV_PGRAPH_BOFFSET0 */
5096 #define NV_PGRAPH_BOFFSET0 0x00400640
5097 /* Alias NV_PGRAPH_BOFFSET */
5098 #define NV_PGRAPH_BOFFSET0_LINADRS 0x1FFFFFFF
5099 #define NV_PGRAPH_BOFFSET0_LINADRS_0 0x00000000
5100 #define NV_PGRAPH_BOFFSET0_LINADRS_042 0x00000000
5101 #define NV_PGRAPH_BOFFSET0_LINADRS_058 0x00000000
5102 
5103 /* NV-Register NV_PGRAPH_BOFFSET1 */
5104 #define NV_PGRAPH_BOFFSET1 0x00400644
5105 /* Alias NV_PGRAPH_BOFFSET */
5106 #define NV_PGRAPH_BOFFSET1_LINADRS 0x1FFFFFFF
5107 #define NV_PGRAPH_BOFFSET1_LINADRS_0 0x00000000
5108 #define NV_PGRAPH_BOFFSET1_LINADRS_042 0x00000000
5109 #define NV_PGRAPH_BOFFSET1_LINADRS_059 0x00000000
5110 
5111 /* NV-Register NV_PGRAPH_BOFFSET2 */
5112 #define NV_PGRAPH_BOFFSET2 0x00400648
5113 /* Alias NV_PGRAPH_BOFFSET */
5114 #define NV_PGRAPH_BOFFSET2_LINADRS 0x1FFFFFFF
5115 #define NV_PGRAPH_BOFFSET2_LINADRS_0 0x00000000
5116 #define NV_PGRAPH_BOFFSET2_LINADRS_053 0x00000000
5117 #define NV_PGRAPH_BOFFSET2_LINADRS_05A 0x00000000
5118 
5119 /* NV-Register NV_PGRAPH_BOFFSET3 */
5120 #define NV_PGRAPH_BOFFSET3 0x0040064C
5121 /* Alias NV_PGRAPH_BOFFSET */
5122 #define NV_PGRAPH_BOFFSET3_LINADRS 0x1FFFFFFF
5123 #define NV_PGRAPH_BOFFSET3_LINADRS_0 0x00000000
5124 #define NV_PGRAPH_BOFFSET3_LINADRS_053 0x00000000
5125 #define NV_PGRAPH_BOFFSET3_LINADRS_05B 0x00000000
5126 
5127 /* NV-Register NV_PGRAPH_BOFFSET4 */
5128 #define NV_PGRAPH_BOFFSET4 0x00400650
5129 /* Alias NV_PGRAPH_BOFFSET */
5130 #define NV_PGRAPH_BOFFSET4_LINADRS 0x1FFFFFFF
5131 #define NV_PGRAPH_BOFFSET4_LINADRS_0 0x00000000
5132 
5133 /* NV-Register NV_PGRAPH_BOFFSET5 */
5134 #define NV_PGRAPH_BOFFSET5 0x00400654
5135 /* Alias NV_PGRAPH_BOFFSET */
5136 #define NV_PGRAPH_BOFFSET5_LINADRS 0x1FFFFFFF
5137 #define NV_PGRAPH_BOFFSET5_LINADRS_0 0x00000000
5138 #define NV_PGRAPH_BOFFSET5_LINADRS_052 0x00000000
5139 
5140 /* NV-Array NV_PGRAPH_BBASE (4 byte access) */
5141 #define NV_PGRAPH_BBASE 0x00400658
5142 /* NV-Array size NV_PGRAPH_BBASE__SIZE_1 [0..5] */
5143 #define NV_PGRAPH_BBASE__SIZE_1 0x00000006
5144 #define NV_PGRAPH_BBASE_LINADRS 0x1FFFFFFF
5145 #define NV_PGRAPH_BBASE_LINADRS_0 0x00000000
5146 
5147 /* NV-Register NV_PGRAPH_BBASE0 */
5148 #define NV_PGRAPH_BBASE0 0x00400658
5149 /* Alias NV_PGRAPH_BBASE */
5150 #define NV_PGRAPH_BBASE0_LINADRS 0x1FFFFFFF
5151 #define NV_PGRAPH_BBASE0_LINADRS_0 0x00000000
5152 
5153 /* NV-Register NV_PGRAPH_BBASE1 */
5154 #define NV_PGRAPH_BBASE1 0x0040065C
5155 /* Alias NV_PGRAPH_BBASE */
5156 #define NV_PGRAPH_BBASE1_LINADRS 0x1FFFFFFF
5157 #define NV_PGRAPH_BBASE1_LINADRS_0 0x00000000
5158 
5159 /* NV-Register NV_PGRAPH_BBASE2 */
5160 #define NV_PGRAPH_BBASE2 0x00400660
5161 /* Alias NV_PGRAPH_BBASE */
5162 #define NV_PGRAPH_BBASE2_LINADRS 0x1FFFFFFF
5163 #define NV_PGRAPH_BBASE2_LINADRS_0 0x00000000
5164 
5165 /* NV-Register NV_PGRAPH_BBASE3 */
5166 #define NV_PGRAPH_BBASE3 0x00400664
5167 /* Alias NV_PGRAPH_BBASE */
5168 #define NV_PGRAPH_BBASE3_LINADRS 0x1FFFFFFF
5169 #define NV_PGRAPH_BBASE3_LINADRS_0 0x00000000
5170 
5171 /* NV-Register NV_PGRAPH_BBASE4 */
5172 #define NV_PGRAPH_BBASE4 0x00400668
5173 /* Alias NV_PGRAPH_BBASE */
5174 #define NV_PGRAPH_BBASE4_LINADRS 0x1FFFFFFF
5175 #define NV_PGRAPH_BBASE4_LINADRS_0 0x00000000
5176 
5177 /* NV-Register NV_PGRAPH_BBASE5 */
5178 #define NV_PGRAPH_BBASE5 0x0040066C
5179 /* Alias NV_PGRAPH_BBASE */
5180 #define NV_PGRAPH_BBASE5_LINADRS 0x1FFFFFFF
5181 #define NV_PGRAPH_BBASE5_LINADRS_0 0x00000000
5182 
5183 /* NV-Array NV_PGRAPH_BPITCH (4 byte access) */
5184 #define NV_PGRAPH_BPITCH 0x00400670
5185 /* NV-Array size NV_PGRAPH_BPITCH__SIZE_1 [0..4] */
5186 #define NV_PGRAPH_BPITCH__SIZE_1 0x00000005
5187 #define NV_PGRAPH_BPITCH_VALUE 0x0000FFFF
5188 #define NV_PGRAPH_BPITCH_VALUE_0 0x00000000
5189 
5190 /* NV-Register NV_PGRAPH_BPITCH0 */
5191 #define NV_PGRAPH_BPITCH0 0x00400670
5192 /* Alias NV_PGRAPH_BPITCH */
5193 #define NV_PGRAPH_BPITCH0_VALUE 0x0000FFFF
5194 #define NV_PGRAPH_BPITCH0_VALUE_0 0x00000000
5195 #define NV_PGRAPH_BPITCH0_VALUE_042 0x00000020
5196 #define NV_PGRAPH_BPITCH0_VALUE_058 0x00000010
5197 
5198 /* NV-Register NV_PGRAPH_BPITCH1 */
5199 #define NV_PGRAPH_BPITCH1 0x00400674
5200 /* Alias NV_PGRAPH_BPITCH */
5201 #define NV_PGRAPH_BPITCH1_VALUE 0x0000FFFF
5202 #define NV_PGRAPH_BPITCH1_VALUE_0 0x00000000
5203 #define NV_PGRAPH_BPITCH1_VALUE_042 0x00000020
5204 #define NV_PGRAPH_BPITCH1_VALUE_059 0x00000010
5205 
5206 /* NV-Register NV_PGRAPH_BPITCH2 */
5207 #define NV_PGRAPH_BPITCH2 0x00400678
5208 /* Alias NV_PGRAPH_BPITCH */
5209 #define NV_PGRAPH_BPITCH2_VALUE 0x0000FFFF
5210 #define NV_PGRAPH_BPITCH2_VALUE_0 0x00000000
5211 #define NV_PGRAPH_BPITCH2_VALUE_053 0x00000020
5212 #define NV_PGRAPH_BPITCH2_VALUE_05A 0x00000010
5213 
5214 /* NV-Register NV_PGRAPH_BPITCH3 */
5215 #define NV_PGRAPH_BPITCH3 0x0040067C
5216 /* Alias NV_PGRAPH_BPITCH */
5217 #define NV_PGRAPH_BPITCH3_VALUE 0x0000FFFF
5218 #define NV_PGRAPH_BPITCH3_VALUE_0 0x00000000
5219 #define NV_PGRAPH_BPITCH3_VALUE_053 0x00000020
5220 #define NV_PGRAPH_BPITCH3_VALUE_05B 0x00000010
5221 
5222 /* NV-Register NV_PGRAPH_BPITCH4 */
5223 #define NV_PGRAPH_BPITCH4 0x00400680
5224 /* Alias NV_PGRAPH_BPITCH */
5225 #define NV_PGRAPH_BPITCH4_VALUE 0x0000FFFF
5226 #define NV_PGRAPH_BPITCH4_VALUE_0 0x00000000
5227 
5228 /* NV-Array NV_PGRAPH_BLIMIT (4 byte access) */
5229 #define NV_PGRAPH_BLIMIT 0x00400684
5230 /* NV-Array size NV_PGRAPH_BLIMIT__SIZE_1 [0..5] */
5231 #define NV_PGRAPH_BLIMIT__SIZE_1 0x00000006
5232 #define NV_PGRAPH_BLIMIT_VALUE 0x1FFFFFFF
5233 #define NV_PGRAPH_BLIMIT_ADDRESSING 0x40000000
5234 #define NV_PGRAPH_BLIMIT_ADDRESSING_LINEAR 0xBFFFFFFF
5235 #define NV_PGRAPH_BLIMIT_ADDRESSING_TILED 0x40000000
5236 #define NV_PGRAPH_BLIMIT_TYPE 0x80000000
5237 #define NV_PGRAPH_BLIMIT_TYPE_IN_MEMORY 0x7FFFFFFF
5238 #define NV_PGRAPH_BLIMIT_TYPE_NULL 0x80000000
5239 
5240 /* NV-Register NV_PGRAPH_BLIMIT0 */
5241 #define NV_PGRAPH_BLIMIT0 0x00400684
5242 /* Alias NV_PGRAPH_BLIMIT */
5243 #define NV_PGRAPH_BLIMIT0_VALUE 0x1FFFFFFF
5244 #define NV_PGRAPH_BLIMIT0_ADDRESSING 0x40000000
5245 #define NV_PGRAPH_BLIMIT0_ADDRESSING_LINEAR 0xBFFFFFFF
5246 #define NV_PGRAPH_BLIMIT0_ADDRESSING_TILED 0x40000000
5247 #define NV_PGRAPH_BLIMIT0_TYPE 0x80000000
5248 #define NV_PGRAPH_BLIMIT0_TYPE_IN_MEMORY 0x7FFFFFFF
5249 #define NV_PGRAPH_BLIMIT0_TYPE_NULL 0x80000000
5250 
5251 /* NV-Register NV_PGRAPH_BLIMIT1 */
5252 #define NV_PGRAPH_BLIMIT1 0x00400688
5253 /* Alias NV_PGRAPH_BLIMIT */
5254 #define NV_PGRAPH_BLIMIT1_VALUE 0x1FFFFFFF
5255 #define NV_PGRAPH_BLIMIT1_ADDRESSING 0x40000000
5256 #define NV_PGRAPH_BLIMIT1_ADDRESSING_LINEAR 0xBFFFFFFF
5257 #define NV_PGRAPH_BLIMIT1_ADDRESSING_TILED 0x40000000
5258 #define NV_PGRAPH_BLIMIT1_TYPE 0x80000000
5259 #define NV_PGRAPH_BLIMIT1_TYPE_IN_MEMORY 0x7FFFFFFF
5260 #define NV_PGRAPH_BLIMIT1_TYPE_NULL 0x80000000
5261 
5262 /* NV-Register NV_PGRAPH_BLIMIT2 */
5263 #define NV_PGRAPH_BLIMIT2 0x0040068C
5264 /* Alias NV_PGRAPH_BLIMIT */
5265 #define NV_PGRAPH_BLIMIT2_VALUE 0x1FFFFFFF
5266 #define NV_PGRAPH_BLIMIT2_ADDRESSING 0x40000000
5267 #define NV_PGRAPH_BLIMIT2_ADDRESSING_LINEAR 0xBFFFFFFF
5268 #define NV_PGRAPH_BLIMIT2_ADDRESSING_TILED 0x40000000
5269 #define NV_PGRAPH_BLIMIT2_TYPE 0x80000000
5270 #define NV_PGRAPH_BLIMIT2_TYPE_IN_MEMORY 0x7FFFFFFF
5271 #define NV_PGRAPH_BLIMIT2_TYPE_NULL 0x80000000
5272 
5273 /* NV-Register NV_PGRAPH_BLIMIT3 */
5274 #define NV_PGRAPH_BLIMIT3 0x00400690
5275 /* Alias NV_PGRAPH_BLIMIT */
5276 #define NV_PGRAPH_BLIMIT3_VALUE 0x1FFFFFFF
5277 #define NV_PGRAPH_BLIMIT3_ADDRESSING 0x40000000
5278 #define NV_PGRAPH_BLIMIT3_ADDRESSING_LINEAR 0xBFFFFFFF
5279 #define NV_PGRAPH_BLIMIT3_ADDRESSING_TILED 0x40000000
5280 #define NV_PGRAPH_BLIMIT3_TYPE 0x80000000
5281 #define NV_PGRAPH_BLIMIT3_TYPE_IN_MEMORY 0x7FFFFFFF
5282 #define NV_PGRAPH_BLIMIT3_TYPE_NULL 0x80000000
5283 
5284 /* NV-Register NV_PGRAPH_BLIMIT4 */
5285 #define NV_PGRAPH_BLIMIT4 0x00400694
5286 /* Alias NV_PGRAPH_BLIMIT */
5287 #define NV_PGRAPH_BLIMIT4_VALUE 0x1FFFFFFF
5288 #define NV_PGRAPH_BLIMIT4_ADDRESSING 0x40000000
5289 #define NV_PGRAPH_BLIMIT4_ADDRESSING_LINEAR 0xBFFFFFFF
5290 #define NV_PGRAPH_BLIMIT4_ADDRESSING_TILED 0x40000000
5291 #define NV_PGRAPH_BLIMIT4_TYPE 0x80000000
5292 #define NV_PGRAPH_BLIMIT4_TYPE_IN_MEMORY 0x7FFFFFFF
5293 #define NV_PGRAPH_BLIMIT4_TYPE_NULL 0x80000000
5294 
5295 /* NV-Register NV_PGRAPH_BLIMIT5 */
5296 #define NV_PGRAPH_BLIMIT5 0x00400698
5297 /* Alias NV_PGRAPH_BLIMIT */
5298 #define NV_PGRAPH_BLIMIT5_VALUE 0x1FFFFFFF
5299 #define NV_PGRAPH_BLIMIT5_ADDRESSING 0x40000000
5300 #define NV_PGRAPH_BLIMIT5_ADDRESSING_LINEAR 0xBFFFFFFF
5301 #define NV_PGRAPH_BLIMIT5_ADDRESSING_TILED 0x40000000
5302 #define NV_PGRAPH_BLIMIT5_TYPE 0x80000000
5303 #define NV_PGRAPH_BLIMIT5_TYPE_IN_MEMORY 0x7FFFFFFF
5304 #define NV_PGRAPH_BLIMIT5_TYPE_NULL 0x80000000
5305 
5306 /* NV-Register NV_PGRAPH_BSWIZZLE2 */
5307 #define NV_PGRAPH_BSWIZZLE2 0x0040069C
5308 #define NV_PGRAPH_BSWIZZLE2_WIDTH 0x000F0000
5309 #define NV_PGRAPH_BSWIZZLE2_WIDTH_0 0x00000000
5310 #define NV_PGRAPH_BSWIZZLE2_WIDTH_MAX 0x000B0000
5311 #define NV_PGRAPH_BSWIZZLE2_WIDTH_053 0x00000000
5312 #define NV_PGRAPH_BSWIZZLE2_HEIGHT 0x0F000000
5313 #define NV_PGRAPH_BSWIZZLE2_HEIGHT_0 0x00000000
5314 #define NV_PGRAPH_BSWIZZLE2_HEIGHT_MAX 0x0B000000
5315 #define NV_PGRAPH_BSWIZZLE2_HEIGHT_053 0x00000000
5316 
5317 /* NV-Register NV_PGRAPH_BSWIZZLE5 */
5318 #define NV_PGRAPH_BSWIZZLE5 0x004006A0
5319 #define NV_PGRAPH_BSWIZZLE5_WIDTH 0x000F0000
5320 #define NV_PGRAPH_BSWIZZLE5_WIDTH_0 0x00000000
5321 #define NV_PGRAPH_BSWIZZLE5_WIDTH_052 0x00000000
5322 #define NV_PGRAPH_BSWIZZLE5_HEIGHT 0x0F000000
5323 #define NV_PGRAPH_BSWIZZLE5_HEIGHT_0 0x00000000
5324 #define NV_PGRAPH_BSWIZZLE5_HEIGHT_052 0x00000000
5325 
5326 /* NV-Array NV_PGRAPH_TILE (16 byte access) */
5327 #define NV_PGRAPH_TILE 0x00400B00
5328 /* NV-Array size NV_PGRAPH_TILE__SIZE_1 [0..7] */
5329 #define NV_PGRAPH_TILE__SIZE_1 0x00000008
5330 #define NV_PGRAPH_TILE_REGION 0x00000001
5331 #define NV_PGRAPH_TILE_REGION_INVALID 0xFFFFFFFE
5332 #define NV_PGRAPH_TILE_REGION_VALID 0x00000001
5333 #define NV_PGRAPH_TILE_BANK0_SENSE 0x00000002
5334 #define NV_PGRAPH_TILE_BANK0_SENSE_0 0xFFFFFFFD
5335 #define NV_PGRAPH_TILE_BANK0_SENSE_1 0x00000002
5336 #define NV_PGRAPH_TILE_ADR 0xFFFFC000
5337 
5338 /* NV-Array NV_PGRAPH_TLIMIT (16 byte access) */
5339 #define NV_PGRAPH_TLIMIT 0x00400B04
5340 /* NV-Array size NV_PGRAPH_TLIMIT__SIZE_1 [0..7] */
5341 #define NV_PGRAPH_TLIMIT__SIZE_1 0x00000008
5342 #define NV_PGRAPH_TLIMIT_ADR 0xFFFFC000
5343 
5344 /* NV-Array NV_PGRAPH_TSIZE (16 byte access) */
5345 #define NV_PGRAPH_TSIZE 0x00400B08
5346 /* NV-Array size NV_PGRAPH_TSIZE__SIZE_1 [0..7] */
5347 #define NV_PGRAPH_TSIZE__SIZE_1 0x00000008
5348 #define NV_PGRAPH_TSIZE_PITCH 0x0000FF00
5349 
5350 /* NV-Array NV_PGRAPH_TSTATUS (16 byte access) */
5351 #define NV_PGRAPH_TSTATUS 0x00400B0C
5352 /* NV-Array size NV_PGRAPH_TSTATUS__SIZE_1 [0..7] */
5353 #define NV_PGRAPH_TSTATUS__SIZE_1 0x00000008
5354 #define NV_PGRAPH_TSTATUS_PRIME 0x00000003
5355 #define NV_PGRAPH_TSTATUS_FACTOR 0x00000070
5356 #define NV_PGRAPH_TSTATUS_REGION 0x80000000
5357 
5358 /* NV-Register NV_PGRAPH_BPIXEL */
5359 #define NV_PGRAPH_BPIXEL 0x00400724
5360 #define NV_PGRAPH_BPIXEL_DEPTH0 0x0000000F
5361 #define NV_PGRAPH_BPIXEL_DEPTH0_INVALID 0x00000000
5362 #define NV_PGRAPH_BPIXEL_DEPTH0_Y8 0x00000001
5363 #define NV_PGRAPH_BPIXEL_DEPTH0_X1R5G5B5_Z1R5G5B5 0x00000002
5364 #define NV_PGRAPH_BPIXEL_DEPTH0_X1R5G5B5_O1R5G5B5 0x00000003
5365 #define NV_PGRAPH_BPIXEL_DEPTH0_A1R5G5B5 0x00000004
5366 #define NV_PGRAPH_BPIXEL_DEPTH0_R5G6B5 0x00000005
5367 #define NV_PGRAPH_BPIXEL_DEPTH0_Y16 0x00000006
5368 #define NV_PGRAPH_BPIXEL_DEPTH0_X8R8G8B8_Z8R8G8B8 0x00000007
5369 #define NV_PGRAPH_BPIXEL_DEPTH0_X8R8G8B8_O1Z7R8G8B8 0x00000008
5370 #define NV_PGRAPH_BPIXEL_DEPTH0_X1A7R8G8B8_Z1A7R8G8B8 0x00000009
5371 #define NV_PGRAPH_BPIXEL_DEPTH0_X1A7R8G8B8_O1A7R8G8B8 0x0000000A
5372 #define NV_PGRAPH_BPIXEL_DEPTH0_X8R8G8B8_O8R8G8B8 0x0000000B
5373 #define NV_PGRAPH_BPIXEL_DEPTH0_A8R8G8B8 0x0000000C
5374 #define NV_PGRAPH_BPIXEL_DEPTH0_Y32 0x0000000D
5375 #define NV_PGRAPH_BPIXEL_DEPTH0_V8YB8U8YA8 0x0000000E
5376 #define NV_PGRAPH_BPIXEL_DEPTH0_YB8V8YA8U8 0x0000000F
5377 #define NV_PGRAPH_BPIXEL_DEPTH0_042 0x00000001
5378 #define NV_PGRAPH_BPIXEL_DEPTH0_058 0x00000001
5379 #define NV_PGRAPH_BPIXEL_DEPTH1 0x000000F0
5380 #define NV_PGRAPH_BPIXEL_DEPTH1_INVALID 0x00000000
5381 #define NV_PGRAPH_BPIXEL_DEPTH1_Y8 0x00000010
5382 #define NV_PGRAPH_BPIXEL_DEPTH1_X1R5G5B5_Z1R5G5B5 0x00000020
5383 #define NV_PGRAPH_BPIXEL_DEPTH1_X1R5G5B5_O1R5G5B5 0x00000030
5384 #define NV_PGRAPH_BPIXEL_DEPTH1_A1R5G5B5 0x00000040
5385 #define NV_PGRAPH_BPIXEL_DEPTH1_R5G6B5 0x00000050
5386 #define NV_PGRAPH_BPIXEL_DEPTH1_Y16 0x00000060
5387 #define NV_PGRAPH_BPIXEL_DEPTH1_X8R8G8B8_Z8R8G8B8 0x00000070
5388 #define NV_PGRAPH_BPIXEL_DEPTH1_X8R8G8B8_O1Z7R8G8B8 0x00000080
5389 #define NV_PGRAPH_BPIXEL_DEPTH1_X1A7R8G8B8_Z1A7R8G8B8 0x00000090
5390 #define NV_PGRAPH_BPIXEL_DEPTH1_X1A7R8G8B8_O1A7R8G8B8 0x000000A0
5391 #define NV_PGRAPH_BPIXEL_DEPTH1_X8R8G8B8_O8R8G8B8 0x000000B0
5392 #define NV_PGRAPH_BPIXEL_DEPTH1_A8R8G8B8 0x000000C0
5393 #define NV_PGRAPH_BPIXEL_DEPTH1_Y32 0x000000D0
5394 #define NV_PGRAPH_BPIXEL_DEPTH1_V8YB8U8YA8 0x000000E0
5395 #define NV_PGRAPH_BPIXEL_DEPTH1_YB8V8YA8U8 0x000000F0
5396 #define NV_PGRAPH_BPIXEL_DEPTH1_059 0x00000010
5397 #define NV_PGRAPH_BPIXEL_DEPTH2 0x00000F00
5398 #define NV_PGRAPH_BPIXEL_DEPTH2_INVALID 0x00000000
5399 #define NV_PGRAPH_BPIXEL_DEPTH2_Y8 0x00000100
5400 #define NV_PGRAPH_BPIXEL_DEPTH2_X1R5G5B5_Z1R5G5B5 0x00000200
5401 #define NV_PGRAPH_BPIXEL_DEPTH2_X1R5G5B5_O1R5G5B5 0x00000300
5402 #define NV_PGRAPH_BPIXEL_DEPTH2_A1R5G5B5 0x00000400
5403 #define NV_PGRAPH_BPIXEL_DEPTH2_R5G6B5 0x00000500
5404 #define NV_PGRAPH_BPIXEL_DEPTH2_Y16 0x00000600
5405 #define NV_PGRAPH_BPIXEL_DEPTH2_X8R8G8B8_Z8R8G8B8 0x00000700
5406 #define NV_PGRAPH_BPIXEL_DEPTH2_X8R8G8B8_O1Z7R8G8B8 0x00000800
5407 #define NV_PGRAPH_BPIXEL_DEPTH2_X1A7R8G8B8_Z1A7R8G8B8 0x00000900
5408 #define NV_PGRAPH_BPIXEL_DEPTH2_X1A7R8G8B8_O1A7R8G8B8 0x00000A00
5409 #define NV_PGRAPH_BPIXEL_DEPTH2_X8R8G8B8_O8R8G8B8 0x00000B00
5410 #define NV_PGRAPH_BPIXEL_DEPTH2_A8R8G8B8 0x00000C00
5411 #define NV_PGRAPH_BPIXEL_DEPTH2_Y32 0x00000D00
5412 #define NV_PGRAPH_BPIXEL_DEPTH2_V8YB8U8YA8 0x00000E00
5413 #define NV_PGRAPH_BPIXEL_DEPTH2_YB8V8YA8U8 0x00000F00
5414 #define NV_PGRAPH_BPIXEL_DEPTH2_053 0x00000200
5415 #define NV_PGRAPH_BPIXEL_DEPTH2_05A 0x00000200
5416 #define NV_PGRAPH_BPIXEL_DEPTH3 0x0000F000
5417 #define NV_PGRAPH_BPIXEL_DEPTH3_INVALID 0x00000000
5418 #define NV_PGRAPH_BPIXEL_DEPTH3_Z16 0x00001000
5419 #define NV_PGRAPH_BPIXEL_DEPTH3_Z24S8 0x00002000
5420 #define NV_PGRAPH_BPIXEL_DEPTH3_05B 0x00002000
5421 #define NV_PGRAPH_BPIXEL_DEPTH4 0x000F0000
5422 #define NV_PGRAPH_BPIXEL_DEPTH4_INVALID 0x00000000
5423 #define NV_PGRAPH_BPIXEL_DEPTH4_Y8 0x00010000
5424 #define NV_PGRAPH_BPIXEL_DEPTH4_X1R5G5B5_Z1R5G5B5 0x00020000
5425 #define NV_PGRAPH_BPIXEL_DEPTH4_X1R5G5B5_O1R5G5B5 0x00030000
5426 #define NV_PGRAPH_BPIXEL_DEPTH4_A1R5G5B5 0x00040000
5427 #define NV_PGRAPH_BPIXEL_DEPTH4_R5G6B5 0x00050000
5428 #define NV_PGRAPH_BPIXEL_DEPTH4_Y16 0x00060000
5429 #define NV_PGRAPH_BPIXEL_DEPTH4_X8R8G8B8_Z8R8G8B8 0x00070000
5430 #define NV_PGRAPH_BPIXEL_DEPTH4_X8R8G8B8_O1Z7R8G8B8 0x00080000
5431 #define NV_PGRAPH_BPIXEL_DEPTH4_X1A7R8G8B8_Z1A7R8G8B8 0x00090000
5432 #define NV_PGRAPH_BPIXEL_DEPTH4_X1A7R8G8B8_O1A7R8G8B8 0x000A0000
5433 #define NV_PGRAPH_BPIXEL_DEPTH4_X8R8G8B8_O8R8G8B8 0x000B0000
5434 #define NV_PGRAPH_BPIXEL_DEPTH4_A8R8G8B8 0x000C0000
5435 #define NV_PGRAPH_BPIXEL_DEPTH4_Y32 0x000D0000
5436 #define NV_PGRAPH_BPIXEL_DEPTH4_V8YB8U8YA8 0x000E0000
5437 #define NV_PGRAPH_BPIXEL_DEPTH4_YB8V8YA8U8 0x000F0000
5438 #define NV_PGRAPH_BPIXEL_DEPTH5 0x00F00000
5439 #define NV_PGRAPH_BPIXEL_DEPTH5_INVALID 0x00000000
5440 #define NV_PGRAPH_BPIXEL_DEPTH5_Y8 0x00100000
5441 #define NV_PGRAPH_BPIXEL_DEPTH5_X1R5G5B5_Z1R5G5B5 0x00200000
5442 #define NV_PGRAPH_BPIXEL_DEPTH5_X1R5G5B5_O1R5G5B5 0x00300000
5443 #define NV_PGRAPH_BPIXEL_DEPTH5_A1R5G5B5 0x00400000
5444 #define NV_PGRAPH_BPIXEL_DEPTH5_R5G6B5 0x00500000
5445 #define NV_PGRAPH_BPIXEL_DEPTH5_Y16 0x00600000
5446 #define NV_PGRAPH_BPIXEL_DEPTH5_X8R8G8B8_Z8R8G8B8 0x00700000
5447 #define NV_PGRAPH_BPIXEL_DEPTH5_X8R8G8B8_O1Z7R8G8B8 0x00800000
5448 #define NV_PGRAPH_BPIXEL_DEPTH5_X1A7R8G8B8_Z1A7R8G8B8 0x00900000
5449 #define NV_PGRAPH_BPIXEL_DEPTH5_X1A7R8G8B8_O1A7R8G8B8 0x00A00000
5450 #define NV_PGRAPH_BPIXEL_DEPTH5_X8R8G8B8_O8R8G8B8 0x00B00000
5451 #define NV_PGRAPH_BPIXEL_DEPTH5_A8R8G8B8 0x00C00000
5452 #define NV_PGRAPH_BPIXEL_DEPTH5_Y32 0x00D00000
5453 #define NV_PGRAPH_BPIXEL_DEPTH5_V8YB8U8YA8 0x00E00000
5454 #define NV_PGRAPH_BPIXEL_DEPTH5_YB8V8YA8U8 0x00F00000
5455 #define NV_PGRAPH_BPIXEL_DEPTH5_052 0x00100000
5456 
5457 /* NV-Register NV_PGRAPH_LIMIT_VIOL_PIX */
5458 #define NV_PGRAPH_LIMIT_VIOL_PIX 0x00400610
5459 #define NV_PGRAPH_LIMIT_VIOL_PIX_ADRS 0x07FFFFFF
5460 #define NV_PGRAPH_LIMIT_VIOL_PIX_ADRS_0 0x00000000
5461 #define NV_PGRAPH_LIMIT_VIOL_PIX_BTILED 0x08000000
5462 #define NV_PGRAPH_LIMIT_VIOL_PIX_BTILED_NO_VIOL 0xF7FFFFFF
5463 #define NV_PGRAPH_LIMIT_VIOL_PIX_BTILED_VIOL 0x08000000
5464 #define NV_PGRAPH_LIMIT_VIOL_PIX_BPITCH 0x10000000
5465 #define NV_PGRAPH_LIMIT_VIOL_PIX_BPITCH_NO_VIOL 0xEFFFFFFF
5466 #define NV_PGRAPH_LIMIT_VIOL_PIX_BPITCH_VIOL 0x10000000
5467 #define NV_PGRAPH_LIMIT_VIOL_PIX_BLIT 0x20000000
5468 #define NV_PGRAPH_LIMIT_VIOL_PIX_BLIT_NO_VIOL 0xDFFFFFFF
5469 #define NV_PGRAPH_LIMIT_VIOL_PIX_BLIT_VIOL 0x20000000
5470 #define NV_PGRAPH_LIMIT_VIOL_PIX_LIMIT 0x40000000
5471 #define NV_PGRAPH_LIMIT_VIOL_PIX_LIMIT_NO_VIOL 0xBFFFFFFF
5472 #define NV_PGRAPH_LIMIT_VIOL_PIX_LIMIT_VIOL 0x40000000
5473 #define NV_PGRAPH_LIMIT_VIOL_PIX_OVRFLW 0x80000000
5474 #define NV_PGRAPH_LIMIT_VIOL_PIX_OVRFLW_NO_VIOL 0x7FFFFFFF
5475 #define NV_PGRAPH_LIMIT_VIOL_PIX_OVRFLW_VIOL 0x80000000
5476 
5477 /* NV-Register NV_PGRAPH_LIMIT_VIOL_Z */
5478 #define NV_PGRAPH_LIMIT_VIOL_Z 0x00400614
5479 #define NV_PGRAPH_LIMIT_VIOL_Z_ADRS 0x07FFFFFF
5480 #define NV_PGRAPH_LIMIT_VIOL_Z_ADRS_0 0x00000000
5481 #define NV_PGRAPH_LIMIT_VIOL_Z_LIMIT 0x40000000
5482 #define NV_PGRAPH_LIMIT_VIOL_Z_LIMIT_NO_VIOL 0xBFFFFFFF
5483 #define NV_PGRAPH_LIMIT_VIOL_Z_LIMIT_VIOL 0x40000000
5484 #define NV_PGRAPH_LIMIT_VIOL_Z_OVRFLW 0x80000000
5485 #define NV_PGRAPH_LIMIT_VIOL_Z_OVRFLW_NO_VIOL 0x7FFFFFFF
5486 #define NV_PGRAPH_LIMIT_VIOL_Z_OVRFLW_VIOL 0x80000000
5487 
5488 /* NV-Register NV_PGRAPH_STATE */
5489 #define NV_PGRAPH_STATE 0x00400714
5490 #define NV_PGRAPH_STATE_BUFFER_0 0x00000001
5491 #define NV_PGRAPH_STATE_BUFFER_0_INVALID 0xFFFFFFFE
5492 #define NV_PGRAPH_STATE_BUFFER_0_VALID 0x00000001
5493 #define NV_PGRAPH_STATE_BUFFER_0_042 0xFFFFFFFE
5494 #define NV_PGRAPH_STATE_BUFFER_0_058 0xFFFFFFFE
5495 #define NV_PGRAPH_STATE_BUFFER_1 0x00000002
5496 #define NV_PGRAPH_STATE_BUFFER_1_INVALID 0xFFFFFFFD
5497 #define NV_PGRAPH_STATE_BUFFER_1_VALID 0x00000002
5498 #define NV_PGRAPH_STATE_BUFFER_1_042 0xFFFFFFFD
5499 #define NV_PGRAPH_STATE_BUFFER_1_059 0xFFFFFFFD
5500 #define NV_PGRAPH_STATE_BUFFER_2 0x00000004
5501 #define NV_PGRAPH_STATE_BUFFER_2_INVALID 0xFFFFFFFB
5502 #define NV_PGRAPH_STATE_BUFFER_2_VALID 0x00000004
5503 #define NV_PGRAPH_STATE_BUFFER_2_053 0xFFFFFFFB
5504 #define NV_PGRAPH_STATE_BUFFER_2_05A 0xFFFFFFFB
5505 #define NV_PGRAPH_STATE_BUFFER_3 0x00000008
5506 #define NV_PGRAPH_STATE_BUFFER_3_INVALID 0xFFFFFFF7
5507 #define NV_PGRAPH_STATE_BUFFER_3_VALID 0x00000008
5508 #define NV_PGRAPH_STATE_BUFFER_3_053 0xFFFFFFF7
5509 #define NV_PGRAPH_STATE_BUFFER_3_05B 0xFFFFFFF7
5510 #define NV_PGRAPH_STATE_BUFFER_4 0x00000010
5511 #define NV_PGRAPH_STATE_BUFFER_4_INVALID 0xFFFFFFEF
5512 #define NV_PGRAPH_STATE_BUFFER_4_VALID 0x00000010
5513 #define NV_PGRAPH_STATE_BUFFER_4_038 0xFFFFFFEF
5514 #define NV_PGRAPH_STATE_BUFFER_5 0x00000020
5515 #define NV_PGRAPH_STATE_BUFFER_5_INVALID 0xFFFFFFDF
5516 #define NV_PGRAPH_STATE_BUFFER_5_VALID 0x00000020
5517 #define NV_PGRAPH_STATE_BUFFER_5_052 0xFFFFFFDF
5518 #define NV_PGRAPH_STATE_PITCH_0 0x00000100
5519 #define NV_PGRAPH_STATE_PITCH_0_INVALID 0xFFFFFEFF
5520 #define NV_PGRAPH_STATE_PITCH_0_VALID 0x00000100
5521 #define NV_PGRAPH_STATE_PITCH_0_042 0x00000100
5522 #define NV_PGRAPH_STATE_PITCH_0_058 0x00000100
5523 #define NV_PGRAPH_STATE_PITCH_1 0x00000200
5524 #define NV_PGRAPH_STATE_PITCH_1_INVALID 0xFFFFFDFF
5525 #define NV_PGRAPH_STATE_PITCH_1_VALID 0x00000200
5526 #define NV_PGRAPH_STATE_PITCH_1_042 0x00000200
5527 #define NV_PGRAPH_STATE_PITCH_1_059 0x00000200
5528 #define NV_PGRAPH_STATE_PITCH_2 0x00000400
5529 #define NV_PGRAPH_STATE_PITCH_2_INVALID 0xFFFFFBFF
5530 #define NV_PGRAPH_STATE_PITCH_2_VALID 0x00000400
5531 #define NV_PGRAPH_STATE_PITCH_2_053 0x00000400
5532 #define NV_PGRAPH_STATE_PITCH_2_05A 0x00000400
5533 #define NV_PGRAPH_STATE_PITCH_3 0x00000800
5534 #define NV_PGRAPH_STATE_PITCH_3_INVALID 0xFFFFF7FF
5535 #define NV_PGRAPH_STATE_PITCH_3_VALID 0x00000800
5536 #define NV_PGRAPH_STATE_PITCH_3_053 0x00000800
5537 #define NV_PGRAPH_STATE_PITCH_3_05B 0x00000800
5538 #define NV_PGRAPH_STATE_PITCH_4 0x00001000
5539 #define NV_PGRAPH_STATE_PITCH_4_INVALID 0xFFFFEFFF
5540 #define NV_PGRAPH_STATE_PITCH_4_VALID 0x00001000
5541 #define NV_PGRAPH_STATE_CHROMA_COLOR 0x00010000
5542 #define NV_PGRAPH_STATE_CHROMA_COLOR_INVALID 0xFFFEFFFF
5543 #define NV_PGRAPH_STATE_CHROMA_COLOR_VALID 0x00010000
5544 #define NV_PGRAPH_STATE_CHROMA_COLOR_057 0x00010000
5545 #define NV_PGRAPH_STATE_CHROMA_COLORFMT 0x00020000
5546 #define NV_PGRAPH_STATE_CHROMA_COLORFMT_INVALID 0xFFFDFFFF
5547 #define NV_PGRAPH_STATE_CHROMA_COLORFMT_VALID 0x00020000
5548 #define NV_PGRAPH_STATE_CHROMA_COLORFMT_017 0x00020000
5549 #define NV_PGRAPH_STATE_CPATTERN_COLORFMT 0x00100000
5550 #define NV_PGRAPH_STATE_CPATTERN_COLORFMT_INVALID 0xFFEFFFFF
5551 #define NV_PGRAPH_STATE_CPATTERN_COLORFMT_VALID 0x00100000
5552 #define NV_PGRAPH_STATE_CPATTERN_COLORFMT_044 0x00100000
5553 #define NV_PGRAPH_STATE_CPATTERN_MONOFMT 0x00200000
5554 #define NV_PGRAPH_STATE_CPATTERN_MONOFMT_INVALID 0xFFDFFFFF
5555 #define NV_PGRAPH_STATE_CPATTERN_MONOFMT_VALID 0x00200000
5556 #define NV_PGRAPH_STATE_CPATTERN_MONOFMT_044 0x00200000
5557 #define NV_PGRAPH_STATE_CPATTERN_SELECT 0x00400000
5558 #define NV_PGRAPH_STATE_CPATTERN_SELECT_INVALID 0xFFBFFFFF
5559 #define NV_PGRAPH_STATE_CPATTERN_SELECT_VALID 0x00400000
5560 #define NV_PGRAPH_STATE_CPATTERN_SELECT_044 0x00400000
5561 #define NV_PGRAPH_STATE_PATTERN_COLOR0 0x01000000
5562 #define NV_PGRAPH_STATE_PATTERN_COLOR0_INVALID 0xFEFFFFFF
5563 #define NV_PGRAPH_STATE_PATTERN_COLOR0_VALID 0x01000000
5564 #define NV_PGRAPH_STATE_PATTERN_COLOR0_018 0x01000000
5565 #define NV_PGRAPH_STATE_PATTERN_COLOR1 0x02000000
5566 #define NV_PGRAPH_STATE_PATTERN_COLOR1_INVALID 0xFDFFFFFF
5567 #define NV_PGRAPH_STATE_PATTERN_COLOR1_VALID 0x02000000
5568 #define NV_PGRAPH_STATE_PATTERN_COLOR1_018 0x02000000
5569 #define NV_PGRAPH_STATE_PATTERN_PATT0 0x04000000
5570 #define NV_PGRAPH_STATE_PATTERN_PATT0_INVALID 0xFBFFFFFF
5571 #define NV_PGRAPH_STATE_PATTERN_PATT0_VALID 0x04000000
5572 #define NV_PGRAPH_STATE_PATTERN_PATT0_018 0x04000000
5573 #define NV_PGRAPH_STATE_PATTERN_PATT1 0x08000000
5574 #define NV_PGRAPH_STATE_PATTERN_PATT1_INVALID 0xF7FFFFFF
5575 #define NV_PGRAPH_STATE_PATTERN_PATT1_VALID 0x08000000
5576 #define NV_PGRAPH_STATE_PATTERN_PATT1_018 0x08000000
5577 
5578 /* NV-Register NV_PGRAPH_CACHE_INDEX */
5579 #define NV_PGRAPH_CACHE_INDEX 0x00400728
5580 #define NV_PGRAPH_CACHE_INDEX_ADRS 0x00000FFC
5581 #define NV_PGRAPH_CACHE_INDEX_ADRS_TEXTURE_RAM_0 0x00000000
5582 #define NV_PGRAPH_CACHE_INDEX_ADRS_TEXTURE_RAM_1K 0x00001000
5583 #define NV_PGRAPH_CACHE_INDEX_ADRS_PALETTE_RAM_0 0x00000000
5584 #define NV_PGRAPH_CACHE_INDEX_ADRS_PALETTE_RAM_512 0x00000800
5585 #define NV_PGRAPH_CACHE_INDEX_ADRS_MISS_DATA_RAM_0 0x00000000
5586 #define NV_PGRAPH_CACHE_INDEX_ADRS_MISS_DATA_RAM_32 0x00000080
5587 #define NV_PGRAPH_CACHE_INDEX_ADRS_RLATENCY_RAM_0 0x00000000
5588 #define NV_PGRAPH_CACHE_INDEX_ADRS_RLATENCY_RAM_384 0x00000600
5589 #define NV_PGRAPH_CACHE_INDEX_ADRS_FLATENCY_RAM_0 0x00000000
5590 #define NV_PGRAPH_CACHE_INDEX_ADRS_FLATENCY_RAM_448 0x00000700
5591 #define NV_PGRAPH_CACHE_INDEX_TEX_PIPE 0x00008000
5592 #define NV_PGRAPH_CACHE_INDEX_TEX_PIPE_0 0xFFFF7FFF
5593 #define NV_PGRAPH_CACHE_INDEX_TEX_PIPE_1 0x00008000
5594 #define NV_PGRAPH_CACHE_INDEX_OP 0x000F0000
5595 #define NV_PGRAPH_CACHE_INDEX_OP_NOP 0x00000000
5596 #define NV_PGRAPH_CACHE_INDEX_OP_TEXTURE_RAM 0x00010000
5597 #define NV_PGRAPH_CACHE_INDEX_OP_PALETTE_RAM 0x00020000
5598 #define NV_PGRAPH_CACHE_INDEX_OP_MISS_DATA_RAM 0x00030000
5599 #define NV_PGRAPH_CACHE_INDEX_OP_RLATENCY_RAM 0x00040000
5600 #define NV_PGRAPH_CACHE_INDEX_OP_FLATENCY_RAM 0x00050000
5601 #define NV_PGRAPH_CACHE_INDEX_RDSEL 0x3F000000
5602 #define NV_PGRAPH_CACHE_INDEX_RDSEL_NOP 0x00000000
5603 #define NV_PGRAPH_CACHE_INDEX_RDSEL_INDEX_REG 0x01000000
5604 #define NV_PGRAPH_CACHE_INDEX_RDSEL_TIME_CNT 0x20000000
5605 #define NV_PGRAPH_CACHE_INDEX_RDSEL_CACHE_IDLE_CNT 0x21000000
5606 #define NV_PGRAPH_CACHE_INDEX_RDSEL_TP0_PIX_CNT 0x22000000
5607 #define NV_PGRAPH_CACHE_INDEX_RDSEL_TP0_MISS_CNT 0x23000000
5608 #define NV_PGRAPH_CACHE_INDEX_RDSEL_TP0_COAL_STALL_CNT 0x24000000
5609 #define NV_PGRAPH_CACHE_INDEX_RDSEL_TP0_REPL_STALL_CNT 0x25000000
5610 #define NV_PGRAPH_CACHE_INDEX_RDSEL_TP0_MP_Q_STALL_CNT 0x26000000
5611 #define NV_PGRAPH_CACHE_INDEX_RDSEL_TP0_TEX2MA_STALL_CNT 0x27000000
5612 #define NV_PGRAPH_CACHE_INDEX_RDSEL_LIT2TEX_STALL_CNT 0x28000000
5613 #define NV_PGRAPH_CACHE_INDEX_RDSEL_RBFR_FULL_STALL_CNT 0x29000000
5614 #define NV_PGRAPH_CACHE_INDEX_RDSEL_TP1_PIX_CNT 0x2A000000
5615 #define NV_PGRAPH_CACHE_INDEX_RDSEL_TP1_MISS_CNT 0x2B000000
5616 #define NV_PGRAPH_CACHE_INDEX_RDSEL_TP1_COAL_STALL_CNT 0x2C000000
5617 #define NV_PGRAPH_CACHE_INDEX_RDSEL_TP1_REPL_STALL_CNT 0x2D000000
5618 #define NV_PGRAPH_CACHE_INDEX_RDSEL_TP1_MP_Q_STALL_CNT 0x2E000000
5619 #define NV_PGRAPH_CACHE_INDEX_RDSEL_TP1_TEX2MA_STALL_CNT 0x2F000000
5620 #define NV_PGRAPH_CACHE_INDEX_RDSEL_TEX2LIT_REGLD_CNT 0x30000000
5621 #define NV_PGRAPH_CACHE_INDEX_RDSEL_C2DMA_TAKEN_CNT 0x31000000
5622 
5623 /* NV-Register NV_PGRAPH_CACHE_RAM */
5624 #define NV_PGRAPH_CACHE_RAM 0x0040072C
5625 #define NV_PGRAPH_CACHE_RAM_VALUE 0xFFFFFFFF
5626 
5627 /* NV-Register NV_PGRAPH_DMA_PITCH */
5628 #define NV_PGRAPH_DMA_PITCH 0x00400770
5629 #define NV_PGRAPH_DMA_PITCH_S0 0x0000FFFF
5630 #define NV_PGRAPH_DMA_PITCH_S1 0xFFFF0000
5631 
5632 /* NV-Register NV_PGRAPH_DVD_COLORFMT */
5633 #define NV_PGRAPH_DVD_COLORFMT 0x00400774
5634 #define NV_PGRAPH_DVD_COLORFMT_IMAGE 0x0000003F
5635 #define NV_PGRAPH_DVD_COLORFMT_IMAGE_FORMAT_INVALID 0x00000000
5636 #define NV_PGRAPH_DVD_COLORFMT_IMAGE_FORMAT_LE_V8YB8U8YA8 0x00000012
5637 #define NV_PGRAPH_DVD_COLORFMT_IMAGE_FORMAT_LE_YB8V8YA8U8 0x00000013
5638 #define NV_PGRAPH_DVD_COLORFMT_OVLY 0x00000300
5639 #define NV_PGRAPH_DVD_COLORFMT_OVLY_FORMAT_INVALID 0x00000000
5640 #define NV_PGRAPH_DVD_COLORFMT_OVLY_FORMAT_LE_A8CR8CB8Y8 0x00000100
5641 #define NV_PGRAPH_DVD_COLORFMT_OVLY_FORMAT_LE_A4CR6YB6A4CB6YA6 0x00000200
5642 #define NV_PGRAPH_DVD_COLORFMT_OVLY_FORMAT_TRANSPARENT 0x00000300
5643 
5644 /* NV-Register NV_PGRAPH_SCALED_FORMAT */
5645 #define NV_PGRAPH_SCALED_FORMAT 0x00400778
5646 #define NV_PGRAPH_SCALED_FORMAT_ORIGIN 0x00030000
5647 #define NV_PGRAPH_SCALED_FORMAT_ORIGIN_INVALID 0x00000000
5648 #define NV_PGRAPH_SCALED_FORMAT_ORIGIN_CENTER 0x00010000
5649 #define NV_PGRAPH_SCALED_FORMAT_ORIGIN_CORNER 0x00020000
5650 #define NV_PGRAPH_SCALED_FORMAT_INTERPOLATOR 0x01000000
5651 #define NV_PGRAPH_SCALED_FORMAT_INTERPOLATOR_ZOH 0xFEFFFFFF
5652 #define NV_PGRAPH_SCALED_FORMAT_INTERPOLATOR_FOH 0x01000000
5653 
5654 /* NV-Register NV_PGRAPH_STATE3D */
5655 #define NV_PGRAPH_STATE3D 0x0040077C
5656 #define NV_PGRAPH_STATE3D_CELSIUS_TAG_ID 0x0000FFFF
5657 #define NV_PGRAPH_STATE3D_CELSIUS_TAG_ID_0 0x00000000
5658 #define NV_PGRAPH_STATE3D_CHANNEL_ID 0x001F0000
5659 #define NV_PGRAPH_STATE3D_CHANNEL_ID_0 0x00000000
5660 #define NV_PGRAPH_STATE3D_CELSIUS_TAG_VALID 0x01000000
5661 #define NV_PGRAPH_STATE3D_CELSIUS_TAG_VALID_FALSE 0xFEFFFFFF
5662 #define NV_PGRAPH_STATE3D_CELSIUS_TAG_VALID_TRUE 0x01000000
5663 #define NV_PGRAPH_STATE3D_CHANNEL_VALID 0x02000000
5664 #define NV_PGRAPH_STATE3D_CHANNEL_VALID_FALSE 0xFDFFFFFF
5665 #define NV_PGRAPH_STATE3D_CHANNEL_VALID_TRUE 0x02000000
5666 #define NV_PGRAPH_STATE3D_DX5_INITIALIZED 0x20000000
5667 #define NV_PGRAPH_STATE3D_DX5_INITIALIZED_FALSE 0xDFFFFFFF
5668 #define NV_PGRAPH_STATE3D_DX5_INITIALIZED_TRUE 0x20000000
5669 #define NV_PGRAPH_STATE3D_DX6_INITIALIZED 0x40000000
5670 #define NV_PGRAPH_STATE3D_DX6_INITIALIZED_FALSE 0xBFFFFFFF
5671 #define NV_PGRAPH_STATE3D_DX6_INITIALIZED_TRUE 0x40000000
5672 
5673 /* NV-Register NV_PGRAPH_CHANNEL_CTX_TABLE */
5674 #define NV_PGRAPH_CHANNEL_CTX_TABLE 0x00400780
5675 #define NV_PGRAPH_CHANNEL_CTX_TABLE_INST 0x0000FFFF
5676 #define NV_PGRAPH_CHANNEL_CTX_TABLE_INST_0 0x00000000
5677 
5678 /* NV-Register NV_PGRAPH_CHANNEL_CTX_SIZE */
5679 #define NV_PGRAPH_CHANNEL_CTX_SIZE 0x00400784
5680 #define NV_PGRAPH_CHANNEL_CTX_SIZE_VALUE 0x0000FFFF
5681 #define NV_PGRAPH_CHANNEL_CTX_SIZE_VALUE_INIT 0x00001000
5682 
5683 /* NV-Register NV_PGRAPH_CHANNEL_CTX_POINTER */
5684 #define NV_PGRAPH_CHANNEL_CTX_POINTER 0x00400788
5685 #define NV_PGRAPH_CHANNEL_CTX_POINTER_INST 0x0000FFFF
5686 #define NV_PGRAPH_CHANNEL_CTX_POINTER_INST_0 0x00000000
5687 
5688 /* NV-Register NV_PGRAPH_COMB_INDEX */
5689 #define NV_PGRAPH_COMB_INDEX 0x00400730
5690 #define NV_PGRAPH_COMB_INDEX_ADDRESS 0x0000007F
5691 #define NV_PGRAPH_COMB_INDEX_ADDRESS_0 0x00000000
5692 #define NV_PGRAPH_COMB_INDEX_OP 0x00000700
5693 #define NV_PGRAPH_COMB_INDEX_OP_NOP 0x00000000
5694 
5695 /* NV-Register NV_PGRAPH_COMB_RAM */
5696 #define NV_PGRAPH_COMB_RAM 0x00400734
5697 #define NV_PGRAPH_COMB_RAM_VALUE 0xFFFFFFFF
5698 
5699 /* NV-Register NV_PGRAPH_ZCULL_INDEX */
5700 #define NV_PGRAPH_ZCULL_INDEX 0x00400738
5701 #define NV_PGRAPH_ZCULL_INDEX_ADDRESS 0x0000007F
5702 #define NV_PGRAPH_ZCULL_INDEX_ADDRESS_0 0x00000000
5703 
5704 /* NV-Register NV_PGRAPH_ZCULL_RAM */
5705 #define NV_PGRAPH_ZCULL_RAM 0x0040073C
5706 #define NV_PGRAPH_ZCULL_RAM_VALUE 0xFFFFFFFF
5707 
5708 /* NV-Register NV_PGRAPH_ZCMZ_INDEX */
5709 #define NV_PGRAPH_ZCMZ_INDEX 0x00400740
5710 #define NV_PGRAPH_ZCMZ_INDEX_ADDRESS 0x0000007F
5711 #define NV_PGRAPH_ZCMZ_INDEX_ADDRESS_0 0x00000000
5712 
5713 /* NV-Register NV_PGRAPH_ZCMZ_RAM */
5714 #define NV_PGRAPH_ZCMZ_RAM 0x00400744
5715 #define NV_PGRAPH_ZCMZ_RAM_VALUE 0xFFFFFFFF
5716 
5717 /* NV-Register NV_PGRAPH_FINE_RSTR_INDEX */
5718 #define NV_PGRAPH_FINE_RSTR_INDEX 0x00400748
5719 #define NV_PGRAPH_FINE_RSTR_INDEX_ADDRESS 0x0000007F
5720 #define NV_PGRAPH_FINE_RSTR_INDEX_ADDRESS_0 0x00000000
5721 
5722 /* NV-Register NV_PGRAPH_FINE_RSTR_RAM */
5723 #define NV_PGRAPH_FINE_RSTR_RAM 0x0040074C
5724 #define NV_PGRAPH_FINE_RSTR_RAM_VALUE 0xFFFFFFFF
5725 
5726 /* NV-Register NV_PGRAPH_RDI_INDEX */
5727 #define NV_PGRAPH_RDI_INDEX 0x00400750
5728 #define NV_PGRAPH_RDI_INDEX_ADDRESS 0x00003FFC
5729 #define NV_PGRAPH_RDI_INDEX_ADDRESS_0 0x00000000
5730 #define NV_PGRAPH_RDI_INDEX_SELECT 0x01FF0000
5731 #define NV_PGRAPH_RDI_INDEX_SELECT_0 0x00000000
5732 
5733 /* NV-Register NV_PGRAPH_RDI_DATA */
5734 #define NV_PGRAPH_RDI_DATA 0x00400754
5735 #define NV_PGRAPH_RDI_DATA_VALUE 0xFFFFFFFF
5736 
5737 /* NV-Register NV_PGRAPH_PATT_COLOR0 */
5738 #define NV_PGRAPH_PATT_COLOR0 0x00400800
5739 #define NV_PGRAPH_PATT_COLOR0_VALUE 0xFFFFFFFF
5740 #define NV_PGRAPH_PATT_COLOR0_VALUE_018 0x00000000
5741 #define NV_PGRAPH_PATT_COLOR0_VALUE_044 0x00000000
5742 
5743 /* NV-Register NV_PGRAPH_PATT_COLOR1 */
5744 #define NV_PGRAPH_PATT_COLOR1 0x00400804
5745 #define NV_PGRAPH_PATT_COLOR1_VALUE 0xFFFFFFFF
5746 #define NV_PGRAPH_PATT_COLOR1_VALUE_018 0x00000000
5747 #define NV_PGRAPH_PATT_COLOR1_VALUE_044 0x00000000
5748 
5749 /* NV-Array NV_PGRAPH_PATT_COLORRAM (4 byte access) */
5750 #define NV_PGRAPH_PATT_COLORRAM 0x00400900
5751 /* NV-Array size NV_PGRAPH_PATT_COLORRAM__SIZE_1 [0..63] */
5752 #define NV_PGRAPH_PATT_COLORRAM__SIZE_1 0x00000040
5753 #define NV_PGRAPH_PATT_COLORRAM_VALUE 0x00FFFFFF
5754 #define NV_PGRAPH_PATT_COLORRAM_VALUE_044 0x00000000
5755 
5756 /* NV-Array NV_PGRAPH_PATTERN (4 byte access) */
5757 #define NV_PGRAPH_PATTERN 0x00400808
5758 /* NV-Array size NV_PGRAPH_PATTERN__SIZE_1 [0..1] */
5759 #define NV_PGRAPH_PATTERN__SIZE_1 0x00000002
5760 #define NV_PGRAPH_PATTERN_BITMAP 0xFFFFFFFF
5761 #define NV_PGRAPH_PATTERN_BITMAP_018 0x00000000
5762 #define NV_PGRAPH_PATTERN_BITMAP_044 0x00000000
5763 
5764 /* NV-Register NV_PGRAPH_PATTERN_SHAPE */
5765 #define NV_PGRAPH_PATTERN_SHAPE 0x00400810
5766 #define NV_PGRAPH_PATTERN_SHAPE_VALUE 0x00000003
5767 #define NV_PGRAPH_PATTERN_SHAPE_VALUE_8X_8Y 0x00000000
5768 #define NV_PGRAPH_PATTERN_SHAPE_VALUE_64X_1Y 0x00000001
5769 #define NV_PGRAPH_PATTERN_SHAPE_VALUE_1X_64Y 0x00000002
5770 #define NV_PGRAPH_PATTERN_SHAPE_VALUE_018 0x00000000
5771 #define NV_PGRAPH_PATTERN_SHAPE_VALUE_044 0x00000000
5772 #define NV_PGRAPH_PATTERN_SHAPE_SELECT 0x00000010
5773 #define NV_PGRAPH_PATTERN_SHAPE_SELECT_2COLOR 0xFFFFFFEF
5774 #define NV_PGRAPH_PATTERN_SHAPE_SELECT_FULLCOLOR 0x00000010
5775 #define NV_PGRAPH_PATTERN_SHAPE_SELECT_044 0xFFFFFFEF
5776 
5777 /* NV-Register NV_PGRAPH_MONO_COLOR0 */
5778 #define NV_PGRAPH_MONO_COLOR0 0x00400600
5779 #define NV_PGRAPH_MONO_COLOR0_VALUE 0xFFFFFFFF
5780 
5781 /* NV-Register NV_PGRAPH_ROP3 */
5782 #define NV_PGRAPH_ROP3 0x00400604
5783 #define NV_PGRAPH_ROP3_VALUE 0x000000FF
5784 #define NV_PGRAPH_ROP3_VALUE_043 0x00000000
5785 
5786 /* NV-Register NV_PGRAPH_CHROMA */
5787 #define NV_PGRAPH_CHROMA 0x00400814
5788 #define NV_PGRAPH_CHROMA_VALUE 0xFFFFFFFF
5789 #define NV_PGRAPH_CHROMA_VALUE_017 0x00000000
5790 #define NV_PGRAPH_CHROMA_VALUE_057 0x00000000
5791 
5792 /* NV-Register NV_PGRAPH_BETA_AND */
5793 #define NV_PGRAPH_BETA_AND 0x00400608
5794 #define NV_PGRAPH_BETA_AND_VALUE_FRACTION 0x7F800000
5795 #define NV_PGRAPH_BETA_AND_VALUE_FRACTION_012 0x00000000
5796 
5797 /* NV-Register NV_PGRAPH_BETA_PREMULT */
5798 #define NV_PGRAPH_BETA_PREMULT 0x0040060C
5799 #define NV_PGRAPH_BETA_PREMULT_VALUE 0xFFFFFFFF
5800 #define NV_PGRAPH_BETA_PREMULT_VALUE_072 0x00000000
5801 
5802 /* NV-Register NV_PGRAPH_DPRAM_INDEX */
5803 #define NV_PGRAPH_DPRAM_INDEX 0x00400828
5804 #define NV_PGRAPH_DPRAM_INDEX_ADRS 0x000003FF
5805 #define NV_PGRAPH_DPRAM_INDEX_ADRS_0 0x00000000
5806 #define NV_PGRAPH_DPRAM_INDEX_SELECT 0x000F0000
5807 #define NV_PGRAPH_DPRAM_INDEX_SELECT_ADRS 0x00000000
5808 #define NV_PGRAPH_DPRAM_INDEX_SELECT_IDATA 0x00010000
5809 #define NV_PGRAPH_DPRAM_INDEX_SELECT_ALPHA 0x00020000
5810 #define NV_PGRAPH_DPRAM_INDEX_SELECT_IWE 0x00030000
5811 #define NV_PGRAPH_DPRAM_INDEX_SELECT_XY 0x00040000
5812 #define NV_PGRAPH_DPRAM_INDEX_SELECT_ODATA 0x00050000
5813 #define NV_PGRAPH_DPRAM_INDEX_SELECT_OWE 0x00060000
5814 #define NV_PGRAPH_DPRAM_INDEX_SELECT_SCOMP 0x00070000
5815 #define NV_PGRAPH_DPRAM_INDEX_SELECT_PWD 0x00080000
5816 
5817 /* NV-Register NV_PGRAPH_DPRAM_DATA */
5818 #define NV_PGRAPH_DPRAM_DATA 0x0040082C
5819 #define NV_PGRAPH_DPRAM_DATA_VALUE 0xFFFFFFFF
5820 
5821 /* NV-Register NV_PGRAPH_STORED_FMT */
5822 #define NV_PGRAPH_STORED_FMT 0x00400830
5823 #define NV_PGRAPH_STORED_FMT_MONO0 0x0000003F
5824 #define NV_PGRAPH_STORED_FMT_MONO0_04A 0x0000000C
5825 #define NV_PGRAPH_STORED_FMT_PATT0 0x00003F00
5826 #define NV_PGRAPH_STORED_FMT_PATT0_044 0x00000B00
5827 #define NV_PGRAPH_STORED_FMT_PATT1 0x003F0000
5828 #define NV_PGRAPH_STORED_FMT_PATT1_044 0x000B0000
5829 #define NV_PGRAPH_STORED_FMT_CHROMA 0x3F000000
5830 #define NV_PGRAPH_STORED_FMT_CHROMA_057 0x0B000000
5831 
5832 /* NV-Register NV_PGRAPH_FORMATS */
5833 #define NV_PGRAPH_FORMATS 0x00400618
5834 #define NV_PGRAPH_FORMATS_ROP 0x00000007
5835 #define NV_PGRAPH_FORMATS_ROP_Y8 0x00000000
5836 #define NV_PGRAPH_FORMATS_ROP_RGB15 0x00000001
5837 #define NV_PGRAPH_FORMATS_ROP_RGB16 0x00000002
5838 #define NV_PGRAPH_FORMATS_ROP_Y16 0x00000003
5839 #define NV_PGRAPH_FORMATS_ROP_RGB24 0x00000005
5840 #define NV_PGRAPH_FORMATS_ROP_Y32 0x00000007
5841 #define NV_PGRAPH_FORMATS_SRC 0x000003F0
5842 #define NV_PGRAPH_FORMATS_SRC_INVALID 0x00000000
5843 #define NV_PGRAPH_FORMATS_SRC_LE_Y8 0x00000010
5844 #define NV_PGRAPH_FORMATS_SRC_LE_X16A8Y8 0x00000020
5845 #define NV_PGRAPH_FORMATS_SRC_LE_X24Y8 0x00000030
5846 #define NV_PGRAPH_FORMATS_SRC_LE_A1R5G5B5 0x00000060
5847 #define NV_PGRAPH_FORMATS_SRC_LE_X1R5G5B5 0x00000070
5848 #define NV_PGRAPH_FORMATS_SRC_LE_X16A1R5G5B5 0x00000080
5849 #define NV_PGRAPH_FORMATS_SRC_LE_X17R5G5B5 0x00000090
5850 #define NV_PGRAPH_FORMATS_SRC_LE_R5G6B5 0x000000A0
5851 #define NV_PGRAPH_FORMATS_SRC_LE_A16R5G6B5 0x000000B0
5852 #define NV_PGRAPH_FORMATS_SRC_LE_X16R5G6B5 0x000000C0
5853 #define NV_PGRAPH_FORMATS_SRC_LE_A8R8G8B8 0x000000D0
5854 #define NV_PGRAPH_FORMATS_SRC_LE_X8R8G8B8 0x000000E0
5855 #define NV_PGRAPH_FORMATS_SRC_LE_Y16 0x000000F0
5856 #define NV_PGRAPH_FORMATS_SRC_LE_A16Y16 0x00000100
5857 #define NV_PGRAPH_FORMATS_SRC_LE_X16Y16 0x00000110
5858 #define NV_PGRAPH_FORMATS_SRC_LE_V8YB8U8YA8 0x00000120
5859 #define NV_PGRAPH_FORMATS_SRC_LE_YB8V8YA8U8 0x00000130
5860 #define NV_PGRAPH_FORMATS_SRC_LE_Y32 0x00000140
5861 #define NV_PGRAPH_FORMATS_FB 0x0000F000
5862 #define NV_PGRAPH_FORMATS_FB_INVALID 0x00000000
5863 #define NV_PGRAPH_FORMATS_FB_Y8 0x00001000
5864 #define NV_PGRAPH_FORMATS_FB_X1R5G5B5_Z1R5G5B5 0x00002000
5865 #define NV_PGRAPH_FORMATS_FB_X1R5G5B5_O1R5G5B5 0x00003000
5866 #define NV_PGRAPH_FORMATS_FB_A1R5G5B5 0x00004000
5867 #define NV_PGRAPH_FORMATS_FB_R5G6B5 0x00005000
5868 #define NV_PGRAPH_FORMATS_FB_Y16 0x00006000
5869 #define NV_PGRAPH_FORMATS_FB_X8R8G8B8_Z8R8G8B8 0x00007000
5870 #define NV_PGRAPH_FORMATS_FB_X8R8G8B8_O1Z7R8G8B8 0x00008000
5871 #define NV_PGRAPH_FORMATS_FB_X1A7R8G8B8_Z1A7R8G8B8 0x00009000
5872 #define NV_PGRAPH_FORMATS_FB_X1A7R8G8B8_O1A7R8G8B8 0x0000A000
5873 #define NV_PGRAPH_FORMATS_FB_X8R8G8B8_O8R8G8B8 0x0000B000
5874 #define NV_PGRAPH_FORMATS_FB_A8R8G8B8 0x0000C000
5875 #define NV_PGRAPH_FORMATS_FB_Y32 0x0000D000
5876 #define NV_PGRAPH_FORMATS_FB_V8YB8U8YA8 0x0000E000
5877 #define NV_PGRAPH_FORMATS_FB_YB8V8YA8U8 0x0000F000
5878 #define NV_PGRAPH_FORMATS_ZB 0x000C0000
5879 #define NV_PGRAPH_FORMATS_ZB_INVALID 0x00000000
5880 #define NV_PGRAPH_FORMATS_ZB_Z16 0x00040000
5881 #define NV_PGRAPH_FORMATS_ZB_Z24S8 0x00080000
5882 
5883 /* NV-Register NV_PGRAPH_ROPMODE */
5884 #define NV_PGRAPH_ROPMODE 0x0040061C
5885 #define NV_PGRAPH_ROPMODE_CBYTES 0x00000003
5886 #define NV_PGRAPH_ROPMODE_CBYTES_1 0x00000000
5887 #define NV_PGRAPH_ROPMODE_CBYTES_2 0x00000001
5888 #define NV_PGRAPH_ROPMODE_CBYTES_4 0x00000002
5889 #define NV_PGRAPH_ROPMODE_ZBYTES 0x0000000C
5890 #define NV_PGRAPH_ROPMODE_ZBYTES_1 0x00000000
5891 #define NV_PGRAPH_ROPMODE_ZBYTES_2 0x00000004
5892 #define NV_PGRAPH_ROPMODE_ZBYTES_4 0x00000008
5893 #define NV_PGRAPH_ROPMODE_SWIZZLE 0x00000010
5894 #define NV_PGRAPH_ROPMODE_SWIZZLE_DISABLE 0xFFFFFFEF
5895 #define NV_PGRAPH_ROPMODE_SWIZZLE_ENABLE 0x00000010
5896 #define NV_PGRAPH_ROPMODE_PSEUDO 0x00000020
5897 #define NV_PGRAPH_ROPMODE_PSEUDO_DISABLE 0xFFFFFFDF
5898 #define NV_PGRAPH_ROPMODE_PSEUDO_ENABLE 0x00000020
5899 #define NV_PGRAPH_ROPMODE_TYPE 0x000000C0
5900 #define NV_PGRAPH_ROPMODE_TYPE_3D 0x00000000
5901 #define NV_PGRAPH_ROPMODE_TYPE_CLEAR 0x00000040
5902 #define NV_PGRAPH_ROPMODE_TYPE_2D 0x00000080
5903 #define NV_PGRAPH_ROPMODE_TYPE_BLT 0x000000C0
5904 #define NV_PGRAPH_ROPMODE_BUS 0x000000FF
5905 #define NV_PGRAPH_ROPMODE_BUS_Z32_C32 0x0000000A
5906 #define NV_PGRAPH_ROPMODE_BUS_Z32_CPSEUDO32 0x0000002A
5907 #define NV_PGRAPH_ROPMODE_BUS_Z32_C16 0x00000009
5908 #define NV_PGRAPH_ROPMODE_BUS_Z32_C32_SWIZZLE 0x0000001A
5909 #define NV_PGRAPH_ROPMODE_BUS_Z16_C32 0x00000006
5910 #define NV_PGRAPH_ROPMODE_BUS_Z16_CPSEUDO32 0x00000026
5911 #define NV_PGRAPH_ROPMODE_BUS_Z16_C16 0x00000005
5912 #define NV_PGRAPH_ROPMODE_BUS_Z16_CPSEUDO32_SWIZZLE 0x00000036
5913 #define NV_PGRAPH_ROPMODE_BUS_Z16_C16_SWIZZLE 0x00000015
5914 #define NV_PGRAPH_ROPMODE_BUS_ZNULL_C8 0x00000000
5915 #define NV_PGRAPH_ROPMODE_BUS_ZNULL_C8_SWIZZLE 0x00000010
5916 #define NV_PGRAPH_ROPMODE_BUS_2D32 0x0000008A
5917 #define NV_PGRAPH_ROPMODE_BUS_2DPSEUDO32 0x000000AA
5918 #define NV_PGRAPH_ROPMODE_BUS_2D16 0x00000085
5919 #define NV_PGRAPH_ROPMODE_BUS_2D8 0x00000080
5920 #define NV_PGRAPH_ROPMODE_BUS_2D32_SWIZZLE 0x0000009A
5921 #define NV_PGRAPH_ROPMODE_BUS_2D16_SWIZZLE 0x00000095
5922 #define NV_PGRAPH_ROPMODE_BUS_2D8_SWIZZLE 0x00000090
5923 #define NV_PGRAPH_ROPMODE_BUS_CLEAR32 0x0000004A
5924 #define NV_PGRAPH_ROPMODE_BUS_CLEAR16 0x00000045
5925 #define NV_PGRAPH_ROPMODE_BUS_BLT32 0x000000CA
5926 #define NV_PGRAPH_ROPMODE_BUS_BLT16 0x000000C5
5927 #define NV_PGRAPH_ROPMODE_BUS_BLT8 0x000000C0
5928 #define NV_PGRAPH_ROPMODE_ZTILEMODE 0x00000300
5929 #define NV_PGRAPH_ROPMODE_ZTILEMODE_NULL 0x00000000
5930 #define NV_PGRAPH_ROPMODE_ZTILEMODE_LINEAR 0x00000100
5931 #define NV_PGRAPH_ROPMODE_ZTILEMODE_TILED 0x00000200
5932 #define NV_PGRAPH_ROPMODE_CTILEMODE 0x00000C00
5933 #define NV_PGRAPH_ROPMODE_CTILEMODE_NULL 0x00000000
5934 #define NV_PGRAPH_ROPMODE_CTILEMODE_LINEAR 0x00000400
5935 #define NV_PGRAPH_ROPMODE_CTILEMODE_TILED 0x00000800
5936 
5937 /* NV-Array NV_PGRAPH_ABS_X_RAM (4 byte access) */
5938 #define NV_PGRAPH_ABS_X_RAM 0x00400400
5939 /* NV-Array size NV_PGRAPH_ABS_X_RAM__SIZE_1 [0..9] */
5940 #define NV_PGRAPH_ABS_X_RAM__SIZE_1 0x0000000A
5941 #define NV_PGRAPH_ABS_X_RAM_VALUE 0xFFFFFFFF
5942 
5943 /* NV-Array NV_PGRAPH_X_RAM_BPORT (4 byte access) */
5944 #define NV_PGRAPH_X_RAM_BPORT 0x00400C00
5945 /* NV-Array size NV_PGRAPH_X_RAM_BPORT__SIZE_1 [0..9] */
5946 #define NV_PGRAPH_X_RAM_BPORT__SIZE_1 0x0000000A
5947 #define NV_PGRAPH_X_RAM_BPORT_VALUE 0xFFFFFFFF
5948 
5949 /* NV-Array NV_PGRAPH_ABS_Y_RAM (4 byte access) */
5950 #define NV_PGRAPH_ABS_Y_RAM 0x00400480
5951 /* NV-Array size NV_PGRAPH_ABS_Y_RAM__SIZE_1 [0..9] */
5952 #define NV_PGRAPH_ABS_Y_RAM__SIZE_1 0x0000000A
5953 #define NV_PGRAPH_ABS_Y_RAM_VALUE 0xFFFFFFFF
5954 
5955 /* NV-Array NV_PGRAPH_Y_RAM_BPORT (4 byte access) */
5956 #define NV_PGRAPH_Y_RAM_BPORT 0x00400C80
5957 /* NV-Array size NV_PGRAPH_Y_RAM_BPORT__SIZE_1 [0..9] */
5958 #define NV_PGRAPH_Y_RAM_BPORT__SIZE_1 0x0000000A
5959 #define NV_PGRAPH_Y_RAM_BPORT_VALUE 0xFFFFFFFF
5960 
5961 /* NV-Register NV_PGRAPH_XY_LOGIC_MISC0 */
5962 #define NV_PGRAPH_XY_LOGIC_MISC0 0x00400514
5963 #define NV_PGRAPH_XY_LOGIC_MISC0_COUNTER 0x0003FFFF
5964 #define NV_PGRAPH_XY_LOGIC_MISC0_COUNTER_0 0x00000000
5965 #define NV_PGRAPH_XY_LOGIC_MISC0_DIMENSION 0x00100000
5966 #define NV_PGRAPH_XY_LOGIC_MISC0_DIMENSION_NONZERO 0xFFEFFFFF
5967 #define NV_PGRAPH_XY_LOGIC_MISC0_DIMENSION_ZERO 0x00100000
5968 #define NV_PGRAPH_XY_LOGIC_MISC0_IMAGE_DATA_64 0x01000000
5969 #define NV_PGRAPH_XY_LOGIC_MISC0_IMAGE_DATA_64_FALSE 0xFEFFFFFF
5970 #define NV_PGRAPH_XY_LOGIC_MISC0_IMAGE_DATA_64_TRUE 0x01000000
5971 #define NV_PGRAPH_XY_LOGIC_MISC0_INDEX 0xF0000000
5972 #define NV_PGRAPH_XY_LOGIC_MISC0_INDEX_0 0x00000000
5973 
5974 /* NV-Register NV_PGRAPH_XY_LOGIC_MISC1 */
5975 #define NV_PGRAPH_XY_LOGIC_MISC1 0x00400518
5976 #define NV_PGRAPH_XY_LOGIC_MISC1_INITIAL 0x00000001
5977 #define NV_PGRAPH_XY_LOGIC_MISC1_INITIAL_NEEDED 0xFFFFFFFE
5978 #define NV_PGRAPH_XY_LOGIC_MISC1_INITIAL_DONE 0x00000001
5979 #define NV_PGRAPH_XY_LOGIC_MISC1_XTRACLIPX 0x00000010
5980 #define NV_PGRAPH_XY_LOGIC_MISC1_XTRACLIPX_NOTNULL 0xFFFFFFEF
5981 #define NV_PGRAPH_XY_LOGIC_MISC1_XTRACLIPX_NULL 0x00000010
5982 #define NV_PGRAPH_XY_LOGIC_MISC1_XTRACLIPY 0x00000020
5983 #define NV_PGRAPH_XY_LOGIC_MISC1_XTRACLIPY_NOTNULL 0xFFFFFFDF
5984 #define NV_PGRAPH_XY_LOGIC_MISC1_XTRACLIPY_NULL 0x00000020
5985 #define NV_PGRAPH_XY_LOGIC_MISC1_SEL_XIMAX 0x00001000
5986 #define NV_PGRAPH_XY_LOGIC_MISC1_SEL_XIMAX_UUMAX 0xFFFFEFFF
5987 #define NV_PGRAPH_XY_LOGIC_MISC1_SEL_XIMAX_IMAGEMAX 0x00001000
5988 #define NV_PGRAPH_XY_LOGIC_MISC1_SEL_YIMAX 0x00010000
5989 #define NV_PGRAPH_XY_LOGIC_MISC1_SEL_YIMAX_UUMAX 0xFFFEFFFF
5990 #define NV_PGRAPH_XY_LOGIC_MISC1_SEL_YIMAX_IMAGEMAX 0x00010000
5991 #define NV_PGRAPH_XY_LOGIC_MISC1_SEL_XXTRA 0x00100000
5992 #define NV_PGRAPH_XY_LOGIC_MISC1_SEL_XXTRA_CLIPMAX 0xFFEFFFFF
5993 #define NV_PGRAPH_XY_LOGIC_MISC1_SEL_XXTRA_IMAGEMAX 0x00100000
5994 
5995 /* NV-Register NV_PGRAPH_XY_LOGIC_MISC2 */
5996 #define NV_PGRAPH_XY_LOGIC_MISC2 0x0040051C
5997 #define NV_PGRAPH_XY_LOGIC_MISC2_HANDOFF 0x00000001
5998 #define NV_PGRAPH_XY_LOGIC_MISC2_HANDOFF_DISABLE 0xFFFFFFFE
5999 #define NV_PGRAPH_XY_LOGIC_MISC2_HANDOFF_ENABLE 0x00000001
6000 #define NV_PGRAPH_XY_LOGIC_MISC2_XTRACLIPX 0x00000010
6001 #define NV_PGRAPH_XY_LOGIC_MISC2_XTRACLIPX_NOTNULL 0xFFFFFFEF
6002 #define NV_PGRAPH_XY_LOGIC_MISC2_XTRACLIPX_NULL 0x00000010
6003 #define NV_PGRAPH_XY_LOGIC_MISC2_XTRACLIPY 0x00000020
6004 #define NV_PGRAPH_XY_LOGIC_MISC2_XTRACLIPY_NOTNULL 0xFFFFFFDF
6005 #define NV_PGRAPH_XY_LOGIC_MISC2_XTRACLIPY_NULL 0x00000020
6006 #define NV_PGRAPH_XY_LOGIC_MISC2_SEL_XIMAX 0x00001000
6007 #define NV_PGRAPH_XY_LOGIC_MISC2_SEL_XIMAX_UCMAX 0xFFFFEFFF
6008 #define NV_PGRAPH_XY_LOGIC_MISC2_SEL_XIMAX_IMAGEMAX 0x00001000
6009 #define NV_PGRAPH_XY_LOGIC_MISC2_SEL_YIMAX 0x00010000
6010 #define NV_PGRAPH_XY_LOGIC_MISC2_SEL_YIMAX_UCMAX 0xFFFEFFFF
6011 #define NV_PGRAPH_XY_LOGIC_MISC2_SEL_YIMAX_IMAGEMAX 0x00010000
6012 #define NV_PGRAPH_XY_LOGIC_MISC2_SEL_XXTRA 0x00100000
6013 #define NV_PGRAPH_XY_LOGIC_MISC2_SEL_XXTRA_CLIPMAX 0xFFEFFFFF
6014 #define NV_PGRAPH_XY_LOGIC_MISC2_SEL_XXTRA_IMAGEMAX 0x00100000
6015 
6016 /* NV-Register NV_PGRAPH_XY_LOGIC_MISC3 */
6017 #define NV_PGRAPH_XY_LOGIC_MISC3 0x00400520
6018 #define NV_PGRAPH_XY_LOGIC_MISC3_WDIMY_EQ_0 0x00000001
6019 #define NV_PGRAPH_XY_LOGIC_MISC3_WDIMY_EQ_0_NULL 0xFFFFFFFE
6020 #define NV_PGRAPH_XY_LOGIC_MISC3_WDIMY_EQ_0_TRUE 0x00000001
6021 #define NV_PGRAPH_XY_LOGIC_MISC3_RELOAD_WDIMY 0x00000010
6022 #define NV_PGRAPH_XY_LOGIC_MISC3_RELOAD_WDIMY_NULL 0xFFFFFFEF
6023 #define NV_PGRAPH_XY_LOGIC_MISC3_RELOAD_WDIMY_TRUE 0x00000010
6024 #define NV_PGRAPH_XY_LOGIC_MISC3_RELOAD_WX 0x00000100
6025 #define NV_PGRAPH_XY_LOGIC_MISC3_RELOAD_WX_NULL 0xFFFFFEFF
6026 #define NV_PGRAPH_XY_LOGIC_MISC3_RELOAD_WX_TRUE 0x00000100
6027 #define NV_PGRAPH_XY_LOGIC_MISC3_TEXT_ALG 0x00001000
6028 #define NV_PGRAPH_XY_LOGIC_MISC3_TEXT_ALG_NULL 0xFFFFEFFF
6029 #define NV_PGRAPH_XY_LOGIC_MISC3_TEXT_ALG_TRUE 0x00001000
6030 #define NV_PGRAPH_XY_LOGIC_MISC3_TEXT_DIMX 0x007F0000
6031 #define NV_PGRAPH_XY_LOGIC_MISC3_TEXT_DIMX_0 0x00000000
6032 #define NV_PGRAPH_XY_LOGIC_MISC3_TEXT_WDIMX 0x7F000000
6033 #define NV_PGRAPH_XY_LOGIC_MISC3_TEXT_WDIMX_0 0x00000000
6034 
6035 /* NV-Register NV_PGRAPH_X_MISC */
6036 #define NV_PGRAPH_X_MISC 0x00400500
6037 #define NV_PGRAPH_X_MISC_BIT33_0 0x00000001
6038 #define NV_PGRAPH_X_MISC_BIT33_0_0 0xFFFFFFFE
6039 #define NV_PGRAPH_X_MISC_BIT33_1 0x00000002
6040 #define NV_PGRAPH_X_MISC_BIT33_1_0 0xFFFFFFFD
6041 #define NV_PGRAPH_X_MISC_BIT33_2 0x00000004
6042 #define NV_PGRAPH_X_MISC_BIT33_2_0 0xFFFFFFFB
6043 #define NV_PGRAPH_X_MISC_BIT33_3 0x00000008
6044 #define NV_PGRAPH_X_MISC_BIT33_3_0 0xFFFFFFF7
6045 #define NV_PGRAPH_X_MISC_RANGE_0 0x00000010
6046 #define NV_PGRAPH_X_MISC_RANGE_0_0 0xFFFFFFEF
6047 #define NV_PGRAPH_X_MISC_RANGE_1 0x00000020
6048 #define NV_PGRAPH_X_MISC_RANGE_1_0 0xFFFFFFDF
6049 #define NV_PGRAPH_X_MISC_RANGE_2 0x00000040
6050 #define NV_PGRAPH_X_MISC_RANGE_2_0 0xFFFFFFBF
6051 #define NV_PGRAPH_X_MISC_RANGE_3 0x00000080
6052 #define NV_PGRAPH_X_MISC_RANGE_3_0 0xFFFFFF7F
6053 #define NV_PGRAPH_X_MISC_ADDER_OUTPUT 0x30000000
6054 #define NV_PGRAPH_X_MISC_ADDER_OUTPUT_EQ_0 0x00000000
6055 #define NV_PGRAPH_X_MISC_ADDER_OUTPUT_LT_0 0x10000000
6056 #define NV_PGRAPH_X_MISC_ADDER_OUTPUT_GT_0 0x20000000
6057 
6058 /* NV-Register NV_PGRAPH_Y_MISC */
6059 #define NV_PGRAPH_Y_MISC 0x00400504
6060 #define NV_PGRAPH_Y_MISC_BIT33_0 0x00000001
6061 #define NV_PGRAPH_Y_MISC_BIT33_0_0 0xFFFFFFFE
6062 #define NV_PGRAPH_Y_MISC_BIT33_1 0x00000002
6063 #define NV_PGRAPH_Y_MISC_BIT33_1_0 0xFFFFFFFD
6064 #define NV_PGRAPH_Y_MISC_BIT33_2 0x00000004
6065 #define NV_PGRAPH_Y_MISC_BIT33_2_0 0xFFFFFFFB
6066 #define NV_PGRAPH_Y_MISC_BIT33_3 0x00000008
6067 #define NV_PGRAPH_Y_MISC_BIT33_3_0 0xFFFFFFF7
6068 #define NV_PGRAPH_Y_MISC_RANGE_0 0x00000010
6069 #define NV_PGRAPH_Y_MISC_RANGE_0_0 0xFFFFFFEF
6070 #define NV_PGRAPH_Y_MISC_RANGE_1 0x00000020
6071 #define NV_PGRAPH_Y_MISC_RANGE_1_0 0xFFFFFFDF
6072 #define NV_PGRAPH_Y_MISC_RANGE_2 0x00000040
6073 #define NV_PGRAPH_Y_MISC_RANGE_2_0 0xFFFFFFBF
6074 #define NV_PGRAPH_Y_MISC_RANGE_3 0x00000080
6075 #define NV_PGRAPH_Y_MISC_RANGE_3_0 0xFFFFFF7F
6076 #define NV_PGRAPH_Y_MISC_ADDER_OUTPUT 0x30000000
6077 #define NV_PGRAPH_Y_MISC_ADDER_OUTPUT_EQ_0 0x00000000
6078 #define NV_PGRAPH_Y_MISC_ADDER_OUTPUT_LT_0 0x10000000
6079 #define NV_PGRAPH_Y_MISC_ADDER_OUTPUT_GT_0 0x20000000
6080 
6081 /* NV-Register NV_PGRAPH_ABS_UCLIP_XMIN */
6082 #define NV_PGRAPH_ABS_UCLIP_XMIN 0x0040053C
6083 #define NV_PGRAPH_ABS_UCLIP_XMIN_VALUE 0x0000FFFF
6084 #define NV_PGRAPH_ABS_UCLIP_XMIN_VALUE_019 0x00000000
6085 #define NV_PGRAPH_ABS_UCLIP_XMIN_VALUE_053 0x00000000
6086 
6087 /* NV-Register NV_PGRAPH_ABS_UCLIP_XMAX */
6088 #define NV_PGRAPH_ABS_UCLIP_XMAX 0x00400544
6089 #define NV_PGRAPH_ABS_UCLIP_XMAX_VALUE 0x0003FFFF
6090 #define NV_PGRAPH_ABS_UCLIP_XMAX_VALUE_019 0x00000000
6091 #define NV_PGRAPH_ABS_UCLIP_XMAX_VALUE_053 0x00000000
6092 
6093 /* NV-Register NV_PGRAPH_ABS_UCLIP_YMIN */
6094 #define NV_PGRAPH_ABS_UCLIP_YMIN 0x00400540
6095 #define NV_PGRAPH_ABS_UCLIP_YMIN_VALUE 0x0000FFFF
6096 #define NV_PGRAPH_ABS_UCLIP_YMIN_VALUE_019 0x00000000
6097 #define NV_PGRAPH_ABS_UCLIP_YMIN_VALUE_053 0x00000000
6098 
6099 /* NV-Register NV_PGRAPH_ABS_UCLIP_YMAX */
6100 #define NV_PGRAPH_ABS_UCLIP_YMAX 0x00400548
6101 #define NV_PGRAPH_ABS_UCLIP_YMAX_VALUE 0x0003FFFF
6102 #define NV_PGRAPH_ABS_UCLIP_YMAX_VALUE_019 0x00000000
6103 #define NV_PGRAPH_ABS_UCLIP_YMAX_VALUE_053 0x00000000
6104 
6105 /* NV-Register NV_PGRAPH_ABS_UCLIPA_XMIN */
6106 #define NV_PGRAPH_ABS_UCLIPA_XMIN 0x00400560
6107 #define NV_PGRAPH_ABS_UCLIPA_XMIN_VALUE 0x0000FFFF
6108 
6109 /* NV-Register NV_PGRAPH_ABS_UCLIPA_XMAX */
6110 #define NV_PGRAPH_ABS_UCLIPA_XMAX 0x00400568
6111 #define NV_PGRAPH_ABS_UCLIPA_XMAX_VALUE 0x0003FFFF
6112 
6113 /* NV-Register NV_PGRAPH_ABS_UCLIPA_YMIN */
6114 #define NV_PGRAPH_ABS_UCLIPA_YMIN 0x00400564
6115 #define NV_PGRAPH_ABS_UCLIPA_YMIN_VALUE 0x0000FFFF
6116 
6117 /* NV-Register NV_PGRAPH_ABS_UCLIPA_YMAX */
6118 #define NV_PGRAPH_ABS_UCLIPA_YMAX 0x0040056C
6119 #define NV_PGRAPH_ABS_UCLIPA_YMAX_VALUE 0x0003FFFF
6120 
6121 /* NV-Register NV_PGRAPH_SOURCE_COLOR */
6122 #define NV_PGRAPH_SOURCE_COLOR 0x0040050C
6123 #define NV_PGRAPH_SOURCE_COLOR_VALUE 0xFFFFFFFF
6124 #define NV_PGRAPH_SOURCE_COLOR_VALUE_0 0x00000000
6125 
6126 /* NV-Register NV_PGRAPH_VALID1 */
6127 #define NV_PGRAPH_VALID1 0x00400508
6128 #define NV_PGRAPH_VALID1_VLD 0x007FFFFF
6129 #define NV_PGRAPH_VALID1_VLD_0 0x00000000
6130 #define NV_PGRAPH_VALID1_VLD_NOCLIP 0x00080000
6131 #define NV_PGRAPH_VALID1_VLD_SRCCOLOR 0x00010000
6132 #define NV_PGRAPH_VALID1_VLD_GOTMOVE 0x00200000
6133 #define NV_PGRAPH_VALID1_VLD_GOTX01 0x00000003
6134 #define NV_PGRAPH_VALID1_VLD_GOTX02 0x00000007
6135 #define NV_PGRAPH_VALID1_VLD_GOTX03 0x0000000F
6136 #define NV_PGRAPH_VALID1_VLD_GOTXCHAIN01 0x00000030
6137 #define NV_PGRAPH_VALID1_VLD_GOTXCHAIN02 0x00000070
6138 #define NV_PGRAPH_VALID1_VLD_GOTXCHAIN03 0x000000F0
6139 #define NV_PGRAPH_VALID1_VLD_GOTY01 0x00000300
6140 #define NV_PGRAPH_VALID1_VLD_GOTY02 0x00000700
6141 #define NV_PGRAPH_VALID1_VLD_GOTY03 0x00000F00
6142 #define NV_PGRAPH_VALID1_VLD_GOTYCHAIN01 0x00003000
6143 #define NV_PGRAPH_VALID1_VLD_GOTYCHAIN02 0x00007000
6144 #define NV_PGRAPH_VALID1_VLD_GOTYCHAIN03 0x0000F000
6145 #define NV_PGRAPH_VALID1_VLD_X_OFFSET 0x00000001
6146 #define NV_PGRAPH_VALID1_VLD_XCHAIN_OFFSET 0x00000010
6147 #define NV_PGRAPH_VALID1_VLD_Y_OFFSET 0x00000100
6148 #define NV_PGRAPH_VALID1_VLD_YCHAIN_OFFSET 0x00001000
6149 #define NV_PGRAPH_VALID1_VLD_GOTCOLOR0 0x00020000
6150 #define NV_PGRAPH_VALID1_VLD_GOTCOLOR1 0x00040000
6151 #define NV_PGRAPH_VALID1_VLD_GOTCLIP 0x00100000
6152 #define NV_PGRAPH_VALID1_VLD_GOTFONT 0x00400000
6153 #define NV_PGRAPH_VALID1_VLD_GOTOFFSET 0x00400000
6154 #define NV_PGRAPH_VALID1_VLD_GOTBPITCH 0x00000004
6155 #define NV_PGRAPH_VALID1_VLD_GOTBOFFSET 0x00000008
6156 #define NV_PGRAPH_VALID1_VLD_GOTDUDX 0x00000010
6157 #define NV_PGRAPH_VALID1_VLD_GOTDVDY 0x00000020
6158 #define NV_PGRAPH_VALID1_VLD_GOTPOINT 0x00000100
6159 #define NV_PGRAPH_VALID1_VLD_GOTSIZE 0x00000200
6160 #define NV_PGRAPH_VALID1_VLD_GOTPITCH 0x00000400
6161 #define NV_PGRAPH_VALID1_VLD_GOTSTART 0x00000800
6162 #define NV_PGRAPH_VALID1_VLD_GOTDUDX2 0x00001000
6163 #define NV_PGRAPH_VALID1_VLD_GOTDVDY2 0x00002000
6164 #define NV_PGRAPH_VALID1_VLD_GOTPOINT2 0x00004000
6165 #define NV_PGRAPH_VALID1_VLD_GOTSIZE2 0x00008000
6166 #define NV_PGRAPH_VALID1_VLD_GOTPITCH2 0x00010000
6167 #define NV_PGRAPH_VALID1_VLD_GOTSTART2 0x00020000
6168 #define NV_PGRAPH_VALID1_VLD_GOTOFFSIN 0x00000001
6169 #define NV_PGRAPH_VALID1_VLD_GOTOFFSOUT 0x00000002
6170 #define NV_PGRAPH_VALID1_VLD_GOTPITCHIN 0x00000004
6171 #define NV_PGRAPH_VALID1_VLD_GOTPITCHOUT 0x00000008
6172 #define NV_PGRAPH_VALID1_VLD_GOTLENGTH 0x00000010
6173 #define NV_PGRAPH_VALID1_VLD_GOTCOUNT 0x00000020
6174 #define NV_PGRAPH_VALID1_VLD_GOTFORMAT 0x00000040
6175 #define NV_PGRAPH_VALID1_VLD_GOTNOTIFY 0x00000080
6176 #define NV_PGRAPH_VALID1_CLIP_MIN 0x10000000
6177 #define NV_PGRAPH_VALID1_CLIP_MIN_NO_ERROR 0xEFFFFFFF
6178 #define NV_PGRAPH_VALID1_CLIP_MIN_ONLY 0x10000000
6179 #define NV_PGRAPH_VALID1_CLIP_MIN_019 0xEFFFFFFF
6180 #define NV_PGRAPH_VALID1_CLIP_MIN_053 0xEFFFFFFF
6181 #define NV_PGRAPH_VALID1_CLIPA_MIN 0x20000000
6182 #define NV_PGRAPH_VALID1_CLIPA_MIN_NO_ERROR 0xDFFFFFFF
6183 #define NV_PGRAPH_VALID1_CLIPA_MIN_ONLY 0x20000000
6184 #define NV_PGRAPH_VALID1_CLIP_MAX 0x40000000
6185 #define NV_PGRAPH_VALID1_CLIP_MAX_NO_ERROR 0xBFFFFFFF
6186 #define NV_PGRAPH_VALID1_CLIP_MAX_ONLY 0x40000000
6187 #define NV_PGRAPH_VALID1_CLIP_MAX_019 0xBFFFFFFF
6188 #define NV_PGRAPH_VALID1_CLIP_MAX_053 0xBFFFFFFF
6189 #define NV_PGRAPH_VALID1_CLIPA_MAX 0x80000000
6190 #define NV_PGRAPH_VALID1_CLIPA_MAX_NO_ERROR 0x7FFFFFFF
6191 #define NV_PGRAPH_VALID1_CLIPA_MAX_ONLY 0x80000000
6192 
6193 /* NV-Register NV_PGRAPH_VALID2 */
6194 #define NV_PGRAPH_VALID2 0x00400578
6195 #define NV_PGRAPH_VALID2_VLD2 0x1FFFFFFF
6196 #define NV_PGRAPH_VALID2_VLD2_0 0x00000000
6197 #define NV_PGRAPH_VALID2_VLD2_GOT3D_COMBINE0A 0x10000000
6198 #define NV_PGRAPH_VALID2_VLD2_GOT3D_COMBINE0C 0x08000000
6199 #define NV_PGRAPH_VALID2_VLD2_GOT3D_COMBINE1A 0x04000000
6200 #define NV_PGRAPH_VALID2_VLD2_GOT3D_COMBINE1C 0x02000000
6201 #define NV_PGRAPH_VALID2_VLD2_GOT3D_COMBFACTOR 0x01000000
6202 #define NV_PGRAPH_VALID2_VLD2_GOT3D_FILTER1 0x00800000
6203 #define NV_PGRAPH_VALID2_VLD2_GOT3D_OFFSET1 0x00400000
6204 #define NV_PGRAPH_VALID2_VLD2_GOT3D_FORMAT1 0x00200000
6205 #define NV_PGRAPH_VALID2_VLD2_GOT3D_BLEND 0x00100000
6206 #define NV_PGRAPH_VALID2_VLD2_GOT3D_CONTROL2 0x00080000
6207 #define NV_PGRAPH_VALID2_VLD2_GOT3D_CONTROL1 0x00040000
6208 #define NV_PGRAPH_VALID2_VLD2_GOT3D_CONTROL0 0x00020000
6209 #define NV_PGRAPH_VALID2_VLD2_GOT3D_FILTER0 0x00010000
6210 #define NV_PGRAPH_VALID2_VLD2_GOT3D_FORMAT0 0x00008000
6211 #define NV_PGRAPH_VALID2_VLD2_GOT3D_OFFSET0 0x00004000
6212 #define NV_PGRAPH_VALID2_VLD2_GOT3D_FOGCOLOR 0x00002000
6213 #define NV_PGRAPH_VALID2_VLD2_GOT3D_COLORKEY 0x00001000
6214 #define NV_PGRAPH_VALID2_VLD2_GOT3D_V1 0x00000200
6215 #define NV_PGRAPH_VALID2_VLD2_GOT3D_U1 0x00000100
6216 #define NV_PGRAPH_VALID2_VLD2_GOT3D_V0 0x00000080
6217 #define NV_PGRAPH_VALID2_VLD2_GOT3D_U0 0x00000040
6218 #define NV_PGRAPH_VALID2_VLD2_GOT3D_X 0x00000020
6219 #define NV_PGRAPH_VALID2_VLD2_GOT3D_Y 0x00000010
6220 #define NV_PGRAPH_VALID2_VLD2_GOT3D_ZETA 0x00000008
6221 #define NV_PGRAPH_VALID2_VLD2_GOT3D_M 0x00000004
6222 #define NV_PGRAPH_VALID2_VLD2_GOT3D_COLOR 0x00000002
6223 #define NV_PGRAPH_VALID2_VLD2_GOT3D_SPECULAR 0x00000001
6224 #define NV_PGRAPH_VALID2_VLD2_DX3FULLVERTEX 0x0000007F
6225 #define NV_PGRAPH_VALID2_VLD2_DX5FULLVERTEX 0x0000007F
6226 #define NV_PGRAPH_VALID2_VLD2_DX6FULLVERTEX 0x000001FF
6227 #define NV_PGRAPH_VALID2_VLD2_DX3FULLSTATE 0x0007E000
6228 #define NV_PGRAPH_VALID2_VLD2_DX5FULLSTATE 0x001FF000
6229 #define NV_PGRAPH_VALID2_VLD2_DX6FULLSTATE 0x1FFFE000
6230 #define NV_PGRAPH_VALID2_CLIP3D_MIN 0x40000000
6231 #define NV_PGRAPH_VALID2_CLIP3D_MIN_NO_ERROR 0xBFFFFFFF
6232 #define NV_PGRAPH_VALID2_CLIP3D_MIN_ONLY 0x40000000
6233 #define NV_PGRAPH_VALID2_CLIP3D_MAX 0x80000000
6234 #define NV_PGRAPH_VALID2_CLIP3D_MAX_NO_ERROR 0x7FFFFFFF
6235 #define NV_PGRAPH_VALID2_CLIP3D_MAX_ONLY 0x80000000
6236 
6237 /* NV-Register NV_PGRAPH_ABS_ICLIP_XMAX */
6238 #define NV_PGRAPH_ABS_ICLIP_XMAX 0x00400534
6239 #define NV_PGRAPH_ABS_ICLIP_XMAX_VALUE 0x0003FFFF
6240 
6241 /* NV-Register NV_PGRAPH_ABS_ICLIP_YMAX */
6242 #define NV_PGRAPH_ABS_ICLIP_YMAX 0x00400538
6243 #define NV_PGRAPH_ABS_ICLIP_YMAX_VALUE 0x0003FFFF
6244 
6245 /* NV-Register NV_PGRAPH_CLIPX_0 */
6246 #define NV_PGRAPH_CLIPX_0 0x00400524
6247 #define NV_PGRAPH_CLIPX_0_CLIP0_MIN 0x00000003
6248 #define NV_PGRAPH_CLIPX_0_CLIP0_MIN_GT 0x00000000
6249 #define NV_PGRAPH_CLIPX_0_CLIP0_MIN_LT 0x00000001
6250 #define NV_PGRAPH_CLIPX_0_CLIP0_MIN_EQ 0x00000002
6251 #define NV_PGRAPH_CLIPX_0_CLIP0_MAX 0x0000000C
6252 #define NV_PGRAPH_CLIPX_0_CLIP0_MAX_LT 0x00000000
6253 #define NV_PGRAPH_CLIPX_0_CLIP0_MAX_GT 0x00000004
6254 #define NV_PGRAPH_CLIPX_0_CLIP0_MAX_EQ 0x00000008
6255 #define NV_PGRAPH_CLIPX_0_CLIP1_MIN 0x00000030
6256 #define NV_PGRAPH_CLIPX_0_CLIP1_MIN_GT 0x00000000
6257 #define NV_PGRAPH_CLIPX_0_CLIP1_MIN_LT 0x00000010
6258 #define NV_PGRAPH_CLIPX_0_CLIP1_MIN_EQ 0x00000020
6259 #define NV_PGRAPH_CLIPX_0_CLIP1_MAX 0x000000C0
6260 #define NV_PGRAPH_CLIPX_0_CLIP1_MAX_LT 0x00000000
6261 #define NV_PGRAPH_CLIPX_0_CLIP1_MAX_GT 0x00000040
6262 #define NV_PGRAPH_CLIPX_0_CLIP1_MAX_EQ 0x00000080
6263 #define NV_PGRAPH_CLIPX_0_CLIP2_MIN 0x00000300
6264 #define NV_PGRAPH_CLIPX_0_CLIP2_MIN_GT 0x00000000
6265 #define NV_PGRAPH_CLIPX_0_CLIP2_MIN_LT 0x00000100
6266 #define NV_PGRAPH_CLIPX_0_CLIP2_MIN_EQ 0x00000200
6267 #define NV_PGRAPH_CLIPX_0_CLIP2_MAX 0x00000C00
6268 #define NV_PGRAPH_CLIPX_0_CLIP2_MAX_LT 0x00000000
6269 #define NV_PGRAPH_CLIPX_0_CLIP2_MAX_GT 0x00000400
6270 #define NV_PGRAPH_CLIPX_0_CLIP2_MAX_EQ 0x00000800
6271 #define NV_PGRAPH_CLIPX_0_CLIP3_MIN 0x00003000
6272 #define NV_PGRAPH_CLIPX_0_CLIP3_MIN_GT 0x00000000
6273 #define NV_PGRAPH_CLIPX_0_CLIP3_MIN_LT 0x00001000
6274 #define NV_PGRAPH_CLIPX_0_CLIP3_MIN_EQ 0x00002000
6275 #define NV_PGRAPH_CLIPX_0_CLIP3_MAX 0x0000C000
6276 #define NV_PGRAPH_CLIPX_0_CLIP3_MAX_LT 0x00000000
6277 #define NV_PGRAPH_CLIPX_0_CLIP3_MAX_GT 0x00004000
6278 #define NV_PGRAPH_CLIPX_0_CLIP3_MAX_EQ 0x00008000
6279 #define NV_PGRAPH_CLIPX_0_CLIP4_MIN 0x00030000
6280 #define NV_PGRAPH_CLIPX_0_CLIP4_MIN_GT 0x00000000
6281 #define NV_PGRAPH_CLIPX_0_CLIP4_MIN_LT 0x00010000
6282 #define NV_PGRAPH_CLIPX_0_CLIP4_MIN_EQ 0x00020000
6283 #define NV_PGRAPH_CLIPX_0_CLIP4_MAX 0x000C0000
6284 #define NV_PGRAPH_CLIPX_0_CLIP4_MAX_LT 0x00000000
6285 #define NV_PGRAPH_CLIPX_0_CLIP4_MAX_GT 0x00040000
6286 #define NV_PGRAPH_CLIPX_0_CLIP4_MAX_EQ 0x00080000
6287 #define NV_PGRAPH_CLIPX_0_CLIP5_MIN 0x00300000
6288 #define NV_PGRAPH_CLIPX_0_CLIP5_MIN_GT 0x00000000
6289 #define NV_PGRAPH_CLIPX_0_CLIP5_MIN_LT 0x00100000
6290 #define NV_PGRAPH_CLIPX_0_CLIP5_MIN_EQ 0x00200000
6291 #define NV_PGRAPH_CLIPX_0_CLIP5_MAX 0x00C00000
6292 #define NV_PGRAPH_CLIPX_0_CLIP5_MAX_LT 0x00000000
6293 #define NV_PGRAPH_CLIPX_0_CLIP5_MAX_GT 0x00400000
6294 #define NV_PGRAPH_CLIPX_0_CLIP5_MAX_EQ 0x00800000
6295 #define NV_PGRAPH_CLIPX_0_CLIP6_MIN 0x03000000
6296 #define NV_PGRAPH_CLIPX_0_CLIP6_MIN_GT 0x00000000
6297 #define NV_PGRAPH_CLIPX_0_CLIP6_MIN_LT 0x01000000
6298 #define NV_PGRAPH_CLIPX_0_CLIP6_MIN_EQ 0x02000000
6299 #define NV_PGRAPH_CLIPX_0_CLIP6_MAX 0x0C000000
6300 #define NV_PGRAPH_CLIPX_0_CLIP6_MAX_LT 0x00000000
6301 #define NV_PGRAPH_CLIPX_0_CLIP6_MAX_GT 0x04000000
6302 #define NV_PGRAPH_CLIPX_0_CLIP6_MAX_EQ 0x08000000
6303 #define NV_PGRAPH_CLIPX_0_CLIP7_MIN 0x30000000
6304 #define NV_PGRAPH_CLIPX_0_CLIP7_MIN_GT 0x00000000
6305 #define NV_PGRAPH_CLIPX_0_CLIP7_MIN_LT 0x10000000
6306 #define NV_PGRAPH_CLIPX_0_CLIP7_MIN_EQ 0x20000000
6307 #define NV_PGRAPH_CLIPX_0_CLIP7_MAX 0xC0000000
6308 #define NV_PGRAPH_CLIPX_0_CLIP7_MAX_LT 0x00000000
6309 #define NV_PGRAPH_CLIPX_0_CLIP7_MAX_GT 0x40000000
6310 #define NV_PGRAPH_CLIPX_0_CLIP7_MAX_EQ 0x80000000
6311 
6312 /* NV-Register NV_PGRAPH_CLIPX_1 */
6313 #define NV_PGRAPH_CLIPX_1 0x00400528
6314 #define NV_PGRAPH_CLIPX_1_CLIP8_MIN 0x00000003
6315 #define NV_PGRAPH_CLIPX_1_CLIP8_MIN_GT 0x00000000
6316 #define NV_PGRAPH_CLIPX_1_CLIP8_MIN_LT 0x00000001
6317 #define NV_PGRAPH_CLIPX_1_CLIP8_MIN_EQ 0x00000002
6318 #define NV_PGRAPH_CLIPX_1_CLIP8_MAX 0x0000000C
6319 #define NV_PGRAPH_CLIPX_1_CLIP8_MAX_LT 0x00000000
6320 #define NV_PGRAPH_CLIPX_1_CLIP8_MAX_GT 0x00000004
6321 #define NV_PGRAPH_CLIPX_1_CLIP8_MAX_EQ 0x00000008
6322 #define NV_PGRAPH_CLIPX_1_CLIP9_MIN 0x00000030
6323 #define NV_PGRAPH_CLIPX_1_CLIP9_MIN_GT 0x00000000
6324 #define NV_PGRAPH_CLIPX_1_CLIP9_MIN_LT 0x00000010
6325 #define NV_PGRAPH_CLIPX_1_CLIP9_MIN_EQ 0x00000020
6326 #define NV_PGRAPH_CLIPX_1_CLIP9_MAX 0x000000C0
6327 #define NV_PGRAPH_CLIPX_1_CLIP9_MAX_LT 0x00000000
6328 #define NV_PGRAPH_CLIPX_1_CLIP9_MAX_GT 0x00000040
6329 #define NV_PGRAPH_CLIPX_1_CLIP9_MAX_EQ 0x00000080
6330 #define NV_PGRAPH_CLIPX_1_CLIP10_MIN 0x00000300
6331 #define NV_PGRAPH_CLIPX_1_CLIP10_MIN_GT 0x00000000
6332 #define NV_PGRAPH_CLIPX_1_CLIP10_MIN_LT 0x00000100
6333 #define NV_PGRAPH_CLIPX_1_CLIP10_MIN_EQ 0x00000200
6334 #define NV_PGRAPH_CLIPX_1_CLIP10_MAX 0x00000C00
6335 #define NV_PGRAPH_CLIPX_1_CLIP10_MAX_LT 0x00000000
6336 #define NV_PGRAPH_CLIPX_1_CLIP10_MAX_GT 0x00000400
6337 #define NV_PGRAPH_CLIPX_1_CLIP10_MAX_EQ 0x00000800
6338 #define NV_PGRAPH_CLIPX_1_CLIP11_MIN 0x00003000
6339 #define NV_PGRAPH_CLIPX_1_CLIP11_MIN_GT 0x00000000
6340 #define NV_PGRAPH_CLIPX_1_CLIP11_MIN_LT 0x00001000
6341 #define NV_PGRAPH_CLIPX_1_CLIP11MIN_EQ 0x00002000
6342 #define NV_PGRAPH_CLIPX_1_CLIP11_MAX 0x0000C000
6343 #define NV_PGRAPH_CLIPX_1_CLIP11_MAX_LT 0x00000000
6344 #define NV_PGRAPH_CLIPX_1_CLIP11_MAX_GT 0x00004000
6345 #define NV_PGRAPH_CLIPX_1_CLIP11_MAX_EQ 0x00008000
6346 #define NV_PGRAPH_CLIPX_1_CLIP12_MIN 0x00030000
6347 #define NV_PGRAPH_CLIPX_1_CLIP12_MIN_GT 0x00000000
6348 #define NV_PGRAPH_CLIPX_1_CLIP12_MIN_LT 0x00010000
6349 #define NV_PGRAPH_CLIPX_1_CLIP12_MIN_EQ 0x00020000
6350 #define NV_PGRAPH_CLIPX_1_CLIP12_MAX 0x000C0000
6351 #define NV_PGRAPH_CLIPX_1_CLIP12_MAX_LT 0x00000000
6352 #define NV_PGRAPH_CLIPX_1_CLIP12_MAX_GT 0x00040000
6353 #define NV_PGRAPH_CLIPX_1_CLIP12_MAX_EQ 0x00080000
6354 #define NV_PGRAPH_CLIPX_1_CLIP13_MIN 0x00300000
6355 #define NV_PGRAPH_CLIPX_1_CLIP13_MIN_GT 0x00000000
6356 #define NV_PGRAPH_CLIPX_1_CLIP13_MIN_LT 0x00100000
6357 #define NV_PGRAPH_CLIPX_1_CLIP13_MIN_EQ 0x00200000
6358 #define NV_PGRAPH_CLIPX_1_CLIP13_MAX 0x00C00000
6359 #define NV_PGRAPH_CLIPX_1_CLIP13_MAX_LT 0x00000000
6360 #define NV_PGRAPH_CLIPX_1_CLIP13_MAX_GT 0x00400000
6361 #define NV_PGRAPH_CLIPX_1_CLIP13_MAX_EQ 0x00800000
6362 #define NV_PGRAPH_CLIPX_1_CLIP14_MIN 0x03000000
6363 #define NV_PGRAPH_CLIPX_1_CLIP14_MIN_GT 0x00000000
6364 #define NV_PGRAPH_CLIPX_1_CLIP14_MIN_LT 0x01000000
6365 #define NV_PGRAPH_CLIPX_1_CLIP14_MIN_EQ 0x02000000
6366 #define NV_PGRAPH_CLIPX_1_CLIP14_MAX 0x0C000000
6367 #define NV_PGRAPH_CLIPX_1_CLIP14_MAX_LT 0x00000000
6368 #define NV_PGRAPH_CLIPX_1_CLIP14_MAX_GT 0x04000000
6369 #define NV_PGRAPH_CLIPX_1_CLIP14_MAX_EQ 0x08000000
6370 #define NV_PGRAPH_CLIPX_1_CLIP15_MIN 0x30000000
6371 #define NV_PGRAPH_CLIPX_1_CLIP15_MIN_GT 0x00000000
6372 #define NV_PGRAPH_CLIPX_1_CLIP15_MIN_LT 0x10000000
6373 #define NV_PGRAPH_CLIPX_1_CLIP15_MIN_EQ 0x20000000
6374 #define NV_PGRAPH_CLIPX_1_CLIP15_MAX 0xC0000000
6375 #define NV_PGRAPH_CLIPX_1_CLIP15_MAX_LT 0x00000000
6376 #define NV_PGRAPH_CLIPX_1_CLIP15_MAX_GT 0x40000000
6377 #define NV_PGRAPH_CLIPX_1_CLIP15_MAX_EQ 0x80000000
6378 
6379 /* NV-Register NV_PGRAPH_CLIPY_0 */
6380 #define NV_PGRAPH_CLIPY_0 0x0040052C
6381 #define NV_PGRAPH_CLIPY_0_CLIP0_MIN 0x00000003
6382 #define NV_PGRAPH_CLIPY_0_CLIP0_MIN_GT 0x00000000
6383 #define NV_PGRAPH_CLIPY_0_CLIP0_MIN_LT 0x00000001
6384 #define NV_PGRAPH_CLIPY_0_CLIP0_MIN_EQ 0x00000002
6385 #define NV_PGRAPH_CLIPY_0_CLIP0_MAX 0x0000000C
6386 #define NV_PGRAPH_CLIPY_0_CLIP0_MAX_LT 0x00000000
6387 #define NV_PGRAPH_CLIPY_0_CLIP0_MAX_GT 0x00000004
6388 #define NV_PGRAPH_CLIPY_0_CLIP0_MAX_EQ 0x00000008
6389 #define NV_PGRAPH_CLIPY_0_CLIP1_MIN 0x00000030
6390 #define NV_PGRAPH_CLIPY_0_CLIP1_MIN_GT 0x00000000
6391 #define NV_PGRAPH_CLIPY_0_CLIP1_MIN_LT 0x00000010
6392 #define NV_PGRAPH_CLIPY_0_CLIP1_MIN_EQ 0x00000020
6393 #define NV_PGRAPH_CLIPY_0_CLIP1_MAX 0x000000C0
6394 #define NV_PGRAPH_CLIPY_0_CLIP1_MAX_LT 0x00000000
6395 #define NV_PGRAPH_CLIPY_0_CLIP1_MAX_GT 0x00000040
6396 #define NV_PGRAPH_CLIPY_0_CLIP1_MAX_EQ 0x00000080
6397 #define NV_PGRAPH_CLIPY_0_CLIP2_MIN 0x00000300
6398 #define NV_PGRAPH_CLIPY_0_CLIP2_MIN_GT 0x00000000
6399 #define NV_PGRAPH_CLIPY_0_CLIP2_MIN_LT 0x00000100
6400 #define NV_PGRAPH_CLIPY_0_CLIP2_MIN_EQ 0x00000200
6401 #define NV_PGRAPH_CLIPY_0_CLIP2_MAX 0x00000C00
6402 #define NV_PGRAPH_CLIPY_0_CLIP2_MAX_LT 0x00000000
6403 #define NV_PGRAPH_CLIPY_0_CLIP2_MAX_GT 0x00000400
6404 #define NV_PGRAPH_CLIPY_0_CLIP2_MAX_EQ 0x00000800
6405 #define NV_PGRAPH_CLIPY_0_CLIP3_MIN 0x00003000
6406 #define NV_PGRAPH_CLIPY_0_CLIP3_MIN_GT 0x00000000
6407 #define NV_PGRAPH_CLIPY_0_CLIP3_MIN_LT 0x00001000
6408 #define NV_PGRAPH_CLIPY_0_CLIP3_MIN_EQ 0x00002000
6409 #define NV_PGRAPH_CLIPY_0_CLIP3_MAX 0x0000C000
6410 #define NV_PGRAPH_CLIPY_0_CLIP3_MAX_LT 0x00000000
6411 #define NV_PGRAPH_CLIPY_0_CLIP3_MAX_GT 0x00004000
6412 #define NV_PGRAPH_CLIPY_0_CLIP3_MAX_EQ 0x00008000
6413 #define NV_PGRAPH_CLIPY_0_CLIP4_MIN 0x00030000
6414 #define NV_PGRAPH_CLIPY_0_CLIP4_MIN_GT 0x00000000
6415 #define NV_PGRAPH_CLIPY_0_CLIP4_MIN_LT 0x00010000
6416 #define NV_PGRAPH_CLIPY_0_CLIP4_MIN_EQ 0x00020000
6417 #define NV_PGRAPH_CLIPY_0_CLIP4_MAX 0x000C0000
6418 #define NV_PGRAPH_CLIPY_0_CLIP4_MAX_LT 0x00000000
6419 #define NV_PGRAPH_CLIPY_0_CLIP4_MAX_GT 0x00040000
6420 #define NV_PGRAPH_CLIPY_0_CLIP4_MAX_EQ 0x00080000
6421 #define NV_PGRAPH_CLIPY_0_CLIP5_MIN 0x00300000
6422 #define NV_PGRAPH_CLIPY_0_CLIP5_MIN_GT 0x00000000
6423 #define NV_PGRAPH_CLIPY_0_CLIP5_MIN_LT 0x00100000
6424 #define NV_PGRAPH_CLIPY_0_CLIP5_MIN_EQ 0x00200000
6425 #define NV_PGRAPH_CLIPY_0_CLIP5_MAX 0x00C00000
6426 #define NV_PGRAPH_CLIPY_0_CLIP5_MAX_LT 0x00000000
6427 #define NV_PGRAPH_CLIPY_0_CLIP5_MAX_GT 0x00400000
6428 #define NV_PGRAPH_CLIPY_0_CLIP5_MAX_EQ 0x00800000
6429 #define NV_PGRAPH_CLIPY_0_CLIP6_MIN 0x03000000
6430 #define NV_PGRAPH_CLIPY_0_CLIP6_MIN_GT 0x00000000
6431 #define NV_PGRAPH_CLIPY_0_CLIP6_MIN_LT 0x01000000
6432 #define NV_PGRAPH_CLIPY_0_CLIP6_MIN_EQ 0x02000000
6433 #define NV_PGRAPH_CLIPY_0_CLIP6_MAX 0x0C000000
6434 #define NV_PGRAPH_CLIPY_0_CLIP6_MAX_LT 0x00000000
6435 #define NV_PGRAPH_CLIPY_0_CLIP6_MAX_GT 0x04000000
6436 #define NV_PGRAPH_CLIPY_0_CLIP6_MAX_EQ 0x08000000
6437 #define NV_PGRAPH_CLIPY_0_CLIP7_MIN 0x30000000
6438 #define NV_PGRAPH_CLIPY_0_CLIP7_MIN_GT 0x00000000
6439 #define NV_PGRAPH_CLIPY_0_CLIP7_MIN_LT 0x10000000
6440 #define NV_PGRAPH_CLIPY_0_CLIP7_MIN_EQ 0x20000000
6441 #define NV_PGRAPH_CLIPY_0_CLIP7_MAX 0xC0000000
6442 #define NV_PGRAPH_CLIPY_0_CLIP7_MAX_LT 0x00000000
6443 #define NV_PGRAPH_CLIPY_0_CLIP7_MAX_GT 0x40000000
6444 #define NV_PGRAPH_CLIPY_0_CLIP7_MAX_EQ 0x80000000
6445 
6446 /* NV-Register NV_PGRAPH_CLIPY_1 */
6447 #define NV_PGRAPH_CLIPY_1 0x00400530
6448 #define NV_PGRAPH_CLIPY_1_CLIP8_MIN 0x00000003
6449 #define NV_PGRAPH_CLIPY_1_CLIP8_MIN_GT 0x00000000
6450 #define NV_PGRAPH_CLIPY_1_CLIP8_MIN_LT 0x00000001
6451 #define NV_PGRAPH_CLIPY_1_CLIP8_MIN_EQ 0x00000002
6452 #define NV_PGRAPH_CLIPY_1_CLIP8_MAX 0x0000000C
6453 #define NV_PGRAPH_CLIPY_1_CLIP8_MAX_LT 0x00000000
6454 #define NV_PGRAPH_CLIPY_1_CLIP8_MAX_GT 0x00000004
6455 #define NV_PGRAPH_CLIPY_1_CLIP8_MAX_EQ 0x00000008
6456 #define NV_PGRAPH_CLIPY_1_CLIP9_MIN 0x00000030
6457 #define NV_PGRAPH_CLIPY_1_CLIP9_MIN_GT 0x00000000
6458 #define NV_PGRAPH_CLIPY_1_CLIP9_MIN_LT 0x00000010
6459 #define NV_PGRAPH_CLIPY_1_CLIP9_MIN_EQ 0x00000020
6460 #define NV_PGRAPH_CLIPY_1_CLIP9_MAX 0x000000C0
6461 #define NV_PGRAPH_CLIPY_1_CLIP9_MAX_LT 0x00000000
6462 #define NV_PGRAPH_CLIPY_1_CLIP9_MAX_GT 0x00000040
6463 #define NV_PGRAPH_CLIPY_1_CLIP9_MAX_EQ 0x00000080
6464 #define NV_PGRAPH_CLIPY_1_CLIP10_MIN 0x00000300
6465 #define NV_PGRAPH_CLIPY_1_CLIP10_MIN_GT 0x00000000
6466 #define NV_PGRAPH_CLIPY_1_CLIP10_MIN_LT 0x00000100
6467 #define NV_PGRAPH_CLIPY_1_CLIP10_MIN_EQ 0x00000200
6468 #define NV_PGRAPH_CLIPY_1_CLIP10_MAX 0x00000C00
6469 #define NV_PGRAPH_CLIPY_1_CLIP10_MAX_LT 0x00000000
6470 #define NV_PGRAPH_CLIPY_1_CLIP10_MAX_GT 0x00000400
6471 #define NV_PGRAPH_CLIPY_1_CLIP10_MAX_EQ 0x00000800
6472 #define NV_PGRAPH_CLIPY_1_CLIP11_MIN 0x00003000
6473 #define NV_PGRAPH_CLIPY_1_CLIP11_MIN_GT 0x00000000
6474 #define NV_PGRAPH_CLIPY_1_CLIP11_MIN_LT 0x00001000
6475 #define NV_PGRAPH_CLIPY_1_CLIP11MIN_EQ 0x00002000
6476 #define NV_PGRAPH_CLIPY_1_CLIP11_MAX 0x0000C000
6477 #define NV_PGRAPH_CLIPY_1_CLIP11_MAX_LT 0x00000000
6478 #define NV_PGRAPH_CLIPY_1_CLIP11_MAX_GT 0x00004000
6479 #define NV_PGRAPH_CLIPY_1_CLIP11_MAX_EQ 0x00008000
6480 #define NV_PGRAPH_CLIPY_1_CLIP12_MIN 0x00030000
6481 #define NV_PGRAPH_CLIPY_1_CLIP12_MIN_GT 0x00000000
6482 #define NV_PGRAPH_CLIPY_1_CLIP12_MIN_LT 0x00010000
6483 #define NV_PGRAPH_CLIPY_1_CLIP12_MIN_EQ 0x00020000
6484 #define NV_PGRAPH_CLIPY_1_CLIP12_MAX 0x000C0000
6485 #define NV_PGRAPH_CLIPY_1_CLIP12_MAX_LT 0x00000000
6486 #define NV_PGRAPH_CLIPY_1_CLIP12_MAX_GT 0x00040000
6487 #define NV_PGRAPH_CLIPY_1_CLIP12_MAX_EQ 0x00080000
6488 #define NV_PGRAPH_CLIPY_1_CLIP13_MIN 0x00300000
6489 #define NV_PGRAPH_CLIPY_1_CLIP13_MIN_GT 0x00000000
6490 #define NV_PGRAPH_CLIPY_1_CLIP13_MIN_LT 0x00100000
6491 #define NV_PGRAPH_CLIPY_1_CLIP13_MIN_EQ 0x00200000
6492 #define NV_PGRAPH_CLIPY_1_CLIP13_MAX 0x00C00000
6493 #define NV_PGRAPH_CLIPY_1_CLIP13_MAX_LT 0x00000000
6494 #define NV_PGRAPH_CLIPY_1_CLIP13_MAX_GT 0x00400000
6495 #define NV_PGRAPH_CLIPY_1_CLIP13_MAX_EQ 0x00800000
6496 #define NV_PGRAPH_CLIPY_1_CLIP14_MIN 0x03000000
6497 #define NV_PGRAPH_CLIPY_1_CLIP14_MIN_GT 0x00000000
6498 #define NV_PGRAPH_CLIPY_1_CLIP14_MIN_LT 0x01000000
6499 #define NV_PGRAPH_CLIPY_1_CLIP14_MIN_EQ 0x02000000
6500 #define NV_PGRAPH_CLIPY_1_CLIP14_MAX 0x0C000000
6501 #define NV_PGRAPH_CLIPY_1_CLIP14_MAX_LT 0x00000000
6502 #define NV_PGRAPH_CLIPY_1_CLIP14_MAX_GT 0x04000000
6503 #define NV_PGRAPH_CLIPY_1_CLIP14_MAX_EQ 0x08000000
6504 #define NV_PGRAPH_CLIPY_1_CLIP15_MIN 0x30000000
6505 #define NV_PGRAPH_CLIPY_1_CLIP15_MIN_GT 0x00000000
6506 #define NV_PGRAPH_CLIPY_1_CLIP15_MIN_LT 0x10000000
6507 #define NV_PGRAPH_CLIPY_1_CLIP15_MIN_EQ 0x20000000
6508 #define NV_PGRAPH_CLIPY_1_CLIP15_MAX 0xC0000000
6509 #define NV_PGRAPH_CLIPY_1_CLIP15_MAX_LT 0x00000000
6510 #define NV_PGRAPH_CLIPY_1_CLIP15_MAX_GT 0x40000000
6511 #define NV_PGRAPH_CLIPY_1_CLIP15_MAX_EQ 0x80000000
6512 
6513 /* NV-Register NV_PGRAPH_MISC24_0 */
6514 #define NV_PGRAPH_MISC24_0 0x00400510
6515 #define NV_PGRAPH_MISC24_0_VALUE 0x00FFFFFF
6516 
6517 /* NV-Register NV_PGRAPH_MISC24_1 */
6518 #define NV_PGRAPH_MISC24_1 0x00400570
6519 #define NV_PGRAPH_MISC24_1_VALUE 0x00FFFFFF
6520 
6521 /* NV-Register NV_PGRAPH_MISC24_2 */
6522 #define NV_PGRAPH_MISC24_2 0x00400574
6523 #define NV_PGRAPH_MISC24_2_VALUE 0x00FFFFFF
6524 
6525 /* NV-Register NV_PGRAPH_PASSTHRU_0 */
6526 #define NV_PGRAPH_PASSTHRU_0 0x0040057C
6527 #define NV_PGRAPH_PASSTHRU_0_VALUE 0xFFFFFFFF
6528 
6529 /* NV-Register NV_PGRAPH_PASSTHRU_1 */
6530 #define NV_PGRAPH_PASSTHRU_1 0x00400580
6531 #define NV_PGRAPH_PASSTHRU_1_VALUE 0xFFFFFFFF
6532 
6533 /* NV-Register NV_PGRAPH_PASSTHRU_2 */
6534 #define NV_PGRAPH_PASSTHRU_2 0x00400584
6535 #define NV_PGRAPH_PASSTHRU_2_VALUE 0xFFFFFFFF
6536 
6537 /* NV-Register NV_PGRAPH_DIMX_TEXTURE */
6538 #define NV_PGRAPH_DIMX_TEXTURE 0x00400588
6539 #define NV_PGRAPH_DIMX_TEXTURE_VALUE 0x0000FFFF
6540 
6541 /* NV-Register NV_PGRAPH_WDIMX_TEXTURE */
6542 #define NV_PGRAPH_WDIMX_TEXTURE 0x0040058C
6543 #define NV_PGRAPH_WDIMX_TEXTURE_VALUE 0x0001FFFF
6544 
6545 /* NV-Register NV_PGRAPH_ZCULLINTERLOCK */
6546 #define NV_PGRAPH_ZCULLINTERLOCK 0x00000000
6547 #define NV_PGRAPH_ZCULLINTERLOCK_BUNDLE 0x000001D0
6548 #define NV_PGRAPH_ZCULLINTERLOCK_SEMA 0x000003FF
6549 
6550 /* NV-Register NV_PGRAPH_BLTFIRSTSPAN */
6551 #define NV_PGRAPH_BLTFIRSTSPAN 0x00000000
6552 #define NV_PGRAPH_BLTFIRSTSPAN_BUNDLE 0x000001D1
6553 #define NV_PGRAPH_BLTFIRSTSPAN_SRCMINUSDST 0x0000007F
6554 #define NV_PGRAPH_BLTFIRSTSPAN_SRCANCHORPART 0x00030000
6555 #define NV_PGRAPH_BLTFIRSTSPAN_DSTANCHORPART 0x000C0000
6556 #define NV_PGRAPH_BLTFIRSTSPAN_L2R 0x00100000
6557 #define NV_PGRAPH_BLTFIRSTSPAN_L2R_FALSE 0xFFEFFFFF
6558 #define NV_PGRAPH_BLTFIRSTSPAN_L2R_TRUE 0x00100000
6559 #define NV_PGRAPH_BLTFIRSTSPAN_RRW 0x00200000
6560 #define NV_PGRAPH_BLTFIRSTSPAN_RRW_FALSE 0xFFDFFFFF
6561 #define NV_PGRAPH_BLTFIRSTSPAN_RRW_TRUE 0x00200000
6562 
6563 /* NV-Register NV_PGRAPH_BLTNTHSPAN */
6564 #define NV_PGRAPH_BLTNTHSPAN 0x00000000
6565 #define NV_PGRAPH_BLTNTHSPAN_BUNDLE 0x3A400000
6566 #define NV_PGRAPH_BLTNTHSPAN_SRCMINUSDST 0x0000007F
6567 #define NV_PGRAPH_BLTNTHSPAN_SRCANCHORPART 0x00030000
6568 #define NV_PGRAPH_BLTNTHSPAN_DSTANCHORPART 0x000C0000
6569 #define NV_PGRAPH_BLTNTHSPAN_L2R 0x00100000
6570 #define NV_PGRAPH_BLTNTHSPAN_L2R_FALSE 0xFFEFFFFF
6571 #define NV_PGRAPH_BLTNTHSPAN_L2R_TRUE 0x00100000
6572 #define NV_PGRAPH_BLTNTHSPAN_RRW 0x00200000
6573 #define NV_PGRAPH_BLTNTHSPAN_RRW_FALSE 0xFFDFFFFF
6574 #define NV_PGRAPH_BLTNTHSPAN_RRW_TRUE 0x00200000
6575 
6576 /* NV-Register NV_PGRAPH_BLTEND */
6577 #define NV_PGRAPH_BLTEND 0x00000000
6578 #define NV_PGRAPH_BLTEND_BUNDLE 0x3A600000
6579 
6580 /* NV-Array NV_PGRAPH_WINDOWCLIP_HORIZONTAL (4 byte access) */
6581 #define NV_PGRAPH_WINDOWCLIP_HORIZONTAL 0x00400F00
6582 /* NV-Array size NV_PGRAPH_WINDOWCLIP_HORIZONTAL__SIZE_1 [0..7] */
6583 #define NV_PGRAPH_WINDOWCLIP_HORIZONTAL__SIZE_1 0x00000008
6584 #define NV_PGRAPH_WINDOWCLIP_HORIZONTAL_MIN 0x00000FFF
6585 #define NV_PGRAPH_WINDOWCLIP_HORIZONTAL_MAX 0x0FFF0000
6586 
6587 /* NV-Array NV_PGRAPH_WINDOWCLIP_VERTICAL (4 byte access) */
6588 #define NV_PGRAPH_WINDOWCLIP_VERTICAL 0x00400F20
6589 /* NV-Array size NV_PGRAPH_WINDOWCLIP_VERTICAL__SIZE_1 [0..7] */
6590 #define NV_PGRAPH_WINDOWCLIP_VERTICAL__SIZE_1 0x00000008
6591 #define NV_PGRAPH_WINDOWCLIP_VERTICAL_MIN 0x00000FFF
6592 #define NV_PGRAPH_WINDOWCLIP_VERTICAL_MAX 0x0FFF0000
6593 
6594 /* NV-Register NV_PGRAPH_XFMODE0 */
6595 #define NV_PGRAPH_XFMODE0 0x00400F40
6596 #define NV_PGRAPH_XFMODE0_T0_EN 0x00000001
6597 #define NV_PGRAPH_XFMODE0_T0_EN_OFF 0xFFFFFFFE
6598 #define NV_PGRAPH_XFMODE0_T0_EN_ON 0x00000001
6599 #define NV_PGRAPH_XFMODE0_T0_MODE 0x00000002
6600 #define NV_PGRAPH_XFMODE0_T0_MODE_PASS 0xFFFFFFFD
6601 #define NV_PGRAPH_XFMODE0_T0_MODE_TRANSFORM 0x00000002
6602 #define NV_PGRAPH_XFMODE0_T0_DIV 0x00000004
6603 #define NV_PGRAPH_XFMODE0_T0_DIV_OFF 0xFFFFFFFB
6604 #define NV_PGRAPH_XFMODE0_T0_DIV_ON 0x00000004
6605 #define NV_PGRAPH_XFMODE0_T0_S 0x00000038
6606 #define NV_PGRAPH_XFMODE0_T0_S_PASS 0x00000000
6607 #define NV_PGRAPH_XFMODE0_T0_S_EYE 0x00000008
6608 #define NV_PGRAPH_XFMODE0_T0_S_OBJECT 0x00000010
6609 #define NV_PGRAPH_XFMODE0_T0_S_SPHERE 0x00000018
6610 #define NV_PGRAPH_XFMODE0_T0_S_NORMAL 0x00000020
6611 #define NV_PGRAPH_XFMODE0_T0_S_REFLECTION 0x00000028
6612 #define NV_PGRAPH_XFMODE0_T0_S_EMBOSS 0x00000030
6613 #define NV_PGRAPH_XFMODE0_T0_T 0x000001C0
6614 #define NV_PGRAPH_XFMODE0_T0_T_PASS 0x00000000
6615 #define NV_PGRAPH_XFMODE0_T0_T_EYE 0x00000040
6616 #define NV_PGRAPH_XFMODE0_T0_T_OBJECT 0x00000080
6617 #define NV_PGRAPH_XFMODE0_T0_T_SPHERE 0x000000C0
6618 #define NV_PGRAPH_XFMODE0_T0_T_NORMAL 0x00000100
6619 #define NV_PGRAPH_XFMODE0_T0_T_REFLECTION 0x00000140
6620 #define NV_PGRAPH_XFMODE0_T0_T_EMBOSS 0x00000180
6621 #define NV_PGRAPH_XFMODE0_T0_U 0x00000E00
6622 #define NV_PGRAPH_XFMODE0_T0_U_PASS 0x00000000
6623 #define NV_PGRAPH_XFMODE0_T0_U_EYE 0x00000200
6624 #define NV_PGRAPH_XFMODE0_T0_U_OBJECT 0x00000400
6625 #define NV_PGRAPH_XFMODE0_T0_U_NORMAL 0x00000800
6626 #define NV_PGRAPH_XFMODE0_T0_U_REFLECTION 0x00000A00
6627 #define NV_PGRAPH_XFMODE0_T0_U_EMBOSS 0x00000C00
6628 #define NV_PGRAPH_XFMODE0_T0_Q 0x00003000
6629 #define NV_PGRAPH_XFMODE0_T0_Q_PASS 0x00000000
6630 #define NV_PGRAPH_XFMODE0_T0_Q_EYE 0x00001000
6631 #define NV_PGRAPH_XFMODE0_T0_Q_OBJECT 0x00002000
6632 #define NV_PGRAPH_XFMODE0_T1_EN 0x00004000
6633 #define NV_PGRAPH_XFMODE0_T1_EN_OFF 0xFFFFBFFF
6634 #define NV_PGRAPH_XFMODE0_T1_EN_ON 0x00004000
6635 #define NV_PGRAPH_XFMODE0_T1_MODE 0x00008000
6636 #define NV_PGRAPH_XFMODE0_T1_MODE_PASS 0xFFFF7FFF
6637 #define NV_PGRAPH_XFMODE0_T1_MODE_TRANSFORM 0x00008000
6638 #define NV_PGRAPH_XFMODE0_T1_DIV 0x00010000
6639 #define NV_PGRAPH_XFMODE0_T1_DIV_OFF 0xFFFEFFFF
6640 #define NV_PGRAPH_XFMODE0_T1_DIV_ON 0x00010000
6641 #define NV_PGRAPH_XFMODE0_T1_S 0x000E0000
6642 #define NV_PGRAPH_XFMODE0_T1_S_PASS 0x00000000
6643 #define NV_PGRAPH_XFMODE0_T1_S_EYE 0x00020000
6644 #define NV_PGRAPH_XFMODE0_T1_S_OBJECT 0x00040000
6645 #define NV_PGRAPH_XFMODE0_T1_S_SPHERE 0x00060000
6646 #define NV_PGRAPH_XFMODE0_T1_S_NORMAL 0x00080000
6647 #define NV_PGRAPH_XFMODE0_T1_S_REFLECTION 0x000A0000
6648 #define NV_PGRAPH_XFMODE0_T1_S_EMBOSS 0x000C0000
6649 #define NV_PGRAPH_XFMODE0_T1_T 0x00700000
6650 #define NV_PGRAPH_XFMODE0_T1_T_PASS 0x00000000
6651 #define NV_PGRAPH_XFMODE0_T1_T_EYE 0x00100000
6652 #define NV_PGRAPH_XFMODE0_T1_T_OBJECT 0x00200000
6653 #define NV_PGRAPH_XFMODE0_T1_T_SPHERE 0x00300000
6654 #define NV_PGRAPH_XFMODE0_T1_T_NORMAL 0x00400000
6655 #define NV_PGRAPH_XFMODE0_T1_T_REFLECTION 0x00500000
6656 #define NV_PGRAPH_XFMODE0_T1_T_EMBOSS 0x00600000
6657 #define NV_PGRAPH_XFMODE0_T1_U 0x03800000
6658 #define NV_PGRAPH_XFMODE0_T1_U_PASS 0x00000000
6659 #define NV_PGRAPH_XFMODE0_T1_U_EYE 0x00800000
6660 #define NV_PGRAPH_XFMODE0_T1_U_OBJECT 0x01000000
6661 #define NV_PGRAPH_XFMODE0_T1_U_NORMAL 0x02000000
6662 #define NV_PGRAPH_XFMODE0_T1_U_REFLECTION 0x02800000
6663 #define NV_PGRAPH_XFMODE0_T1_U_EMBOSS 0x03000000
6664 #define NV_PGRAPH_XFMODE0_T1_Q 0x0C000000
6665 #define NV_PGRAPH_XFMODE0_T1_Q_PASS 0x00000000
6666 #define NV_PGRAPH_XFMODE0_T1_Q_EYE 0x04000000
6667 #define NV_PGRAPH_XFMODE0_T1_Q_OBJECT 0x08000000
6668 #define NV_PGRAPH_XFMODE0_EYETYPE 0x10000000
6669 #define NV_PGRAPH_XFMODE0_EYETYPE_INFINITE 0xEFFFFFFF
6670 #define NV_PGRAPH_XFMODE0_EYETYPE_LOCAL 0x10000000
6671 #define NV_PGRAPH_XFMODE0_LIGHTING 0x20000000
6672 #define NV_PGRAPH_XFMODE0_LIGHTING_OFF 0xDFFFFFFF
6673 #define NV_PGRAPH_XFMODE0_LIGHTING_ON 0x20000000
6674 #define NV_PGRAPH_XFMODE0_NORMAL 0x40000000
6675 #define NV_PGRAPH_XFMODE0_NORMAL_OFF 0xBFFFFFFF
6676 #define NV_PGRAPH_XFMODE0_NORMAL_ON 0x40000000
6677 #define NV_PGRAPH_XFMODE0_FOG 0x80000000
6678 #define NV_PGRAPH_XFMODE0_FOG_OFF 0x7FFFFFFF
6679 #define NV_PGRAPH_XFMODE0_FOG_ON 0x80000000
6680 
6681 /* NV-Register NV_PGRAPH_XFMODE1 */
6682 #define NV_PGRAPH_XFMODE1 0x00400F44
6683 #define NV_PGRAPH_XFMODE1_LIGHT0 0x00000003
6684 #define NV_PGRAPH_XFMODE1_LIGHT0_OFF 0x00000000
6685 #define NV_PGRAPH_XFMODE1_LIGHT0_INFINITE 0x00000001
6686 #define NV_PGRAPH_XFMODE1_LIGHT0_LOCAL 0x00000002
6687 #define NV_PGRAPH_XFMODE1_LIGHT0_SPOT 0x00000003
6688 #define NV_PGRAPH_XFMODE1_LIGHT1 0x0000000C
6689 #define NV_PGRAPH_XFMODE1_LIGHT1_OFF 0x00000000
6690 #define NV_PGRAPH_XFMODE1_LIGHT1_INFINITE 0x00000004
6691 #define NV_PGRAPH_XFMODE1_LIGHT1_LOCAL 0x00000008
6692 #define NV_PGRAPH_XFMODE1_LIGHT1_SPOT 0x0000000C
6693 #define NV_PGRAPH_XFMODE1_LIGHT2 0x00000030
6694 #define NV_PGRAPH_XFMODE1_LIGHT2_OFF 0x00000000
6695 #define NV_PGRAPH_XFMODE1_LIGHT2_INFINITE 0x00000010
6696 #define NV_PGRAPH_XFMODE1_LIGHT2_LOCAL 0x00000020
6697 #define NV_PGRAPH_XFMODE1_LIGHT2_SPOT 0x00000030
6698 #define NV_PGRAPH_XFMODE1_LIGHT3 0x000000C0
6699 #define NV_PGRAPH_XFMODE1_LIGHT3_OFF 0x00000000
6700 #define NV_PGRAPH_XFMODE1_LIGHT3_INFINITE 0x00000040
6701 #define NV_PGRAPH_XFMODE1_LIGHT3_LOCAL 0x00000080
6702 #define NV_PGRAPH_XFMODE1_LIGHT3_SPOT 0x000000C0
6703 #define NV_PGRAPH_XFMODE1_LIGHT4 0x00000300
6704 #define NV_PGRAPH_XFMODE1_LIGHT4_OFF 0x00000000
6705 #define NV_PGRAPH_XFMODE1_LIGHT4_INFINITE 0x00000100
6706 #define NV_PGRAPH_XFMODE1_LIGHT4_LOCAL 0x00000200
6707 #define NV_PGRAPH_XFMODE1_LIGHT4_SPOT 0x00000300
6708 #define NV_PGRAPH_XFMODE1_LIGHT5 0x00000C00
6709 #define NV_PGRAPH_XFMODE1_LIGHT5_OFF 0x00000000
6710 #define NV_PGRAPH_XFMODE1_LIGHT5_INFINITE 0x00000400
6711 #define NV_PGRAPH_XFMODE1_LIGHT5_LOCAL 0x00000800
6712 #define NV_PGRAPH_XFMODE1_LIGHT5_SPOT 0x00000C00
6713 #define NV_PGRAPH_XFMODE1_LIGHT6 0x00003000
6714 #define NV_PGRAPH_XFMODE1_LIGHT6_OFF 0x00000000
6715 #define NV_PGRAPH_XFMODE1_LIGHT6_INFINITE 0x00001000
6716 #define NV_PGRAPH_XFMODE1_LIGHT6_LOCAL 0x00002000
6717 #define NV_PGRAPH_XFMODE1_LIGHT6_SPOT 0x00003000
6718 #define NV_PGRAPH_XFMODE1_LIGHT7 0x0000C000
6719 #define NV_PGRAPH_XFMODE1_LIGHT7_OFF 0x00000000
6720 #define NV_PGRAPH_XFMODE1_LIGHT7_INFINITE 0x00004000
6721 #define NV_PGRAPH_XFMODE1_LIGHT7_LOCAL 0x00008000
6722 #define NV_PGRAPH_XFMODE1_LIGHT7_SPOT 0x0000C000
6723 #define NV_PGRAPH_XFMODE1_FOGGEN 0x00030000
6724 #define NV_PGRAPH_XFMODE1_FOGGEN_OFF 0x00000000
6725 #define NV_PGRAPH_XFMODE1_FOGGEN_RADIAL 0x00010000
6726 #define NV_PGRAPH_XFMODE1_FOGGEN_PLANE 0x00020000
6727 #define NV_PGRAPH_XFMODE1_FOGGEN_ABS_PLANAR 0x00030000
6728 #define NV_PGRAPH_XFMODE1_LAT 0x00040000
6729 #define NV_PGRAPH_XFMODE1_LAT_OFF 0xFFFBFFFF
6730 #define NV_PGRAPH_XFMODE1_LAT_ON 0x00040000
6731 #define NV_PGRAPH_XFMODE1_COLOR1I 0x00080000
6732 #define NV_PGRAPH_XFMODE1_COLOR1I_OFF 0xFFF7FFFF
6733 #define NV_PGRAPH_XFMODE1_COLOR1I_PASS 0x00080000
6734 #define NV_PGRAPH_XFMODE1_COLOR1O 0x00100000
6735 #define NV_PGRAPH_XFMODE1_COLOR1O_OFF 0xFFEFFFFF
6736 #define NV_PGRAPH_XFMODE1_COLOR1O_PASS 0x00100000
6737 #define NV_PGRAPH_XFMODE1_COLOR_MATERIAL 0x01E00000
6738 #define NV_PGRAPH_XFMODE1_COLOR_MATERIAL_DISABLED 0x00000000
6739 #define NV_PGRAPH_XFMODE1_COLOR_MATERIAL_EMISSION 0x00200000
6740 #define NV_PGRAPH_XFMODE1_COLOR_MATERIAL_AMBIENT 0x00400000
6741 #define NV_PGRAPH_XFMODE1_COLOR_MATERIAL_DIFFUSE 0x00800000
6742 #define NV_PGRAPH_XFMODE1_COLOR_MATERIAL_AMBIENT_DIFFUSE 0x00C00000
6743 #define NV_PGRAPH_XFMODE1_COLOR_MATERIAL_SPECULAR 0x01000000
6744 #define NV_PGRAPH_XFMODE1_POINT_PARAM 0x02000000
6745 #define NV_PGRAPH_XFMODE1_POINT_PARAM_OFF 0xFDFFFFFF
6746 #define NV_PGRAPH_XFMODE1_POINT_PARAM_ON 0x02000000
6747 #define NV_PGRAPH_XFMODE1_RESERVED 0x04000000
6748 #define NV_PGRAPH_XFMODE1_RESERVED_0 0xFBFFFFFF
6749 #define NV_PGRAPH_XFMODE1_SKIN_EN 0x08000000
6750 #define NV_PGRAPH_XFMODE1_SKIN_EN_OFF 0xF7FFFFFF
6751 #define NV_PGRAPH_XFMODE1_SKIN_EN_ON 0x08000000
6752 #define NV_PGRAPH_XFMODE1_PASS 0x10000000
6753 #define NV_PGRAPH_XFMODE1_PASS_FULLOPERATION 0xEFFFFFFF
6754 #define NV_PGRAPH_XFMODE1_PASS_PASSTHROUGH 0x10000000
6755 #define NV_PGRAPH_XFMODE1_HALFOFFSET 0x20000000
6756 #define NV_PGRAPH_XFMODE1_HALFOFFSET_OFF 0xDFFFFFFF
6757 #define NV_PGRAPH_XFMODE1_HALFOFFSET_ON 0x20000000
6758 
6759 /* NV-Register NV_PGRAPH_GLOBALSTATE0 */
6760 #define NV_PGRAPH_GLOBALSTATE0 0x00400F48
6761 #define NV_PGRAPH_GLOBALSTATE0_FOGMODE 0x00000007
6762 #define NV_PGRAPH_GLOBALSTATE0_FOGMODE_LINEAR 0x00000000
6763 #define NV_PGRAPH_GLOBALSTATE0_FOGMODE_EXP 0x00000001
6764 #define NV_PGRAPH_GLOBALSTATE0_FOGMODE_EXP2 0x00000003
6765 #define NV_PGRAPH_GLOBALSTATE0_FOGMODE_EXP_ABS 0x00000005
6766 #define NV_PGRAPH_GLOBALSTATE0_FOGMODE_EXP2_ABS 0x00000007
6767 #define NV_PGRAPH_GLOBALSTATE0_WINDOW_CLIPMODE 0x00000010
6768 #define NV_PGRAPH_GLOBALSTATE0_WINDOW_CLIPMODE_INCLUSIVE 0xFFFFFFEF
6769 #define NV_PGRAPH_GLOBALSTATE0_WINDOW_CLIPMODE_EXCLUSIVE 0x00000010
6770 #define NV_PGRAPH_GLOBALSTATE0_WITHIN_BEGINEND 0x00000100
6771 #define NV_PGRAPH_GLOBALSTATE0_WITHIN_BEGINEND_FALSE 0xFFFFFEFF
6772 #define NV_PGRAPH_GLOBALSTATE0_WITHIN_BEGINEND_TRUE 0x00000100
6773 #define NV_PGRAPH_GLOBALSTATE0_COMB0ALPHA_SINGLETEX 0x00010000
6774 #define NV_PGRAPH_GLOBALSTATE0_COMB0ALPHA_SINGLETEX_TRUE 0x00010000
6775 #define NV_PGRAPH_GLOBALSTATE0_COMB0COLOR_SINGLETEX 0x00020000
6776 #define NV_PGRAPH_GLOBALSTATE0_COMB0COLOR_SINGLETEX_TRUE 0x00020000
6777 #define NV_PGRAPH_GLOBALSTATE0_COMB1ALPHA_BYPASS 0x00040000
6778 #define NV_PGRAPH_GLOBALSTATE0_COMB1ALPHA_BYPASS_FALSE 0xFFFBFFFF
6779 #define NV_PGRAPH_GLOBALSTATE0_COMB1ALPHA_BYPASS_TRUE 0x00040000
6780 #define NV_PGRAPH_GLOBALSTATE0_COMB1COLOR_BYPASS 0x00080000
6781 #define NV_PGRAPH_GLOBALSTATE0_COMB1COLOR_BYPASS_FALSE 0xFFF7FFFF
6782 #define NV_PGRAPH_GLOBALSTATE0_COMB1COLOR_BYPASS_TRUE 0x00080000
6783 #define NV_PGRAPH_GLOBALSTATE0_COMB0ALPHA_ADDCMP 0x00100000
6784 #define NV_PGRAPH_GLOBALSTATE0_COMB0ALPHA_ADDCMP_FALSE 0xFFEFFFFF
6785 #define NV_PGRAPH_GLOBALSTATE0_COMB0ALPHA_ADDCMP_TRUE 0x00100000
6786 #define NV_PGRAPH_GLOBALSTATE0_COMB0COLOR_ADDCMP 0x00200000
6787 #define NV_PGRAPH_GLOBALSTATE0_COMB0COLOR_ADDCMP_FALSE 0xFFDFFFFF
6788 #define NV_PGRAPH_GLOBALSTATE0_COMB0COLOR_ADDCMP_TRUE 0x00200000
6789 #define NV_PGRAPH_GLOBALSTATE0_COMB1ALPHA_ADDCMP 0x00400000
6790 #define NV_PGRAPH_GLOBALSTATE0_COMB1ALPHA_ADDCMP_FALSE 0xFFBFFFFF
6791 #define NV_PGRAPH_GLOBALSTATE0_COMB1ALPHA_ADDCMP_TRUE 0x00400000
6792 #define NV_PGRAPH_GLOBALSTATE0_COMB1COLOR_ADDCMP 0x00800000
6793 #define NV_PGRAPH_GLOBALSTATE0_COMB1COLOR_ADDCMP_FALSE 0xFF7FFFFF
6794 #define NV_PGRAPH_GLOBALSTATE0_COMB1COLOR_ADDCMP_TRUE 0x00800000
6795 #define NV_PGRAPH_GLOBALSTATE0_Z_SETUP 0x07000000
6796 #define NV_PGRAPH_GLOBALSTATE0_Z_SETUP_Z16ZFIXEDZBUFFER 0x00000000
6797 #define NV_PGRAPH_GLOBALSTATE0_Z_SETUP_Z16ZFIXEDWBUFFER 0x01000000
6798 #define NV_PGRAPH_GLOBALSTATE0_Z_SETUP_Z16ZFLOATZBUFFER 0x02000000
6799 #define NV_PGRAPH_GLOBALSTATE0_Z_SETUP_Z16ZFLOATWBUFFER 0x03000000
6800 #define NV_PGRAPH_GLOBALSTATE0_Z_SETUP_Z24ZFIXEDZBUFFER 0x04000000
6801 #define NV_PGRAPH_GLOBALSTATE0_Z_SETUP_Z24ZFIXEDWBUFFER 0x05000000
6802 #define NV_PGRAPH_GLOBALSTATE0_Z_SETUP_Z24ZFLOATZBUFFER 0x06000000
6803 #define NV_PGRAPH_GLOBALSTATE0_Z_SETUP_Z24ZFLOATWBUFFER 0x07000000
6804 #define NV_PGRAPH_GLOBALSTATE0_Z_INITIALIZED 0x10000000
6805 #define NV_PGRAPH_GLOBALSTATE0_Z_INITIALIZED_FALSE 0xEFFFFFFF
6806 #define NV_PGRAPH_GLOBALSTATE0_Z_INITIALIZED_TRUE 0x10000000
6807 
6808 /* NV-Register NV_PGRAPH_GLOBALSTATE1 */
6809 #define NV_PGRAPH_GLOBALSTATE1 0x00400F4C
6810 #define NV_PGRAPH_GLOBALSTATE1_DMA_INSTANCE_2 0x0000FFFF
6811 #define NV_PGRAPH_GLOBALSTATE1_DMA_INSTANCE_2_INVALID 0x00000000
6812 #define NV_PGRAPH_GLOBALSTATE1_DMA_INSTANCE_3 0xFFFF0000
6813 #define NV_PGRAPH_GLOBALSTATE1_DMA_INSTANCE_3_INVALID 0x00000000
6814 
6815 /* NV-Register NV_PGRAPH_PIPE_ADDRESS */
6816 #define NV_PGRAPH_PIPE_ADDRESS 0x00400F50
6817 #define NV_PGRAPH_PIPE_ADDRESS_VALUE 0x0001FFFC
6818 
6819 /* NV-Register NV_PGRAPH_PIPE_DATA */
6820 #define NV_PGRAPH_PIPE_DATA 0x00400F54
6821 #define NV_PGRAPH_PIPE_DATA_VALUE 0xFFFFFFFF
6822 
6823 /* NV-Register NV_PGRAPH_CHEOPS_OFFSET */
6824 #define NV_PGRAPH_CHEOPS_OFFSET 0x00400F58
6825 #define NV_PGRAPH_CHEOPS_OFFSET_PROGRAM 0x000000FF
6826 #define NV_PGRAPH_CHEOPS_OFFSET_PROGRAM_0 0x00000000
6827 #define NV_PGRAPH_CHEOPS_OFFSET_CONSTANTS 0x0000FF00
6828 #define NV_PGRAPH_CHEOPS_OFFSET_CONSTANTS_0 0x00000000
6829 
6830 /* NV-Register NV_PGRAPH_SHADOW */
6831 #define NV_PGRAPH_SHADOW 0x00400F5C
6832 #define NV_PGRAPH_SHADOW_WITHIN_BEGINEND 0x00000001
6833 #define NV_PGRAPH_SHADOW_WITHIN_BEGINEND_FALSE 0xFFFFFFFE
6834 #define NV_PGRAPH_SHADOW_WITHIN_BEGINEND_TRUE 0x00000001
6835 #define NV_PGRAPH_SHADOW_SECONDARY_COLOR_EN 0x00000004
6836 #define NV_PGRAPH_SHADOW_SECONDARY_COLOR_EN_FALSE 0xFFFFFFFB
6837 #define NV_PGRAPH_SHADOW_SECONDARY_COLOR_EN_TRUE 0x00000004
6838 #define NV_PGRAPH_SHADOW_COLORMATERIAL_SPECULAR 0x00000008
6839 #define NV_PGRAPH_SHADOW_COLORMATERIAL_SPECULAR_FALSE 0xFFFFFFF7
6840 #define NV_PGRAPH_SHADOW_COLORMATERIAL_SPECULAR_TRUE 0x00000008
6841 #define NV_PGRAPH_SHADOW_IN_PATCH 0x00000010
6842 #define NV_PGRAPH_SHADOW_IN_PATCH_FALSE 0xFFFFFFEF
6843 #define NV_PGRAPH_SHADOW_IN_PATCH_TRUE 0x00000010
6844 #define NV_PGRAPH_SHADOW_IN_PATCH0 0x00000020
6845 #define NV_PGRAPH_SHADOW_IN_PATCH0_FALSE 0xFFFFFFDF
6846 #define NV_PGRAPH_SHADOW_IN_PATCH0_TRUE 0x00000020
6847 #define NV_PGRAPH_SHADOW_IN_PATCH1 0x00000040
6848 #define NV_PGRAPH_SHADOW_IN_PATCH1_FALSE 0xFFFFFFBF
6849 #define NV_PGRAPH_SHADOW_IN_PATCH1_TRUE 0x00000040
6850 #define NV_PGRAPH_SHADOW_IN_PATCH2 0x00000080
6851 #define NV_PGRAPH_SHADOW_IN_PATCH2_FALSE 0xFFFFFF7F
6852 #define NV_PGRAPH_SHADOW_IN_PATCH2_TRUE 0x00000080
6853 #define NV_PGRAPH_SHADOW_IN_SWATCH 0x00000100
6854 #define NV_PGRAPH_SHADOW_IN_SWATCH_FALSE 0xFFFFFEFF
6855 #define NV_PGRAPH_SHADOW_IN_SWATCH_TRUE 0x00000100
6856 #define NV_PGRAPH_SHADOW_GUARD 0x00000600
6857 #define NV_PGRAPH_SHADOW_GUARD_FALSE 0x00000000
6858 #define NV_PGRAPH_SHADOW_GUARD_LEFT_SET 0x00000200
6859 #define NV_PGRAPH_SHADOW_GUARD_RIGHT_SET 0x00002000
6860 #define NV_PGRAPH_SHADOW_GUARD_BOTH_SET 0x00002200
6861 #define NV_PGRAPH_SHADOW_IN_CURVE 0x00000800
6862 #define NV_PGRAPH_SHADOW_IN_CURVE_FALSE 0xFFFFF7FF
6863 #define NV_PGRAPH_SHADOW_IN_CURVE_TRUE 0x00000800
6864 #define NV_PGRAPH_SHADOW_IN_TRANSITION 0x00001000
6865 #define NV_PGRAPH_SHADOW_IN_TRANSITION_FALSE 0xFFFFEFFF
6866 #define NV_PGRAPH_SHADOW_IN_TRANSITION_TRUE 0x00001000
6867 #define NV_PGRAPH_SHADOW_IN_TRANSITION0 0x00002000
6868 #define NV_PGRAPH_SHADOW_IN_TRANSITION0_FALSE 0xFFFFDFFF
6869 #define NV_PGRAPH_SHADOW_IN_TRANSITION0_TRUE 0x00002000
6870 #define NV_PGRAPH_SHADOW_IN_TRANSITION1 0x00004000
6871 #define NV_PGRAPH_SHADOW_IN_TRANSITION1_FALSE 0xFFFFBFFF
6872 #define NV_PGRAPH_SHADOW_IN_TRANSITION1_TRUE 0x00004000
6873 #define NV_PGRAPH_SHADOW_TRANSITION_CONTROL 0x00008000
6874 #define NV_PGRAPH_SHADOW_TRANSITION_CONTROL_FALSE 0xFFFF7FFF
6875 #define NV_PGRAPH_SHADOW_TRANSITION_CONTROL_TRUE 0x00008000
6876 #define NV_PGRAPH_SHADOW_WITHIN_BEGINEND_CURVE 0x00010000
6877 #define NV_PGRAPH_SHADOW_WITHIN_BEGINEND_CURVE_FALSE 0xFFFEFFFF
6878 #define NV_PGRAPH_SHADOW_WITHIN_BEGINEND_CURVE_TRUE 0x00010000
6879 #define NV_PGRAPH_SHADOW_SWATCH_DONE 0x00020000
6880 #define NV_PGRAPH_SHADOW_SWATCH_DONE_FALSE 0xFFFDFFFF
6881 #define NV_PGRAPH_SHADOW_SWATCH_DONE_TRUE 0x00020000
6882 
6883 /* NV-Register NV_PGRAPH_FD_COUNTER */
6884 #define NV_PGRAPH_FD_COUNTER 0x00400F60
6885 #define NV_PGRAPH_FD_COUNTER_V 0x000000FF
6886 
6887 /* NV-Register NV_PGRAPH_FD_GUARD_CURVE */
6888 #define NV_PGRAPH_FD_GUARD_CURVE 0x00400F64
6889 #define NV_PGRAPH_FD_GUARD_CURVE_SPEC 0x000000FF
6890 
6891 /* NV-Register NV_PGRAPH_FD_CURVE */
6892 #define NV_PGRAPH_FD_CURVE 0x00400F68
6893 #define NV_PGRAPH_FD_CURVE_SPEC 0x000000FF
6894 
6895 /* NV-Register NV_PGRAPH_FD_CURVES_PER_SWATCH */
6896 #define NV_PGRAPH_FD_CURVES_PER_SWATCH 0x00400F6C
6897 #define NV_PGRAPH_FD_CURVES_PER_SWATCH_SPEC 0x000000FF
6898 
6899 /* NV-Register NV_PGRAPH_CSV0_C */
6900 #define NV_PGRAPH_CSV0_C 0x00400F88
6901 #define NV_PGRAPH_CSV0_C_CHEOPS_PROGRAM_START 0x0000FF00
6902 #define NV_PGRAPH_CSV0_C_CHEOPS_PROGRAM_START_0 0x00000000
6903 #define NV_PGRAPH_CSV0_C_SEPARATE_SPECULAR_ENABLE 0x00040000
6904 #define NV_PGRAPH_CSV0_C_SEPARATE_SPECULAR_ENABLE_FALSE 0xFFFBFFFF
6905 #define NV_PGRAPH_CSV0_C_SEPARATE_SPECULAR_ENABLE_TRUE 0x00040000
6906 #define NV_PGRAPH_CSV0_C_SPECULAR 0x00180000
6907 #define NV_PGRAPH_CSV0_C_SPECULAR_DISABLE 0x00000000
6908 #define NV_PGRAPH_CSV0_C_SPECULAR_DIFFUSE_VERTEX_COLOR 0x00080000
6909 #define NV_PGRAPH_CSV0_C_SPECULAR_SPECULAR_VERTEX_COLOR 0x00100000
6910 #define NV_PGRAPH_CSV0_C_DIFFUSE 0x00600000
6911 #define NV_PGRAPH_CSV0_C_DIFFUSE_DISABLE 0x00000000
6912 #define NV_PGRAPH_CSV0_C_DIFFUSE_DIFFUSE_VERTEX_COLOR 0x00200000
6913 #define NV_PGRAPH_CSV0_C_DIFFUSE_SPECULAR_VERTEX_COLOR 0x00400000
6914 #define NV_PGRAPH_CSV0_C_AMBIENT 0x01800000
6915 #define NV_PGRAPH_CSV0_C_AMBIENT_DISABLE 0x00000000
6916 #define NV_PGRAPH_CSV0_C_AMBIENT_DIFFUSE_VERTEX_COLOR 0x00800000
6917 #define NV_PGRAPH_CSV0_C_AMBIENT_SPECULAR_VERTEX_COLOR 0x01000000
6918 #define NV_PGRAPH_CSV0_C_EMISSION 0x06000000
6919 #define NV_PGRAPH_CSV0_C_EMISSION_DISABLE 0x00000000
6920 #define NV_PGRAPH_CSV0_C_EMISSION_DIFFUSE_VERTEX_COLOR 0x02000000
6921 #define NV_PGRAPH_CSV0_C_EMISSION_SPECULAR_VERTEX_COLOR 0x04000000
6922 #define NV_PGRAPH_CSV0_C_NORMALIZATION_ENABLE 0x08000000
6923 #define NV_PGRAPH_CSV0_C_NORMALIZATION_ENABLE_FALSE 0xF7FFFFFF
6924 #define NV_PGRAPH_CSV0_C_NORMALIZATION_ENABLE_TRUE 0x08000000
6925 #define NV_PGRAPH_CSV0_C_LIGHT_ATTENUATION 0x10000000
6926 #define NV_PGRAPH_CSV0_C_LIGHT_ATTENUATION_INVERT 0xEFFFFFFF
6927 #define NV_PGRAPH_CSV0_C_LIGHT_ATTENUATION_NOT_INVERT 0x10000000
6928 #define NV_PGRAPH_CSV0_C_TWO_SIDED_LIGHTING 0x20000000
6929 #define NV_PGRAPH_CSV0_C_TWO_SIDED_LIGHTING_OFF 0xDFFFFFFF
6930 #define NV_PGRAPH_CSV0_C_TWO_SIDED_LIGHTING_ON 0x20000000
6931 #define NV_PGRAPH_CSV0_C_EYETYPE 0x40000000
6932 #define NV_PGRAPH_CSV0_C_EYETYPE_INFINITE 0xBFFFFFFF
6933 #define NV_PGRAPH_CSV0_C_EYETYPE_LOCAL 0x40000000
6934 #define NV_PGRAPH_CSV0_C_LIGHTING 0x80000000
6935 #define NV_PGRAPH_CSV0_C_LIGHTING_OFF 0x7FFFFFFF
6936 #define NV_PGRAPH_CSV0_C_LIGHTING_ON 0x80000000
6937 
6938 /* NV-Register NV_PGRAPH_CSV0_D */
6939 #define NV_PGRAPH_CSV0_D 0x00400F8C
6940 #define NV_PGRAPH_CSV0_D_LIGHT0 0x00000003
6941 #define NV_PGRAPH_CSV0_D_LIGHT0_OFF 0x00000000
6942 #define NV_PGRAPH_CSV0_D_LIGHT0_INFINITE 0x00000001
6943 #define NV_PGRAPH_CSV0_D_LIGHT0_LOCAL 0x00000002
6944 #define NV_PGRAPH_CSV0_D_LIGHT0_SPOT 0x00000003
6945 #define NV_PGRAPH_CSV0_D_LIGHT1 0x0000000C
6946 #define NV_PGRAPH_CSV0_D_LIGHT1_OFF 0x00000000
6947 #define NV_PGRAPH_CSV0_D_LIGHT1_INFINITE 0x00000004
6948 #define NV_PGRAPH_CSV0_D_LIGHT1_LOCAL 0x00000008
6949 #define NV_PGRAPH_CSV0_D_LIGHT1_SPOT 0x0000000C
6950 #define NV_PGRAPH_CSV0_D_LIGHT2 0x00000030
6951 #define NV_PGRAPH_CSV0_D_LIGHT2_OFF 0x00000000
6952 #define NV_PGRAPH_CSV0_D_LIGHT2_INFINITE 0x00000010
6953 #define NV_PGRAPH_CSV0_D_LIGHT2_LOCAL 0x00000020
6954 #define NV_PGRAPH_CSV0_D_LIGHT2_SPOT 0x00000030
6955 #define NV_PGRAPH_CSV0_D_LIGHT3 0x000000C0
6956 #define NV_PGRAPH_CSV0_D_LIGHT3_OFF 0x00000000
6957 #define NV_PGRAPH_CSV0_D_LIGHT3_INFINITE 0x00000040
6958 #define NV_PGRAPH_CSV0_D_LIGHT3_LOCAL 0x00000080
6959 #define NV_PGRAPH_CSV0_D_LIGHT3_SPOT 0x000000C0
6960 #define NV_PGRAPH_CSV0_D_LIGHT4 0x00000300
6961 #define NV_PGRAPH_CSV0_D_LIGHT4_OFF 0x00000000
6962 #define NV_PGRAPH_CSV0_D_LIGHT4_INFINITE 0x00000100
6963 #define NV_PGRAPH_CSV0_D_LIGHT4_LOCAL 0x00000200
6964 #define NV_PGRAPH_CSV0_D_LIGHT4_SPOT 0x00000300
6965 #define NV_PGRAPH_CSV0_D_LIGHT5 0x00000C00
6966 #define NV_PGRAPH_CSV0_D_LIGHT5_OFF 0x00000000
6967 #define NV_PGRAPH_CSV0_D_LIGHT5_INFINITE 0x00000400
6968 #define NV_PGRAPH_CSV0_D_LIGHT5_LOCAL 0x00000800
6969 #define NV_PGRAPH_CSV0_D_LIGHT5_SPOT 0x00000C00
6970 #define NV_PGRAPH_CSV0_D_LIGHT6 0x00003000
6971 #define NV_PGRAPH_CSV0_D_LIGHT6_OFF 0x00000000
6972 #define NV_PGRAPH_CSV0_D_LIGHT6_INFINITE 0x00001000
6973 #define NV_PGRAPH_CSV0_D_LIGHT6_LOCAL 0x00002000
6974 #define NV_PGRAPH_CSV0_D_LIGHT6_SPOT 0x00003000
6975 #define NV_PGRAPH_CSV0_D_LIGHT7 0x0000C000
6976 #define NV_PGRAPH_CSV0_D_LIGHT7_OFF 0x00000000
6977 #define NV_PGRAPH_CSV0_D_LIGHT7_INFINITE 0x00004000
6978 #define NV_PGRAPH_CSV0_D_LIGHT7_LOCAL 0x00008000
6979 #define NV_PGRAPH_CSV0_D_LIGHT7_SPOT 0x0000C000
6980 #define NV_PGRAPH_CSV0_D_EXP 0x00200000
6981 #define NV_PGRAPH_CSV0_D_EXP_FALSE 0xFFDFFFFF
6982 #define NV_PGRAPH_CSV0_D_EXP_TRUE 0x00200000
6983 #define NV_PGRAPH_CSV0_D_FOGGENMODE 0x00C00000
6984 #define NV_PGRAPH_CSV0_D_FOGGENMODE_SPECULAR 0x00000000
6985 #define NV_PGRAPH_CSV0_D_FOGGENMODE_RADIAL 0x00400000
6986 #define NV_PGRAPH_CSV0_D_FOGGENMODE_PLANAR 0x00800000
6987 #define NV_PGRAPH_CSV0_D_FOGGENMODE_DIFFUSE 0x00C00000
6988 #define NV_PGRAPH_CSV0_D_FOG_ENABLE 0x01000000
6989 #define NV_PGRAPH_CSV0_D_FOG_ENABLE_FALSE 0xFEFFFFFF
6990 #define NV_PGRAPH_CSV0_D_FOG_ENABLE_TRUE 0x01000000
6991 #define NV_PGRAPH_CSV0_D_POINTPARAMS_ENABLE 0x02000000
6992 #define NV_PGRAPH_CSV0_D_POINTPARAMS_ENABLE_FALSE 0xFDFFFFFF
6993 #define NV_PGRAPH_CSV0_D_POINTPARAMS_ENABLE_TRUE 0x02000000
6994 #define NV_PGRAPH_CSV0_D_SKIN 0x1C000000
6995 #define NV_PGRAPH_CSV0_D_SKIN_OFF 0x00000000
6996 #define NV_PGRAPH_CSV0_D_SKIN_2G 0x04000000
6997 #define NV_PGRAPH_CSV0_D_SKIN_2 0x08000000
6998 #define NV_PGRAPH_CSV0_D_SKIN_3 0x0C000000
6999 #define NV_PGRAPH_CSV0_D_SKIN_4 0x10000000
7000 #define NV_PGRAPH_CSV0_D_CHEOPS_STALL 0x20000000
7001 #define NV_PGRAPH_CSV0_D_CHEOPS_STALL_OFF 0xDFFFFFFF
7002 #define NV_PGRAPH_CSV0_D_CHEOPS_STALL_ON 0x20000000
7003 #define NV_PGRAPH_CSV0_D_MODE 0xC0000000
7004 #define NV_PGRAPH_CSV0_D_MODE_SEQUENCER 0x00000000
7005 #define NV_PGRAPH_CSV0_D_MODE_PASSTHROUGH 0x40000000
7006 #define NV_PGRAPH_CSV0_D_MODE_PROGRAM 0x80000000
7007 
7008 /* NV-Register NV_PGRAPH_CSV1_A */
7009 #define NV_PGRAPH_CSV1_A 0x00400F90
7010 #define NV_PGRAPH_CSV1_A_T0_EN 0x00000001
7011 #define NV_PGRAPH_CSV1_A_T0_EN_OFF 0xFFFFFFFE
7012 #define NV_PGRAPH_CSV1_A_T0_EN_ON 0x00000001
7013 #define NV_PGRAPH_CSV1_A_T0_MODE 0x00000002
7014 #define NV_PGRAPH_CSV1_A_T0_MODE_PASS 0xFFFFFFFD
7015 #define NV_PGRAPH_CSV1_A_T0_MODE_TRANSFORM 0x00000002
7016 #define NV_PGRAPH_CSV1_A_T0_TEXTURE 0x00000004
7017 #define NV_PGRAPH_CSV1_A_T0_TEXTURE_2D 0xFFFFFFFB
7018 #define NV_PGRAPH_CSV1_A_T0_TEXTURE_3D 0x00000004
7019 #define NV_PGRAPH_CSV1_A_T0_S 0x00000070
7020 #define NV_PGRAPH_CSV1_A_T0_S_PASS 0x00000000
7021 #define NV_PGRAPH_CSV1_A_T0_S_EYE 0x00000010
7022 #define NV_PGRAPH_CSV1_A_T0_S_OBJECT 0x00000020
7023 #define NV_PGRAPH_CSV1_A_T0_S_SPHERE 0x00000030
7024 #define NV_PGRAPH_CSV1_A_T0_S_NORMAL 0x00000040
7025 #define NV_PGRAPH_CSV1_A_T0_S_REFLECTION 0x00000050
7026 #define NV_PGRAPH_CSV1_A_T0_S_EMBOSS 0x00000060
7027 #define NV_PGRAPH_CSV1_A_T0_T 0x00000380
7028 #define NV_PGRAPH_CSV1_A_T0_T_PASS 0x00000000
7029 #define NV_PGRAPH_CSV1_A_T0_T_EYE 0x00000080
7030 #define NV_PGRAPH_CSV1_A_T0_T_OBJECT 0x00000100
7031 #define NV_PGRAPH_CSV1_A_T0_T_SPHERE 0x00000180
7032 #define NV_PGRAPH_CSV1_A_T0_T_NORMAL 0x00000200
7033 #define NV_PGRAPH_CSV1_A_T0_T_REFLECTION 0x00000280
7034 #define NV_PGRAPH_CSV1_A_T0_T_EMBOSS 0x00000300
7035 #define NV_PGRAPH_CSV1_A_T0_U 0x00001C00
7036 #define NV_PGRAPH_CSV1_A_T0_U_PASS 0x00000000
7037 #define NV_PGRAPH_CSV1_A_T0_U_EYE 0x00000400
7038 #define NV_PGRAPH_CSV1_A_T0_U_OBJECT 0x00000800
7039 #define NV_PGRAPH_CSV1_A_T0_U_NORMAL 0x00001000
7040 #define NV_PGRAPH_CSV1_A_T0_U_REFLECTION 0x00001400
7041 #define NV_PGRAPH_CSV1_A_T0_U_EMBOSS 0x00001800
7042 #define NV_PGRAPH_CSV1_A_T0_Q 0x0000E000
7043 #define NV_PGRAPH_CSV1_A_T0_Q_PASS 0x00000000
7044 #define NV_PGRAPH_CSV1_A_T0_Q_EYE 0x00002000
7045 #define NV_PGRAPH_CSV1_A_T0_Q_OBJECT 0x00004000
7046 #define NV_PGRAPH_CSV1_A_T1_EN 0x00010000
7047 #define NV_PGRAPH_CSV1_A_T1_EN_OFF 0xFFFEFFFF
7048 #define NV_PGRAPH_CSV1_A_T1_EN_ON 0x00010000
7049 #define NV_PGRAPH_CSV1_A_T1_MODE 0x00020000
7050 #define NV_PGRAPH_CSV1_A_T1_MODE_PASS 0xFFFDFFFF
7051 #define NV_PGRAPH_CSV1_A_T1_MODE_TRANSFORM 0x00020000
7052 #define NV_PGRAPH_CSV1_A_T1_TEXTURE 0x00040000
7053 #define NV_PGRAPH_CSV1_A_T1_TEXTURE_2D 0xFFFBFFFF
7054 #define NV_PGRAPH_CSV1_A_T1_TEXTURE_3D 0x00040000
7055 #define NV_PGRAPH_CSV1_A_T1_S 0x00700000
7056 #define NV_PGRAPH_CSV1_A_T1_S_PASS 0x00000000
7057 #define NV_PGRAPH_CSV1_A_T1_S_EYE 0x00100000
7058 #define NV_PGRAPH_CSV1_A_T1_S_OBJECT 0x00200000
7059 #define NV_PGRAPH_CSV1_A_T1_S_SPHERE 0x00300000
7060 #define NV_PGRAPH_CSV1_A_T1_S_NORMAL 0x00400000
7061 #define NV_PGRAPH_CSV1_A_T1_S_REFLECTION 0x00500000
7062 #define NV_PGRAPH_CSV1_A_T1_S_EMBOSS 0x00600000
7063 #define NV_PGRAPH_CSV1_A_T1_T 0x03800000
7064 #define NV_PGRAPH_CSV1_A_T1_T_PASS 0x00000000
7065 #define NV_PGRAPH_CSV1_A_T1_T_EYE 0x00800000
7066 #define NV_PGRAPH_CSV1_A_T1_T_OBJECT 0x01000000
7067 #define NV_PGRAPH_CSV1_A_T1_T_SPHERE 0x01800000
7068 #define NV_PGRAPH_CSV1_A_T1_T_NORMAL 0x02000000
7069 #define NV_PGRAPH_CSV1_A_T1_T_REFLECTION 0x02800000
7070 #define NV_PGRAPH_CSV1_A_T1_T_EMBOSS 0x03000000
7071 #define NV_PGRAPH_CSV1_A_T1_U 0x1C000000
7072 #define NV_PGRAPH_CSV1_A_T1_U_PASS 0x00000000
7073 #define NV_PGRAPH_CSV1_A_T1_U_EYE 0x04000000
7074 #define NV_PGRAPH_CSV1_A_T1_U_OBJECT 0x08000000
7075 #define NV_PGRAPH_CSV1_A_T1_U_NORMAL 0x10000000
7076 #define NV_PGRAPH_CSV1_A_T1_U_REFLECTION 0x14000000
7077 #define NV_PGRAPH_CSV1_A_T1_U_EMBOSS 0x18000000
7078 #define NV_PGRAPH_CSV1_A_T1_Q 0xE0000000
7079 #define NV_PGRAPH_CSV1_A_T1_Q_PASS 0x00000000
7080 #define NV_PGRAPH_CSV1_A_T1_Q_EYE 0x20000000
7081 #define NV_PGRAPH_CSV1_A_T1_Q_OBJECT 0x40000000
7082 
7083 /* NV-Register NV_PGRAPH_CSV1_B */
7084 #define NV_PGRAPH_CSV1_B 0x00400F94
7085 #define NV_PGRAPH_CSV1_B_T2_EN 0x00000001
7086 #define NV_PGRAPH_CSV1_B_T2_EN_OFF 0xFFFFFFFE
7087 #define NV_PGRAPH_CSV1_B_T2_EN_ON 0x00000001
7088 #define NV_PGRAPH_CSV1_B_T2_MODE 0x00000002
7089 #define NV_PGRAPH_CSV1_B_T2_MODE_PASS 0xFFFFFFFD
7090 #define NV_PGRAPH_CSV1_B_T2_MODE_TRANSFORM 0x00000002
7091 #define NV_PGRAPH_CSV1_B_T2_TEXTURE 0x00000004
7092 #define NV_PGRAPH_CSV1_B_T2_TEXTURE_2D 0xFFFFFFFB
7093 #define NV_PGRAPH_CSV1_B_T2_TEXTURE_3D 0x00000004
7094 #define NV_PGRAPH_CSV1_B_T2_S 0x00000070
7095 #define NV_PGRAPH_CSV1_B_T2_S_PASS 0x00000000
7096 #define NV_PGRAPH_CSV1_B_T2_S_EYE 0x00000010
7097 #define NV_PGRAPH_CSV1_B_T2_S_OBJECT 0x00000020
7098 #define NV_PGRAPH_CSV1_B_T2_S_SPHERE 0x00000030
7099 #define NV_PGRAPH_CSV1_B_T2_S_NORMAL 0x00000040
7100 #define NV_PGRAPH_CSV1_B_T2_S_REFLECTION 0x00000050
7101 #define NV_PGRAPH_CSV1_B_T2_S_EMBOSS 0x00000060
7102 #define NV_PGRAPH_CSV1_B_T2_T 0x00000380
7103 #define NV_PGRAPH_CSV1_B_T2_T_PASS 0x00000000
7104 #define NV_PGRAPH_CSV1_B_T2_T_EYE 0x00000080
7105 #define NV_PGRAPH_CSV1_B_T2_T_OBJECT 0x00000100
7106 #define NV_PGRAPH_CSV1_B_T2_T_SPHERE 0x00000180
7107 #define NV_PGRAPH_CSV1_B_T2_T_NORMAL 0x00000200
7108 #define NV_PGRAPH_CSV1_B_T2_T_REFLECTION 0x00000280
7109 #define NV_PGRAPH_CSV1_B_T2_T_EMBOSS 0x00000300
7110 #define NV_PGRAPH_CSV1_B_T2_U 0x00001C00
7111 #define NV_PGRAPH_CSV1_B_T2_U_PASS 0x00000000
7112 #define NV_PGRAPH_CSV1_B_T2_U_EYE 0x00000400
7113 #define NV_PGRAPH_CSV1_B_T2_U_OBJECT 0x00000800
7114 #define NV_PGRAPH_CSV1_B_T2_U_NORMAL 0x00001000
7115 #define NV_PGRAPH_CSV1_B_T2_U_REFLECTION 0x00001400
7116 #define NV_PGRAPH_CSV1_B_T2_U_EMBOSS 0x00001800
7117 #define NV_PGRAPH_CSV1_B_T2_Q 0x0000E000
7118 #define NV_PGRAPH_CSV1_B_T2_Q_PASS 0x00000000
7119 #define NV_PGRAPH_CSV1_B_T2_Q_EYE 0x00002000
7120 #define NV_PGRAPH_CSV1_B_T2_Q_OBJECT 0x00004000
7121 #define NV_PGRAPH_CSV1_B_T3_EN 0x00010000
7122 #define NV_PGRAPH_CSV1_B_T3_EN_OFF 0xFFFEFFFF
7123 #define NV_PGRAPH_CSV1_B_T3_EN_ON 0x00010000
7124 #define NV_PGRAPH_CSV1_B_T3_MODE 0x00020000
7125 #define NV_PGRAPH_CSV1_B_T3_MODE_PASS 0xFFFDFFFF
7126 #define NV_PGRAPH_CSV1_B_T3_MODE_TRANSFORM 0x00020000
7127 #define NV_PGRAPH_CSV1_B_T3_TEXTURE 0x00040000
7128 #define NV_PGRAPH_CSV1_B_T3_TEXTURE_2D 0xFFFBFFFF
7129 #define NV_PGRAPH_CSV1_B_T3_TEXTURE_3D 0x00040000
7130 #define NV_PGRAPH_CSV1_B_T3_S 0x00700000
7131 #define NV_PGRAPH_CSV1_B_T3_S_PASS 0x00000000
7132 #define NV_PGRAPH_CSV1_B_T3_S_EYE 0x00100000
7133 #define NV_PGRAPH_CSV1_B_T3_S_OBJECT 0x00200000
7134 #define NV_PGRAPH_CSV1_B_T3_S_SPHERE 0x00300000
7135 #define NV_PGRAPH_CSV1_B_T3_S_NORMAL 0x00400000
7136 #define NV_PGRAPH_CSV1_B_T3_S_REFLECTION 0x00500000
7137 #define NV_PGRAPH_CSV1_B_T3_S_EMBOSS 0x00600000
7138 #define NV_PGRAPH_CSV1_B_T3_T 0x03800000
7139 #define NV_PGRAPH_CSV1_B_T3_T_PASS 0x00000000
7140 #define NV_PGRAPH_CSV1_B_T3_T_EYE 0x00800000
7141 #define NV_PGRAPH_CSV1_B_T3_T_OBJECT 0x01000000
7142 #define NV_PGRAPH_CSV1_B_T3_T_SPHERE 0x01800000
7143 #define NV_PGRAPH_CSV1_B_T3_T_NORMAL 0x02000000
7144 #define NV_PGRAPH_CSV1_B_T3_T_REFLECTION 0x02800000
7145 #define NV_PGRAPH_CSV1_B_T3_T_EMBOSS 0x03000000
7146 #define NV_PGRAPH_CSV1_B_T3_U 0x1C000000
7147 #define NV_PGRAPH_CSV1_B_T3_U_PASS 0x00000000
7148 #define NV_PGRAPH_CSV1_B_T3_U_EYE 0x04000000
7149 #define NV_PGRAPH_CSV1_B_T3_U_OBJECT 0x08000000
7150 #define NV_PGRAPH_CSV1_B_T3_U_NORMAL 0x10000000
7151 #define NV_PGRAPH_CSV1_B_T3_U_REFLECTION 0x14000000
7152 #define NV_PGRAPH_CSV1_B_T3_U_EMBOSS 0x18000000
7153 #define NV_PGRAPH_CSV1_B_T3_Q 0xE0000000
7154 #define NV_PGRAPH_CSV1_B_T3_Q_PASS 0x00000000
7155 #define NV_PGRAPH_CSV1_B_T3_Q_EYE 0x20000000
7156 #define NV_PGRAPH_CSV1_B_T3_Q_OBJECT 0x40000000
7157 
7158 /* NV-Register NV_PGRAPH_CSV1_C */
7159 #define NV_PGRAPH_CSV1_C 0x00400F98
7160 #define NV_PGRAPH_CSV1_C_T4_EN 0x00000001
7161 #define NV_PGRAPH_CSV1_C_T4_EN_OFF 0xFFFFFFFE
7162 #define NV_PGRAPH_CSV1_C_T4_EN_ON 0x00000001
7163 #define NV_PGRAPH_CSV1_C_T4_MODE 0x00000002
7164 #define NV_PGRAPH_CSV1_C_T4_MODE_PASS 0xFFFFFFFD
7165 #define NV_PGRAPH_CSV1_C_T4_MODE_TRANSFORM 0x00000002
7166 #define NV_PGRAPH_CSV1_C_T4_TEXTURE 0x00000004
7167 #define NV_PGRAPH_CSV1_C_T4_TEXTURE_2D 0xFFFFFFFB
7168 #define NV_PGRAPH_CSV1_C_T4_TEXTURE_3D 0x00000004
7169 #define NV_PGRAPH_CSV1_C_T4_S 0x00000070
7170 #define NV_PGRAPH_CSV1_C_T4_S_PASS 0x00000000
7171 #define NV_PGRAPH_CSV1_C_T4_S_EYE 0x00000010
7172 #define NV_PGRAPH_CSV1_C_T4_S_OBJECT 0x00000020
7173 #define NV_PGRAPH_CSV1_C_T4_S_SPHERE 0x00000030
7174 #define NV_PGRAPH_CSV1_C_T4_S_NORMAL 0x00000040
7175 #define NV_PGRAPH_CSV1_C_T4_S_REFLECTION 0x00000050
7176 #define NV_PGRAPH_CSV1_C_T4_S_EMBOSS 0x00000060
7177 #define NV_PGRAPH_CSV1_C_T4_T 0x00000380
7178 #define NV_PGRAPH_CSV1_C_T4_T_PASS 0x00000000
7179 #define NV_PGRAPH_CSV1_C_T4_T_EYE 0x00000080
7180 #define NV_PGRAPH_CSV1_C_T4_T_OBJECT 0x00000100
7181 #define NV_PGRAPH_CSV1_C_T4_T_SPHERE 0x00000180
7182 #define NV_PGRAPH_CSV1_C_T4_T_NORMAL 0x00000200
7183 #define NV_PGRAPH_CSV1_C_T4_T_REFLECTION 0x00000280
7184 #define NV_PGRAPH_CSV1_C_T4_T_EMBOSS 0x00000300
7185 #define NV_PGRAPH_CSV1_C_T4_U 0x00001C00
7186 #define NV_PGRAPH_CSV1_C_T4_U_PASS 0x00000000
7187 #define NV_PGRAPH_CSV1_C_T4_U_EYE 0x00000400
7188 #define NV_PGRAPH_CSV1_C_T4_U_OBJECT 0x00000800
7189 #define NV_PGRAPH_CSV1_C_T4_U_NORMAL 0x00001000
7190 #define NV_PGRAPH_CSV1_C_T4_U_REFLECTION 0x00001400
7191 #define NV_PGRAPH_CSV1_C_T4_U_EMBOSS 0x00001800
7192 #define NV_PGRAPH_CSV1_C_T4_Q 0x0000E000
7193 #define NV_PGRAPH_CSV1_C_T4_Q_PASS 0x00000000
7194 #define NV_PGRAPH_CSV1_C_T4_Q_EYE 0x00002000
7195 #define NV_PGRAPH_CSV1_C_T4_Q_OBJECT 0x00004000
7196 #define NV_PGRAPH_CSV1_C_T5_EN 0x00010000
7197 #define NV_PGRAPH_CSV1_C_T5_EN_OFF 0xFFFEFFFF
7198 #define NV_PGRAPH_CSV1_C_T5_EN_ON 0x00010000
7199 #define NV_PGRAPH_CSV1_C_T5_MODE 0x00020000
7200 #define NV_PGRAPH_CSV1_C_T5_MODE_PASS 0xFFFDFFFF
7201 #define NV_PGRAPH_CSV1_C_T5_MODE_TRANSFORM 0x00020000
7202 #define NV_PGRAPH_CSV1_C_T5_TEXTURE 0x00040000
7203 #define NV_PGRAPH_CSV1_C_T5_TEXTURE_2D 0xFFFBFFFF
7204 #define NV_PGRAPH_CSV1_C_T5_TEXTURE_3D 0x00040000
7205 #define NV_PGRAPH_CSV1_C_T5_S 0x00700000
7206 #define NV_PGRAPH_CSV1_C_T5_S_PASS 0x00000000
7207 #define NV_PGRAPH_CSV1_C_T5_S_EYE 0x00100000
7208 #define NV_PGRAPH_CSV1_C_T5_S_OBJECT 0x00200000
7209 #define NV_PGRAPH_CSV1_C_T5_S_SPHERE 0x00300000
7210 #define NV_PGRAPH_CSV1_C_T5_S_NORMAL 0x00400000
7211 #define NV_PGRAPH_CSV1_C_T5_S_REFLECTION 0x00500000
7212 #define NV_PGRAPH_CSV1_C_T5_S_EMBOSS 0x00600000
7213 #define NV_PGRAPH_CSV1_C_T5_T 0x03800000
7214 #define NV_PGRAPH_CSV1_C_T5_T_PASS 0x00000000
7215 #define NV_PGRAPH_CSV1_C_T5_T_EYE 0x00800000
7216 #define NV_PGRAPH_CSV1_C_T5_T_OBJECT 0x01000000
7217 #define NV_PGRAPH_CSV1_C_T5_T_SPHERE 0x01800000
7218 #define NV_PGRAPH_CSV1_C_T5_T_NORMAL 0x02000000
7219 #define NV_PGRAPH_CSV1_C_T5_T_REFLECTION 0x02800000
7220 #define NV_PGRAPH_CSV1_C_T5_T_EMBOSS 0x03000000
7221 #define NV_PGRAPH_CSV1_C_T5_U 0x1C000000
7222 #define NV_PGRAPH_CSV1_C_T5_U_PASS 0x00000000
7223 #define NV_PGRAPH_CSV1_C_T5_U_EYE 0x04000000
7224 #define NV_PGRAPH_CSV1_C_T5_U_OBJECT 0x08000000
7225 #define NV_PGRAPH_CSV1_C_T5_U_NORMAL 0x10000000
7226 #define NV_PGRAPH_CSV1_C_T5_U_REFLECTION 0x14000000
7227 #define NV_PGRAPH_CSV1_C_T5_U_EMBOSS 0x18000000
7228 #define NV_PGRAPH_CSV1_C_T5_Q 0xE0000000
7229 #define NV_PGRAPH_CSV1_C_T5_Q_PASS 0x00000000
7230 #define NV_PGRAPH_CSV1_C_T5_Q_EYE 0x20000000
7231 #define NV_PGRAPH_CSV1_C_T5_Q_OBJECT 0x40000000
7232 
7233 /* NV-Register NV_PGRAPH_DMA_START_0 */
7234 #define NV_PGRAPH_DMA_START_0 0x00401000
7235 #define NV_PGRAPH_DMA_START_0_VALUE 0xFFFFFFFF
7236 
7237 /* NV-Register NV_PGRAPH_DMA_START_1 */
7238 #define NV_PGRAPH_DMA_START_1 0x00401004
7239 #define NV_PGRAPH_DMA_START_1_VALUE 0xFFFFFFFF
7240 
7241 /* NV-Register NV_PGRAPH_DMA_LENGTH */
7242 #define NV_PGRAPH_DMA_LENGTH 0x00401008
7243 #define NV_PGRAPH_DMA_LENGTH_VALUE 0x003FFFFF
7244 
7245 /* NV-Register NV_PGRAPH_DMA_MISC */
7246 #define NV_PGRAPH_DMA_MISC 0x0040100C
7247 #define NV_PGRAPH_DMA_MISC_COUNT 0x0000FFFF
7248 #define NV_PGRAPH_DMA_MISC_FMT_SRC 0x00070000
7249 #define NV_PGRAPH_DMA_MISC_FMT_DST 0x00700000
7250 
7251 /* NV-Register NV_PGRAPH_DMA_DATA_0 */
7252 #define NV_PGRAPH_DMA_DATA_0 0x00401020
7253 #define NV_PGRAPH_DMA_DATA_0_VALUE 0xFFFFFFFF
7254 
7255 /* NV-Register NV_PGRAPH_DMA_DATA_1 */
7256 #define NV_PGRAPH_DMA_DATA_1 0x00401024
7257 #define NV_PGRAPH_DMA_DATA_1_VALUE 0xFFFFFFFF
7258 
7259 /* NV-Register NV_PGRAPH_DMA_RM */
7260 #define NV_PGRAPH_DMA_RM 0x00401030
7261 #define NV_PGRAPH_DMA_RM_ASSIST_A 0x00000001
7262 #define NV_PGRAPH_DMA_RM_ASSIST_A_NOT_PENDING 0xFFFFFFFE
7263 #define NV_PGRAPH_DMA_RM_ASSIST_A_PENDING 0x00000001
7264 #define NV_PGRAPH_DMA_RM_ASSIST_A_RESET 0x00000001
7265 #define NV_PGRAPH_DMA_RM_ASSIST_B 0x00000002
7266 #define NV_PGRAPH_DMA_RM_ASSIST_B_NOT_PENDING 0xFFFFFFFD
7267 #define NV_PGRAPH_DMA_RM_ASSIST_B_PENDING 0x00000002
7268 #define NV_PGRAPH_DMA_RM_ASSIST_B_RESET 0x00000002
7269 #define NV_PGRAPH_DMA_RM_WRITE_REQ 0x00000010
7270 #define NV_PGRAPH_DMA_RM_WRITE_REQ_NOT_PENDING 0xFFFFFFEF
7271 #define NV_PGRAPH_DMA_RM_WRITE_REQ_PENDING 0x00000010
7272 
7273 /* NV-Register NV_PGRAPH_DMA_STATE */
7274 #define NV_PGRAPH_DMA_STATE 0x00401034
7275 #define NV_PGRAPH_DMA_STATE_PMA 0x00000007
7276 #define NV_PGRAPH_DMA_STATE_PMA_DRP 0x00000000
7277 #define NV_PGRAPH_DMA_STATE_PMA_DRA 0x00000001
7278 #define NV_PGRAPH_DMA_STATE_PMA_DWA 0x00000002
7279 #define NV_PGRAPH_DMA_STATE_PMA_DW0 0x00000003
7280 #define NV_PGRAPH_DMA_STATE_PMA_DW1 0x00000004
7281 #define NV_PGRAPH_DMA_STATE_PMA_DW2 0x00000005
7282 #define NV_PGRAPH_DMA_STATE_PMA_DW3 0x00000006
7283 #define NV_PGRAPH_DMA_STATE_PMA_DWX 0x00000007
7284 #define NV_PGRAPH_DMA_STATE_FE 0x00000018
7285 #define NV_PGRAPH_DMA_STATE_FE_0 0x00000000
7286 #define NV_PGRAPH_DMA_STATE_FE_1 0x00000008
7287 #define NV_PGRAPH_DMA_STATE_FE_2 0x00000010
7288 #define NV_PGRAPH_DMA_STATE_FE_3 0x00000018
7289 #define NV_PGRAPH_DMA_STATE_FBA 0x00000020
7290 #define NV_PGRAPH_DMA_STATE_FBA_DR 0xFFFFFFDF
7291 #define NV_PGRAPH_DMA_STATE_FBA_DW 0x00000020
7292 #define NV_PGRAPH_DMA_STATE_DRDMA 0x00000F00
7293 #define NV_PGRAPH_DMA_STATE_DRDMA_IDLE 0x00000000
7294 #define NV_PGRAPH_DMA_STATE_DRDMA_REQ 0x00000100
7295 #define NV_PGRAPH_DMA_STATE_DRDMA_TIME_REQ 0x00000200
7296 #define NV_PGRAPH_DMA_STATE_DRDMA_ADJ 0x00000300
7297 #define NV_PGRAPH_DMA_STATE_DRDMA_TLB 0x00000400
7298 #define NV_PGRAPH_DMA_STATE_DRDMA_PTE_REQ 0x00000500
7299 #define NV_PGRAPH_DMA_STATE_DRDMA_PTE 0x00000600
7300 #define NV_PGRAPH_DMA_STATE_DRDMA_MEM_REQ 0x00000700
7301 #define NV_PGRAPH_DMA_STATE_DRDMA_MEM 0x00000800
7302 #define NV_PGRAPH_DMA_STATE_DRDMA_PITCH 0x00000900
7303 #define NV_PGRAPH_DMA_STATE_DRDMA_INTR 0x00000A00
7304 #define NV_PGRAPH_DMA_STATE_DR 0x00003000
7305 #define NV_PGRAPH_DMA_STATE_DR_IDLE 0x00000000
7306 #define NV_PGRAPH_DMA_STATE_DR_TRX 0x00001000
7307 #define NV_PGRAPH_DMA_STATE_DR_PART 0x00002000
7308 #define NV_PGRAPH_DMA_STATE_DRTLB 0x0000C000
7309 #define NV_PGRAPH_DMA_STATE_DRTLB_IDLE 0x00000000
7310 #define NV_PGRAPH_DMA_STATE_DRTLB_TLB 0x00004000
7311 #define NV_PGRAPH_DMA_STATE_DRTLB_LIM 0x00008000
7312 #define NV_PGRAPH_DMA_STATE_DRTLB_PTE 0x0000C000
7313 #define NV_PGRAPH_DMA_STATE_DR_Q_FULL 0x00010000
7314 #define NV_PGRAPH_DMA_STATE_DR_Q_EMPTY 0x00020000
7315 #define NV_PGRAPH_DMA_STATE_DR_Q_BUSY 0x00040000
7316 #define NV_PGRAPH_DMA_STATE_DR_C_FULL 0x00080000
7317 #define NV_PGRAPH_DMA_STATE_DWDMA 0x00F00000
7318 #define NV_PGRAPH_DMA_STATE_DWDMA_IDLE 0x00000000
7319 #define NV_PGRAPH_DMA_STATE_DWDMA_ADJ 0x00100000
7320 #define NV_PGRAPH_DMA_STATE_DWDMA_TLB 0x00200000
7321 #define NV_PGRAPH_DMA_STATE_DWDMA_PTE_REQ 0x00300000
7322 #define NV_PGRAPH_DMA_STATE_DWDMA_PTE 0x00400000
7323 #define NV_PGRAPH_DMA_STATE_DWDMA_MEM_REQ 0x00500000
7324 #define NV_PGRAPH_DMA_STATE_DWDMA_MEM 0x00600000
7325 #define NV_PGRAPH_DMA_STATE_DWDMA_PITCH 0x00700000
7326 #define NV_PGRAPH_DMA_STATE_DWDMA_FE_TRX 0x00800000
7327 #define NV_PGRAPH_DMA_STATE_DWDMA_INTR 0x00900000
7328 #define NV_PGRAPH_DMA_STATE_DW 0x07000000
7329 #define NV_PGRAPH_DMA_STATE_DW_IDLE 0x00000000
7330 #define NV_PGRAPH_DMA_STATE_DW_FIRST 0x01000000
7331 #define NV_PGRAPH_DMA_STATE_DW_SECOND 0x02000000
7332 #define NV_PGRAPH_DMA_STATE_DW_MID 0x03000000
7333 #define NV_PGRAPH_DMA_STATE_DW_WAIT 0x04000000
7334 #define NV_PGRAPH_DMA_STATE_DWTLB 0x18000000
7335 #define NV_PGRAPH_DMA_STATE_DWTLB_IDLE 0x00000000
7336 #define NV_PGRAPH_DMA_STATE_DWTLB_TLB 0x08000000
7337 #define NV_PGRAPH_DMA_STATE_DWTLB_LIM 0x10000000
7338 #define NV_PGRAPH_DMA_STATE_DWTLB_PTE 0x18000000
7339 #define NV_PGRAPH_DMA_STATE_DF 0xE0000000
7340 #define NV_PGRAPH_DMA_STATE_DF_IDLE 0x00000000
7341 #define NV_PGRAPH_DMA_STATE_DF_REQ 0x20000000
7342 #define NV_PGRAPH_DMA_STATE_DF_REQ2 0x40000000
7343 #define NV_PGRAPH_DMA_STATE_DF_LO 0x60000000
7344 #define NV_PGRAPH_DMA_STATE_DF_HI 0x80000000
7345 
7346 /* NV-Register NV_PGRAPH_DMA_RETURN */
7347 #define NV_PGRAPH_DMA_RETURN 0x00401038
7348 #define NV_PGRAPH_DMA_RETURN_VALUE 0xFFFFFFFF
7349 
7350 /* NV-Register NV_PGRAPH_DMA_A_XLATE_INST */
7351 #define NV_PGRAPH_DMA_A_XLATE_INST 0x00401040
7352 #define NV_PGRAPH_DMA_A_XLATE_INST_VALUE 0x0000FFFF
7353 
7354 /* NV-Register NV_PGRAPH_DMA_A_CONTROL */
7355 #define NV_PGRAPH_DMA_A_CONTROL 0x00401044
7356 #define NV_PGRAPH_DMA_A_CONTROL_PAGE_TABLE 0x00001000
7357 #define NV_PGRAPH_DMA_A_CONTROL_PAGE_TABLE_NOT_PRESENT 0xFFFFEFFF
7358 #define NV_PGRAPH_DMA_A_CONTROL_PAGE_TABLE_PRESENT 0x00001000
7359 #define NV_PGRAPH_DMA_A_CONTROL_PAGE_ENTRY 0x00002000
7360 #define NV_PGRAPH_DMA_A_CONTROL_PAGE_ENTRY_NOT_LINEAR 0xFFFFDFFF
7361 #define NV_PGRAPH_DMA_A_CONTROL_PAGE_ENTRY_LINEAR 0x00002000
7362 #define NV_PGRAPH_DMA_A_CONTROL_TARGET_NODE 0x00030000
7363 #define NV_PGRAPH_DMA_A_CONTROL_TARGET_NODE_NVM 0x00000000
7364 #define NV_PGRAPH_DMA_A_CONTROL_TARGET_NODE_PCI 0x00020000
7365 #define NV_PGRAPH_DMA_A_CONTROL_TARGET_NODE_AGP 0x00030000
7366 #define NV_PGRAPH_DMA_A_CONTROL_ADJUST 0xFFF00000
7367 
7368 /* NV-Register NV_PGRAPH_DMA_A_LIMIT */
7369 #define NV_PGRAPH_DMA_A_LIMIT 0x00401048
7370 #define NV_PGRAPH_DMA_A_LIMIT_OFFSET 0xFFFFFFFF
7371 
7372 /* NV-Register NV_PGRAPH_DMA_A_TLB_PTE */
7373 #define NV_PGRAPH_DMA_A_TLB_PTE 0x0040104C
7374 #define NV_PGRAPH_DMA_A_TLB_PTE_ACCESS 0x00000002
7375 #define NV_PGRAPH_DMA_A_TLB_PTE_ACCESS_READ_ONLY 0xFFFFFFFD
7376 #define NV_PGRAPH_DMA_A_TLB_PTE_ACCESS_READ_WRITE 0x00000002
7377 #define NV_PGRAPH_DMA_A_TLB_PTE_FRAME_ADDRESS 0xFFFFF000
7378 
7379 /* NV-Register NV_PGRAPH_DMA_A_TLB_TAG */
7380 #define NV_PGRAPH_DMA_A_TLB_TAG 0x00401050
7381 #define NV_PGRAPH_DMA_A_TLB_TAG_ADDRESS 0xFFFFF000
7382 
7383 /* NV-Register NV_PGRAPH_DMA_A_ADJ_OFFSET */
7384 #define NV_PGRAPH_DMA_A_ADJ_OFFSET 0x00401054
7385 #define NV_PGRAPH_DMA_A_ADJ_OFFSET_VALUE 0xFFFFFFFF
7386 
7387 /* NV-Register NV_PGRAPH_DMA_A_OFFSET */
7388 #define NV_PGRAPH_DMA_A_OFFSET 0x00401058
7389 #define NV_PGRAPH_DMA_A_OFFSET_VALUE 0xFFFFFFFF
7390 
7391 /* NV-Register NV_PGRAPH_DMA_A_SIZE */
7392 #define NV_PGRAPH_DMA_A_SIZE 0x0040105C
7393 #define NV_PGRAPH_DMA_A_SIZE_VALUE 0x01FFFFFF
7394 
7395 /* NV-Register NV_PGRAPH_DMA_A_Y_SIZE */
7396 #define NV_PGRAPH_DMA_A_Y_SIZE 0x00401060
7397 #define NV_PGRAPH_DMA_A_Y_SIZE_VALUE 0x000007FF
7398 
7399 /* NV-Register NV_PGRAPH_DMA_B_XLATE_INST */
7400 #define NV_PGRAPH_DMA_B_XLATE_INST 0x00401080
7401 #define NV_PGRAPH_DMA_B_XLATE_INST_VALUE 0x0000FFFF
7402 
7403 /* NV-Register NV_PGRAPH_DMA_B_CONTROL */
7404 #define NV_PGRAPH_DMA_B_CONTROL 0x00401084
7405 #define NV_PGRAPH_DMA_B_CONTROL_PAGE_TABLE 0x00001000
7406 #define NV_PGRAPH_DMA_B_CONTROL_PAGE_TABLE_NOT_PRESENT 0xFFFFEFFF
7407 #define NV_PGRAPH_DMA_B_CONTROL_PAGE_TABLE_PRESENT 0x00001000
7408 #define NV_PGRAPH_DMA_B_CONTROL_PAGE_ENTRY 0x00002000
7409 #define NV_PGRAPH_DMA_B_CONTROL_PAGE_ENTRY_NOT_LINEAR 0xFFFFDFFF
7410 #define NV_PGRAPH_DMA_B_CONTROL_PAGE_ENTRY_LINEAR 0x00002000
7411 #define NV_PGRAPH_DMA_B_CONTROL_TARGET_NODE 0x00030000
7412 #define NV_PGRAPH_DMA_B_CONTROL_TARGET_NODE_NVM 0x00000000
7413 #define NV_PGRAPH_DMA_B_CONTROL_TARGET_NODE_PCI 0x00020000
7414 #define NV_PGRAPH_DMA_B_CONTROL_TARGET_NODE_AGP 0x00030000
7415 #define NV_PGRAPH_DMA_B_CONTROL_ADJUST 0xFFF00000
7416 
7417 /* NV-Register NV_PGRAPH_DMA_B_LIMIT */
7418 #define NV_PGRAPH_DMA_B_LIMIT 0x00401088
7419 #define NV_PGRAPH_DMA_B_LIMIT_OFFSET 0xFFFFFFFF
7420 
7421 /* NV-Register NV_PGRAPH_DMA_B_TLB_PTE */
7422 #define NV_PGRAPH_DMA_B_TLB_PTE 0x0040108C
7423 #define NV_PGRAPH_DMA_B_TLB_PTE_ACCESS 0x00000002
7424 #define NV_PGRAPH_DMA_B_TLB_PTE_ACCESS_READ_ONLY 0xFFFFFFFD
7425 #define NV_PGRAPH_DMA_B_TLB_PTE_ACCESS_READ_WRITE 0x00000002
7426 #define NV_PGRAPH_DMA_B_TLB_PTE_FRAME_ADDRESS 0xFFFFF000
7427 
7428 /* NV-Register NV_PGRAPH_DMA_B_TLB_TAG */
7429 #define NV_PGRAPH_DMA_B_TLB_TAG 0x00401090
7430 #define NV_PGRAPH_DMA_B_TLB_TAG_ADDRESS 0xFFFFF000
7431 
7432 /* NV-Register NV_PGRAPH_DMA_B_ADJ_OFFSET */
7433 #define NV_PGRAPH_DMA_B_ADJ_OFFSET 0x00401094
7434 #define NV_PGRAPH_DMA_B_ADJ_OFFSET_VALUE 0xFFFFFFFF
7435 
7436 /* NV-Register NV_PGRAPH_DMA_B_OFFSET */
7437 #define NV_PGRAPH_DMA_B_OFFSET 0x00401098
7438 #define NV_PGRAPH_DMA_B_OFFSET_VALUE 0xFFFFFFFF
7439 
7440 /* NV-Register NV_PGRAPH_DMA_B_SIZE */
7441 #define NV_PGRAPH_DMA_B_SIZE 0x0040109C
7442 #define NV_PGRAPH_DMA_B_SIZE_VALUE 0x01FFFFFF
7443 
7444 /* NV-Register NV_PGRAPH_DMA_B_Y_SIZE */
7445 #define NV_PGRAPH_DMA_B_Y_SIZE 0x004010A0
7446 #define NV_PGRAPH_DMA_B_Y_SIZE_VALUE 0x000007FF
7447 
7448 /* NV-Memory NV_NOTIFY */
7449 #define NV_NOTIFY 0x00000000 /* size: 0x0000000F */
7450 
7451 /* NV-Register NV_PGRAPH_DMA_B_Y_SIZE [0x00] @ 0x004010A0 */
7452 #define NV_NOTIFY_TIME_0 0xFFFFFFE0
7453 
7454 /* NV-Register NV_PGRAPH_DMA_B_Y_SIZE [0x04] @ 0x004010A4 */
7455 #define NV_NOTIFY_TIME_1 0x1FFFFFFF
7456 
7457 /* NV-Register NV_PGRAPH_DMA_B_Y_SIZE [0x08] @ 0x004010A8 */
7458 #define NV_NOTIFY_RETURN_VALUE 0xFFFFFFFF
7459 
7460 /* NV-Register NV_PGRAPH_DMA_B_Y_SIZE [0x0C] @ 0x004010AC */
7461 #define NV_NOTIFY_ERROR_CODE 0x0000FFFF
7462 
7463 /* NV-Register NV_PGRAPH_DMA_B_Y_SIZE [0x0C] @ 0x004010AC */
7464 #define NV_NOTIFY_STATUS 0xFF000000
7465 #define NV_NOTIFY_STATUS_COMPLETED 0x00000000
7466 #define NV_NOTIFY_STATUS_IN_PROCESS 0x01000000
7467 #define NV_PGRAPH_CONTROL_OUT_INTERPOLATOR 0x00000003
7468 #define NV_PGRAPH_CONTROL_OUT_INTERPOLATOR_ZOH_MS 0x00000000
7469 #define NV_PGRAPH_CONTROL_OUT_INTERPOLATOR_ZOH 0x00000001
7470 #define NV_PGRAPH_CONTROL_OUT_INTERPOLATOR_FOH 0x00000002
7471 #define NV_PGRAPH_CONTROL_OUT_WRAP_U 0x00000030
7472 #define NV_PGRAPH_CONTROL_OUT_WRAP_U_CYLINDRICAL 0x00000000
7473 #define NV_PGRAPH_CONTROL_OUT_WRAP_U_WRAP 0x00000010
7474 #define NV_PGRAPH_CONTROL_OUT_WRAP_U_MIRROR 0x00000020
7475 #define NV_PGRAPH_CONTROL_OUT_WRAP_U_CLAMP 0x00000030
7476 #define NV_PGRAPH_CONTROL_OUT_WRAP_V 0x000000C0
7477 #define NV_PGRAPH_CONTROL_OUT_WRAP_V_CYLINDRICAL 0x00000000
7478 #define NV_PGRAPH_CONTROL_OUT_WRAP_V_WRAP 0x00000040
7479 #define NV_PGRAPH_CONTROL_OUT_WRAP_V_MIRROR 0x00000080
7480 #define NV_PGRAPH_CONTROL_OUT_WRAP_V_CLAMP 0x000000C0
7481 #define NV_PGRAPH_CONTROL_OUT_COLOR_FORMAT 0x00000100
7482 #define NV_PGRAPH_CONTROL_OUT_COLOR_FORMAT_LE_X8R8G8B8 0xFFFFFEFF
7483 #define NV_PGRAPH_CONTROL_OUT_COLOR_FORMAT_LE_A8R8G8B8 0x00000100
7484 #define NV_PGRAPH_CONTROL_OUT_SRCCOLOR 0x00000C00
7485 #define NV_PGRAPH_CONTROL_OUT_SRCCOLOR_NORMAL 0x00000000
7486 #define NV_PGRAPH_CONTROL_OUT_SRCCOLOR_COLOR_INVERSE 0x00000400
7487 #define NV_PGRAPH_CONTROL_OUT_SRCCOLOR_ALPHA_INVERSE 0x00000800
7488 #define NV_PGRAPH_CONTROL_OUT_SRCCOLOR_ALPHA_ONE 0x00000C00
7489 #define NV_PGRAPH_CONTROL_OUT_CULLING 0x00003000
7490 #define NV_PGRAPH_CONTROL_OUT_CULLING_ILLEGAL 0x00000000
7491 #define NV_PGRAPH_CONTROL_OUT_CULLING_NONE 0x00001000
7492 #define NV_PGRAPH_CONTROL_OUT_CULLING_COUNTERCLOCKWISE 0x00002000
7493 #define NV_PGRAPH_CONTROL_OUT_CULLING_CLOCKWISE 0x00003000
7494 #define NV_PGRAPH_CONTROL_OUT_ZBUFFER 0x00008000
7495 #define NV_PGRAPH_CONTROL_OUT_ZBUFFER_SCREEN 0xFFFF7FFF
7496 #define NV_PGRAPH_CONTROL_OUT_ZBUFFER_LINEAR 0x00008000
7497 #define NV_PGRAPH_CONTROL_OUT_ZETA_COMPARE 0x000F0000
7498 #define NV_PGRAPH_CONTROL_OUT_ZETA_COMPARE_ILLEGAL 0x00000000
7499 #define NV_PGRAPH_CONTROL_OUT_ZETA_COMPARE_FALSE 0x00010000
7500 #define NV_PGRAPH_CONTROL_OUT_ZETA_COMPARE_LT 0x00020000
7501 #define NV_PGRAPH_CONTROL_OUT_ZETA_COMPARE_EQ 0x00030000
7502 #define NV_PGRAPH_CONTROL_OUT_ZETA_COMPARE_LE 0x00040000
7503 #define NV_PGRAPH_CONTROL_OUT_ZETA_COMPARE_GT 0x00050000
7504 #define NV_PGRAPH_CONTROL_OUT_ZETA_COMPARE_NE 0x00060000
7505 #define NV_PGRAPH_CONTROL_OUT_ZETA_COMPARE_GE 0x00070000
7506 #define NV_PGRAPH_CONTROL_OUT_ZETA_COMPARE_TRUE 0x00080000
7507 #define NV_PGRAPH_CONTROL_OUT_ZETA_WRITE 0x00700000
7508 #define NV_PGRAPH_CONTROL_OUT_ZETA_WRITE_NEVER 0x00000000
7509 #define NV_PGRAPH_CONTROL_OUT_ZETA_WRITE_ALPHA 0x00100000
7510 #define NV_PGRAPH_CONTROL_OUT_ZETA_WRITE_ALPHA_ZETA 0x00200000
7511 #define NV_PGRAPH_CONTROL_OUT_ZETA_WRITE_ZETA 0x00300000
7512 #define NV_PGRAPH_CONTROL_OUT_ZETA_WRITE_ALWAYS 0x00400000
7513 #define NV_PGRAPH_CONTROL_OUT_COLOR_WRITE 0x07000000
7514 #define NV_PGRAPH_CONTROL_OUT_COLOR_WRITE_NEVER 0x00000000
7515 #define NV_PGRAPH_CONTROL_OUT_COLOR_WRITE_ALPHA 0x01000000
7516 #define NV_PGRAPH_CONTROL_OUT_COLOR_WRITE_ALPHA_ZETA 0x02000000
7517 #define NV_PGRAPH_CONTROL_OUT_COLOR_WRITE_ZETA 0x03000000
7518 #define NV_PGRAPH_CONTROL_OUT_ROP 0x10000000
7519 #define NV_PGRAPH_CONTROL_OUT_ROP_BLEND_AND 0xEFFFFFFF
7520 #define NV_PGRAPH_CONTROL_OUT_ROP_ADD_WITH_SATURATION 0x10000000
7521 #define NV_PGRAPH_CONTROL_OUT_BLEND_BETA 0x20000000
7522 #define NV_PGRAPH_CONTROL_OUT_BLEND_BETA_SRCALPHA 0xDFFFFFFF
7523 #define NV_PGRAPH_CONTROL_OUT_BLEND_BETA_DESTCOLOR 0x20000000
7524 #define NV_PGRAPH_CONTROL_OUT_BLEND_INPUT0 0x40000000
7525 #define NV_PGRAPH_CONTROL_OUT_BLEND_INPUT0_DESTCOLOR 0xBFFFFFFF
7526 #define NV_PGRAPH_CONTROL_OUT_BLEND_INPUT0_ZERO 0x40000000
7527 #define NV_PGRAPH_CONTROL_OUT_BLEND_INPUT1 0x80000000
7528 #define NV_PGRAPH_CONTROL_OUT_BLEND_INPUT1_SRCCOLOR 0x7FFFFFFF
7529 #define NV_PGRAPH_CONTROL_OUT_BLEND_INPUT1_ZERO 0x80000000
7530 #define NV_PGRAPH_ALPHACNTRL_ALPHA_KEY 0x000000FF
7531 #define NV_PGRAPH_ALPHACNTRL_ALPHA_COMPARE 0x00000F00
7532 #define NV_PGRAPH_ALPHACNTRL_ALPHA_COMPARE_ILLEGAL 0x00000000
7533 #define NV_PGRAPH_ALPHACNTRL_ALPHA_COMPARE_FALSE 0x00000100
7534 #define NV_PGRAPH_ALPHACNTRL_ALPHA_COMPARE_LT 0x00000200
7535 #define NV_PGRAPH_ALPHACNTRL_ALPHA_COMPARE_EQ 0x00000300
7536 #define NV_PGRAPH_ALPHACNTRL_ALPHA_COMPARE_LE 0x00000400
7537 #define NV_PGRAPH_ALPHACNTRL_ALPHA_COMPARE_GT 0x00000500
7538 #define NV_PGRAPH_ALPHACNTRL_ALPHA_COMPARE_NE 0x00000600
7539 #define NV_PGRAPH_ALPHACNTRL_ALPHA_COMPARE_GE 0x00000700
7540 #define NV_PGRAPH_ALPHACNTRL_ALPHA_COMPARE_TRUE 0x00000800
7541 
7542 /* NV-Device NV_HOST_DIAG */
7543 #define NV_HOST_DIAG 0x00005000 /* size: 0x00000FFF */
7544 
7545 /* NV-Array NV_HOST_DIAG_C1SYNCM_DATA (8 byte access) */
7546 #define NV_HOST_DIAG_C1SYNCM_DATA 0x00005000
7547 /* NV-Array size NV_HOST_DIAG_C1SYNCM_DATA__SIZE_1 [0..3] */
7548 #define NV_HOST_DIAG_C1SYNCM_DATA__SIZE_1 0x00000004
7549 #define NV_HOST_DIAG_C1SYNCM_DATA_VALUE 0x00003FFF
7550 
7551 /* NV-Array NV_HOST_DIAG_C1SYNCD_DATA (8 byte access) */
7552 #define NV_HOST_DIAG_C1SYNCD_DATA 0x00005004
7553 /* NV-Array size NV_HOST_DIAG_C1SYNCD_DATA__SIZE_1 [0..3] */
7554 #define NV_HOST_DIAG_C1SYNCD_DATA__SIZE_1 0x00000004
7555 #define NV_HOST_DIAG_C1SYNCD_DATA_VALUE 0xFFFFFFFF
7556 
7557 /* NV-Array NV_HOST_DIAG_CPUQA_DATA (64 byte access) */
7558 #define NV_HOST_DIAG_CPUQA_DATA 0x00005400
7559 /* NV-Array size NV_HOST_DIAG_CPUQA_DATA__SIZE_1 [0..15] */
7560 #define NV_HOST_DIAG_CPUQA_DATA__SIZE_1 0x00000010
7561 #define NV_HOST_DIAG_CPUQA_DATA_VALUE 0x07FFFFFF
7562 
7563 /* NV-Array NV_HOST_DIAG_CPUQD0L_DATA (64 byte access) */
7564 #define NV_HOST_DIAG_CPUQD0L_DATA 0x00005408
7565 /* NV-Array size NV_HOST_DIAG_CPUQD0L_DATA__SIZE_1 [0..15] */
7566 #define NV_HOST_DIAG_CPUQD0L_DATA__SIZE_1 0x00000010
7567 #define NV_HOST_DIAG_CPUQD0L_DATA_VALUE 0xFFFFFFFF
7568 
7569 /* NV-Array NV_HOST_DIAG_CPUQD1L_DATA (64 byte access) */
7570 #define NV_HOST_DIAG_CPUQD1L_DATA 0x00005410
7571 /* NV-Array size NV_HOST_DIAG_CPUQD1L_DATA__SIZE_1 [0..15] */
7572 #define NV_HOST_DIAG_CPUQD1L_DATA__SIZE_1 0x00000010
7573 #define NV_HOST_DIAG_CPUQD1L_DATA_VALUE 0xFFFFFFFF
7574 
7575 /* NV-Array NV_HOST_DIAG_CPUQD2L_DATA (64 byte access) */
7576 #define NV_HOST_DIAG_CPUQD2L_DATA 0x00005418
7577 /* NV-Array size NV_HOST_DIAG_CPUQD2L_DATA__SIZE_1 [0..15] */
7578 #define NV_HOST_DIAG_CPUQD2L_DATA__SIZE_1 0x00000010
7579 #define NV_HOST_DIAG_CPUQD2L_DATA_VALUE 0xFFFFFFFF
7580 
7581 /* NV-Array NV_HOST_DIAG_CPUQD3L_DATA (64 byte access) */
7582 #define NV_HOST_DIAG_CPUQD3L_DATA 0x00005420
7583 /* NV-Array size NV_HOST_DIAG_CPUQD3L_DATA__SIZE_1 [0..15] */
7584 #define NV_HOST_DIAG_CPUQD3L_DATA__SIZE_1 0x00000010
7585 #define NV_HOST_DIAG_CPUQD3L_DATA_VALUE 0xFFFFFFFF
7586 
7587 /* NV-Array NV_HOST_DIAG_CPUQD0H_DATA (64 byte access) */
7588 #define NV_HOST_DIAG_CPUQD0H_DATA 0x0000540C
7589 /* NV-Array size NV_HOST_DIAG_CPUQD0H_DATA__SIZE_1 [0..15] */
7590 #define NV_HOST_DIAG_CPUQD0H_DATA__SIZE_1 0x00000010
7591 #define NV_HOST_DIAG_CPUQD0H_DATA_VALUE 0x0000000F
7592 
7593 /* NV-Array NV_HOST_DIAG_CPUQD1H_DATA (64 byte access) */
7594 #define NV_HOST_DIAG_CPUQD1H_DATA 0x00005414
7595 /* NV-Array size NV_HOST_DIAG_CPUQD1H_DATA__SIZE_1 [0..15] */
7596 #define NV_HOST_DIAG_CPUQD1H_DATA__SIZE_1 0x00000010
7597 #define NV_HOST_DIAG_CPUQD1H_DATA_VALUE 0x0000000F
7598 
7599 /* NV-Array NV_HOST_DIAG_CPUQD2H_DATA (64 byte access) */
7600 #define NV_HOST_DIAG_CPUQD2H_DATA 0x0000541C
7601 /* NV-Array size NV_HOST_DIAG_CPUQD2H_DATA__SIZE_1 [0..15] */
7602 #define NV_HOST_DIAG_CPUQD2H_DATA__SIZE_1 0x00000010
7603 #define NV_HOST_DIAG_CPUQD2H_DATA_VALUE 0x0000000F
7604 
7605 /* NV-Array NV_HOST_DIAG_CPUQD3H_DATA (64 byte access) */
7606 #define NV_HOST_DIAG_CPUQD3H_DATA 0x00005424
7607 /* NV-Array size NV_HOST_DIAG_CPUQD3H_DATA__SIZE_1 [0..15] */
7608 #define NV_HOST_DIAG_CPUQD3H_DATA__SIZE_1 0x00000010
7609 #define NV_HOST_DIAG_CPUQD3H_DATA_VALUE 0x0000000F
7610 
7611 /* NV-Array NV_HOST_DIAG_AQL_DATA (8 byte access) */
7612 #define NV_HOST_DIAG_AQL_DATA 0x00005100
7613 /* NV-Array size NV_HOST_DIAG_AQL_DATA__SIZE_1 [0..3] */
7614 #define NV_HOST_DIAG_AQL_DATA__SIZE_1 0x00000004
7615 #define NV_HOST_DIAG_AQL_DATA_VALUE 0xFFFFFFFF
7616 
7617 /* NV-Array NV_HOST_DIAG_AQH_DATA (8 byte access) */
7618 #define NV_HOST_DIAG_AQH_DATA 0x00005104
7619 /* NV-Array size NV_HOST_DIAG_AQH_DATA__SIZE_1 [0..3] */
7620 #define NV_HOST_DIAG_AQH_DATA__SIZE_1 0x00000004
7621 #define NV_HOST_DIAG_AQH_DATA_VALUE 0x000000FF
7622 
7623 /* NV-Array NV_HOST_DIAG_WDQL_DATA (8 byte access) */
7624 #define NV_HOST_DIAG_WDQL_DATA 0x00005200
7625 /* NV-Array size NV_HOST_DIAG_WDQL_DATA__SIZE_1 [0..7] */
7626 #define NV_HOST_DIAG_WDQL_DATA__SIZE_1 0x00000008
7627 #define NV_HOST_DIAG_WDQL_DATA_VALUE 0xFFFFFFFF
7628 
7629 /* NV-Array NV_HOST_DIAG_WDQH_DATA (8 byte access) */
7630 #define NV_HOST_DIAG_WDQH_DATA 0x00005204
7631 /* NV-Array size NV_HOST_DIAG_WDQH_DATA__SIZE_1 [0..7] */
7632 #define NV_HOST_DIAG_WDQH_DATA__SIZE_1 0x00000008
7633 #define NV_HOST_DIAG_WDQH_DATA_VALUE 0x0000000F
7634 
7635 /* NV-Array NV_HOST_DIAG_DSPQ_DATA (4 byte access) */
7636 #define NV_HOST_DIAG_DSPQ_DATA 0x00005300
7637 /* NV-Array size NV_HOST_DIAG_DSPQ_DATA__SIZE_1 [0..31] */
7638 #define NV_HOST_DIAG_DSPQ_DATA__SIZE_1 0x00000020
7639 #define NV_HOST_DIAG_DSPQ_DATA_VALUE 0x0000007F
7640 
7641 /* NV-Array NV_HOST_DIAG_RDQ0_DATA (32 byte access) */
7642 #define NV_HOST_DIAG_RDQ0_DATA 0x00005800
7643 /* NV-Array size NV_HOST_DIAG_RDQ0_DATA__SIZE_1 [0..15] */
7644 #define NV_HOST_DIAG_RDQ0_DATA__SIZE_1 0x00000010
7645 #define NV_HOST_DIAG_RDQ0_DATA_VALUE 0xFFFFFFFF
7646 
7647 /* NV-Array NV_HOST_DIAG_RDQ1L_DATA (32 byte access) */
7648 #define NV_HOST_DIAG_RDQ1L_DATA 0x00005804
7649 /* NV-Array size NV_HOST_DIAG_RDQ1L_DATA__SIZE_1 [0..15] */
7650 #define NV_HOST_DIAG_RDQ1L_DATA__SIZE_1 0x00000010
7651 #define NV_HOST_DIAG_RDQ1L_DATA_VALUE 0xFFFFFFFF
7652 
7653 /* NV-Array NV_HOST_DIAG_RDQ1H_DATA (32 byte access) */
7654 #define NV_HOST_DIAG_RDQ1H_DATA 0x00005808
7655 /* NV-Array size NV_HOST_DIAG_RDQ1H_DATA__SIZE_1 [0..15] */
7656 #define NV_HOST_DIAG_RDQ1H_DATA__SIZE_1 0x00000010
7657 #define NV_HOST_DIAG_RDQ1H_DATA_VALUE 0x0000000F
7658 
7659 /* NV-Array NV_HOST_DIAG_RDQ2_DATA (32 byte access) */
7660 #define NV_HOST_DIAG_RDQ2_DATA 0x00005810
7661 /* NV-Array size NV_HOST_DIAG_RDQ2_DATA__SIZE_1 [0..15] */
7662 #define NV_HOST_DIAG_RDQ2_DATA__SIZE_1 0x00000010
7663 #define NV_HOST_DIAG_RDQ2_DATA_VALUE 0xFFFFFFFF
7664 
7665 /* NV-Array NV_HOST_DIAG_RDQ3L_DATA (32 byte access) */
7666 #define NV_HOST_DIAG_RDQ3L_DATA 0x00005814
7667 /* NV-Array size NV_HOST_DIAG_RDQ3L_DATA__SIZE_1 [0..15] */
7668 #define NV_HOST_DIAG_RDQ3L_DATA__SIZE_1 0x00000010
7669 #define NV_HOST_DIAG_RDQ3L_DATA_VALUE 0xFFFFFFFF
7670 
7671 /* NV-Array NV_HOST_DIAG_RDQ3H_DATA (32 byte access) */
7672 #define NV_HOST_DIAG_RDQ3H_DATA 0x00005818
7673 /* NV-Array size NV_HOST_DIAG_RDQ3H_DATA__SIZE_1 [0..15] */
7674 #define NV_HOST_DIAG_RDQ3H_DATA__SIZE_1 0x00000010
7675 #define NV_HOST_DIAG_RDQ3H_DATA_VALUE 0x0000000F
7676 
7677 /* NV-Register NV_HOST_DIAG_CTL */
7678 #define NV_HOST_DIAG_CTL 0x00005F00
7679 #define NV_HOST_DIAG_RAM_RDWR 0x00000001
7680 #define NV_HOST_DIAG_RAM_RDWR_OFF 0xFFFFFFFE
7681 #define NV_HOST_DIAG_RAM_RDWR_ON 0x00000001
7682 #define NV_HOST_DIAG_RP1_SEL 0x00000002
7683 #define NV_HOST_DIAG_RP1_OFF 0xFFFFFFFD
7684 #define NV_HOST_DIAG_RP1_ON 0x00000002
7685 
7686 /* NV-Array NV_HOST_DIAG_FWB0L_DATA (32 byte access) */
7687 #define NV_HOST_DIAG_FWB0L_DATA 0x00005A00
7688 /* NV-Array size NV_HOST_DIAG_FWB0L_DATA__SIZE_1 [0..15] */
7689 #define NV_HOST_DIAG_FWB0L_DATA__SIZE_1 0x00000010
7690 #define NV_HOST_DIAG_FWB0L_DATA_VALUE 0xFFFFFFFF
7691 
7692 /* NV-Array NV_HOST_DIAG_FWB1L_DATA (32 byte access) */
7693 #define NV_HOST_DIAG_FWB1L_DATA 0x00005A08
7694 /* NV-Array size NV_HOST_DIAG_FWB1L_DATA__SIZE_1 [0..15] */
7695 #define NV_HOST_DIAG_FWB1L_DATA__SIZE_1 0x00000010
7696 #define NV_HOST_DIAG_FWB1L_DATA_VALUE 0xFFFFFFFF
7697 
7698 /* NV-Array NV_HOST_DIAG_FWB2L_DATA (32 byte access) */
7699 #define NV_HOST_DIAG_FWB2L_DATA 0x00005A10
7700 /* NV-Array size NV_HOST_DIAG_FWB2L_DATA__SIZE_1 [0..15] */
7701 #define NV_HOST_DIAG_FWB2L_DATA__SIZE_1 0x00000010
7702 #define NV_HOST_DIAG_FWB2L_DATA_VALUE 0xFFFFFFFF
7703 
7704 /* NV-Array NV_HOST_DIAG_FWB3L_DATA (32 byte access) */
7705 #define NV_HOST_DIAG_FWB3L_DATA 0x00005A18
7706 /* NV-Array size NV_HOST_DIAG_FWB3L_DATA__SIZE_1 [0..15] */
7707 #define NV_HOST_DIAG_FWB3L_DATA__SIZE_1 0x00000010
7708 #define NV_HOST_DIAG_FWB3L_DATA_VALUE 0xFFFFFFFF
7709 
7710 /* NV-Array NV_HOST_DIAG_FWB0H_DATA (32 byte access) */
7711 #define NV_HOST_DIAG_FWB0H_DATA 0x00005A04
7712 /* NV-Array size NV_HOST_DIAG_FWB0H_DATA__SIZE_1 [0..15] */
7713 #define NV_HOST_DIAG_FWB0H_DATA__SIZE_1 0x00000010
7714 #define NV_HOST_DIAG_FWB0H_DATA_VALUE 0xFFFFFFFF
7715 
7716 /* NV-Array NV_HOST_DIAG_FWB1H_DATA (32 byte access) */
7717 #define NV_HOST_DIAG_FWB1H_DATA 0x00005A0C
7718 /* NV-Array size NV_HOST_DIAG_FWB1H_DATA__SIZE_1 [0..15] */
7719 #define NV_HOST_DIAG_FWB1H_DATA__SIZE_1 0x00000010
7720 #define NV_HOST_DIAG_FWB1H_DATA_VALUE 0xFFFFFFFF
7721 
7722 /* NV-Array NV_HOST_DIAG_FWB2H_DATA (32 byte access) */
7723 #define NV_HOST_DIAG_FWB2H_DATA 0x00005A14
7724 /* NV-Array size NV_HOST_DIAG_FWB2H_DATA__SIZE_1 [0..15] */
7725 #define NV_HOST_DIAG_FWB2H_DATA__SIZE_1 0x00000010
7726 #define NV_HOST_DIAG_FWB2H_DATA_VALUE 0xFFFFFFFF
7727 
7728 /* NV-Array NV_HOST_DIAG_FWB3H_DATA (32 byte access) */
7729 #define NV_HOST_DIAG_FWB3H_DATA 0x00005A1C
7730 /* NV-Array size NV_HOST_DIAG_FWB3H_DATA__SIZE_1 [0..15] */
7731 #define NV_HOST_DIAG_FWB3H_DATA__SIZE_1 0x00000010
7732 #define NV_HOST_DIAG_FWB3H_DATA_VALUE 0xFFFFFFFF
7733 
7734 /* NV-Array NV_HOST_DIAG_FWAQ_DATA (4 byte access) */
7735 #define NV_HOST_DIAG_FWAQ_DATA 0x00005C00
7736 /* NV-Array size NV_HOST_DIAG_FWAQ_DATA__SIZE_1 [0..3] */
7737 #define NV_HOST_DIAG_FWAQ_DATA__SIZE_1 0x00000004
7738 #define NV_HOST_DIAG_FWAQ_DATA_VALUE 0x03FFFFFF
7739 
7740 /* NV-Device NV_IGRAPH */
7741 #define NV_IGRAPH 0x00000000 /* size: 0x0001FFFF */
7742 
7743 /* NV-Array NV_IGRAPH_ATTR_OFFSET (8 byte access) */
7744 #define NV_IGRAPH_ATTR_OFFSET 0x00000000
7745 /* NV-Array size NV_IGRAPH_ATTR_OFFSET__SIZE_1 [0..15] */
7746 #define NV_IGRAPH_ATTR_OFFSET__SIZE_1 0x00000010
7747 #define NV_IGRAPH_ATTR_OFFSET_OFFSET_FIELD 0x0FFFFFFF
7748 #define NV_IGRAPH_ATTR_OFFSET_CTXDMA_FIELD 0x80000000
7749 #define NV_IGRAPH_ATTR_OFFSET_CTXDMA_VTXA 0x7FFFFFFF
7750 #define NV_IGRAPH_ATTR_OFFSET_CTXDMA_VTXB 0x80000000
7751 
7752 /* NV-Array NV_IGRAPH_ATTR_FORMAT (8 byte access) */
7753 #define NV_IGRAPH_ATTR_FORMAT 0x00000004
7754 /* NV-Array size NV_IGRAPH_ATTR_FORMAT__SIZE_1 [0..15] */
7755 #define NV_IGRAPH_ATTR_FORMAT__SIZE_1 0x00000010
7756 #define NV_IGRAPH_ATTR_FORMAT_TYPE_FIELD 0x00000007
7757 #define NV_IGRAPH_ATTR_FORMAT_TYPE_UB_D3D 0x00000000
7758 #define NV_IGRAPH_ATTR_FORMAT_TYPE_S1 0x00000001
7759 #define NV_IGRAPH_ATTR_FORMAT_TYPE_F 0x00000002
7760 #define NV_IGRAPH_ATTR_FORMAT_TYPE_UB_OGL 0x00000004
7761 #define NV_IGRAPH_ATTR_FORMAT_TYPE_S32K 0x00000005
7762 #define NV_IGRAPH_ATTR_FORMAT_TYPE_CMP 0x00000006
7763 #define NV_IGRAPH_ATTR_FORMAT_SIZE_FIELD 0x00000070
7764 #define NV_IGRAPH_ATTR_FORMAT_DISABLED 0x00000000
7765 #define NV_IGRAPH_ATTR_FORMAT_SIZE_1 0x00000010
7766 #define NV_IGRAPH_ATTR_FORMAT_SIZE_2 0x00000020
7767 #define NV_IGRAPH_ATTR_FORMAT_SIZE_3 0x00000030
7768 #define NV_IGRAPH_ATTR_FORMAT_SIZE_4 0x00000040
7769 #define NV_IGRAPH_ATTR_FORMAT_SIZE_3W 0x00000070
7770 #define NV_IGRAPH_ATTR_FORMAT_STRIDE_FIELD 0x0000FF00
7771 #define NV_IGRAPH_ATTR_FORMAT_CMP_DATA_0H_FIELD 0x000007FF
7772 #define NV_IGRAPH_ATTR_FORMAT_CMP_DATA_0L_FIELD 0x000003E0
7773 #define NV_IGRAPH_ATTR_FORMAT_CMP_DATA_1H_FIELD 0x003FF800
7774 #define NV_IGRAPH_ATTR_FORMAT_CMP_DATA_1L_FIELD 0x001F0000
7775 #define NV_IGRAPH_ATTR_FORMAT_CMP_DATA_2H_FIELD 0xFFE00000
7776 #define NV_IGRAPH_ATTR_FORMAT_CMP_DATA_2L_FIELD 0x7E000000
7777 
7778 /* NV-Register NV_IGRAPH_PRIM_TYPE */
7779 #define NV_IGRAPH_PRIM_TYPE 0x00000080
7780 #define NV_IGRAPH_PRIM_TYPE_FIELD 0x0000000F
7781 #define NV_IGRAPH_PRIM_TYPE_NONE 0x00000000
7782 #define NV_IGRAPH_PRIM_TYPE_POINT 0x00000001
7783 #define NV_IGRAPH_PRIM_TYPE_LINE 0x00000002
7784 #define NV_IGRAPH_PRIM_TYPE_LINEL 0x00000003
7785 #define NV_IGRAPH_PRIM_TYPE_LINES 0x00000004
7786 #define NV_IGRAPH_PRIM_TYPE_TRI 0x00000005
7787 #define NV_IGRAPH_PRIM_TYPE_TRIS 0x00000006
7788 #define NV_IGRAPH_PRIM_TYPE_TRIF 0x00000007
7789 #define NV_IGRAPH_PRIM_TYPE_QUAD 0x00000008
7790 #define NV_IGRAPH_PRIM_TYPE_QUADS 0x00000009
7791 #define NV_IGRAPH_PRIM_TYPE_POLY 0x0000000A
7792 
7793 /* NV-Register NV_IGRAPH_EDGE_FLAG */
7794 #define NV_IGRAPH_EDGE_FLAG 0x00000084
7795 #define NV_IGRAPH_EDGE_FLAG_FIELD 0x00000001
7796 #define NV_IGRAPH_EDGE_FLAG_INIT 0x00000001
7797 
7798 /* NV-Register NV_IGRAPH_IDX_STATE */
7799 #define NV_IGRAPH_IDX_STATE 0x00000088
7800 #define NV_IGRAPH_IDX_STATE_FIELD 0xFFFFFFFF
7801 
7802 /* NV-Register NV_IGRAPH_VTX_STATE */
7803 #define NV_IGRAPH_VTX_STATE 0x0000008C
7804 #define NV_IGRAPH_VTX_STATE_FIELD 0xFFFFFFFF
7805 
7806 /* NV-Register NV_IGRAPH_INLINE_VTX_0 */
7807 #define NV_IGRAPH_INLINE_VTX_0 0x000000C0
7808 #define NV_IGRAPH_INLINE_VTX_0_FIELD 0xFFFFFFFF
7809 
7810 /* NV-Register NV_IGRAPH_INLINE_VTX_1 */
7811 #define NV_IGRAPH_INLINE_VTX_1 0x000000C4
7812 #define NV_IGRAPH_INLINE_VTX_1_FIELD 0xFFFFFFFF
7813 
7814 /* NV-Register NV_IGRAPH_IDX32_0 */
7815 #define NV_IGRAPH_IDX32_0 0x000000C8
7816 #define NV_IGRAPH_IDX32_0_FIELD 0x000FFFFF
7817 
7818 /* NV-Register NV_IGRAPH_IDX32_1 */
7819 #define NV_IGRAPH_IDX32_1 0x000000CC
7820 #define NV_IGRAPH_IDX32_1_FIELD 0x000FFFFF
7821 
7822 /* NV-Register NV_IGRAPH_IDX16_0 */
7823 #define NV_IGRAPH_IDX16_0 0x000000D0
7824 #define NV_IGRAPH_IDX16_0_0_FIELD 0x0000FFFF
7825 #define NV_IGRAPH_IDX16_0_1_FIELD 0xFFFF0000
7826 
7827 /* NV-Register NV_IGRAPH_IDX16_1 */
7828 #define NV_IGRAPH_IDX16_1 0x000000D4
7829 #define NV_IGRAPH_IDX16_1_0_FIELD 0x0000FFFF
7830 #define NV_IGRAPH_IDX16_1_1_FIELD 0xFFFF0000
7831 
7832 /* NV-Register NV_IGRAPH_IDX_ARRAY */
7833 #define NV_IGRAPH_IDX_ARRAY 0x000000D8
7834 #define NV_IGRAPH_IDX_ARRAY_BASE_FIELD 0x000FFFFF
7835 #define NV_IGRAPH_IDX_ARRAY_COUNT_FIELD 0xFF000000
7836 
7837 /* NV-Register NV_IGRAPH_FD_COEF_PIPE_0 */
7838 #define NV_IGRAPH_FD_COEF_PIPE_0 0x000000E0
7839 #define NV_IGRAPH_FD_COEF_PIPE_0_FIELD 0xFFFFFFFF
7840 
7841 /* NV-Register NV_IGRAPH_FD_COEF_PIPE_1 */
7842 #define NV_IGRAPH_FD_COEF_PIPE_1 0x000000E8
7843 #define NV_IGRAPH_FD_COEF_PIPE_1_FIELD 0xFFFFFFFF
7844 
7845 /* NV-Register NV_IGRAPH_INVALIDATE_CACHE */
7846 #define NV_IGRAPH_INVALIDATE_CACHE 0x000000F8
7847 #define NV_IGRAPH_INVALIDATE_CACHE_FIELD 0x00000001
7848 
7849 /* NV-Register NV_IGRAPH_INVALIDATE_FILE */
7850 #define NV_IGRAPH_INVALIDATE_FILE 0x000000FC
7851 #define NV_IGRAPH_INVALIDATE_FILE_FIELD 0x00000001
7852 
7853 /* NV-Array NV_IGRAPH_VTX_ASSM0 (4 byte access) */
7854 #define NV_IGRAPH_VTX_ASSM0 0x00000400
7855 /* NV-Array size NV_IGRAPH_VTX_ASSM0__SIZE_1 [0..35] */
7856 #define NV_IGRAPH_VTX_ASSM0__SIZE_1 0x00000024
7857 #define NV_IGRAPH_VTX_ASSM0_FIELD 0xFFFFFFFF
7858 
7859 /* NV-Array NV_IGRAPH_VTX_ASSM1 (4 byte access) */
7860 #define NV_IGRAPH_VTX_ASSM1 0x00000500
7861 /* NV-Array size NV_IGRAPH_VTX_ASSM1__SIZE_1 [0..35] */
7862 #define NV_IGRAPH_VTX_ASSM1__SIZE_1 0x00000024
7863 #define NV_IGRAPH_VTX_ASSM1_FIELD 0xFFFFFFFF
7864 
7865 /* NV-Array NV_IGRAPH_VTX_ASSM2 (4 byte access) */
7866 #define NV_IGRAPH_VTX_ASSM2 0x00000600
7867 /* NV-Array size NV_IGRAPH_VTX_ASSM2__SIZE_1 [0..35] */
7868 #define NV_IGRAPH_VTX_ASSM2__SIZE_1 0x00000024
7869 #define NV_IGRAPH_VTX_ASSM2_FIELD 0xFFFFFFFF
7870 
7871 /* NV-Array NV_IGRAPH_STATE_BUNDLE (4 byte access) */
7872 #define NV_IGRAPH_STATE_BUNDLE 0x00000800
7873 /* NV-Array size NV_IGRAPH_STATE_BUNDLE__SIZE_1 [0..511] */
7874 #define NV_IGRAPH_STATE_BUNDLE__SIZE_1 0x00000200
7875 #define NV_IGRAPH_STATE_BUNDLE_FIELD 0xFFFFFFFF
7876 
7877 /* NV-Array NV_IGRAPH_VTX_ATTR_1UB (16 byte access) */
7878 #define NV_IGRAPH_VTX_ATTR_1UB 0x00001100
7879 /* NV-Array size NV_IGRAPH_VTX_ATTR_1UB__SIZE_1 [0..15] */
7880 #define NV_IGRAPH_VTX_ATTR_1UB__SIZE_1 0x00000010
7881 #define NV_IGRAPH_VTX_ATTR_1UB_FIELD 0x000000FF
7882 
7883 /* NV-Array NV_IGRAPH_VTX_ATTR_2UB (16 byte access) */
7884 #define NV_IGRAPH_VTX_ATTR_2UB 0x00001200
7885 /* NV-Array size NV_IGRAPH_VTX_ATTR_2UB__SIZE_1 [0..15] */
7886 #define NV_IGRAPH_VTX_ATTR_2UB__SIZE_1 0x00000010
7887 #define NV_IGRAPH_VTX_ATTR_2UB_0_FIELD 0x000000FF
7888 #define NV_IGRAPH_VTX_ATTR_2UB_1_FIELD 0x0000FF00
7889 
7890 /* NV-Array NV_IGRAPH_VTX_ATTR_3UB (16 byte access) */
7891 #define NV_IGRAPH_VTX_ATTR_3UB 0x00001300
7892 /* NV-Array size NV_IGRAPH_VTX_ATTR_3UB__SIZE_1 [0..15] */
7893 #define NV_IGRAPH_VTX_ATTR_3UB__SIZE_1 0x00000010
7894 #define NV_IGRAPH_VTX_ATTR_3UB_0_FIELD 0x000000FF
7895 #define NV_IGRAPH_VTX_ATTR_3UB_1_FIELD 0x0000FF00
7896 #define NV_IGRAPH_VTX_ATTR_3UB_2_FIELD 0x00FF0000
7897 
7898 /* NV-Array NV_IGRAPH_VTX_ATTR_4UB (16 byte access) */
7899 #define NV_IGRAPH_VTX_ATTR_4UB 0x00001000
7900 /* NV-Array size NV_IGRAPH_VTX_ATTR_4UB__SIZE_1 [0..15] */
7901 #define NV_IGRAPH_VTX_ATTR_4UB__SIZE_1 0x00000010
7902 #define NV_IGRAPH_VTX_ATTR_4UB_0_FIELD 0x000000FF
7903 #define NV_IGRAPH_VTX_ATTR_4UB_1_FIELD 0x0000FF00
7904 #define NV_IGRAPH_VTX_ATTR_4UB_2_FIELD 0x00FF0000
7905 #define NV_IGRAPH_VTX_ATTR_4UB_3_FIELD 0xFF000000
7906 
7907 /* NV-Array NV_IGRAPH_VTX_ATTR_1S32K (16 byte access) */
7908 #define NV_IGRAPH_VTX_ATTR_1S32K 0x00001500
7909 /* NV-Array size NV_IGRAPH_VTX_ATTR_1S32K__SIZE_1 [0..15] */
7910 #define NV_IGRAPH_VTX_ATTR_1S32K__SIZE_1 0x00000010
7911 #define NV_IGRAPH_VTX_ATTR_1S32K_FIELD 0x0000FFFF
7912 
7913 /* NV-Array NV_IGRAPH_VTX_ATTR_2S32K (16 byte access) */
7914 #define NV_IGRAPH_VTX_ATTR_2S32K 0x00001600
7915 /* NV-Array size NV_IGRAPH_VTX_ATTR_2S32K__SIZE_1 [0..15] */
7916 #define NV_IGRAPH_VTX_ATTR_2S32K__SIZE_1 0x00000010
7917 #define NV_IGRAPH_VTX_ATTR_2S32K_0_FIELD 0x0000FFFF
7918 #define NV_IGRAPH_VTX_ATTR_2S32K_1_FIELD 0xFFFF0000
7919 
7920 /* NV-Array NV_IGRAPH_VTX_ATTR_3S32K (16 byte access) */
7921 #define NV_IGRAPH_VTX_ATTR_3S32K 0x00001700
7922 /* NV-Array size NV_IGRAPH_VTX_ATTR_3S32K__SIZE_1 [0..15] */
7923 #define NV_IGRAPH_VTX_ATTR_3S32K__SIZE_1 0x00000010
7924 #define NV_IGRAPH_VTX_ATTR_3S32K_0_FIELD 0x0000FFFF
7925 #define NV_IGRAPH_VTX_ATTR_3S32K_1_FIELD 0xFFFF0000
7926 
7927 /* NV-Array NV_IGRAPH_VTX_ATTR_4S32K (16 byte access) */
7928 #define NV_IGRAPH_VTX_ATTR_4S32K 0x00001400
7929 /* NV-Array size NV_IGRAPH_VTX_ATTR_4S32K__SIZE_1 [0..15] */
7930 #define NV_IGRAPH_VTX_ATTR_4S32K__SIZE_1 0x00000010
7931 #define NV_IGRAPH_VTX_ATTR_4S32K_0_FIELD 0x0000FFFF
7932 #define NV_IGRAPH_VTX_ATTR_4S32K_1_FIELD 0xFFFF0000
7933 
7934 /* NV-Array NV_IGRAPH_VTX_ATTR_1S1 (16 byte access) */
7935 #define NV_IGRAPH_VTX_ATTR_1S1 0x00001900
7936 /* NV-Array size NV_IGRAPH_VTX_ATTR_1S1__SIZE_1 [0..15] */
7937 #define NV_IGRAPH_VTX_ATTR_1S1__SIZE_1 0x00000010
7938 #define NV_IGRAPH_VTX_ATTR_1S1_FIELD 0x0000FFFF
7939 
7940 /* NV-Array NV_IGRAPH_VTX_ATTR_2S1 (16 byte access) */
7941 #define NV_IGRAPH_VTX_ATTR_2S1 0x00001A00
7942 /* NV-Array size NV_IGRAPH_VTX_ATTR_2S1__SIZE_1 [0..15] */
7943 #define NV_IGRAPH_VTX_ATTR_2S1__SIZE_1 0x00000010
7944 #define NV_IGRAPH_VTX_ATTR_2S1_0_FIELD 0x0000FFFF
7945 #define NV_IGRAPH_VTX_ATTR_2S1_1_FIELD 0xFFFF8000
7946 
7947 /* NV-Array NV_IGRAPH_VTX_ATTR_3S1 (16 byte access) */
7948 #define NV_IGRAPH_VTX_ATTR_3S1 0x00001B00
7949 /* NV-Array size NV_IGRAPH_VTX_ATTR_3S1__SIZE_1 [0..15] */
7950 #define NV_IGRAPH_VTX_ATTR_3S1__SIZE_1 0x00000010
7951 #define NV_IGRAPH_VTX_ATTR_3S1_0_FIELD 0x0000FFFF
7952 #define NV_IGRAPH_VTX_ATTR_3S1_1_FIELD 0xFFFF8000
7953 
7954 /* NV-Array NV_IGRAPH_VTX_ATTR_4S1 (16 byte access) */
7955 #define NV_IGRAPH_VTX_ATTR_4S1 0x00001800
7956 /* NV-Array size NV_IGRAPH_VTX_ATTR_4S1__SIZE_1 [0..15] */
7957 #define NV_IGRAPH_VTX_ATTR_4S1__SIZE_1 0x00000010
7958 #define NV_IGRAPH_VTX_ATTR_4S1_0_FIELD 0x0000FFFF
7959 #define NV_IGRAPH_VTX_ATTR_4S1_1_FIELD 0xFFFF8000
7960 
7961 /* NV-Array NV_IGRAPH_VTX_ATTR_1F (16 byte access) */
7962 #define NV_IGRAPH_VTX_ATTR_1F 0x00001D00
7963 /* NV-Array size NV_IGRAPH_VTX_ATTR_1F__SIZE_1 [0..15] */
7964 #define NV_IGRAPH_VTX_ATTR_1F__SIZE_1 0x00000010
7965 #define NV_IGRAPH_VTX_ATTR_1F_FIELD 0xFFFFFFFF
7966 
7967 /* NV-Array NV_IGRAPH_VTX_ATTR_2F (16 byte access) */
7968 #define NV_IGRAPH_VTX_ATTR_2F 0x00001E00
7969 /* NV-Array size NV_IGRAPH_VTX_ATTR_2F__SIZE_1 [0..15] */
7970 #define NV_IGRAPH_VTX_ATTR_2F__SIZE_1 0x00000010
7971 #define NV_IGRAPH_VTX_ATTR_2F_FIELD 0xFFFFFFFF
7972 
7973 /* NV-Array NV_IGRAPH_VTX_ATTR_3F (16 byte access) */
7974 #define NV_IGRAPH_VTX_ATTR_3F 0x00001F00
7975 /* NV-Array size NV_IGRAPH_VTX_ATTR_3F__SIZE_1 [0..15] */
7976 #define NV_IGRAPH_VTX_ATTR_3F__SIZE_1 0x00000010
7977 #define NV_IGRAPH_VTX_ATTR_3F_FIELD 0xFFFFFFFF
7978 
7979 /* NV-Array NV_IGRAPH_VTX_ATTR_4F (16 byte access) */
7980 #define NV_IGRAPH_VTX_ATTR_4F 0x00001C00
7981 /* NV-Array size NV_IGRAPH_VTX_ATTR_4F__SIZE_1 [0..15] */
7982 #define NV_IGRAPH_VTX_ATTR_4F__SIZE_1 0x00000010
7983 #define NV_IGRAPH_VTX_ATTR_4F_FIELD 0xFFFFFFFF
7984 
7985 /* NV-Array NV_IGRAPH_FD (4 byte access) */
7986 #define NV_IGRAPH_FD 0x00008000
7987 /* NV-Array size NV_IGRAPH_FD__SIZE_1 [0..8191] */
7988 #define NV_IGRAPH_FD__SIZE_1 0x00002000
7989 #define NV_IGRAPH_FD_FIELD 0xFFFFFFFF
7990 #define NV_IGRAPH_FD_CMD_REG 0x0000004A
7991 #define NV_IGRAPH_FD_CMD_GUARD 0x00000049
7992 #define NV_IGRAPH_FD_CMD_COEFF 0x00000048
7993 #define NV_IGRAPH_FD_CMD_FLUSH 0x0000004F
7994 #define NV_IGRAPH_FD_CMD_GO 0x00000041
7995 #define NV_IGRAPH_FD_CMD_NOP 0x00000040
7996 #define NV_IGRAPH_FD_REG_PATCH0 0x00000000
7997 #define NV_IGRAPH_FD_REG_PATCH1 0x00000004
7998 #define NV_IGRAPH_FD_REG_PATCH2 0x00000010
7999 #define NV_IGRAPH_FD_REG_PATCH3 0x00000014
8000 #define NV_IGRAPH_FD_REG_SWATCH 0x00000020
8001 #define NV_IGRAPH_FD_REG_TRANSITION0 0x00000000
8002 #define NV_IGRAPH_FD_REG_TRANSITION1 0x00000004
8003 #define NV_IGRAPH_FD_REG_TRANSITION2 0x00000030
8004 #define NV_IGRAPH_FD_REG_TRANSITION_CONTROL 0x00000040
8005 #define NV_IGRAPH_FD_REG_CURVE 0x00000050
8006 
8007 /* NV-Array NV_IGRAPH_XF (4 byte access) */
8008 #define NV_IGRAPH_XF 0x00010000
8009 /* NV-Array size NV_IGRAPH_XF__SIZE_1 [0..16383] */
8010 #define NV_IGRAPH_XF__SIZE_1 0x00004000
8011 #define NV_IGRAPH_XF_FIELD 0xFFFFFFFF
8012 #define NV_IGRAPH_XF_CMD_NOP 0x00000000
8013 #define NV_IGRAPH_XF_CMD_VAB 0x00000001
8014 #define NV_IGRAPH_XF_CMD_XFPR 0x00000002
8015 #define NV_IGRAPH_XF_CMD_LTPR 0x00000003
8016 #define NV_IGRAPH_XF_CMD_IBUF 0x00000004
8017 #define NV_IGRAPH_XF_CMD_PASSTHR 0x00000005
8018 #define NV_IGRAPH_XF_CMD_RSVD_6 0x00000006
8019 #define NV_IGRAPH_XF_CMD_MODE 0x00000007
8020 #define NV_IGRAPH_XF_CMD_RSVD_8 0x00000008
8021 #define NV_IGRAPH_XF_CMD_XFCTX 0x00000009
8022 #define NV_IGRAPH_XF_CMD_LTCTX 0x0000000A
8023 #define NV_IGRAPH_XF_CMD_LTC0 0x0000000B
8024 #define NV_IGRAPH_XF_CMD_LTC1 0x0000000C
8025 #define NV_IGRAPH_XF_CMD_LTC2 0x0000000D
8026 #define NV_IGRAPH_XF_CMD_LTC3 0x0000000E
8027 #define NV_IGRAPH_XF_CMD_SYNC 0x0000000F
8028 #define NV_IGRAPH_XF_VAB_POS 0x00000000
8029 #define NV_IGRAPH_XF_VAB_DIFF 0x00000001
8030 #define NV_IGRAPH_XF_VAB_SPEC 0x00000002
8031 #define NV_IGRAPH_XF_VAB_TXT0 0x00000003
8032 #define NV_IGRAPH_XF_VAB_TXT1 0x00000004
8033 #define NV_IGRAPH_XF_VAB_TXT2 0x00000005
8034 #define NV_IGRAPH_XF_VAB_TXT3 0x00000006
8035 #define NV_IGRAPH_XF_VAB_TXT4 0x00000007
8036 #define NV_IGRAPH_XF_VAB_TXT5 0x00000008
8037 #define NV_IGRAPH_XF_VAB_BDIFF 0x00000009
8038 #define NV_IGRAPH_XF_VAB_BSPEC 0x0000000A
8039 #define NV_IGRAPH_XF_VAB_NRM 0x0000000B
8040 #define NV_IGRAPH_XF_VAB_WGHT 0x0000000C
8041 #define NV_IGRAPH_XF_VAB_PS 0x0000000D
8042 #define NV_IGRAPH_XF_VAB_FOG 0x0000000E
8043 #define NV_IGRAPH_XF_VAB_RSVD 0x0000000F
8044 #define NV_IGRAPH_XF_VAB_IM 0x00000010
8045 #define NV_IGRAPH_XF_VAB_PASS 0x00000011
8046 #define NV_IGRAPH_XF_VAB_INVAL 0x0000001F
8047 #define NV_IGRAPH_XF_VAB_0 0x00000000
8048 #define NV_IGRAPH_XF_VAB_1 0x00000001
8049 #define NV_IGRAPH_XF_VAB_2 0x00000002
8050 #define NV_IGRAPH_XF_VAB_3 0x00000003
8051 #define NV_IGRAPH_XF_VAB_4 0x00000004
8052 #define NV_IGRAPH_XF_VAB_5 0x00000005
8053 #define NV_IGRAPH_XF_VAB_6 0x00000006
8054 #define NV_IGRAPH_XF_VAB_7 0x00000007
8055 #define NV_IGRAPH_XF_VAB_8 0x00000008
8056 #define NV_IGRAPH_XF_VAB_9 0x00000009
8057 #define NV_IGRAPH_XF_VAB_A 0x0000000A
8058 #define NV_IGRAPH_XF_VAB_B 0x0000000B
8059 #define NV_IGRAPH_XF_VAB_C 0x0000000C
8060 #define NV_IGRAPH_XF_VAB_D 0x0000000D
8061 #define NV_IGRAPH_XF_VAB_E 0x0000000E
8062 #define NV_IGRAPH_XF_VAB_F 0x0000000F
8063 #define NV_IGRAPH_XF_VAB_10 0x00000010
8064 #define NV_IGRAPH_XF_VAB_11 0x00000011
8065 #define NV_IGRAPH_XF_XFCTX_MMAT0 0x00000000
8066 #define NV_IGRAPH_XF_XFCTX_IMMAT0 0x00000004
8067 #define NV_IGRAPH_XF_XFCTX_CMAT0 0x00000008
8068 #define NV_IGRAPH_XF_XFCTX_MMAT1 0x0000000C
8069 #define NV_IGRAPH_XF_XFCTX_IMMAT1 0x00000010
8070 #define NV_IGRAPH_XF_XFCTX_TG0MAT 0x00000014
8071 #define NV_IGRAPH_XF_XFCTX_T0MAT 0x00000018
8072 #define NV_IGRAPH_XF_XFCTX_TG1MAT 0x0000001C
8073 #define NV_IGRAPH_XF_XFCTX_T1MAT 0x00000020
8074 #define NV_IGRAPH_XF_XFCTX_LIT0 0x00000024
8075 #define NV_IGRAPH_XF_XFCTX_LIT1 0x00000025
8076 #define NV_IGRAPH_XF_XFCTX_LIT2 0x00000026
8077 #define NV_IGRAPH_XF_XFCTX_LIT3 0x00000027
8078 #define NV_IGRAPH_XF_XFCTX_LIT4 0x00000028
8079 #define NV_IGRAPH_XF_XFCTX_LIT5 0x00000029
8080 #define NV_IGRAPH_XF_XFCTX_LIT6 0x0000002A
8081 #define NV_IGRAPH_XF_XFCTX_LIT7 0x0000002B
8082 #define NV_IGRAPH_XF_XFCTX_SPOT0 0x0000002C
8083 #define NV_IGRAPH_XF_XFCTX_SPOT1 0x0000002D
8084 #define NV_IGRAPH_XF_XFCTX_SPOT2 0x0000002E
8085 #define NV_IGRAPH_XF_XFCTX_SPOT3 0x0000002F
8086 #define NV_IGRAPH_XF_XFCTX_SPOT4 0x00000030
8087 #define NV_IGRAPH_XF_XFCTX_SPOT5 0x00000031
8088 #define NV_IGRAPH_XF_XFCTX_SPOT6 0x00000032
8089 #define NV_IGRAPH_XF_XFCTX_SPOT7 0x00000033
8090 #define NV_IGRAPH_XF_XFCTX_EYEP 0x00000034
8091 #define NV_IGRAPH_XF_XFCTX_CONS0 0x00000035
8092 #define NV_IGRAPH_XF_XFCTX_CONS1 0x00000036
8093 #define NV_IGRAPH_XF_XFCTX_CONS2 0x00000037
8094 #define NV_IGRAPH_XF_XFCTX_FOG 0x00000038
8095 #define NV_IGRAPH_XF_XFCTX_VPOFF 0x00000039
8096 #define NV_IGRAPH_XF_XFCTX_CONS3 0x0000003A
8097 #define NV_IGRAPH_XF_XFCTX_UNUSED 0x0000003B
8098 #define NV_IGRAPH_XF_XFCTX_TG2MAT 0x0000003C
8099 #define NV_IGRAPH_XF_XFCTX_T2MAT 0x00000040
8100 #define NV_IGRAPH_XF_XFCTX_TG3MAT 0x00000044
8101 #define NV_IGRAPH_XF_XFCTX_T3MAT 0x00000048
8102 #define NV_IGRAPH_XF_XFCTX_PPMMAT0 0x0000004C
8103 #define NV_IGRAPH_XF_XFCTX_PPIMAT0 0x00000050
8104 #define NV_IGRAPH_XF_XFCTX_PPMMAT1 0x00000054
8105 #define NV_IGRAPH_XF_XFCTX_PPIMAT1 0x00000058
8106 #define NV_IGRAPH_XF_XFCTX_RESERVED 0x0000005C
8107 #define NV_IGRAPH_XF_XFCTX_PRSPACE 0x00000060
8108 #define NV_IGRAPH_XF_LTCTX_L0_AMB 0x00000000
8109 #define NV_IGRAPH_XF_LTCTX_L0_DIF 0x00000001
8110 #define NV_IGRAPH_XF_LTCTX_L0_SPC 0x00000002
8111 #define NV_IGRAPH_XF_LTCTX_L0_K 0x00000003
8112 #define NV_IGRAPH_XF_LTCTX_L0_SPT 0x00000004
8113 #define NV_IGRAPH_XF_LTCTX_L1_AMB 0x00000005
8114 #define NV_IGRAPH_XF_LTCTX_L1_DIF 0x00000006
8115 #define NV_IGRAPH_XF_LTCTX_L1_SPC 0x00000007
8116 #define NV_IGRAPH_XF_LTCTX_L1_K 0x00000008
8117 #define NV_IGRAPH_XF_LTCTX_L1_SPT 0x00000009
8118 #define NV_IGRAPH_XF_LTCTX_L2_AMB 0x0000000A
8119 #define NV_IGRAPH_XF_LTCTX_L2_DIF 0x0000000B
8120 #define NV_IGRAPH_XF_LTCTX_L2_SPC 0x0000000C
8121 #define NV_IGRAPH_XF_LTCTX_L2_K 0x0000000D
8122 #define NV_IGRAPH_XF_LTCTX_L2_SPT 0x0000000E
8123 #define NV_IGRAPH_XF_LTCTX_L3_AMB 0x0000000F
8124 #define NV_IGRAPH_XF_LTCTX_L3_DIF 0x00000010
8125 #define NV_IGRAPH_XF_LTCTX_L3_SPC 0x00000011
8126 #define NV_IGRAPH_XF_LTCTX_L3_K 0x00000012
8127 #define NV_IGRAPH_XF_LTCTX_L3_SPT 0x00000013
8128 #define NV_IGRAPH_XF_LTCTX_L4_AMB 0x00000014
8129 #define NV_IGRAPH_XF_LTCTX_L4_DIF 0x00000015
8130 #define NV_IGRAPH_XF_LTCTX_L4_SPC 0x00000016
8131 #define NV_IGRAPH_XF_LTCTX_L4_K 0x00000017
8132 #define NV_IGRAPH_XF_LTCTX_L4_SPT 0x00000018
8133 #define NV_IGRAPH_XF_LTCTX_L5_AMB 0x00000019
8134 #define NV_IGRAPH_XF_LTCTX_L5_DIF 0x0000001A
8135 #define NV_IGRAPH_XF_LTCTX_L5_SPC 0x0000001B
8136 #define NV_IGRAPH_XF_LTCTX_L5_K 0x0000001C
8137 #define NV_IGRAPH_XF_LTCTX_L5_SPT 0x0000001D
8138 #define NV_IGRAPH_XF_LTCTX_L6_AMB 0x0000001E
8139 #define NV_IGRAPH_XF_LTCTX_L6_DIF 0x0000001F
8140 #define NV_IGRAPH_XF_LTCTX_L6_SPC 0x00000020
8141 #define NV_IGRAPH_XF_LTCTX_L6_K 0x00000021
8142 #define NV_IGRAPH_XF_LTCTX_L6_SPT 0x00000022
8143 #define NV_IGRAPH_XF_LTCTX_L7_AMB 0x00000023
8144 #define NV_IGRAPH_XF_LTCTX_L7_DIF 0x00000024
8145 #define NV_IGRAPH_XF_LTCTX_L7_SPC 0x00000025
8146 #define NV_IGRAPH_XF_LTCTX_L7_K 0x00000026
8147 #define NV_IGRAPH_XF_LTCTX_L7_SPT 0x00000027
8148 #define NV_IGRAPH_XF_LTCTX_EYED 0x00000028
8149 #define NV_IGRAPH_XF_LTCTX_FR_AMB 0x00000029
8150 #define NV_IGRAPH_XF_LTCTX_BR_AMB 0x0000002A
8151 #define NV_IGRAPH_XF_LTCTX_CM_COL 0x0000002B
8152 #define NV_IGRAPH_XF_LTCTX_BCM_COL 0x0000002C
8153 #define NV_IGRAPH_XF_LTCTX_FOG_K 0x0000002D
8154 #define NV_IGRAPH_XF_LTCTX_ZERO 0x0000002E
8155 #define NV_IGRAPH_XF_LTCTX_PT0 0x0000002F
8156 #define NV_IGRAPH_XF_LTCTX_PT1 0x00000030
8157 #define NV_IGRAPH_XF_LTCTX_FOGLIN 0x00000031
8158 #define NV_IGRAPH_XF_LTC0_ONE0 0x00000000
8159 #define NV_IGRAPH_XF_LTC0_MONE 0x00000001
8160 #define NV_IGRAPH_XF_LTC0_l1 0x00000002
8161 #define NV_IGRAPH_XF_LTC1_ZERO1 0x00000000
8162 #define NV_IGRAPH_XF_LTC1_l0 0x00000001
8163 #define NV_IGRAPH_XF_LTC1_PP 0x00000002
8164 #define NV_IGRAPH_XF_LTC1_r0 0x00000003
8165 #define NV_IGRAPH_XF_LTC1_r1 0x00000004
8166 #define NV_IGRAPH_XF_LTC1_r2 0x00000005
8167 #define NV_IGRAPH_XF_LTC1_r3 0x00000006
8168 #define NV_IGRAPH_XF_LTC1_r4 0x00000007
8169 #define NV_IGRAPH_XF_LTC1_r5 0x00000008
8170 #define NV_IGRAPH_XF_LTC1_r6 0x00000009
8171 #define NV_IGRAPH_XF_LTC1_r7 0x0000000A
8172 #define NV_IGRAPH_XF_LTC1_L0 0x0000000B
8173 #define NV_IGRAPH_XF_LTC1_L1 0x0000000C
8174 #define NV_IGRAPH_XF_LTC1_L2 0x0000000D
8175 #define NV_IGRAPH_XF_LTC1_L3 0x0000000E
8176 #define NV_IGRAPH_XF_LTC1_L4 0x0000000F
8177 #define NV_IGRAPH_XF_LTC1_L5 0x00000010
8178 #define NV_IGRAPH_XF_LTC1_L6 0x00000011
8179 #define NV_IGRAPH_XF_LTC1_L7 0x00000012
8180 #define NV_IGRAPH_XF_LTC2_ONE2 0x00000000
8181 #define NV_IGRAPH_XF_LTC2_m0 0x00000001
8182 #define NV_IGRAPH_XF_LTC2_m1 0x00000002
8183 #define NV_IGRAPH_XF_LTC2_n1 0x00000003
8184 #define NV_IGRAPH_XF_LTC2_M0 0x00000004
8185 #define NV_IGRAPH_XF_LTC2_M1 0x00000005
8186 #define NV_IGRAPH_XF_LTC2_M2 0x00000006
8187 #define NV_IGRAPH_XF_LTC2_M3 0x00000007
8188 #define NV_IGRAPH_XF_LTC2_M4 0x00000008
8189 #define NV_IGRAPH_XF_LTC2_M5 0x00000009
8190 #define NV_IGRAPH_XF_LTC2_M6 0x0000000A
8191 #define NV_IGRAPH_XF_LTC2_M7 0x0000000B
8192 #define NV_IGRAPH_XF_LTC3_ZERO3 0x00000000
8193 #define NV_IGRAPH_XF_LTC3_PPADD 0x00000001
8194 #define NV_IGRAPH_XF_LTC3_n0 0x00000002
8195 #define NV_IGRAPH_XF_LTC3_N0 0x00000003
8196 #define NV_IGRAPH_XF_LTC3_N1 0x00000004
8197 #define NV_IGRAPH_XF_LTC3_N2 0x00000005
8198 #define NV_IGRAPH_XF_LTC3_N3 0x00000006
8199 #define NV_IGRAPH_XF_LTC3_N4 0x00000007
8200 #define NV_IGRAPH_XF_LTC3_N5 0x00000008
8201 #define NV_IGRAPH_XF_LTC3_N6 0x00000009
8202 #define NV_IGRAPH_XF_LTC3_N7 0x0000000A
8203 #define NV_IGRAPH_XF_LTC3_MATA 0x0000000B
8204 
8205 /* NV-Array NV_IGRAPH_PRIV_RAM0 (4 byte access) */
8206 #define NV_IGRAPH_PRIV_RAM0 0x00002000
8207 /* NV-Array size NV_IGRAPH_PRIV_RAM0__SIZE_1 [0..2047] */
8208 #define NV_IGRAPH_PRIV_RAM0__SIZE_1 0x00000800
8209 #define NV_IGRAPH_PRIV_RAM0_FIELD 0xFFFFFFFF
8210 
8211 /* NV-Array NV_IGRAPH_PRIV_RAM1 (4 byte access) */
8212 #define NV_IGRAPH_PRIV_RAM1 0x00004000
8213 /* NV-Array size NV_IGRAPH_PRIV_RAM1__SIZE_1 [0..4095] */
8214 #define NV_IGRAPH_PRIV_RAM1__SIZE_1 0x00001000
8215 #define NV_IGRAPH_PRIV_RAM1_FIELD 0xFFFFFFFF
8216 
8217 /* NV-Device NV_PMC */
8218 #define NV_PMC 0x00000000 /* size: 0x00000FFF */
8219 
8220 /* NV-Register NV_PMC_BOOT_0 */
8221 #define NV_PMC_BOOT_0 0x00000000
8222 #define NV_PMC_BOOT_0_ID 0xFFFFFFFF
8223 #define NV_PMC_BOOT_0_ID_NV01_A 0x00010100
8224 #define NV_PMC_BOOT_0_ID_NV01_B 0x00010101
8225 #define NV_PMC_BOOT_0_ID_NV01_B02 0x00010102
8226 #define NV_PMC_BOOT_0_ID_NV01_B03 0x00010103
8227 #define NV_PMC_BOOT_0_ID_NV01_C01 0x00010104
8228 #define NV_PMC_BOOT_0_ID_NV02_A01 0x10020400
8229 #define NV_PMC_BOOT_0_ID_NV03_A01 0x00030100
8230 #define NV_PMC_BOOT_0_ID_NV03_B01 0x00030110
8231 #define NV_PMC_BOOT_0_ID_NV03T_A01 0x20030120
8232 #define NV_PMC_BOOT_0_ID_NV03T_A02 0x20030121
8233 #define NV_PMC_BOOT_0_ID_NV03T_A03_A04 0x20030122
8234 #define NV_PMC_BOOT_0_ID_NV04_A01_A02_A03 0x20004000
8235 #define NV_PMC_BOOT_0_ID_NV04_A04 0x20034001
8236 #define NV_PMC_BOOT_0_ID_NV04_A05 0x20044001
8237 #define NV_PMC_BOOT_0_ID_NV05_NV06_A01 0x20104000
8238 #define NV_PMC_BOOT_0_ID_NV05_NV06_A02 0x20114000
8239 #define NV_PMC_BOOT_0_ID_NV05_NV06_A03 0x20124000
8240 #define NV_PMC_BOOT_0_ID_NV05_NV06_B01 0x20204000
8241 #define NV_PMC_BOOT_0_ID_NV05_NV06_B02 0x20214000
8242 #define NV_PMC_BOOT_0_ID_NV05_NV06_B03 0x20224000
8243 #define NV_PMC_BOOT_0_ID_NV0A_A01 0x20204000
8244 #define NV_PMC_BOOT_0_ID_NV0A_A02 0x20214000
8245 #define NV_PMC_BOOT_0_ID_NV0A_B01 0x20224000
8246 #define NV_PMC_BOOT_0_ID_NV10_A1_DEVID0 0x010000A1
8247 #define NV_PMC_BOOT_0_ID_NV10_A1_DEVID1 0x010100A1
8248 #define NV_PMC_BOOT_0_ID_NV10_A1_DEVID2 0x010200A1
8249 #define NV_PMC_BOOT_0_ID_NV10_A1_DEVID3 0x010300A1
8250 #define NV_PMC_BOOT_0_ID_NV10_A2_DEVID0 0x010000A2
8251 #define NV_PMC_BOOT_0_ID_NV10_A2_DEVID1 0x010100A2
8252 #define NV_PMC_BOOT_0_ID_NV10_A2_DEVID2 0x010200A2
8253 #define NV_PMC_BOOT_0_ID_NV10_A2_DEVID3 0x010300A2
8254 #define NV_PMC_BOOT_0_ID_NV10_B1_DEVID0 0x010000B1
8255 #define NV_PMC_BOOT_0_ID_NV10_B1_DEVID1 0x010100B1
8256 #define NV_PMC_BOOT_0_ID_NV10_B1_DEVID2 0x010200B1
8257 #define NV_PMC_BOOT_0_ID_NV10_B1_DEVID3 0x010300B1
8258 #define NV_PMC_BOOT_0_ID_NV10_B2_DEVID0 0x010000B2
8259 #define NV_PMC_BOOT_0_ID_NV10_B2_DEVID1 0x010100B2
8260 #define NV_PMC_BOOT_0_ID_NV10_B2_DEVID2 0x010200B2
8261 #define NV_PMC_BOOT_0_ID_NV10_B2_DEVID3 0x010300B2
8262 #define NV_PMC_BOOT_0_ID_NV15_A1_DEVID0 0x015000A1
8263 #define NV_PMC_BOOT_0_ID_NV15_A1_DEVID1 0x015100A1
8264 #define NV_PMC_BOOT_0_ID_NV15_A1_DEVID2 0x015200A1
8265 #define NV_PMC_BOOT_0_ID_NV15_A1_DEVID3 0x015300A1
8266 #define NV_PMC_BOOT_0_ID_NV15_A2_DEVID0 0x015000A2
8267 #define NV_PMC_BOOT_0_ID_NV15_A2_DEVID1 0x015100A2
8268 #define NV_PMC_BOOT_0_ID_NV15_A2_DEVID2 0x015200A2
8269 #define NV_PMC_BOOT_0_ID_NV15_A2_DEVID3 0x015300A2
8270 #define NV_PMC_BOOT_0_ID_NV15_B1_DEVID0 0x015000B1
8271 #define NV_PMC_BOOT_0_ID_NV15_B1_DEVID1 0x015100B1
8272 #define NV_PMC_BOOT_0_ID_NV15_B1_DEVID2 0x015200B1
8273 #define NV_PMC_BOOT_0_ID_NV15_B1_DEVID3 0x015300B1
8274 #define NV_PMC_BOOT_0_ID_NV15_B2_DEVID0 0x015000B2
8275 #define NV_PMC_BOOT_0_ID_NV15_B2_DEVID1 0x015100B2
8276 #define NV_PMC_BOOT_0_ID_NV15_B2_DEVID2 0x015200B2
8277 #define NV_PMC_BOOT_0_ID_NV15_B2_DEVID3 0x015300B2
8278 #define NV_PMC_BOOT_0_MINOR_REVISION 0x0000000F
8279 #define NV_PMC_BOOT_0_MINOR_REVISION_0 0x00000000
8280 #define NV_PMC_BOOT_0_MAJOR_REVISION 0x000000F0
8281 #define NV_PMC_BOOT_0_MAJOR_REVISION_A 0x00000000
8282 #define NV_PMC_BOOT_0_MAJOR_REVISION_B 0x00000010
8283 #define NV_PMC_BOOT_0_IMPLEMENTATION 0x00000F00
8284 #define NV_PMC_BOOT_0_IMPLEMENTATION_NV4_0 0x00000000
8285 #define NV_PMC_BOOT_0_ARCHITECTURE 0x0000F000
8286 #define NV_PMC_BOOT_0_ARCHITECTURE_NV0 0x00000000
8287 #define NV_PMC_BOOT_0_ARCHITECTURE_NV1 0x00001000
8288 #define NV_PMC_BOOT_0_ARCHITECTURE_NV2 0x00002000
8289 #define NV_PMC_BOOT_0_ARCHITECTURE_NV3 0x00003000
8290 #define NV_PMC_BOOT_0_ARCHITECTURE_NV4 0x00004000
8291 #define NV_PMC_BOOT_0_ARCHITECTURE_NV10 0x00005000
8292 #define NV_PMC_BOOT_0_FIB_REVISION 0x000F0000
8293 #define NV_PMC_BOOT_0_FIB_REVISION_0 0x00000000
8294 #define NV_PMC_BOOT_0_MASK_REVISION 0x00F00000
8295 #define NV_PMC_BOOT_0_MASK_REVISION_A 0x00000000
8296 #define NV_PMC_BOOT_0_MASK_REVISION_B 0x00100000
8297 #define NV_PMC_BOOT_0_MANUFACTURER 0x0F000000
8298 #define NV_PMC_BOOT_0_MANUFACTURER_NVIDIA 0x00000000
8299 #define NV_PMC_BOOT_0_FOUNDRY 0xF0000000
8300 #define NV_PMC_BOOT_0_FOUNDRY_SGS 0x00000000
8301 #define NV_PMC_BOOT_0_FOUNDRY_HELIOS 0x10000000
8302 #define NV_PMC_BOOT_0_FOUNDRY_TSMC 0x20000000
8303 
8304 /* NV-Register NV_PMC_BOOT_1 */
8305 #define NV_PMC_BOOT_1 0x00000001
8306 #define NV_PMC_BOOT_1_ENDIAN00 0x00000001
8307 #define NV_PMC_BOOT_1_ENDIAN00_LITTLE 0xFFFFFFFE
8308 #define NV_PMC_BOOT_1_ENDIAN00_BIG 0x00000001
8309 #define NV_PMC_BOOT_1_ENDIAN24 0x01000000
8310 #define NV_PMC_BOOT_1_ENDIAN24_LITTLE 0xFEFFFFFF
8311 #define NV_PMC_BOOT_1_ENDIAN24_BIG 0x01000000
8312 
8313 /* NV-Register NV_PMC_INTR_0 */
8314 #define NV_PMC_INTR_0 0x00000100
8315 #define NV_PMC_INTR_0_MD 0x00000001
8316 #define NV_PMC_INTR_0_MD_NOT_PENDING 0xFFFFFFFE
8317 #define NV_PMC_INTR_0_MD_PENDING 0x00000001
8318 #define NV_PMC_INTR_0_PMEDIA 0x00000010
8319 #define NV_PMC_INTR_0_PMEDIA_NOT_PENDING 0xFFFFFFEF
8320 #define NV_PMC_INTR_0_PMEDIA_PENDING 0x00000010
8321 #define NV_PMC_INTR_0_PFIFO 0x00000100
8322 #define NV_PMC_INTR_0_PFIFO_NOT_PENDING 0xFFFFFEFF
8323 #define NV_PMC_INTR_0_PFIFO_PENDING 0x00000100
8324 #define NV_PMC_INTR_0_PGRAPH 0x00001000
8325 #define NV_PMC_INTR_0_PGRAPH_NOT_PENDING 0xFFFFEFFF
8326 #define NV_PMC_INTR_0_PGRAPH_PENDING 0x00001000
8327 #define NV_PMC_INTR_0_PVIDEO 0x00010000
8328 #define NV_PMC_INTR_0_PVIDEO_NOT_PENDING 0xFFFEFFFF
8329 #define NV_PMC_INTR_0_PVIDEO_PENDING 0x00010000
8330 #define NV_PMC_INTR_0_PTIMER 0x00100000
8331 #define NV_PMC_INTR_0_PTIMER_NOT_PENDING 0xFFEFFFFF
8332 #define NV_PMC_INTR_0_PTIMER_PENDING 0x00100000
8333 #define NV_PMC_INTR_0_PCRTC 0x01000000
8334 #define NV_PMC_INTR_0_PCRTC_NOT_PENDING 0xFEFFFFFF
8335 #define NV_PMC_INTR_0_PCRTC_PENDING 0x01000000
8336 #define NV_PMC_INTR_0_PCRTC2 0x02000000
8337 #define NV_PMC_INTR_0_PCRTC2_NOT_PENDING 0xFDFFFFFF
8338 #define NV_PMC_INTR_0_PCRTC2_PENDING 0x02000000
8339 #define NV_PMC_INTR_0_PBUS 0x10000000
8340 #define NV_PMC_INTR_0_PBUS_NOT_PENDING 0xEFFFFFFF
8341 #define NV_PMC_INTR_0_PBUS_PENDING 0x10000000
8342 #define NV_PMC_INTR_0_SOFTWARE 0x80000000
8343 #define NV_PMC_INTR_0_SOFTWARE_NOT_PENDING 0x7FFFFFFF
8344 #define NV_PMC_INTR_0_SOFTWARE_PENDING 0x80000000
8345 
8346 /* NV-Register NV_PMC_INTR_EN_0 */
8347 #define NV_PMC_INTR_EN_0 0x00000140
8348 #define NV_PMC_INTR_EN_0_INTA 0x00000003
8349 #define NV_PMC_INTR_EN_0_INTA_DISABLED 0x00000000
8350 #define NV_PMC_INTR_EN_0_INTA_HARDWARE 0x00000001
8351 #define NV_PMC_INTR_EN_0_INTA_SOFTWARE 0x00000002
8352 
8353 /* NV-Register NV_PMC_INTR_READ_0 */
8354 #define NV_PMC_INTR_READ_0 0x00000160
8355 #define NV_PMC_INTR_READ_0_INTA 0x00000001
8356 #define NV_PMC_INTR_READ_0_INTA_LOW 0xFFFFFFFE
8357 #define NV_PMC_INTR_READ_0_INTA_HIGH 0x00000001
8358 
8359 /* NV-Register NV_PMC_ENABLE */
8360 #define NV_PMC_ENABLE 0x00000200
8361 #define NV_PMC_ENABLE_BUF_RESET 0x00000001
8362 #define NV_PMC_ENABLE_BUF_RESET_DISABLE 0xFFFFFFFE
8363 #define NV_PMC_ENABLE_BUF_RESET_ENABLE 0x00000001
8364 #define NV_PMC_ENABLE_MD_RESET 0x00000002
8365 #define NV_PMC_ENABLE_MD_RESET_DISABLE 0xFFFFFFFD
8366 #define NV_PMC_ENABLE_MD_RESET_ENABLE 0x00000002
8367 #define NV_PMC_ENABLE_PMEDIA 0x00000010
8368 #define NV_PMC_ENABLE_PMEDIA_DISABLED 0xFFFFFFEF
8369 #define NV_PMC_ENABLE_PMEDIA_ENABLED 0x00000010
8370 #define NV_PMC_ENABLE_PFIFO 0x00000100
8371 #define NV_PMC_ENABLE_PFIFO_DISABLED 0xFFFFFEFF
8372 #define NV_PMC_ENABLE_PFIFO_ENABLED 0x00000100
8373 #define NV_PMC_ENABLE_PGRAPH 0x00001000
8374 #define NV_PMC_ENABLE_PGRAPH_DISABLED 0xFFFFEFFF
8375 #define NV_PMC_ENABLE_PGRAPH_ENABLED 0x00001000
8376 #define NV_PMC_ENABLE_PPMI 0x00010000
8377 #define NV_PMC_ENABLE_PPMI_DISABLED 0xFFFEFFFF
8378 #define NV_PMC_ENABLE_PPMI_ENABLED 0x00010000
8379 #define NV_PMC_ENABLE_PFB 0x00100000
8380 #define NV_PMC_ENABLE_PFB_DISABLED 0xFFEFFFFF
8381 #define NV_PMC_ENABLE_PFB_ENABLED 0x00100000
8382 #define NV_PMC_ENABLE_PCRTC 0x01000000
8383 #define NV_PMC_ENABLE_PCRTC_DISABLED 0xFEFFFFFF
8384 #define NV_PMC_ENABLE_PCRTC_ENABLED 0x01000000
8385 #define NV_PMC_ENABLE_PCRTC2 0x02000000
8386 #define NV_PMC_ENABLE_PCRTC2_DISABLED 0xFDFFFFFF
8387 #define NV_PMC_ENABLE_PCRTC2_ENABLED 0x02000000
8388 #define NV_PMC_ENABLE_PVIDEO 0x10000000
8389 #define NV_PMC_ENABLE_PVIDEO_DISABLED 0xEFFFFFFF
8390 #define NV_PMC_ENABLE_PVIDEO_ENABLED 0x10000000
8391 
8392 /* NV-Register NV_PMC_FRAME_PROTECT_MIN */
8393 #define NV_PMC_FRAME_PROTECT_MIN 0x00000300
8394 #define NV_PMC_FRAME_PROTECT_MIN_VAL 0x1FFFFFFF
8395 #define NV_PMC_FRAME_PROTECT_MIN_VAL0 0x00000000
8396 #define NV_PMC_FRAME_PROTECT_EN 0x80000000
8397 #define NV_PMC_FRAME_PROTECT_DISABLED 0x7FFFFFFF
8398 #define NV_PMC_FRAME_PROTECT_ENABLED 0x80000000
8399 
8400 /* NV-Register NV_PMC_FRAME_PROTECT_MAX */
8401 #define NV_PMC_FRAME_PROTECT_MAX 0x00000304
8402 #define NV_PMC_FRAME_PROTECT_MAX_VAL 0x1FFFFFFF
8403 #define NV_PMC_FRAME_PROTECT_MAX_VAL0 0x00000000
8404 
8405 /* NV-Device NV_PVIDEO */
8406 #ifdef DUPLICATED
8407 #define NV_PVIDEO 0x0000B000 /* size: 0x00000FFF */
8408 #endif
8409 
8410 /* NV-Register NV_MD_FESTATE1 */
8411 #define NV_MD_FESTATE1 0x00000100
8412 #define NV_MD_FESTATE1_FIELD1 0x0000000F
8413 #define NV_MD_FESTATE1_FIELD1_FUN 0x00000008
8414 #define NV_MD_FESTATE1_FIELD2 0x00000010
8415 #define NV_MD_FESTATE1_FIELD2_FUN 0xFFFFFFEF
8416 
8417 /* NV-Register NV_MD_FESTATE2 */
8418 #define NV_MD_FESTATE2 0x00000200
8419 #define NV_MD_FESTATE2_FIELD1 0x0000000F
8420 #define NV_MD_FESTATE2_FIELD1_FUN 0x00000008
8421 #define NV_MD_FESTATE2_FIELD2 0x00000010
8422 #define NV_MD_FESTATE2_FIELD2_FUN 0xFFFFFFEF
8423 
8424 /* NV-Register NV_MD_VDEBUG1 */
8425 #define NV_MD_VDEBUG1 0x00001000
8426 #define NV_MD_VDEBUG1_TRACEFE 0x00000001
8427 #define NV_MD_VDEBUG1_TRACEFE_OFF 0xFFFFFFFE
8428 #define NV_MD_VDEBUG1_TRACEFE_ON 0x00000001
8429 
8430 /* NV-Device NV_PME */
8431 #define NV_PME 0x00200000 /* size: 0x00000FFF */
8432 
8433 /* NV-Register NV_PME_INTR_0 */
8434 #define NV_PME_INTR_0 0x00200100
8435 #define NV_PME_INTR_0_TASKA_NOTIFY 0x00000001
8436 #define NV_PME_INTR_0_TASKA_NOTIFY_NOT_PENDING 0xFFFFFFFE
8437 #define NV_PME_INTR_0_TASKA_NOTIFY_PENDING 0x00000001
8438 #define NV_PME_INTR_0_TASKA_NOTIFY_RESET 0x00000001
8439 #define NV_PME_INTR_0_TASKB_NOTIFY 0x00000010
8440 #define NV_PME_INTR_0_TASKB_NOTIFY_NOT_PENDING 0xFFFFFFEF
8441 #define NV_PME_INTR_0_TASKB_NOTIFY_PENDING 0x00000010
8442 #define NV_PME_INTR_0_TASKB_NOTIFY_RESET 0x00000010
8443 #define NV_PME_INTR_0_ANC_NOTIFY 0x00000100
8444 #define NV_PME_INTR_0_ANC_NOTIFY_NOT_PENDING 0xFFFFFEFF
8445 #define NV_PME_INTR_0_ANC_NOTIFY_PENDING 0x00000100
8446 #define NV_PME_INTR_0_ANC_NOTIFY_RESET 0x00000100
8447 #define NV_PME_INTR_0_FOUT_NOTIFY 0x00001000
8448 #define NV_PME_INTR_0_FOUT_NOTIFY_NOT_PENDING 0xFFFFEFFF
8449 #define NV_PME_INTR_0_FOUT_NOTIFY_PENDING 0x00001000
8450 #define NV_PME_INTR_0_FOUT_NOTIFY_RESET 0x00001000
8451 #define NV_PME_INTR_0_FIN_NOTIFY 0x00010000
8452 #define NV_PME_INTR_0_FIN_NOTIFY_NOT_PENDING 0xFFFEFFFF
8453 #define NV_PME_INTR_0_FIN_NOTIFY_PENDING 0x00010000
8454 #define NV_PME_INTR_0_FIN_NOTIFY_RESET 0x00010000
8455 #define NV_PME_INTR_0_FOUTTIMEOUT_NOTIFY 0x00100000
8456 #define NV_PME_INTR_0_FOUTTIMEOUT_NOTIFY_NOT_PENDING 0xFFEFFFFF
8457 #define NV_PME_INTR_0_FOUTTIMEOUT_NOTIFY_PENDING 0x00100000
8458 #define NV_PME_INTR_0_FOUTTIMEOUT_NOTIFY_RESET 0x00100000
8459 #define NV_PME_INTR_0_FINTIMEOUT_NOTIFY 0x01000000
8460 #define NV_PME_INTR_0_FINTIMEOUT_NOTIFY_NOT_PENDING 0xFEFFFFFF
8461 #define NV_PME_INTR_0_FINTIMEOUT_NOTIFY_PENDING 0x01000000
8462 #define NV_PME_INTR_0_FINTIMEOUT_NOTIFY_RESET 0x01000000
8463 #define NV_PME_INTR_0_REGTIMEOUT_NOTIFY 0x10000000
8464 #define NV_PME_INTR_0_REGTIMEOUT_NOTIFY_NOT_PENDING 0xEFFFFFFF
8465 #define NV_PME_INTR_0_REGTIMEOUT_NOTIFY_PENDING 0x10000000
8466 #define NV_PME_INTR_0_REGTIMEOUT_NOTIFY_RESET 0x10000000
8467 
8468 /* NV-Register NV_PME_INTR_EN_0 */
8469 #define NV_PME_INTR_EN_0 0x00200140
8470 #define NV_PME_INTR_EN_0_TASKA_NOTIFY 0x00000001
8471 #define NV_PME_INTR_EN_0_TASKA_NOTIFY_DISABLED 0xFFFFFFFE
8472 #define NV_PME_INTR_EN_0_TASKA_NOTIFY_ENABLED 0x00000001
8473 #define NV_PME_INTR_EN_0_TASKB_NOTIFY 0x00000010
8474 #define NV_PME_INTR_EN_0_TASKB_NOTIFY_DISABLED 0xFFFFFFEF
8475 #define NV_PME_INTR_EN_0_TASKB_NOTIFY_ENABLED 0x00000010
8476 #define NV_PME_INTR_EN_0_ANC_NOTIFY 0x00000100
8477 #define NV_PME_INTR_EN_0_ANC_NOTIFY_DISABLED 0xFFFFFEFF
8478 #define NV_PME_INTR_EN_0_ANC_NOTIFY_ENABLED 0x00000100
8479 #define NV_PME_INTR_EN_0_FOUT_NOTIFY 0x00001000
8480 #define NV_PME_INTR_EN_0_FOUT_NOTIFY_DISABLED 0xFFFFEFFF
8481 #define NV_PME_INTR_EN_0_FOUT_NOTIFY_ENABLED 0x00001000
8482 #define NV_PME_INTR_EN_0_FIN_NOTIFY 0x00010000
8483 #define NV_PME_INTR_EN_0_FIN_NOTIFY_DISABLED 0xFFFEFFFF
8484 #define NV_PME_INTR_EN_0_FIN_NOTIFY_ENABLED 0x00010000
8485 #define NV_PME_INTR_EN_0_FOUTTIMEOUT_NOTIFY 0x00100000
8486 #define NV_PME_INTR_EN_0_FOUTTIMEOUT_NOTIFY_DISABLED 0xFFEFFFFF
8487 #define NV_PME_INTR_EN_0_FOUTTIMEOUT_NOTIFY_ENABLED 0x00100000
8488 #define NV_PME_INTR_EN_0_FINTIMEOUT_NOTIFY 0x01000000
8489 #define NV_PME_INTR_EN_0_FINTIMEOUT_NOTIFY_DISABLED 0xFEFFFFFF
8490 #define NV_PME_INTR_EN_0_FINTIMEOUT_NOTIFY_ENABLED 0x01000000
8491 #define NV_PME_INTR_EN_0_REGTIMEOUT_NOTIFY 0x10000000
8492 #define NV_PME_INTR_EN_0_REGTIMEOUT_NOTIFY_DISABLED 0xEFFFFFFF
8493 #define NV_PME_INTR_EN_0_REGTIMEOUT_NOTIFY_ENABLED 0x10000000
8494 
8495 /* NV-Register NV_PME_HOST_CONFIG */
8496 #define NV_PME_HOST_CONFIG 0x00200200
8497 #define NV_PME_HOST_CONFIG_FIFOMAXTX 0x0000003F
8498 #define NV_PME_HOST_CONFIG_CLOCK_SELECT 0x00000080
8499 #define NV_PME_HOST_CONFIG_CLOCK_SELECT_PCI_DIV_2 0xFFFFFF7F
8500 #define NV_PME_HOST_CONFIG_CLOCK_SELECT_PCI 0x00000080
8501 #define NV_PME_HOST_CONFIG_TIMEOUT 0x00000F00
8502 #define NV_PME_HOST_CONFIG_SLAVE_NOTDETECTED 0x00010000
8503 #define NV_PME_HOST_CONFIG_SLAVE_NOTDETECTED_FALSE 0xFFFEFFFF
8504 #define NV_PME_HOST_CONFIG_SLAVE_NOTDETECTED_TRUE 0x00010000
8505 #define NV_PME_HOST_CONFIG_SLAVE_DETECTED 0x00100000
8506 #define NV_PME_HOST_CONFIG_SLAVE_DETECTED_FALSE 0xFFEFFFFF
8507 #define NV_PME_HOST_CONFIG_SLAVE_DETECTED_TRUE 0x00100000
8508 #define NV_PME_HOST_CONFIG_FOUT_SYSMEM 0x01000000
8509 #define NV_PME_HOST_CONFIG_FOUT_SYSMEM_DISABLED 0xFEFFFFFF
8510 #define NV_PME_HOST_CONFIG_FOUT_SYSMEM_ENABLED 0x01000000
8511 #define NV_PME_HOST_CONFIG_FIN_SYSMEM 0x02000000
8512 #define NV_PME_HOST_CONFIG_FIN_SYSMEM_DISABLED 0xFDFFFFFF
8513 #define NV_PME_HOST_CONFIG_FIN_SYSMEM_ENABLED 0x02000000
8514 #define NV_PME_HOST_CONFIG_FOUT_PAUSE 0x04000000
8515 #define NV_PME_HOST_CONFIG_FOUT_PAUSE_DISABLED 0xFBFFFFFF
8516 #define NV_PME_HOST_CONFIG_FOUT_PAUSE_ENABLED 0x04000000
8517 #define NV_PME_HOST_CONFIG_FIN_PAUSE 0x08000000
8518 #define NV_PME_HOST_CONFIG_FIN_PAUSE_DISABLED 0xF7FFFFFF
8519 #define NV_PME_HOST_CONFIG_FIN_PAUSE_ENABLED 0x08000000
8520 #define NV_PME_HOST_CONFIG_FIN_VIP_HOST_4X 0x10000000
8521 #define NV_PME_HOST_CONFIG_FIN_VIP_HOST_4X_DISABLED 0xEFFFFFFF
8522 #define NV_PME_HOST_CONFIG_FIN_VIP_HOST_4X_ENABLED 0x10000000
8523 #define NV_PME_HOST_CONFIG_FOUT_VIP_HOST_4X 0x20000000
8524 #define NV_PME_HOST_CONFIG_FOUT_VIP_HOST_4X_DISABLED 0xDFFFFFFF
8525 #define NV_PME_HOST_CONFIG_FOUT_VIP_HOST_4X_ENABLED 0x20000000
8526 #define NV_PME_HOST_CONFIG_FIN 0x40000000
8527 #define NV_PME_HOST_CONFIG_FIN_DISABLED 0xBFFFFFFF
8528 #define NV_PME_HOST_CONFIG_FIN_ENABLED 0x40000000
8529 #define NV_PME_HOST_CONFIG_FOUT 0x80000000
8530 #define NV_PME_HOST_CONFIG_FOUT_DISABLED 0x7FFFFFFF
8531 #define NV_PME_HOST_CONFIG_FOUT_ENABLED 0x80000000
8532 
8533 /* NV-Register NV_PME_FOUT_ADDR */
8534 #define NV_PME_FOUT_ADDR 0x00200204
8535 #define NV_PME_FOUT_ADDR_FIFO 0x0000000F
8536 #define NV_PME_FOUT_ADDR_DEVICE 0x00000300
8537 
8538 /* NV-Register NV_PME_FIN_ADDR */
8539 #define NV_PME_FIN_ADDR 0x00200208
8540 #define NV_PME_FIN_ADDR_FIFO 0x0000000F
8541 #define NV_PME_FIN_ADDR_DEVICE 0x00000300
8542 
8543 /* NV-Register NV_PME_656_CONFIG */
8544 #define NV_PME_656_CONFIG 0x00200400
8545 #define NV_PME_656_CONFIG_TASKA_ENABLE 0x00000001
8546 #define NV_PME_656_CONFIG_TASKB_ENABLE 0x00000010
8547 #define NV_PME_656_CONFIG_TASKA_ONLY 0x00000040
8548 #define NV_PME_656_CONFIG_TASKA_ONLY_DISABLED 0xFFFFFFBF
8549 #define NV_PME_656_CONFIG_TASKA_ONLY_ENABLED 0x00000040
8550 #define NV_PME_656_CONFIG_ANC_MODE 0x00000300
8551 #define NV_PME_656_CONFIG_ANC_MODE_DISABLED 0x00000000
8552 #define NV_PME_656_CONFIG_ANC_MODE_VBI1 0x00000100
8553 #define NV_PME_656_CONFIG_ANC_MODE_VBI2 0x00000200
8554 #define NV_PME_656_CONFIG_ANC_MODE_ANC 0x00000300
8555 #define NV_PME_656_CONFIG_ANC_TASKB 0x00000400
8556 #define NV_PME_656_CONFIG_ANC_TASKB_DISABLED 0xFFFFFBFF
8557 #define NV_PME_656_CONFIG_ANC_TASKB_ENABLED 0x00000400
8558 #define NV_PME_656_CONFIG_ANC_TASKB_END 0x00000800
8559 #define NV_PME_656_CONFIG_ANC_TASKB_END_DISABLED 0xFFFFF7FF
8560 #define NV_PME_656_CONFIG_ANC_TASKB_END_ENABLED 0x00000800
8561 #define NV_PME_656_CONFIG_VBI_VERT 0x00001000
8562 #define NV_PME_656_CONFIG_VBI_VERT_DISABLED 0xFFFFEFFF
8563 #define NV_PME_656_CONFIG_VBI_VERT_ENABLED 0x00001000
8564 #define NV_PME_656_CONFIG_ANC_HNOTV 0x00010000
8565 #define NV_PME_656_CONFIG_ANC_HNOTV_DISABLED 0xFFFEFFFF
8566 #define NV_PME_656_CONFIG_ANC_HNOTV_ENABLED 0x00010000
8567 #define NV_PME_656_CONFIG_ANC_NOTHV 0x00020000
8568 #define NV_PME_656_CONFIG_ANC_NOTHV_DISABLED 0xFFFDFFFF
8569 #define NV_PME_656_CONFIG_ANC_NOTHV_ENABLED 0x00020000
8570 #define NV_PME_656_CONFIG_ANC_NOTHNOTV 0x00040000
8571 #define NV_PME_656_CONFIG_ANC_NOTHNOTV_DISABLED 0xFFFBFFFF
8572 #define NV_PME_656_CONFIG_ANC_NOTHNOTV_ENABLED 0x00040000
8573 #define NV_PME_656_CONFIG_ANC_HV 0x00080000
8574 #define NV_PME_656_CONFIG_ANC_HV_DISABLED 0xFFF7FFFF
8575 #define NV_PME_656_CONFIG_ANC_HV_ENABLED 0x00080000
8576 #define NV_PME_656_CONFIG_ANC_IGNORE_PITCH 0x00100000
8577 #define NV_PME_656_CONFIG_ANC_IGNORE_PITCH_DISABLED 0xFFEFFFFF
8578 #define NV_PME_656_CONFIG_ANC_IGNORE_PITCH_ENABLED 0x00100000
8579 #define NV_PME_656_CONFIG_VIDEO_16_8 0x80000000
8580 #define NV_PME_656_CONFIG_VIDEO_8_BIT 0x7FFFFFFF
8581 #define NV_PME_656_CONFIG_VIDEO_16_BIT 0x80000000
8582 
8583 /* NV-Register NV_PME_NULL_DATA */
8584 #define NV_PME_NULL_DATA 0x00200404
8585 #define NV_PME_NULL_DATA_COMPARE 0x00000001
8586 #define NV_PME_NULL_DATA_COMPARE_DISABLED 0xFFFFFFFE
8587 #define NV_PME_NULL_DATA_COMPARE_ENABLED 0x00000001
8588 #define NV_PME_NULL_DATA_LINE_DETECT 0x00000010
8589 #define NV_PME_NULL_DATA_LINE_DETECT_DISABLED 0xFFFFFFEF
8590 #define NV_PME_NULL_DATA_LINE_DETECT_ENABLED 0x00000010
8591 #define NV_PME_NULL_DATA_BYTE 0xFF000000
8592 
8593 /* NV-Register NV_PME_VIPREG_NBYTES */
8594 #define NV_PME_VIPREG_NBYTES 0x00200300
8595 
8596 /* NV-Register NV_PME_VIPREG_ADDR */
8597 #define NV_PME_VIPREG_ADDR 0x00200304
8598 #define NV_PME_VIPREG_ADDR_LA 0x000000FF
8599 #define NV_PME_VIPREG_ADDR_UA 0x0000FF00
8600 
8601 /* NV-Register NV_PME_VIPREG_DATA */
8602 #define NV_PME_VIPREG_DATA 0x00200308
8603 #define NV_PME_VIPREG_DATA_BITS 0xFFFFFFFF
8604 
8605 /* NV-Register NV_PME_VIPREG_CTRL */
8606 #define NV_PME_VIPREG_CTRL 0x0020030C
8607 #define NV_PME_VIPREG_CTRL_READ 0x00000001
8608 #define NV_PME_VIPREG_CTRL_READ_NOT_PENDING 0xFFFFFFFE
8609 #define NV_PME_VIPREG_CTRL_READ_PENDING 0x00000001
8610 #define NV_PME_VIPREG_CTRL_READ_START 0x00000001
8611 #define NV_PME_VIPREG_CTRL_WRITE 0x00000100
8612 #define NV_PME_VIPREG_CTRL_WRITE_NOT_PENDING 0xFFFFFEFF
8613 #define NV_PME_VIPREG_CTRL_WRITE_PENDING 0x00000100
8614 #define NV_PME_VIPREG_CTRL_WRITE_START 0x00000100
8615 
8616 /* NV-Register NV_PME_FOUT_BUFF0_START */
8617 #define NV_PME_FOUT_BUFF0_START 0x00200340
8618 #define NV_PME_FOUT_BUFF0_START_ADDRESS 0xFFFFFFF0
8619 
8620 /* NV-Register NV_PME_FOUT_BUFF1_START */
8621 #define NV_PME_FOUT_BUFF1_START 0x00200344
8622 #define NV_PME_FOUT_BUFF1_START_ADDRESS 0xFFFFFFF0
8623 
8624 /* NV-Register NV_PME_FOUT_BUFF0_LENGTH */
8625 #define NV_PME_FOUT_BUFF0_LENGTH 0x00200348
8626 #define NV_PME_FOUT_BUFF0_LENGTH_BITS 0x00FFFFF0
8627 
8628 /* NV-Register NV_PME_FOUT_BUFF1_LENGTH */
8629 #define NV_PME_FOUT_BUFF1_LENGTH 0x0020034C
8630 #define NV_PME_FOUT_BUFF1_LENGTH_BITS 0x00FFFFF0
8631 
8632 /* NV-Register NV_PME_FOUT_ME_STATE */
8633 #define NV_PME_FOUT_ME_STATE 0x00200350
8634 #define NV_PME_FOUT_ME_STATE_BUFF0_INTR_NOTIFY 0x00000001
8635 #define NV_PME_FOUT_ME_STATE_BUFF1_INTR_NOTIFY 0x00000010
8636 #define NV_PME_FOUT_ME_STATE_BUFF0_IN_USE 0x00000100
8637 #define NV_PME_FOUT_ME_STATE_BUFF1_IN_USE 0x00001000
8638 #define NV_PME_FOUT_ME_STATE_CURRENT_BUFFER 0x00010000
8639 #define NV_PME_FOUT_ME_STATE_CURRENT_BUFFER_0 0xFFFEFFFF
8640 #define NV_PME_FOUT_ME_STATE_CURRENT_BUFFER_1 0x00010000
8641 
8642 /* NV-Register NV_PME_FOUT_SU_STATE */
8643 #define NV_PME_FOUT_SU_STATE 0x00200354
8644 #define NV_PME_FOUT_SU_STATE_BUFF0_IN_USE 0x00010000
8645 #define NV_PME_FOUT_SU_STATE_BUFF1_IN_USE 0x00100000
8646 
8647 /* NV-Register NV_PME_FOUT_RM_STATE */
8648 #define NV_PME_FOUT_RM_STATE 0x00200358
8649 #define NV_PME_FOUT_RM_STATE_BUFF0_INTR_NOTIFY 0x00000001
8650 #define NV_PME_FOUT_RM_STATE_BUFF1_INTR_NOTIFY 0x00000010
8651 
8652 /* NV-Register NV_PME_FOUT_CURRENT */
8653 #define NV_PME_FOUT_CURRENT 0x0020035C
8654 #define NV_PME_FOUT_CURRENT_POS 0xFFFFFFFF
8655 
8656 /* NV-Register NV_PME_FIN_BUFF0_START */
8657 #define NV_PME_FIN_BUFF0_START 0x00200380
8658 #define NV_PME_FIN_BUFF0_START_ADDRESS 0xFFFFFFF0
8659 
8660 /* NV-Register NV_PME_FIN_BUFF1_START */
8661 #define NV_PME_FIN_BUFF1_START 0x00200384
8662 #define NV_PME_FIN_BUFF1_START_ADDRESS 0xFFFFFFF0
8663 
8664 /* NV-Register NV_PME_FIN_BUFF0_LENGTH */
8665 #define NV_PME_FIN_BUFF0_LENGTH 0x00200388
8666 #define NV_PME_FIN_BUFF0_LENGTH_BITS 0x00FFFFF0
8667 
8668 /* NV-Register NV_PME_FIN_BUFF1_LENGTH */
8669 #define NV_PME_FIN_BUFF1_LENGTH 0x0020038C
8670 #define NV_PME_FIN_BUFF1_LENGTH_BITS 0x00FFFFF0
8671 
8672 /* NV-Register NV_PME_FIN_ME_STATE */
8673 #define NV_PME_FIN_ME_STATE 0x00200390
8674 #define NV_PME_FIN_ME_STATE_BUFF0_INTR_NOTIFY 0x00000001
8675 #define NV_PME_FIN_ME_STATE_BUFF1_INTR_NOTIFY 0x00000010
8676 #define NV_PME_FIN_ME_STATE_BUFF0_IN_USE 0x00000100
8677 #define NV_PME_FIN_ME_STATE_BUFF1_IN_USE 0x00001000
8678 #define NV_PME_FIN_ME_STATE_CURRENT_BUFFER 0x00010000
8679 #define NV_PME_FIN_ME_STATE_CURRENT_BUFFER_0 0xFFFEFFFF
8680 #define NV_PME_FIN_ME_STATE_CURRENT_BUFFER_1 0x00010000
8681 
8682 /* NV-Register NV_PME_FIN_SU_STATE */
8683 #define NV_PME_FIN_SU_STATE 0x00200394
8684 #define NV_PME_FIN_SU_STATE_BUFF0_IN_USE 0x00010000
8685 #define NV_PME_FIN_SU_STATE_BUFF1_IN_USE 0x00100000
8686 
8687 /* NV-Register NV_PME_FIN_RM_STATE */
8688 #define NV_PME_FIN_RM_STATE 0x00200398
8689 #define NV_PME_FIN_RM_STATE_BUFF0_INTR_NOTIFY 0x00000001
8690 #define NV_PME_FIN_RM_STATE_BUFF1_INTR_NOTIFY 0x00000010
8691 
8692 /* NV-Register NV_PME_FIN_CURRENT */
8693 #define NV_PME_FIN_CURRENT 0x0020039C
8694 #define NV_PME_FIN_CURRENT_POS 0xFFFFFFFF
8695 
8696 /* NV-Register NV_PME_VBI_REGION */
8697 #define NV_PME_VBI_REGION 0x00200408
8698 #define NV_PME_VBI_REGION_START_LINE 0x0000001F
8699 #define NV_PME_VBI_REGION_NUM_LINES 0x001F0000
8700 
8701 /* NV-Register NV_PME_ANC_BUFF0_START */
8702 #define NV_PME_ANC_BUFF0_START 0x00200410
8703 #define NV_PME_ANC_BUFF0_START_ADDRESS 0x07FFFFF0
8704 
8705 /* NV-Register NV_PME_ANC_BUFF1_START */
8706 #define NV_PME_ANC_BUFF1_START 0x00200414
8707 #define NV_PME_ANC_BUFF1_START_ADDRESS 0x07FFFFF0
8708 
8709 /* NV-Register NV_PME_ANC_BUFF0_PITCH */
8710 #define NV_PME_ANC_BUFF0_PITCH 0x00200418
8711 #define NV_PME_ANC_BUFF0_PITCH_VALUE 0x00003FF0
8712 
8713 /* NV-Register NV_PME_ANC_BUFF1_PITCH */
8714 #define NV_PME_ANC_BUFF1_PITCH 0x0020041C
8715 #define NV_PME_ANC_BUFF1_PITCH_VALUE 0x00003FF0
8716 
8717 /* NV-Register NV_PME_ANC_BUFF0_LENGTH */
8718 #define NV_PME_ANC_BUFF0_LENGTH 0x00200420
8719 #define NV_PME_ANC_BUFF0_LENGTH_VALUE 0x000FFFF0
8720 
8721 /* NV-Register NV_PME_ANC_BUFF1_LENGTH */
8722 #define NV_PME_ANC_BUFF1_LENGTH 0x00200424
8723 #define NV_PME_ANC_BUFF1_LENGTH_VALUE 0x000FFFF0
8724 
8725 /* NV-Register NV_PME_ANC_ME_STATE */
8726 #define NV_PME_ANC_ME_STATE 0x00200428
8727 #define NV_PME_ANC_ME_STATE_BUFF0_INTR_NOTIFY 0x00000001
8728 #define NV_PME_ANC_ME_STATE_BUFF1_INTR_NOTIFY 0x00000010
8729 #define NV_PME_ANC_ME_STATE_BUFF0_ERROR_CODE 0x00000700
8730 #define NV_PME_ANC_ME_STATE_BUFF1_ERROR_CODE 0x00007000
8731 #define NV_PME_ANC_ME_STATE_BUFF0_IN_USE 0x00010000
8732 #define NV_PME_ANC_ME_STATE_BUFF1_IN_USE 0x00100000
8733 #define NV_PME_ANC_ME_STATE_CURRENT_BUFFER 0x01000000
8734 #define NV_PME_ANC_ME_STATE_CURRENT_BUFFER_0 0xFEFFFFFF
8735 #define NV_PME_ANC_ME_STATE_CURRENT_BUFFER_1 0x01000000
8736 
8737 /* NV-Register NV_PME_ANC_SU_STATE */
8738 #define NV_PME_ANC_SU_STATE 0x0020042C
8739 #define NV_PME_ANC_SU_STATE_BUFF0_FIELD 0x00000100
8740 #define NV_PME_ANC_SU_STATE_BUFF1_FIELD 0x00001000
8741 #define NV_PME_ANC_SU_STATE_BUFF0_IN_USE 0x00010000
8742 #define NV_PME_ANC_SU_STATE_BUFF1_IN_USE 0x00100000
8743 
8744 /* NV-Register NV_PME_ANC_RM_STATE */
8745 #define NV_PME_ANC_RM_STATE 0x00200430
8746 #define NV_PME_ANC_RM_STATE_BUFF0_INTR_NOTIFY 0x00000001
8747 #define NV_PME_ANC_RM_STATE_BUFF1_INTR_NOTIFY 0x00000010
8748 
8749 /* NV-Register NV_PME_ANC_CURRENT */
8750 #define NV_PME_ANC_CURRENT 0x00200434
8751 #define NV_PME_ANC_CURRENT_POS 0x0FFFFFFF
8752 
8753 /* NV-Register NV_PME_TASKA_BUFF0_START */
8754 #define NV_PME_TASKA_BUFF0_START 0x00200440
8755 #define NV_PME_TASKA_BUFF0_START_ADDRESS 0x07FFFFF0
8756 
8757 /* NV-Register NV_PME_TASKA_BUFF1_START */
8758 #define NV_PME_TASKA_BUFF1_START 0x00200444
8759 #define NV_PME_TASKA_BUFF1_START_ADDRESS 0x07FFFFF0
8760 
8761 /* NV-Register NV_PME_TASKA_BUFF0_PITCH */
8762 #define NV_PME_TASKA_BUFF0_PITCH 0x00200448
8763 #define NV_PME_TASKA_BUFF0_PITCH_VALUE 0x00003FF0
8764 
8765 /* NV-Register NV_PME_TASKA_BUFF1_PITCH */
8766 #define NV_PME_TASKA_BUFF1_PITCH 0x0020044C
8767 #define NV_PME_TASKA_BUFF1_PITCH_VALUE 0x00003FF0
8768 
8769 /* NV-Register NV_PME_TASKA_BUFF0_LENGTH */
8770 #define NV_PME_TASKA_BUFF0_LENGTH 0x00200450
8771 #define NV_PME_TASKA_BUFF0_LENGTH_VALUE 0x00FFFFF0
8772 
8773 /* NV-Register NV_PME_TASKA_BUFF1_LENGTH */
8774 #define NV_PME_TASKA_BUFF1_LENGTH 0x00200454
8775 #define NV_PME_TASKA_BUFF1_LENGTH_VALUE 0x00FFFFF0
8776 
8777 /* NV-Register NV_PME_TASKA_LINE_LENGTH */
8778 #define NV_PME_TASKA_LINE_LENGTH 0x002004F0
8779 #define NV_PME_TASKA_LINE_LENGTH_VALUE 0x00003FFC
8780 
8781 /* NV-Register NV_PME_TASKA_ME_STATE */
8782 #define NV_PME_TASKA_ME_STATE 0x00200458
8783 #define NV_PME_TASKA_ME_STATE_BUFF0_INTR_NOTIFY 0x00000001
8784 #define NV_PME_TASKA_ME_STATE_BUFF1_INTR_NOTIFY 0x00000010
8785 #define NV_PME_TASKA_ME_STATE_RP_FLAGS_BUFF0 0x000001E0
8786 #define NV_PME_TASKA_ME_STATE_BUFF0_ERROR_CODE 0x00000E00
8787 #define NV_PME_TASKA_ME_STATE_BUFF1_ERROR_CODE 0x00007000
8788 #define NV_PME_TASKA_ME_STATE_BUFF0_IN_USE 0x00010000
8789 #define NV_PME_TASKA_ME_STATE_BUFF1_IN_USE 0x00100000
8790 #define NV_PME_TASKA_ME_STATE_CURRENT_BUFFER 0x01000000
8791 #define NV_PME_TASKA_ME_STATE_CURRENT_BUFFER_0 0xFEFFFFFF
8792 #define NV_PME_TASKA_ME_STATE_CURRENT_BUFFER_1 0x01000000
8793 #define NV_PME_TASKA_ME_STATE_RP_FLAGS_BUFF1 0x1E000000
8794 
8795 /* NV-Register NV_PME_TASKA_SU_STATE */
8796 #define NV_PME_TASKA_SU_STATE 0x0020045C
8797 #define NV_PME_TASKA_SU_STATE_BUFF0_FIELD 0x00000100
8798 #define NV_PME_TASKA_SU_STATE_BUFF1_FIELD 0x00001000
8799 #define NV_PME_TASKA_SU_STATE_BUFF0_IN_USE 0x00010000
8800 #define NV_PME_TASKA_SU_STATE_BUFF1_IN_USE 0x00100000
8801 
8802 /* NV-Register NV_PME_TASKA_RM_STATE */
8803 #define NV_PME_TASKA_RM_STATE 0x00200460
8804 #define NV_PME_TASKA_RM_STATE_BUFF0_INTR_NOTIFY 0x00000001
8805 #define NV_PME_TASKA_RM_STATE_BUFF1_INTR_NOTIFY 0x00000010
8806 
8807 /* NV-Register NV_PME_TASKA_Y_CROP */
8808 #define NV_PME_TASKA_Y_CROP 0x00200464
8809 #define NV_PME_TASKA_Y_CROP_STARTLINE 0x000001FF
8810 
8811 /* NV-Register NV_PME_TASKA_Y_SCALE */
8812 #define NV_PME_TASKA_Y_SCALE 0x00200468
8813 #define NV_PME_TASKA_Y_SCALE_INCR 0x000007FF
8814 
8815 /* NV-Register NV_PME_TASKA_X_SCALE */
8816 #define NV_PME_TASKA_X_SCALE 0x0020046C
8817 #define NV_PME_TASKA_X_SCALE_INCR 0x0FFFFFFF
8818 #define NV_PME_TASKA_X_SCALE_FILTER 0x80000000
8819 #define NV_PME_TASKA_X_SCALE_FILTER_DISABLE 0x7FFFFFFF
8820 #define NV_PME_TASKA_X_SCALE_FILTER_ENABLE 0x80000000
8821 
8822 /* NV-Register NV_PME_TASKB_BUFF0_START */
8823 #define NV_PME_TASKB_BUFF0_START 0x00200470
8824 #define NV_PME_TASKB_BUFF0_START_ADDRESS 0x07FFFFF0
8825 
8826 /* NV-Register NV_PME_TASKB_BUFF1_START */
8827 #define NV_PME_TASKB_BUFF1_START 0x00200474
8828 #define NV_PME_TASKB_BUFF1_START_ADDRESS 0x07FFFFF0
8829 
8830 /* NV-Register NV_PME_TASKB_BUFF0_PITCH */
8831 #define NV_PME_TASKB_BUFF0_PITCH 0x00200478
8832 #define NV_PME_TASKB_BUFF0_PITCH_VALUE 0x00003FF0
8833 
8834 /* NV-Register NV_PME_TASKB_BUFF1_PITCH */
8835 #define NV_PME_TASKB_BUFF1_PITCH 0x0020047C
8836 #define NV_PME_TASKB_BUFF1_PITCH_VALUE 0x00003FF0
8837 
8838 /* NV-Register NV_PME_TASKB_BUFF0_LENGTH */
8839 #define NV_PME_TASKB_BUFF0_LENGTH 0x00200480
8840 #define NV_PME_TASKB_BUFF0_LENGTH_VALUE 0x00FFFFF0
8841 
8842 /* NV-Register NV_PME_TASKB_BUFF1_LENGTH */
8843 #define NV_PME_TASKB_BUFF1_LENGTH 0x00200484
8844 #define NV_PME_TASKB_BUFF1_LENGTH_VALUE 0x00FFFFF0
8845 
8846 /* NV-Register NV_PME_TASKB_LINE_LENGTH */
8847 #define NV_PME_TASKB_LINE_LENGTH 0x002004F4
8848 #define NV_PME_TASKB_LINE_LENGTH_VALUE 0x00003FFC
8849 
8850 /* NV-Register NV_PME_TASKB_ME_STATE */
8851 #define NV_PME_TASKB_ME_STATE 0x00200488
8852 #define NV_PME_TASKB_ME_STATE_BUFF0_INTR_NOTIFY 0x00000001
8853 #define NV_PME_TASKB_ME_STATE_BUFF1_INTR_NOTIFY 0x00000010
8854 #define NV_PME_TASKB_ME_STATE_RP_FLAGS_BUFF0 0x000001E0
8855 #define NV_PME_TASKB_ME_STATE_BUFF0_ERROR_CODE 0x00000E00
8856 #define NV_PME_TASKB_ME_STATE_BUFF1_ERROR_CODE 0x00007000
8857 #define NV_PME_TASKB_ME_STATE_BUFF0_IN_USE 0x00010000
8858 #define NV_PME_TASKB_ME_STATE_BUFF1_IN_USE 0x00100000
8859 #define NV_PME_TASKB_ME_STATE_CURRENT_BUFFER 0x01000000
8860 #define NV_PME_TASKB_ME_STATE_CURRENT_BUFFER_0 0xFEFFFFFF
8861 #define NV_PME_TASKB_ME_STATE_CURRENT_BUFFER_1 0x01000000
8862 #define NV_PME_TASKB_ME_STATE_RP_FLAGS_BUFF1 0x1E000000
8863 
8864 /* NV-Register NV_PME_TASKB_SU_STATE */
8865 #define NV_PME_TASKB_SU_STATE 0x0020048C
8866 #define NV_PME_TASKB_SU_STATE_BUFF0_FIELD 0x00000100
8867 #define NV_PME_TASKB_SU_STATE_BUFF1_FIELD 0x00001000
8868 #define NV_PME_TASKB_SU_STATE_BUFF0_IN_USE 0x00010000
8869 #define NV_PME_TASKB_SU_STATE_BUFF1_IN_USE 0x00100000
8870 
8871 /* NV-Register NV_PME_TASKB_RM_STATE */
8872 #define NV_PME_TASKB_RM_STATE 0x00200490
8873 #define NV_PME_TASKB_RM_STATE_BUFF0_INTR_NOTIFY 0x00000001
8874 #define NV_PME_TASKB_RM_STATE_BUFF1_INTR_NOTIFY 0x00000010
8875 
8876 /* NV-Register NV_PME_TASKB_Y_CROP */
8877 #define NV_PME_TASKB_Y_CROP 0x00200494
8878 #define NV_PME_TASKB_Y_CROP_STARTLINE 0x000001FF
8879 
8880 /* NV-Register NV_PME_TASKB_Y_SCALE */
8881 #define NV_PME_TASKB_Y_SCALE 0x00200498
8882 #define NV_PME_TASKB_Y_SCALE_INCR 0x000007FF
8883 
8884 /* NV-Register NV_PME_TASKB_X_SCALE */
8885 #define NV_PME_TASKB_X_SCALE 0x0020049C
8886 #define NV_PME_TASKB_X_SCALE_INCR 0x0FFFFFFF
8887 #define NV_PME_TASKB_X_SCALE_FILTER 0x80000000
8888 #define NV_PME_TASKB_X_SCALE_FILTER_DISABLE 0x7FFFFFFF
8889 #define NV_PME_TASKB_X_SCALE_FILTER_ENABLE 0x80000000
8890 
8891 /* NV-Register NV_PME_TASK_CURRENT */
8892 #define NV_PME_TASK_CURRENT 0x002004A0
8893 #define NV_PME_TASK_CURRENT_POS 0x0FFFFFFF
8894 #define NV_PME_TASK_CURRENT_TASK 0x80000000
8895 
8896 /* NV-Array NV_PME_HORIZ_WGHTS_A (4 byte access) */
8897 #define NV_PME_HORIZ_WGHTS_A 0x002004B0
8898 /* NV-Array size NV_PME_HORIZ_WGHTS_A__SIZE_1 [0..7] */
8899 #define NV_PME_HORIZ_WGHTS_A__SIZE_1 0x00000008
8900 #define NV_PME_HORIZ_WGHTS_A_0 0x000000FF
8901 #define NV_PME_HORIZ_WGHTS_A_1 0x0000FF00
8902 #define NV_PME_HORIZ_WGHTS_A_2 0x01FF0000
8903 
8904 /* NV-Array NV_PME_HORIZ_WGHTS_B (4 byte access) */
8905 #define NV_PME_HORIZ_WGHTS_B 0x002004D0
8906 /* NV-Array size NV_PME_HORIZ_WGHTS_B__SIZE_1 [0..7] */
8907 #define NV_PME_HORIZ_WGHTS_B__SIZE_1 0x00000008
8908 #define NV_PME_HORIZ_WGHTS_B_3 0x000000FF
8909 #define NV_PME_HORIZ_WGHTS_B_4 0x0000FF00
8910 #define NV_USER_ADR_CHID 0x007F0000
8911 #define NV_USER_ADR_SUBCHID 0x0000E000
8912 #define NV_USER_ADR_METHOD 0x00001FFF
8913 #define NV_USER_DEVICE 0x007F0000
8914 
8915 /* NV-Device NV_PBRIDGE */
8916 #define NV_PBRIDGE 0x0000C000 /* size: 0x00000FFF */
8917 
8918 /* NV-Register NV_PBRIDGE_SYS_CONFIG */
8919 #define NV_PBRIDGE_SYS_CONFIG 0x0000C800
8920 #define NV_PBRIDGE_SYS_CONFIG_NUM_DEVICES 0x00000007
8921 #define NV_PBRIDGE_SYS_CONFIG_DEVICE_NUM 0x00000070
8922 #define NV_PBRIDGE_SYS_CONFIG_NUM_DOWNSTREAM_DEVICES 0x00000700
8923 
8924 /* NV-Register NV_PBRIDGE_ARBITER */
8925 #define NV_PBRIDGE_ARBITER 0x0000C804
8926 #define NV_PBRIDGE_ARBITER_BRG_XACTIONS 0x0000000F
8927 #define NV_PBRIDGE_ARBITER_BRG_XACTIONS_DEFAULT 0x00000004
8928 #define NV_PBRIDGE_ARBITER_BRG_PRIORITY 0x000000F0
8929 #define NV_PBRIDGE_ARBITER_BRG_PRIORITY_DEFAULT 0x00000020
8930 #define NV_PBRIDGE_ARBITER_LOC_XACTIONS 0x00000F00
8931 #define NV_PBRIDGE_ARBITER_LOC_XACTIONS_DEFAULT 0x00000400
8932 #define NV_PBRIDGE_ARBITER_LOC_PRIORITY 0x0000F000
8933 #define NV_PBRIDGE_ARBITER_LOC_PRIORITY_DEFAULT 0x00001000
8934 #define NV_PBRIDGE_ARBITER_REM_XACTIONS 0x000F0000
8935 #define NV_PBRIDGE_ARBITER_REM_XACTIONS_DEFAULT 0x00040000
8936 #define NV_PBRIDGE_ARBITER_REM_PRIORITY 0x00F00000
8937 #define NV_PBRIDGE_ARBITER_REM_PRIORITY_DEFAULT 0x00100000
8938 
8939 /* NV-Register NV_PBRIDGE_REDIRECT_RANGE_MIN */
8940 #define NV_PBRIDGE_REDIRECT_RANGE_MIN 0x0000C900
8941 #define NV_PBRIDGE_REDIRECT_RANGE_MIN_ADDR 0xFFFFFFC0
8942 #define NV_PBRIDGE_REDIRECT_RANGE_MIN_ADDR_ZERO 0x00000000
8943 
8944 /* NV-Register NV_PBRIDGE_REDIRECT_RANGE_MAX */
8945 #define NV_PBRIDGE_REDIRECT_RANGE_MAX 0x0000C904
8946 #define NV_PBRIDGE_REDIRECT_RANGE_MAX_ADDR 0xFFFFFFC0
8947 #define NV_PBRIDGE_REDIRECT_RANGE_MAX_ADDR_DISABLE 0x00000000
8948 #define NV_PBRIDGE_REDIRECT_RANGE_MAX_ADDR_ZERO 0x00000000
8949 
8950 /* NV-Register NV_PBRIDGE_REDIRECT_LOCAL_MIN */
8951 #define NV_PBRIDGE_REDIRECT_LOCAL_MIN 0x0000C908
8952 #define NV_PBRIDGE_REDIRECT_LOCAL_MIN_ADDR 0xFFFFFFC0
8953 #define NV_PBRIDGE_REDIRECT_LOCAL_MIN_ADDR_ZERO 0x00000000
8954 
8955 /* NV-Register NV_PBRIDGE_REDIRECT_LOCAL_MAX */
8956 #define NV_PBRIDGE_REDIRECT_LOCAL_MAX 0x0000C90C
8957 #define NV_PBRIDGE_REDIRECT_LOCAL_MAX_ADDR 0xFFFFFFC0
8958 #define NV_PBRIDGE_REDIRECT_LOCAL_MAX_ADDR_DISABLE 0x00000000
8959 #define NV_PBRIDGE_REDIRECT_LOCAL_MAX_ADDR_ZERO 0x00000000
8960 
8961 /* NV-Device NV_PPM */
8962 #define NV_PPM 0x0000A000 /* size: 0x00000FFF */
8963 
8964 /* NV-Register NV_PPM_NV_TRIG0_SEL */
8965 #define NV_PPM_NV_TRIG0_SEL 0x0000A400
8966 #define NV_PPM_NV_TRIG0_SEL_SEL0 0x000000FF
8967 #define NV_PPM_NV_TRIG0_SEL_SEL1 0x0000FF00
8968 #define NV_PPM_NV_TRIG0_SEL_SEL2 0x00FF0000
8969 #define NV_PPM_NV_TRIG0_SEL_SEL3 0xFF000000
8970 
8971 /* NV-Register NV_PPM_NV_TRIG0_OP */
8972 #define NV_PPM_NV_TRIG0_OP 0x0000A404
8973 #define NV_PPM_NV_TRIG0_OP_FUNC 0x0000FFFF
8974 #define NV_PPM_NV_TRIG0_OP_DSEL0 0x00010000
8975 #define NV_PPM_NV_TRIG0_OP_DSEL1 0x00020000
8976 
8977 /* NV-Register NV_PPM_NV_TRIG1_SEL */
8978 #define NV_PPM_NV_TRIG1_SEL 0x0000A408
8979 #define NV_PPM_NV_TRIG1_SEL_SEL0 0x000000FF
8980 #define NV_PPM_NV_TRIG1_SEL_SEL1 0x0000FF00
8981 #define NV_PPM_NV_TRIG1_SEL_SEL2 0x00FF0000
8982 #define NV_PPM_NV_TRIG1_SEL_SEL3 0xFF000000
8983 
8984 /* NV-Register NV_PPM_NV_TRIG1_OP */
8985 #define NV_PPM_NV_TRIG1_OP 0x0000A40C
8986 #define NV_PPM_NV_TRIG1_OP_FUNC 0x0000FFFF
8987 #define NV_PPM_NV_TRIG1_OP_DSEL0 0x00010000
8988 #define NV_PPM_NV_TRIG1_OP_DSEL1 0x00020000
8989 
8990 /* NV-Register NV_PPM_NV_EVENT_SEL */
8991 #define NV_PPM_NV_EVENT_SEL 0x0000A410
8992 #define NV_PPM_NV_EVENT_SEL_SEL0 0x000000FF
8993 #define NV_PPM_NV_EVENT_SEL_SEL1 0x0000FF00
8994 #define NV_PPM_NV_EVENT_SEL_SEL2 0x00FF0000
8995 #define NV_PPM_NV_EVENT_SEL_SEL3 0xFF000000
8996 
8997 /* NV-Register NV_PPM_NV_EVENT_OP */
8998 #define NV_PPM_NV_EVENT_OP 0x0000A414
8999 #define NV_PPM_NV_EVENT_OP_FUNC 0x0000FFFF
9000 #define NV_PPM_NV_EVENT_OP_DSEL0 0x00010000
9001 #define NV_PPM_NV_EVENT_OP_DSEL1 0x00020000
9002 
9003 /* NV-Register NV_PPM_NV_SAMPLE_SEL */
9004 #define NV_PPM_NV_SAMPLE_SEL 0x0000A418
9005 #define NV_PPM_NV_SAMPLE_SEL_SEL0 0x000000FF
9006 #define NV_PPM_NV_SAMPLE_SEL_SEL1 0x0000FF00
9007 #define NV_PPM_NV_SAMPLE_SEL_SEL2 0x00FF0000
9008 #define NV_PPM_NV_SAMPLE_SEL_SEL3 0xFF000000
9009 
9010 /* NV-Register NV_PPM_NV_SAMPLE_OP */
9011 #define NV_PPM_NV_SAMPLE_OP 0x0000A41C
9012 #define NV_PPM_NV_SAMPLE_OP_FUNC 0x0000FFFF
9013 #define NV_PPM_NV_SAMPLE_OP_DSEL0 0x00010000
9014 #define NV_PPM_NV_SAMPLE_OP_DSEL1 0x00020000
9015 
9016 /* NV-Register NV_PPM_NV_SETFLAG_SEL */
9017 #define NV_PPM_NV_SETFLAG_SEL 0x0000A420
9018 #define NV_PPM_NV_SETFLAG_SEL_SEL0 0x000000FF
9019 #define NV_PPM_NV_SETFLAG_SEL_SEL1 0x0000FF00
9020 #define NV_PPM_NV_SETFLAG_SEL_SEL2 0x00FF0000
9021 #define NV_PPM_NV_SETFLAG_SEL_SEL3 0xFF000000
9022 
9023 /* NV-Register NV_PPM_NV_SETFLAG_OP */
9024 #define NV_PPM_NV_SETFLAG_OP 0x0000A424
9025 #define NV_PPM_NV_SETFLAG_OP_FUNC 0x0000FFFF
9026 #define NV_PPM_NV_SETFLAG_OP_DSEL0 0x00010000
9027 #define NV_PPM_NV_SETFLAG_OP_DSEL1 0x00020000
9028 
9029 /* NV-Register NV_PPM_NV_CLRFLAG_SEL */
9030 #define NV_PPM_NV_CLRFLAG_SEL 0x0000A428
9031 #define NV_PPM_NV_CLRFLAG_SEL_SEL0 0x000000FF
9032 #define NV_PPM_NV_CLRFLAG_SEL_SEL1 0x0000FF00
9033 #define NV_PPM_NV_CLRFLAG_SEL_SEL2 0x00FF0000
9034 #define NV_PPM_NV_CLRFLAG_SEL_SEL3 0xFF000000
9035 
9036 /* NV-Register NV_PPM_NV_CLRFLAG_OP */
9037 #define NV_PPM_NV_CLRFLAG_OP 0x0000A42C
9038 #define NV_PPM_NV_CLRFLAG_OP_FUNC 0x0000FFFF
9039 #define NV_PPM_NV_CLRFLAG_OP_DSEL0 0x00010000
9040 #define NV_PPM_NV_CLRFLAG_OP_DSEL1 0x00020000
9041 
9042 /* NV-Register NV_PPM_NV_ELAPSED_0 */
9043 #define NV_PPM_NV_ELAPSED_0 0x0000A600
9044 #define NV_PPM_NV_ELAPSED_0_VAL 0xFFFFFFFF
9045 
9046 /* NV-Register NV_PPM_NV_ELAPSED_1 */
9047 #define NV_PPM_NV_ELAPSED_1 0x0000A604
9048 #define NV_PPM_NV_ELAPSED_1_VAL 0x000000FF
9049 
9050 /* NV-Register NV_PPM_NV_CYCLECNT_0 */
9051 #define NV_PPM_NV_CYCLECNT_0 0x0000A608
9052 #define NV_PPM_NV_CYCLECNT_0_VAL 0xFFFFFFFF
9053 
9054 /* NV-Register NV_PPM_NV_CYCLECNT_1 */
9055 #define NV_PPM_NV_CYCLECNT_1 0x0000A60C
9056 #define NV_PPM_NV_CYCLECNT_1_VAL 0x000000FF
9057 
9058 /* NV-Register NV_PPM_NV_EVENTCNT_0 */
9059 #define NV_PPM_NV_EVENTCNT_0 0x0000A610
9060 #define NV_PPM_NV_EVENTCNT_0_VAL 0xFFFFFFFF
9061 
9062 /* NV-Register NV_PPM_NV_EVENTCNT_1 */
9063 #define NV_PPM_NV_EVENTCNT_1 0x0000A614
9064 #define NV_PPM_NV_EVENTCNT_1_VAL 0x000000FF
9065 
9066 /* NV-Register NV_PPM_NV_THRESHCNT_0 */
9067 #define NV_PPM_NV_THRESHCNT_0 0x0000A618
9068 #define NV_PPM_NV_THRESHCNT_0_VAL 0xFFFFFFFF
9069 
9070 /* NV-Register NV_PPM_NV_THRESHCNT_1 */
9071 #define NV_PPM_NV_THRESHCNT_1 0x0000A61C
9072 #define NV_PPM_NV_THRESHCNT_1_VAL 0x000000FF
9073 
9074 /* NV-Register NV_PPM_NV_TRIGGERCNT */
9075 #define NV_PPM_NV_TRIGGERCNT 0x0000A620
9076 #define NV_PPM_NV_TRIGGERCNT_VAL 0xFFFFFFFF
9077 
9078 /* NV-Register NV_PPM_NV_SAMPLECNT */
9079 #define NV_PPM_NV_SAMPLECNT 0x0000A624
9080 #define NV_PPM_NV_SAMPLECNT_VAL 0xFFFFFFFF
9081 
9082 /* NV-Register NV_PPM_NV_THRESHOLD_0 */
9083 #define NV_PPM_NV_THRESHOLD_0 0x0000A628
9084 #define NV_PPM_NV_THRESHOLD_0_VAL 0xFFFFFFFF
9085 
9086 /* NV-Register NV_PPM_NV_THRESHOLD_1 */
9087 #define NV_PPM_NV_THRESHOLD_1 0x0000A62C
9088 #define NV_PPM_NV_THRESHOLD_1_VAL 0x000000FF
9089 
9090 /* NV-Register NV_PPM_NV_WATCH0 */
9091 #define NV_PPM_NV_WATCH0 0x0000A430
9092 #define NV_PPM_NV_WATCH0_GR_XF2PM_XF_IDLE 0x00000001
9093 #define NV_PPM_NV_WATCH0_GR_XF2PM_XF2VTX_DATA_VALID 0x00000002
9094 #define NV_PPM_NV_WATCH0_GR_XF2PM_XF2IDX_BUSY 0x00000004
9095 #define NV_PPM_NV_WATCH0_GR_VTX2PM_VTXPRIMIDLE 0x00000008
9096 #define NV_PPM_NV_WATCH0_GR_VTX2PM_VTX2STP_PRIMVALID 0x00000010
9097 #define NV_PPM_NV_WATCH0_GR_VTX2PM_VTX2IDX_BUSY 0x00000020
9098 #define NV_PPM_NV_WATCH0_GR_VTX2PM_VTX2COL_VALID 0x00000040
9099 #define NV_PPM_NV_WATCH0_GR_TEX2PM_TP1_REPLACER_STALL 0x00000080
9100 #define NV_PPM_NV_WATCH0_GR_TEX2PM_TP1_MP_QUEUE_STALL 0x00000100
9101 #define NV_PPM_NV_WATCH0_GR_TEX2PM_TP1_COALESCER_STALL 0x00000200
9102 #define NV_PPM_NV_WATCH0_GR_TEX2PM_TP0_REPLACER_STALL 0x00000400
9103 #define NV_PPM_NV_WATCH0_GR_TEX2PM_TP0_MP_QUEUE_STALL 0x00000800
9104 #define NV_PPM_NV_WATCH0_GR_TEX2PM_TP0_COALESCER_STALL 0x00001000
9105 #define NV_PPM_NV_WATCH0_GR_TEX2PM_TEX2MATH_TP1_BUSY 0x00002000
9106 #define NV_PPM_NV_WATCH0_GR_TEX2PM_TEX2MATH_TP0_BUSY 0x00004000
9107 #define NV_PPM_NV_WATCH0_GR_TEX2PM_TEX2LIT_REQ 0x00008000
9108 #define NV_PPM_NV_WATCH0_GR_TEX2PM_TEX2LIT_REGLD 0x00010000
9109 #define NV_PPM_NV_WATCH0_GR_TEX2PM_SNAP_PULSE 0x00020000
9110 #define NV_PPM_NV_WATCH0_GR_TEX2PM_RBFR_FULL_STALL 0x00040000
9111 #define NV_PPM_NV_WATCH0_GR_TEX2PM_CACHE_IDLE 0x00080000
9112 #define NV_PPM_NV_WATCH0_GR_TEX2PM_C2DMA_DV 0x00100000
9113 #define NV_PPM_NV_WATCH0_GR_STP2PM_VTX_OFFSCREEN 0x00200000
9114 #define NV_PPM_NV_WATCH0_GR_STP2PM_STP_IDLE 0x00400000
9115 #define NV_PPM_NV_WATCH0_GR_STP2PM_STP2VTX_BUSY 0x00800000
9116 #define NV_PPM_NV_WATCH0_GR_STP2PM_STP2RSTR_VALID 0x01000000
9117 #define NV_PPM_NV_WATCH0_GR_STP2PM_STP2RSTR_DO_SWATHS 0x02000000
9118 #define NV_PPM_NV_WATCH0_GR_STP2PM_STP2CLP_VALID 0x04000000
9119 #define NV_PPM_NV_WATCH0_GR_STP2PM_START_PRIM 0x08000000
9120 #define NV_PPM_NV_WATCH0_GR_STP2PM_POLYMODE 0x10000000
9121 #define NV_PPM_NV_WATCH0_GR_STP2PM_DUAL_TEXTURE 0x20000000
9122 #define NV_PPM_NV_WATCH0_GR_STP2PM_DO_POINT 0x40000000
9123 #define NV_PPM_NV_WATCH0_GR_STP2PM_DO_LINE 0x80000000
9124 
9125 /* NV-Register NV_PPM_NV_WATCH1 */
9126 #define NV_PPM_NV_WATCH1 0x0000A434
9127 #define NV_PPM_NV_WATCH1_GR_STP2PM_CYL_WRAP 0x00000001
9128 #define NV_PPM_NV_WATCH1_GR_STP2PM_CULL_SMALL 0x00000002
9129 #define NV_PPM_NV_WATCH1_GR_STP2PM_CULL_NEAR 0x00000004
9130 #define NV_PPM_NV_WATCH1_GR_STP2PM_CULL_FRONT 0x00000008
9131 #define NV_PPM_NV_WATCH1_GR_STP2PM_CULL_FAR 0x00000010
9132 #define NV_PPM_NV_WATCH1_GR_STP2PM_CULL_ENA 0x00000020
9133 #define NV_PPM_NV_WATCH1_GR_STP2PM_CULL_BBOX 0x00000040
9134 #define NV_PPM_NV_WATCH1_GR_STP2PM_CULL_BACK 0x00000080
9135 #define NV_PPM_NV_WATCH1_GR_RSTR2PM_SEARCH_MODE 0x00000100
9136 #define NV_PPM_NV_WATCH1_GR_RSTR2PM_RSTR_EOPRIM 0x00000200
9137 #define NV_PPM_NV_WATCH1_GR_RSTR2PM_RSTR2PIPE_XY_VALID 0x00000400
9138 #define NV_PPM_NV_WATCH1_GR_RSTR2PM_RSTR2PIPE_EOPOLY 0x00000800
9139 #define NV_PPM_NV_WATCH1_GR_RSTR2PM_RSTR2MATH_NEWLINE 0x00001000
9140 #define NV_PPM_NV_WATCH1_GR_RSTR2PM_RSTR2MATH_ABC_VALID 0x00002000
9141 #define NV_PPM_NV_WATCH1_GR_RSTR2PM_PIXCNT_0 0x00004000
9142 #define NV_PPM_NV_WATCH1_GR_RSTR2PM_PIXCNT_1 0x00008000
9143 #define NV_PPM_NV_WATCH1_GR_RSTR2PM_PIXCNT_2 0x00010000
9144 #define NV_PPM_NV_WATCH1_GR_RSTR2PM_FINE_STALL 0x00020000
9145 #define NV_PPM_NV_WATCH1_GR_RSTR2PM_FINE_IDLE 0x00040000
9146 #define NV_PPM_NV_WATCH1_GR_RSTR2PM_FINE_EDGE_EVAL 0x00080000
9147 #define NV_PPM_NV_WATCH1_GR_RSTR2PM_FINE_ALIASED 0x00100000
9148 #define NV_PPM_NV_WATCH1_GR_RSTR2PM_COARSE_VALID 0x00200000
9149 #define NV_PPM_NV_WATCH1_GR_RSTR2PM_COARSE_STALL 0x00400000
9150 #define NV_PPM_NV_WATCH1_GR_RSTR2PM_COARSE_IDLE 0x00800000
9151 #define NV_PPM_NV_WATCH1_GR_ROP2PM_ZWRITE 0x01000000
9152 #define NV_PPM_NV_WATCH1_GR_ROP2PM_ZPARTIAL 0x02000000
9153 #define NV_PPM_NV_WATCH1_GR_ROP2PM_WAITMEMWR 0x04000000
9154 #define NV_PPM_NV_WATCH1_GR_ROP2PM_WAITMEMRD 0x08000000
9155 #define NV_PPM_NV_WATCH1_GR_ROP2PM_WAIT_BUF 0x10000000
9156 #define NV_PPM_NV_WATCH1_GR_ROP2PM_ROP_IDLE 0x20000000
9157 #define NV_PPM_NV_WATCH1_GR_ROP2PM_ROP2FB_REQ 0x40000000
9158 #define NV_PPM_NV_WATCH1_GR_ROP2PM_ROP2FB_RD 0x80000000
9159 
9160 /* NV-Register NV_PPM_NV_WATCH2 */
9161 #define NV_PPM_NV_WATCH2 0x0000A438
9162 #define NV_PPM_NV_WATCH2_GR_ROP2PM_ROP2FB_ALOM 0x00000001
9163 #define NV_PPM_NV_WATCH2_GR_ROP2PM_CWRITE 0x00000002
9164 #define NV_PPM_NV_WATCH2_GR_R2D2PM_PRE_OUTPUT_BUSY 0x00000004
9165 #define NV_PPM_NV_WATCH2_GR_R2D2PM_R2D2MATH_IM_NEWLINE 0x00000008
9166 #define NV_PPM_NV_WATCH2_GR_R2D2PM_RSTR2D_IDLE 0x00000010
9167 #define NV_PPM_NV_WATCH2_GR_R2D2PM_R2D2FE_RSTR2D_BUSY 0x00000020
9168 #define NV_PPM_NV_WATCH2_GR_R2D2PM_MATH_CACHE_BUSY 0x00000040
9169 #define NV_PPM_NV_WATCH2_GR_R2D2PM_R2D2PRE_OUTPUT_REQ 0x00000080
9170 #define NV_PPM_NV_WATCH2_GR_R2D2PM_R2D2PRE_OUTPUT_NOP 0x00000100
9171 #define NV_PPM_NV_WATCH2_GR_R2D2PM_R2D2MATH_IM_RIGHT_DV 0x00000200
9172 #define NV_PPM_NV_WATCH2_GR_R2D2PM_R2D2MATH_IM_LEFT_DV 0x00000400
9173 #define NV_PPM_NV_WATCH2_GR_R2D2PM_FE_REQ 0x00000800
9174 #define NV_PPM_NV_WATCH2_GR_PRE2PM_PREROP_IDLE 0x00001000
9175 #define NV_PPM_NV_WATCH2_GR_PRE2PM_PRE2ROP_ROP_REQ 0x00002000
9176 #define NV_PPM_NV_WATCH2_GR_PRE2PM_PRE2ROP_POSTING_BUFFER 0x00004000
9177 #define NV_PPM_NV_WATCH2_GR_PRE2PM_PRE2R2D_OUTPUT_BUSY 0x00008000
9178 #define NV_PPM_NV_WATCH2_GR_PRE2PM_PRE2PIPE_BUSY 0x00010000
9179 #define NV_PPM_NV_WATCH2_GR_PRE2PM_PRE2LIT_BUSY 0x00020000
9180 #define NV_PPM_NV_WATCH2_GR_PRE2PM_COALESCE 0x00040000
9181 #define NV_PPM_NV_WATCH2_GR_PRE2PM_ALL3D_REQ 0x00080000
9182 #define NV_PPM_NV_WATCH2_GR_PIPE2PM_PIPE_XY_RDY 0x00100000
9183 #define NV_PPM_NV_WATCH2_GR_PIPE2PM_PIPE_IDLE 0x00200000
9184 #define NV_PPM_NV_WATCH2_GR_MATH2PM_MATH2TEX_TP1_REQ 0x00400000
9185 #define NV_PPM_NV_WATCH2_GR_MATH2PM_MATH2TEX_TP0_REQ 0x00800000
9186 #define NV_PPM_NV_WATCH2_GR_MATH2PM_MATH2TEX_MAGNIFY 0x01000000
9187 #define NV_PPM_NV_WATCH2_GR_MATH2PM_MATH2TEX_ANISO_SAMPLE 0x02000000
9188 #define NV_PPM_NV_WATCH2_GR_MATH2PM_MATH2RSTR_RDY 0x04000000
9189 #define NV_PPM_NV_WATCH2_GR_MATH2PM_MATH2RSTR_ABC_RDY 0x08000000
9190 #define NV_PPM_NV_WATCH2_GR_LIT2PM_RECIRC_CYCLE 0x10000000
9191 #define NV_PPM_NV_WATCH2_GR_LIT2PM_LIT2TEX_BUSY 0x20000000
9192 #define NV_PPM_NV_WATCH2_GR_LIT2PM_LIT2PRE_REQ 0x40000000
9193 #define NV_PPM_NV_WATCH2_GR_LIT2PM_LIT2COL_BUSY 0x80000000
9194 
9195 /* NV-Register NV_PPM_NV_WATCH3 */
9196 #define NV_PPM_NV_WATCH3 0x0000A43C
9197 #define NV_PPM_NV_WATCH3_GR_IDX2PM_THREADSTALLED 0x00000001
9198 #define NV_PPM_NV_WATCH3_GR_IDX2PM_PTEBUSY 0x00000002
9199 #define NV_PPM_NV_WATCH3_GR_IDX2PM_INTALIGN 0x00000004
9200 #define NV_PPM_NV_WATCH3_GR_IDX2PM_IDXFRONTIDLE 0x00000008
9201 #define NV_PPM_NV_WATCH3_GR_IDX2PM_IDX2XF_VALID_0 0x00000010
9202 #define NV_PPM_NV_WATCH3_GR_IDX2PM_IDX2XF_VALID_1 0x00000020
9203 #define NV_PPM_NV_WATCH3_GR_IDX2PM_IDX2VTX_VALID 0x00000040
9204 #define NV_PPM_NV_WATCH3_GR_IDX2PM_IDX2PMI_VALID 0x00000080
9205 #define NV_PPM_NV_WATCH3_GR_IDX2PM_IDX2FBI_VALID 0x00000100
9206 #define NV_PPM_NV_WATCH3_GR_IDX2PM_IDX2DEC_BUSY 0x00000200
9207 #define NV_PPM_NV_WATCH3_GR_IDX2PM_COMPOVFL 0x00000400
9208 #define NV_PPM_NV_WATCH3_GR_IDX2PM_CACHETHRASH 0x00000800
9209 #define NV_PPM_NV_WATCH3_GR_FF2PM_FF_GR_RDY 0x00001000
9210 #define NV_PPM_NV_WATCH3_GR_FF2PM_FF_GR_B2B 0x00002000
9211 #define NV_PPM_NV_WATCH3_GR_FE2PM_NVINTR_GR 0x00004000
9212 #define NV_PPM_NV_WATCH3_GR_FE2PM_WAIT_GR_IDLE 0x00008000
9213 #define NV_PPM_NV_WATCH3_GR_FE2PM_NOP 0x00010000
9214 #define NV_PPM_NV_WATCH3_GR_FE2PM_GR_SWITCH 0x00020000
9215 #define NV_PPM_NV_WATCH3_GR_FE2PM_GR_IDLE 0x00040000
9216 #define NV_PPM_NV_WATCH3_GR_FE2PM_FBI_REQ_BURST 0x00080000
9217 #define NV_PPM_NV_WATCH3_GR_FE2PM_FBI_REQ 0x00100000
9218 #define NV_PPM_NV_WATCH3_GR_FE2PM_FBI_RD 0x00200000
9219 #define NV_PPM_NV_WATCH3_GR_FE2PM_FBI_INST 0x00400000
9220 #define NV_PPM_NV_WATCH3_GR_FE2PM_CACHE_INVALIDATE 0x00800000
9221 #define NV_PPM_NV_WATCH3_GR_FBI2PM_FBI2IDX_BUSY 0x01000000
9222 #define NV_PPM_NV_WATCH3_GR_DMA2PM_DMA2C_DV 0x02000000
9223 #define NV_PPM_NV_WATCH3_GR_DMA2PM_DMA2C_ASTALL 0x04000000
9224 #define NV_PPM_NV_WATCH3_GR_DEC2PM_DEC2IDX_VALID_0 0x08000000
9225 #define NV_PPM_NV_WATCH3_GR_DEC2PM_DEC2IDX_VALID_1 0x10000000
9226 #define NV_PPM_NV_WATCH3_GR_COL2PM_SPECULAR_RECIRC 0x20000000
9227 #define NV_PPM_NV_WATCH3_GR_COL2PM_COLOR_IDLE 0x40000000
9228 #define NV_PPM_NV_WATCH3_GR_COL2PM_COL2XYPIPE_BUSY 0x80000000
9229 
9230 /* NV-Register NV_PPM_NV_WATCH4 */
9231 #define NV_PPM_NV_WATCH4 0x0000A630
9232 #define NV_PPM_NV_WATCH4_GR_COL2PM_COL2VTX_BUSY 0x00000001
9233 #define NV_PPM_NV_WATCH4_GR_COL2PM_COL2LIT_REQ 0x00000002
9234 #define NV_PPM_NV_WATCH4_GR_COL2PM_COL2FCOMB_REQ 0x00000004
9235 #define NV_PPM_NV_WATCH4_GR_COL2PM_COL2CLP_BUSY 0x00000008
9236 #define NV_PPM_NV_WATCH4_GR_CLP2PM_CLP2STP_BUSY 0x00000010
9237 #define NV_PPM_NV_WATCH4_TOP_PMI2PM_PMI2IDX_VALID 0x00000020
9238 #define NV_PPM_NV_WATCH4_TOP_PMI2PM_PMI2IDX_BUSY 0x00000040
9239 #define NV_PPM_NV_WATCH4_TOP_HOST2PM_TIMER_262US 0x00000080
9240 #define NV_PPM_NV_WATCH4_TOP_HOST2PM_FF_GR_MDV 0x00000100
9241 #define NV_PPM_NV_WATCH4_TOP_HOST2PM_FF_DHV 0x00000200
9242 #define NV_PPM_NV_WATCH4_TOP_HOST2PM_FF_CHSW 0x00000400
9243 #define NV_PPM_NV_WATCH4_TOP_FBI2PM_X_DLY 0x00000800
9244 #define NV_PPM_NV_WATCH4_TOP_FBI2PM_S_DLY 0x00001000
9245 #define NV_PPM_NV_WATCH4_TOP_FBI2PM_R2W_DLY 0x00002000
9246 #define NV_PPM_NV_WATCH4_TOP_FBI2PM_H_DLY 0x00004000
9247 #define NV_PPM_NV_WATCH4_TOP_FB2PM_FB2ROP_BUSY 0x00008000
9248 #define NV_PPM_NV_WATCH4_TOP_FBI2PM_D_DLY 0x00010000
9249 #define NV_PPM_NV_WATCH4_TOP_FBI2PM_BC 0x00020000
9250 #define NV_PPM_NV_WATCH4_TOP_CRTC2PM_CRTC2DAC_VSYNC2DAC 0x00040000
9251 
9252 /* NV-Register NV_PPM_CONTROL */
9253 #define NV_PPM_CONTROL 0x0000A73C
9254 #define NV_PPM_CONTROL_OUT_SEL 0x00000001
9255 #define NV_PPM_CONTROL_OUT_SEL_PM 0xFFFFFFFE
9256 #define NV_PPM_CONTROL_OUT_SEL_FBIDEBUG 0x00000001
9257 #define NV_PPM_CONTROL_DRIVE_OUT 0x00000002
9258 #define NV_PPM_CONTROL_DRIVE_OUT_NORMAL 0xFFFFFFFD
9259 #define NV_PPM_CONTROL_DRIVE_OUT_OBSERVE 0x00000002
9260 #define NV_PPM_CONTROL_NV_ADDTOEVENT 0x00000004
9261 #define NV_PPM_CONTROL_NV_ADDTOEVENT_INCR 0xFFFFFFFB
9262 #define NV_PPM_CONTROL_NV_ADDTOEVENT_ADDTRIG1 0x00000004
9263 #define NV_PPM_CONTROL_NV_STATE 0x00000018
9264 #define NV_PPM_CONTROL_STATE_IDLE 0x00000000
9265 #define NV_PPM_CONTROL_STATE_WAIT_TRIG0 0x00000008
9266 #define NV_PPM_CONTROL_STATE_WAIT_TRIG1 0x00000010
9267 #define NV_PPM_CONTROL_STATE_CAPTURE 0x00000018
9268 
9269 /* NV-Device NV_PRAM */
9270 #define NV_PRAM 0x00006000 /* size: 0x00000FFF */
9271 
9272 /* NV-Memory NV_PNVM */
9273 #define NV_PNVM 0x08000000 /* size: 0x07FFFFFF */
9274 
9275 /* NV-Device NV_PDFB */
9276 #define NV_PDFB 0x08000000 /* size: 0x07FFFFFF */
9277 
9278 /* NV-Memory NV_PRAMIN */
9279 #define NV_PRAMIN 0x00700000 /* size: 0x000FFFFF */
9280 
9281 /* NV-Memory NV_RAMHT__SIZE_0 */
9282 #define NV_RAMHT__SIZE_0 0x00000000 /* size: 0x00000FFF */
9283 
9284 /* NV-Memory NV_RAMHT__SIZE_1 */
9285 #define NV_RAMHT__SIZE_1 0x00000000 /* size: 0x00001FFF */
9286 
9287 /* NV-Memory NV_RAMHT__SIZE_2 */
9288 #define NV_RAMHT__SIZE_2 0x00000000 /* size: 0x00003FFF */
9289 
9290 /* NV-Memory NV_RAMHT__SIZE_3 */
9291 #define NV_RAMHT__SIZE_3 0x00000000 /* size: 0x00007FFF */
9292 
9293 /* NV-Register NV_PRAMIN [0x00] @ 0x00700000 */
9294 #define NV_RAMHT_HANDLE 0xFFFFFFFF
9295 
9296 /* NV-Register NV_PRAMIN [0x04] @ 0x00700004 */
9297 #define NV_RAMHT_INSTANCE 0x0000FFFF
9298 
9299 /* NV-Register NV_PRAMIN [0x04] @ 0x00700004 */
9300 #define NV_RAMHT_ENGINE 0x00030000
9301 #define NV_RAMHT_ENGINE_SW 0x00000000
9302 #define NV_RAMHT_ENGINE_GRAPHICS 0x00010000
9303 #define NV_RAMHT_ENGINE_DVD 0x00020000
9304 
9305 /* NV-Register NV_PRAMIN [0x04] @ 0x00700004 */
9306 #define NV_RAMHT_CHID 0x1F000000
9307 
9308 /* NV-Register NV_PRAMIN [0x04] @ 0x00700004 */
9309 #define NV_RAMHT_STATUS 0x80000000
9310 #define NV_RAMHT_STATUS_INVALID 0x7FFFFFFF
9311 #define NV_RAMHT_STATUS_VALID 0x80000000
9312 
9313 /* NV-Memory NV_RAMRO__SIZE_0 */
9314 #define NV_RAMRO__SIZE_0 0x00000000 /* size: 0x000001FF */
9315 
9316 /* NV-Memory NV_RAMRO__SIZE_1 */
9317 #define NV_RAMRO__SIZE_1 0x00000000 /* size: 0x00001FFF */
9318 
9319 /* NV-Register NV_PRAMIN [0x00] @ 0x00700000 */
9320 #define NV_RAMRO_METHOD 0x00001FFF
9321 
9322 /* NV-Register NV_PRAMIN [0x00] @ 0x00700000 */
9323 #define NV_RAMRO_SUBCHANNEL 0x0000E000
9324 
9325 /* NV-Register NV_PRAMIN [0x00] @ 0x00700000 */
9326 #define NV_RAMRO_CHID 0x007F0000
9327 
9328 /* NV-Register NV_PRAMIN [0x00] @ 0x00700000 */
9329 #define NV_RAMRO_TYPE 0x00800000
9330 #define NV_RAMRO_TYPE_WRITE 0xFF7FFFFF
9331 #define NV_RAMRO_TYPE_READ 0x00800000
9332 
9333 /* NV-Register NV_PRAMIN [0x00] @ 0x00700000 */
9334 #define NV_RAMRO_BYTE_ENABLES 0x0F000000
9335 
9336 /* NV-Register NV_PRAMIN [0x00] @ 0x00700000 */
9337 #define NV_RAMRO_REASON 0xF0000000
9338 #define NV_RAMRO_REASON_ILLEGAL_ACCESS 0x00000000
9339 #define NV_RAMRO_REASON_NO_CACHE_AVAILABLE 0x10000000
9340 #define NV_RAMRO_REASON_CACHE_RAN_OUT 0x20000000
9341 #define NV_RAMRO_REASON_FREE_COUNT_OVERRUN 0x30000000
9342 #define NV_RAMRO_REASON_CAUGHT_LYING 0x40000000
9343 #define NV_RAMRO_REASON_RESERVED_ACCESS 0x50000000
9344 
9345 /* NV-Register NV_PRAMIN [0x04] @ 0x00700004 */
9346 #define NV_RAMRO_DATA 0xFFFFFFFF
9347 
9348 /* NV-Memory NV_RAMFC__SIZE_0 */
9349 #define NV_RAMFC__SIZE_0 0x00000000 /* size: 0x000007FF */
9350 
9351 /* NV-Register NV_PRAMIN [0x00] @ 0x00700000 */
9352 #define NV_RAMFC_DMA_PUT 0x1FFFFFFC
9353 
9354 /* NV-Register NV_PRAMIN [0x04] @ 0x00700004 */
9355 #define NV_RAMFC_DMA_GET 0x1FFFFFFC
9356 
9357 /* NV-Register NV_PRAMIN [0x08] @ 0x00700008 */
9358 #define NV_RAMFC_REF_CNT 0xFFFFFFFF
9359 
9360 /* NV-Register NV_PRAMIN [0x0C] @ 0x0070000C */
9361 #define NV_RAMFC_DMA_INST 0x0000FFFF
9362 
9363 /* NV-Register NV_PRAMIN [0x0C] @ 0x0070000C */
9364 #define NV_RAMFC_DMA_COUNT 0x1FFC0000
9365 
9366 /* NV-Register NV_PRAMIN [0x10] @ 0x00700010 */
9367 #define NV_RAMFC_DMA_METHOD 0x00001FFC
9368 
9369 /* NV-Register NV_PRAMIN [0x10] @ 0x00700010 */
9370 #define NV_RAMFC_DMA_SUBCHANNEL 0x0000E000
9371 
9372 /* NV-Register NV_PRAMIN [0x10] @ 0x00700010 */
9373 #define NV_RAMFC_DMA_METHOD_COUNT 0x1FFC0000
9374 
9375 /* NV-Register NV_PRAMIN [0x10] @ 0x00700010 */
9376 #define NV_RAMFC_DMA_METHOD_TYPE 0x00000001
9377 
9378 /* NV-Register NV_PRAMIN [0x14] @ 0x00700014 */
9379 #define NV_RAMFC_DMA_FETCH_TRIG 0x000000F8
9380 
9381 /* NV-Register NV_PRAMIN [0x14] @ 0x00700014 */
9382 #define NV_RAMFC_DMA_FETCH_SIZE 0x0000E000
9383 
9384 /* NV-Register NV_PRAMIN [0x14] @ 0x00700014 */
9385 #define NV_RAMFC_DMA_FETCH_MAX_REQS 0x001F0000
9386 
9387 /* NV-Register NV_PRAMIN [0x14] @ 0x00700014 */
9388 #define NV_RAMFC_BIG_ENDIAN 0x80000000
9389 
9390 /* NV-Register NV_PRAMIN [0x18] @ 0x00700018 */
9391 #define NV_RAMFC_ENGINE_SUB_0 0x00000003
9392 
9393 /* NV-Register NV_PRAMIN [0x18] @ 0x00700018 */
9394 #define NV_RAMFC_ENGINE_SUB_1 0x00000030
9395 
9396 /* NV-Register NV_PRAMIN [0x18] @ 0x00700018 */
9397 #define NV_RAMFC_ENGINE_SUB_2 0x00000300
9398 
9399 /* NV-Register NV_PRAMIN [0x18] @ 0x00700018 */
9400 #define NV_RAMFC_ENGINE_SUB_3 0x00003000
9401 
9402 /* NV-Register NV_PRAMIN [0x18] @ 0x00700018 */
9403 #define NV_RAMFC_ENGINE_SUB_4 0x00030000
9404 
9405 /* NV-Register NV_PRAMIN [0x18] @ 0x00700018 */
9406 #define NV_RAMFC_ENGINE_SUB_5 0x00300000
9407 
9408 /* NV-Register NV_PRAMIN [0x18] @ 0x00700018 */
9409 #define NV_RAMFC_ENGINE_SUB_6 0x03000000
9410 
9411 /* NV-Register NV_PRAMIN [0x18] @ 0x00700018 */
9412 #define NV_RAMFC_ENGINE_SUB_7 0x30000000
9413 #define NV_RAMFC_ENGINE_SW 0x00000000
9414 #define NV_RAMFC_ENGINE_GRAPHICS 0x10000000
9415 #define NV_RAMFC_ENGINE_DVD 0x20000000
9416 
9417 /* NV-Register NV_PRAMIN [0x1C] @ 0x0070001C */
9418 #define NV_RAMFC_PULL1_ENGINE 0x00000003
9419 #define NV_RAMFC_PULL1_ENGINE_SW 0x00000000
9420 #define NV_RAMFC_PULL1_ENGINE_GRAPHICS 0x00000001
9421 #define NV_RAMFC_PULL1_ENGINE_DVD 0x00000002
9422 
9423 /* NV-Register NV_PRAMIN [0x1C] @ 0x0070001C */
9424 #define NV_RAMFC_PULL1_ACQ_STATE 0x00000010
9425 #define NV_RAMFC_PULL1_ACQ_STATE_INACTIVE 0xFFFFFFEF
9426 #define NV_RAMFC_PULL1_ACQ_STATE_ACTIVE 0x00000010
9427 
9428 /* NV-Register NV_PRAMIN [0x1C] @ 0x0070001C */
9429 #define NV_RAMFC_PULL1_SEM_TARGET_NODE 0x00030000
9430 #define NV_RAMFC_PULL1_SEM_TARGET_NODE_NVM 0x00000000
9431 #define NV_RAMFC_PULL1_SEM_TARGET_NODE_PCI 0x00020000
9432 #define NV_RAMFC_PULL1_SEM_TARGET_NODE_AGP 0x00030000
9433 
9434 /* NV-Register NV_PRAMIN [0x20] @ 0x00700020 */
9435 #define NV_RAMFC_ACQUIRE_VALUE 0xFFFFFFFF
9436 
9437 /* NV-Register NV_PRAMIN [0x24] @ 0x00700024 */
9438 #define NV_RAMFC_ACQUIRE_TIMESTAMP 0xFFFFFFFF
9439 
9440 /* NV-Register NV_PRAMIN [0x28] @ 0x00700028 */
9441 #define NV_RAMFC_ACQUIRE_TIMEOUT 0xFFFFFFFF
9442 
9443 /* NV-Register NV_PRAMIN [0x2C] @ 0x0070002C */
9444 #define NV_RAMFC_SEMAPHORE_CTXDMA 0x00000001
9445 #define NV_RAMFC_SEMAPHORE_CTXDMA_INVALID 0xFFFFFFFE
9446 #define NV_RAMFC_SEMAPHORE_CTXDMA_VALID 0x00000001
9447 
9448 /* NV-Register NV_PRAMIN [0x2C] @ 0x0070002C */
9449 #define NV_RAMFC_SEMAPHORE_OFFSET 0x00000FFC
9450 
9451 /* NV-Register NV_PRAMIN [0x2C] @ 0x0070002C */
9452 #define NV_RAMFC_SEMAPHORE_PAGE_ADDRESS 0xFFFFF000
9453 
9454 /* NV-Register NV_PRAMIN [0x30] @ 0x00700030 */
9455 #define NV_RAMFC_DMA_SUBROUTINE_STATE 0x00000001
9456 #define NV_RAMFC_DMA_SUBROUTINE_STATE_INACTIVE 0xFFFFFFFE
9457 #define NV_RAMFC_DMA_SUBROUTINE_STATE_ACTIVE 0x00000001
9458 
9459 /* NV-Register NV_PRAMIN [0x30] @ 0x00700030 */
9460 #define NV_RAMFC_DMA_SUBROUTINE_RETURN_OFFSET 0x1FFFFFFC
9461 
9462 /* NV-Register NV_PRAMIN [0x00] @ 0x00700000 */
9463 #define NV_PRAMIN_CONTEXT_0 0xFFFFFFFF
9464 
9465 /* NV-Register NV_PRAMIN [0x04] @ 0x00700004 */
9466 #define NV_PRAMIN_CONTEXT_1 0xFFFFFFFF
9467 
9468 /* NV-Register NV_PRAMIN [0x08] @ 0x00700008 */
9469 #define NV_PRAMIN_CONTEXT_2 0xFFFFFFFF
9470 
9471 /* NV-Register NV_PRAMIN [0x0C] @ 0x0070000C */
9472 #define NV_PRAMIN_CONTEXT_3 0xFFFFFFFF
9473 
9474 /* NV-Memory NV_PRAMIN_RAMHT_0 */
9475 #define NV_PRAMIN_RAMHT_0 0x00710000 /* size: 0x00000FFF */
9476 
9477 /* NV-Memory NV_PRAMIN_RAMFC_0 */
9478 #define NV_PRAMIN_RAMFC_0 0x00711000 /* size: 0x000007FF */
9479 
9480 /* NV-Memory NV_PRAMIN_RAMRO_0 */
9481 #define NV_PRAMIN_RAMRO_0 0x00711800 /* size: 0x000001FF */
9482 
9483 /* NV-Register NV_PRAMIN_RAMRO_0 [0x00] @ 0x00711800 */
9484 #define NV_DMA_CLASS 0x00000FFF
9485 
9486 /* NV-Register NV_PRAMIN_RAMRO_0 [0x00] @ 0x00711800 */
9487 #define NV_DMA_PAGE_TABLE 0x00001000
9488 #define NV_DMA_PAGE_TABLE_NOT_PRESENT 0xFFFFEFFF
9489 #define NV_DMA_PAGE_TABLE_PRESENT 0x00001000
9490 
9491 /* NV-Register NV_PRAMIN_RAMRO_0 [0x00] @ 0x00711800 */
9492 #define NV_DMA_PAGE_ENTRY 0x00002000
9493 #define NV_DMA_PAGE_ENTRY_NOT_LINEAR 0xFFFFDFFF
9494 #define NV_DMA_PAGE_ENTRY_LINEAR 0x00002000
9495 
9496 /* NV-Register NV_PRAMIN_RAMRO_0 [0x00] @ 0x00711800 */
9497 #define NV_DMA_FLAGS_ACCESS 0x0000C000
9498 #define NV_DMA_FLAGS_ACCESS_READ_WRITE 0x00000000
9499 #define NV_DMA_FLAGS_ACCESS_READ_ONLY 0x00004000
9500 #define NV_DMA_FLAGS_ACCESS_WRITE_ONLY 0x00008000
9501 
9502 /* NV-Register NV_PRAMIN_RAMRO_0 [0x00] @ 0x00711800 */
9503 #define NV_DMA_TARGET_NODE 0x00030000
9504 #define NV_DMA_TARGET_NODE_NVM 0x00000000
9505 #define NV_DMA_TARGET_NODE_NVM_TILED 0x00010000
9506 #define NV_DMA_TARGET_NODE_PCI 0x00020000
9507 #define NV_DMA_TARGET_NODE_AGP 0x00030000
9508 
9509 /* NV-Register NV_PRAMIN_RAMRO_0 [0x00] @ 0x00711800 */
9510 #define NV_DMA_ADJUST 0xFFF00000
9511 
9512 /* NV-Register NV_PRAMIN_RAMRO_0 [0x04] @ 0x00711804 */
9513 #define NV_DMA_LIMIT 0xFFFFFFFF
9514 
9515 /* NV-Register NV_PRAMIN_RAMRO_0 [0x08] @ 0x00711808 */
9516 #define NV_DMA_ACCESS 0x00000002
9517 #define NV_DMA_ACCESS_READ_ONLY 0xFFFFFFFD
9518 #define NV_DMA_ACCESS_READ_AND_WRITE 0x00000002
9519 
9520 /* NV-Register NV_PRAMIN_RAMRO_0 [0x08] @ 0x00711808 */
9521 #define NV_DMA_FRAME_ADDRESS 0xFFFFF000
9522 
9523 /* NV-Register NV_PRAMIN_RAMRO_0 [0x00] @ 0x00711800 */
9524 #define NV_SUBCHAN_CTX_SWITCH 0xFFFFFFFF
9525 
9526 /* NV-Register NV_PRAMIN_RAMRO_0 [0x04] @ 0x00711804 */
9527 #define NV_SUBCHAN_DMA_INSTANCE 0x0000FFFF
9528 
9529 /* NV-Register NV_PRAMIN_RAMRO_0 [0x04] @ 0x00711804 */
9530 #define NV_SUBCHAN_NOTIFY_INSTANCE 0xFFFF0000
9531 
9532 /* NV-Register NV_PRAMIN_RAMRO_0 [0x08] @ 0x00711808 */
9533 #define NV_SUBCHAN_MEMFMT_INSTANCE 0x0000FFFF
9534 
9535 /* NV-Register NV_PRAMIN_RAMRO_0 [0x08] @ 0x00711808 */
9536 #define NV_SUBCHAN_MEMFMT_LINEAR 0x00010000
9537 #define NV_SUBCHAN_MEMFMT_LINEAR_OUT 0xFFFEFFFF
9538 #define NV_SUBCHAN_MEMFMT_LINEAR_IN 0x00010000
9539 
9540 /* NV-Array NV_PRAMIN_CTX_0 (16 byte access) */
9541 #define NV_PRAMIN_CTX_0 0x00700000
9542 /* NV-Array size NV_PRAMIN_CTX_0__SIZE_1 [0..65535] */
9543 #define NV_PRAMIN_CTX_0__SIZE_1 0x00010000
9544 #define NV_PRAMIN_CTX_0_NVCLASS 0x00000FFF
9545 #define NV_PRAMIN_CTX_0_NVCLASS_NV_ROOT 0x00000000
9546 #define NV_PRAMIN_CTX_0_NVCLASS_012 0x00000012
9547 #define NV_PRAMIN_CTX_0_NVCLASS_017 0x00000017
9548 #define NV_PRAMIN_CTX_0_NVCLASS_018 0x00000018
9549 #define NV_PRAMIN_CTX_0_NVCLASS_019 0x00000019
9550 #define NV_PRAMIN_CTX_0_NVCLASS_01C 0x0000001C
9551 #define NV_PRAMIN_CTX_0_NVCLASS_01D 0x0000001D
9552 #define NV_PRAMIN_CTX_0_NVCLASS_01E 0x0000001E
9553 #define NV_PRAMIN_CTX_0_NVCLASS_01F 0x0000001F
9554 #define NV_PRAMIN_CTX_0_NVCLASS_021 0x00000021
9555 #define NV_PRAMIN_CTX_0_NVCLASS_030 0x00000030
9556 #define NV_PRAMIN_CTX_0_NVCLASS_036 0x00000036
9557 #define NV_PRAMIN_CTX_0_NVCLASS_037 0x00000037
9558 #define NV_PRAMIN_CTX_0_NVCLASS_038 0x00000038
9559 #define NV_PRAMIN_CTX_0_NVCLASS_039 0x00000039
9560 #define NV_PRAMIN_CTX_0_NVCLASS_042 0x00000042
9561 #define NV_PRAMIN_CTX_0_NVCLASS_043 0x00000043
9562 #define NV_PRAMIN_CTX_0_NVCLASS_044 0x00000044
9563 #define NV_PRAMIN_CTX_0_NVCLASS_048 0x00000048
9564 #define NV_PRAMIN_CTX_0_NVCLASS_04A 0x0000004A
9565 #define NV_PRAMIN_CTX_0_NVCLASS_04B 0x0000004B
9566 #define NV_PRAMIN_CTX_0_NVCLASS_052 0x00000052
9567 #define NV_PRAMIN_CTX_0_NVCLASS_053 0x00000053
9568 #define NV_PRAMIN_CTX_0_NVCLASS_054 0x00000054
9569 #define NV_PRAMIN_CTX_0_NVCLASS_055 0x00000055
9570 #define NV_PRAMIN_CTX_0_NVCLASS_057 0x00000057
9571 #define NV_PRAMIN_CTX_0_NVCLASS_058 0x00000058
9572 #define NV_PRAMIN_CTX_0_NVCLASS_059 0x00000059
9573 #define NV_PRAMIN_CTX_0_NVCLASS_05A 0x0000005A
9574 #define NV_PRAMIN_CTX_0_NVCLASS_05B 0x0000005B
9575 #define NV_PRAMIN_CTX_0_NVCLASS_05C 0x0000005C
9576 #define NV_PRAMIN_CTX_0_NVCLASS_05E 0x0000005E
9577 #define NV_PRAMIN_CTX_0_NVCLASS_05F 0x0000005F
9578 #define NV_PRAMIN_CTX_0_NVCLASS_060 0x00000060
9579 #define NV_PRAMIN_CTX_0_NVCLASS_061 0x00000061
9580 #define NV_PRAMIN_CTX_0_NVCLASS_064 0x00000064
9581 #define NV_PRAMIN_CTX_0_NVCLASS_065 0x00000065
9582 #define NV_PRAMIN_CTX_0_NVCLASS_066 0x00000066
9583 #define NV_PRAMIN_CTX_0_NVCLASS_067 0x00000067
9584 #define NV_PRAMIN_CTX_0_NVCLASS_072 0x00000072
9585 #define NV_PRAMIN_CTX_0_NVCLASS_076 0x00000076
9586 #define NV_PRAMIN_CTX_0_NVCLASS_077 0x00000077
9587 #define NV_PRAMIN_CTX_0_CHROMA_KEY 0x00001000
9588 #define NV_PRAMIN_CTX_0_CHROMA_KEY_DISABLE 0xFFFFEFFF
9589 #define NV_PRAMIN_CTX_0_CHROMA_KEY_ENABLE 0x00001000
9590 #define NV_PRAMIN_CTX_0_USER_CLIP 0x00002000
9591 #define NV_PRAMIN_CTX_0_USER_CLIP_DISABLE 0xFFFFDFFF
9592 #define NV_PRAMIN_CTX_0_USER_CLIP_ENABLE 0x00002000
9593 #define NV_PRAMIN_CTX_0_SWIZZLE 0x00004000
9594 #define NV_PRAMIN_CTX_0_SWIZZLE_DISABLE 0xFFFFBFFF
9595 #define NV_PRAMIN_CTX_0_SWIZZLE_ENABLE 0x00004000
9596 #define NV_PRAMIN_CTX_0_PATCH_CONFIG 0x00038000
9597 #define NV_PRAMIN_CTX_0_PATCH_CONFIG_SRCCOPY_AND 0x00000000
9598 #define NV_PRAMIN_CTX_0_PATCH_CONFIG_ROP_AND 0x00008000
9599 #define NV_PRAMIN_CTX_0_PATCH_CONFIG_BLEND_AND 0x00010000
9600 #define NV_PRAMIN_CTX_0_PATCH_CONFIG_SRCCOPY 0x00018000
9601 #define NV_PRAMIN_CTX_0_PATCH_CONFIG_SRCCOPY_PRE 0x00020000
9602 #define NV_PRAMIN_CTX_0_PATCH_CONFIG_BLEND_PRE 0x00028000
9603 #define NV_PRAMIN_CTX_0_SYNCHRONIZE 0x00040000
9604 #define NV_PRAMIN_CTX_0_SYNCHRONIZE_DISABLE 0xFFFBFFFF
9605 #define NV_PRAMIN_CTX_0_SYNCHRONIZE_ENABLE 0x00040000
9606 #define NV_PRAMIN_CTX_0_ENDIAN_MODE 0x00080000
9607 #define NV_PRAMIN_CTX_0_ENDIAN_MODE_LITTLE 0xFFF7FFFF
9608 #define NV_PRAMIN_CTX_0_ENDIAN_MODE_BIG 0x00080000
9609 #define NV_PRAMIN_CTX_0_DITHER_MODE 0x00300000
9610 #define NV_PRAMIN_CTX_0_DITHER_MODE_COMPATIBILITY 0x00000000
9611 #define NV_PRAMIN_CTX_0_DITHER_MODE_DITHER 0x00100000
9612 #define NV_PRAMIN_CTX_0_DITHER_MODE_TRUNCATE 0x00200000
9613 #define NV_PRAMIN_CTX_0_DITHER_MODE_SUBTRACT_TRUNCATE 0x00300000
9614 #define NV_PRAMIN_CTX_0_SINGLE_STEP 0x00800000
9615 #define NV_PRAMIN_CTX_0_SINGLE_STEP_DISABLE 0xFF7FFFFF
9616 #define NV_PRAMIN_CTX_0_SINGLE_STEP_ENABLE 0x00800000
9617 #define NV_PRAMIN_CTX_0_PATCH_STATUS 0x01000000
9618 #define NV_PRAMIN_CTX_0_PATCH_STATUS_INVALID 0xFEFFFFFF
9619 #define NV_PRAMIN_CTX_0_PATCH_STATUS_VALID 0x01000000
9620 #define NV_PRAMIN_CTX_0_CONTEXT_SURFACE0 0x02000000
9621 #define NV_PRAMIN_CTX_0_CONTEXT_SURFACE0_INVALID 0xFDFFFFFF
9622 #define NV_PRAMIN_CTX_0_CONTEXT_SURFACE0_VALID 0x02000000
9623 #define NV_PRAMIN_CTX_0_CONTEXT_SURFACE1 0x04000000
9624 #define NV_PRAMIN_CTX_0_CONTEXT_SURFACE1_INVALID 0xFBFFFFFF
9625 #define NV_PRAMIN_CTX_0_CONTEXT_SURFACE1_VALID 0x04000000
9626 #define NV_PRAMIN_CTX_0_CONTEXT_PATTERN 0x08000000
9627 #define NV_PRAMIN_CTX_0_CONTEXT_PATTERN_INVALID 0xF7FFFFFF
9628 #define NV_PRAMIN_CTX_0_CONTEXT_PATTERN_VALID 0x08000000
9629 #define NV_PRAMIN_CTX_0_CONTEXT_ROP 0x10000000
9630 #define NV_PRAMIN_CTX_0_CONTEXT_ROP_INVALID 0xEFFFFFFF
9631 #define NV_PRAMIN_CTX_0_CONTEXT_ROP_VALID 0x10000000
9632 #define NV_PRAMIN_CTX_0_CONTEXT_BETA1 0x20000000
9633 #define NV_PRAMIN_CTX_0_CONTEXT_BETA1_INVALID 0xDFFFFFFF
9634 #define NV_PRAMIN_CTX_0_CONTEXT_BETA1_VALID 0x20000000
9635 #define NV_PRAMIN_CTX_0_CONTEXT_BETA4 0x40000000
9636 #define NV_PRAMIN_CTX_0_CONTEXT_BETA4_INVALID 0xBFFFFFFF
9637 #define NV_PRAMIN_CTX_0_CONTEXT_BETA4_VALID 0x40000000
9638 
9639 /* NV-Array NV_PRAMIN_CTX_1 (16 byte access) */
9640 #define NV_PRAMIN_CTX_1 0x00700004
9641 /* NV-Array size NV_PRAMIN_CTX_1__SIZE_1 [0..65535] */
9642 #define NV_PRAMIN_CTX_1__SIZE_1 0x00010000
9643 #define NV_PRAMIN_CTX_1_MONO_FORMAT 0x000000FF
9644 #define NV_PRAMIN_CTX_1_MONO_FORMAT_INVALID 0x00000000
9645 #define NV_PRAMIN_CTX_1_MONO_FORMAT_CGA6_M1 0x00000001
9646 #define NV_PRAMIN_CTX_1_MONO_FORMAT_LE_M1 0x00000002
9647 #define NV_PRAMIN_CTX_1_MONO_FORMAT_018 0x00000001
9648 #define NV_PRAMIN_CTX_1_MONO_FORMAT_044 0x00000001
9649 #define NV_PRAMIN_CTX_1_MONO_FORMAT_04A 0x00000001
9650 #define NV_PRAMIN_CTX_1_MONO_FORMAT_04B 0x00000001
9651 #define NV_PRAMIN_CTX_1_COLOR_FORMAT 0x0000FF00
9652 #define NV_PRAMIN_CTX_1_COLOR_FORMAT_INVALID 0x00000000
9653 #define NV_PRAMIN_CTX_1_COLOR_FORMAT_LE_Y8 0x00000100
9654 #define NV_PRAMIN_CTX_1_COLOR_FORMAT_LE_X16A8Y8 0x00000200
9655 #define NV_PRAMIN_CTX_1_COLOR_FORMAT_LE_X24Y8 0x00000300
9656 #define NV_PRAMIN_CTX_1_COLOR_FORMAT_LE_A1R5G5B5 0x00000600
9657 #define NV_PRAMIN_CTX_1_COLOR_FORMAT_LE_X1R5G5B5 0x00000700
9658 #define NV_PRAMIN_CTX_1_COLOR_FORMAT_LE_X16A1R5G5B5 0x00000800
9659 #define NV_PRAMIN_CTX_1_COLOR_FORMAT_LE_X17R5G5B5 0x00000900
9660 #define NV_PRAMIN_CTX_1_COLOR_FORMAT_LE_R5G6B5 0x00000A00
9661 #define NV_PRAMIN_CTX_1_COLOR_FORMAT_LE_A16R5G6B5 0x00000B00
9662 #define NV_PRAMIN_CTX_1_COLOR_FORMAT_LE_X16R5G6B5 0x00000C00
9663 #define NV_PRAMIN_CTX_1_COLOR_FORMAT_LE_A8R8G8B8 0x00000D00
9664 #define NV_PRAMIN_CTX_1_COLOR_FORMAT_LE_X8R8G8B8 0x00000E00
9665 #define NV_PRAMIN_CTX_1_COLOR_FORMAT_LE_Y16 0x00000F00
9666 #define NV_PRAMIN_CTX_1_COLOR_FORMAT_LE_A16Y16 0x00001000
9667 #define NV_PRAMIN_CTX_1_COLOR_FORMAT_LE_X16Y16 0x00001100
9668 #define NV_PRAMIN_CTX_1_COLOR_FORMAT_LE_V8YB8U8YA8 0x00001200
9669 #define NV_PRAMIN_CTX_1_COLOR_FORMAT_LE_YB8V8YA8U8 0x00001300
9670 #define NV_PRAMIN_CTX_1_COLOR_FORMAT_LE_Y32 0x00001400
9671 #define NV_PRAMIN_CTX_1_COLOR_FORMAT_017 0x00000200
9672 #define NV_PRAMIN_CTX_1_COLOR_FORMAT_018 0x00000200
9673 #define NV_PRAMIN_CTX_1_COLOR_FORMAT_01C 0x00000300
9674 #define NV_PRAMIN_CTX_1_COLOR_FORMAT_01D 0x00000300
9675 #define NV_PRAMIN_CTX_1_COLOR_FORMAT_01E 0x00000300
9676 #define NV_PRAMIN_CTX_1_COLOR_FORMAT_021 0x00000100
9677 #define NV_PRAMIN_CTX_1_COLOR_FORMAT_036 0x00000100
9678 #define NV_PRAMIN_CTX_1_COLOR_FORMAT_037 0x00000600
9679 #define NV_PRAMIN_CTX_1_COLOR_FORMAT_044 0x00000B00
9680 #define NV_PRAMIN_CTX_1_COLOR_FORMAT_04A 0x00000C00
9681 #define NV_PRAMIN_CTX_1_COLOR_FORMAT_04B 0x00000300
9682 #define NV_PRAMIN_CTX_1_COLOR_FORMAT_057 0x00000B00
9683 #define NV_PRAMIN_CTX_1_COLOR_FORMAT_05C 0x00000C00
9684 #define NV_PRAMIN_CTX_1_COLOR_FORMAT_05D 0x00000C00
9685 #define NV_PRAMIN_CTX_1_COLOR_FORMAT_05E 0x00000C00
9686 #define NV_PRAMIN_CTX_1_COLOR_FORMAT_060 0x00000A00
9687 #define NV_PRAMIN_CTX_1_COLOR_FORMAT_061 0x00000A00
9688 #define NV_PRAMIN_CTX_1_COLOR_FORMAT_076 0x00000A00
9689 #define NV_PRAMIN_CTX_1_COLOR_FORMAT_077 0x00000600
9690 #define NV_PRAMIN_CTX_1_NOTIFY_INSTANCE 0xFFFF0000
9691 #define NV_PRAMIN_CTX_1_NOTIFY_INSTANCE_INVALID 0x00000000
9692 
9693 /* NV-Array NV_PRAMIN_CTX_2 (16 byte access) */
9694 #define NV_PRAMIN_CTX_2 0x00700008
9695 /* NV-Array size NV_PRAMIN_CTX_2__SIZE_1 [0..65535] */
9696 #define NV_PRAMIN_CTX_2__SIZE_1 0x00010000
9697 #define NV_PRAMIN_CTX_2_DMA_0_INSTANCE 0x0000FFFF
9698 #define NV_PRAMIN_CTX_2_DMA_0_INSTANCE_INVALID 0x00000000
9699 #define NV_PRAMIN_CTX_2_DMA_1_INSTANCE 0xFFFF0000
9700 #define NV_PRAMIN_CTX_2_DMA_1_INSTANCE_INVALID 0x00000000
9701 
9702 /* NV-Array NV_PRAMIN_CTX_3 (16 byte access) */
9703 #define NV_PRAMIN_CTX_3 0x0070000C
9704 /* NV-Array size NV_PRAMIN_CTX_3__SIZE_1 [0..65535] */
9705 #define NV_PRAMIN_CTX_3__SIZE_1 0x00010000
9706 #define NV_PRAMIN_CTX_3_METHOD_TRAPS 0xFFFFFFFF
9707 #define NV_PRAMIN_CTX_3_METHOD_TRAPS_DISABLED 0x00000000
9708 
9709 /* NV-Register NV_PRAMIN_CTX_3 [0x00] @ 0x0070000C */
9710 #define NV_GR_CTX_0 0xFFFFFFFF
9711 
9712 /* NV-Register NV_PRAMIN_CTX_3 [0x04] @ 0x00700010 */
9713 #define NV_GR_CTX_1 0xFFFFFFFF
9714 
9715 /* NV-Register NV_PRAMIN_CTX_3 [0x08] @ 0x00700014 */
9716 #define NV_GR_CTX_2 0xFFFFFFFF
9717 
9718 /* NV-Register NV_PRAMIN_CTX_3 [0x0C] @ 0x00700018 */
9719 #define NV_GR_CTX_3 0xFFFFFFFF
9720 
9721 /* NV-Register NV_PRAMIN_CTX_3 [0x00] @ 0x0070000C */
9722 #define NV_FIFO_DMA_OPCODE 0xE0000000
9723 #define NV_FIFO_DMA_OPCODE_METHOD 0x00000000
9724 #define NV_FIFO_DMA_OPCODE_JUMP 0x20000000
9725 #define NV_FIFO_DMA_OPCODE_NONINC_METHOD 0x40000000
9726 #define NV_FIFO_DMA_OPCODE_CALL 0x60000000
9727 
9728 /* NV-Register NV_PRAMIN_CTX_3 [0x00] @ 0x0070000C */
9729 #define NV_FIFO_DMA_OPCODE 0xE0000000
9730 #define NV_FIFO_DMA_OPCODE_METHOD 0x00000000
9731 #define NV_FIFO_DMA_OPCODE_NONINC_METHOD 0x40000000
9732 
9733 /* NV-Register NV_PRAMIN_CTX_3 [0x00] @ 0x0070000C */
9734 #define NV_FIFO_DMA_METHOD_COUNT 0x1FFC0000
9735 
9736 /* NV-Register NV_PRAMIN_CTX_3 [0x00] @ 0x0070000C */
9737 #define NV_FIFO_DMA_METHOD_SUBCHANNEL 0x0000E000
9738 
9739 /* NV-Register NV_PRAMIN_CTX_3 [0x00] @ 0x0070000C */
9740 #define NV_FIFO_DMA_METHOD_ADDRESS 0x00001FFC
9741 
9742 /* NV-Register NV_PRAMIN_CTX_3 [0x04] @ 0x00700010 */
9743 #define NV_FIFO_DMA_DATA 0xFFFFFFFF
9744 #define NV_FIFO_DMA_NOP 0x00000000
9745 
9746 /* NV-Register NV_PRAMIN_CTX_3 [0x00] @ 0x0070000C */
9747 #define NV_FIFO_DMA_OPCODE 0xE0000000
9748 #define NV_FIFO_DMA_OPCODE_JUMP 0x20000000
9749 #define NV_FIFO_DMA_JUMP_OFFSET 0x1FFFFFFC
9750 
9751 /* NV-Register NV_PRAMIN_CTX_3 [0x00] @ 0x0070000C */
9752 #define NV_FIFO_DMA_OPCODE 0xE0000000
9753 #define NV_FIFO_DMA_OPCODE_CALL 0x60000000
9754 #define NV_FIFO_DMA_CALL_OFFSET 0x1FFFFFFC
9755 #define NV_FIFO_DMA_RETURN 0x00080000
9756 
9757 /* NV-Register NV_PRAMIN_CTX_3 [0x00] @ 0x0070000C */
9758 #define NV_U047_SUBCHAN_CLASS 0x00000FFF
9759 
9760 /* NV-Register NV_PRAMIN_CTX_3 [0x04] @ 0x00700010 */
9761 #define NV_U047_SUBCHAN_NOTIFY 0x00000003
9762 
9763 /* NV-Register NV_PRAMIN_CTX_3 [0x08] @ 0x00700014 */
9764 #define NV_U047_SUBCHAN_CONTROL 0x0000003F
9765 
9766 /* NV-Register NV_PRAMIN_CTX_3 [0x0C] @ 0x00700018 */
9767 #define NV_U047_SUBCHAN_IDCT_OFFSET 0xFFFFFFFF
9768 
9769 /* NV-Register NV_PRAMIN_CTX_3 [0x10] @ 0x0070001C */
9770 #define NV_U047_SUBCHAN_CTX_DMA_NOTIFIES 0x0000FFFF
9771 
9772 /* NV-Register NV_PRAMIN_CTX_3 [0x14] @ 0x00700020 */
9773 #define NV_U047_SUBCHAN_CTX_DMA_0_IN 0x0000FFFF
9774 
9775 /* NV-Register NV_PRAMIN_CTX_3 [0x14] @ 0x00700020 */
9776 #define NV_U047_SUBCHAN_CTX_DMA_0_OUT 0xFFFF0000
9777 
9778 /* NV-Register NV_PRAMIN_CTX_3 [0x18] @ 0x00700024 */
9779 #define NV_U047_SUBCHAN_CTX_DMA_1_IN 0x0000FFFF
9780 
9781 /* NV-Register NV_PRAMIN_CTX_3 [0x18] @ 0x00700024 */
9782 #define NV_U047_SUBCHAN_CTX_DMA_1_IDCT 0xFFFF0000
9783 
9784 /* NV-Register NV_PRAMIN_CTX_3 [0x1C] @ 0x00700028 */
9785 #define NV_U047_SUBCHAN_COMMAND_0 0xFFFFFFFF
9786 
9787 /* NV-Register NV_PRAMIN_CTX_3 [0x20 + i] @ 0x0070002C */
9788 #define NV_U047_SUBCHAN_ACCUMULATOR 0xFFFFFFFF
9789 /* NV-Array size NV_U047_SUBCHAN_ACCUMULATOR__SIZE_1 [0..31] */
9790 #define NV_U047_SUBCHAN_ACCUMULATOR__SIZE_1 0x00000020
9791 
9792 /* NV-Register NV_PRAMIN_CTX_3 [0x00] @ 0x0070000C */
9793 #define NV_UMEMFMT_SUBCHAN_CLASS 0x00000FFF
9794 
9795 /* NV-Register NV_PRAMIN_CTX_3 [0x04] @ 0x00700010 */
9796 #define NV_UMEMFMT_SUBCHAN_NOTIFY 0x00000003
9797 
9798 /* NV-Register NV_PRAMIN_CTX_3 [0x08] @ 0x00700014 */
9799 #define NV_UMEMFMT_SUBCHAN_CTX_DMA_NOTIFIES 0x0000FFFF
9800 
9801 /* NV-Register NV_PRAMIN_CTX_3 [0x0C] @ 0x00700018 */
9802 #define NV_UMEMFMT_SUBCHAN_CTX_DMA_IN 0x0000FFFF
9803 
9804 /* NV-Register NV_PRAMIN_CTX_3 [0x0C] @ 0x00700018 */
9805 #define NV_UMEMFMT_SUBCHAN_CTX_DMA_OUT 0xFFFF0000
9806 
9807 /* NV-Register NV_PRAMIN_CTX_3 [0x00] @ 0x0070000C */
9808 #define NV_RAMDVD_CTX_TABLE 0xFFFFFFFF
9809 
9810 /* NV-Register NV_PRAMIN_CTX_3 [0x00] @ 0x0070000C */
9811 #define NV_RAMDVD_CTX_TABLE_OBJECT_0_0 0x0000FFFF
9812 
9813 /* NV-Register NV_PRAMIN_CTX_3 [0x00] @ 0x0070000C */
9814 #define NV_RAMDVD_CTX_TABLE_OBJECT_0_1 0xFFFF0000
9815 
9816 /* NV-Register NV_PRAMIN_CTX_3 [0x04] @ 0x00700010 */
9817 #define NV_RAMDVD_CTX_TABLE_OBJECT_0_2 0x0000FFFF
9818 
9819 /* NV-Register NV_PRAMIN_CTX_3 [0x04] @ 0x00700010 */
9820 #define NV_RAMDVD_CTX_TABLE_OBJECT_0_3 0xFFFF0000
9821 
9822 /* NV-Register NV_PRAMIN_CTX_3 [0x08] @ 0x00700014 */
9823 #define NV_RAMDVD_CTX_TABLE_OBJECT_0_4 0x0000FFFF
9824 
9825 /* NV-Register NV_PRAMIN_CTX_3 [0x08] @ 0x00700014 */
9826 #define NV_RAMDVD_CTX_TABLE_OBJECT_0_5 0xFFFF0000
9827 
9828 /* NV-Register NV_PRAMIN_CTX_3 [0x0C] @ 0x00700018 */
9829 #define NV_RAMDVD_CTX_TABLE_OBJECT_0_6 0x0000FFFF
9830 
9831 /* NV-Register NV_PRAMIN_CTX_3 [0x0C] @ 0x00700018 */
9832 #define NV_RAMDVD_CTX_TABLE_OBJECT_0_7 0xFFFF0000
9833 
9834 /* NV-Register NV_PRAMIN_CTX_3 [0xF0] @ 0x007000FC */
9835 #define NV_RAMDVD_CTX_TABLE_OBJECT_15_0 0x0000FFFF
9836 
9837 /* NV-Register NV_PRAMIN_CTX_3 [0xF0] @ 0x007000FC */
9838 #define NV_RAMDVD_CTX_TABLE_OBJECT_15_1 0xFFFF0000
9839 
9840 /* NV-Register NV_PRAMIN_CTX_3 [0xF4] @ 0x00700100 */
9841 #define NV_RAMDVD_CTX_TABLE_OBJECT_15_2 0x0000FFFF
9842 
9843 /* NV-Register NV_PRAMIN_CTX_3 [0xF4] @ 0x00700100 */
9844 #define NV_RAMDVD_CTX_TABLE_OBJECT_15_3 0xFFFF0000
9845 
9846 /* NV-Register NV_PRAMIN_CTX_3 [0xF8] @ 0x00700104 */
9847 #define NV_RAMDVD_CTX_TABLE_OBJECT_15_4 0x0000FFFF
9848 
9849 /* NV-Register NV_PRAMIN_CTX_3 [0xF8] @ 0x00700104 */
9850 #define NV_RAMDVD_CTX_TABLE_OBJECT_15_5 0xFFFF0000
9851 
9852 /* NV-Register NV_PRAMIN_CTX_3 [0xFC] @ 0x00700108 */
9853 #define NV_RAMDVD_CTX_TABLE_OBJECT_15_6 0x0000FFFF
9854 
9855 /* NV-Register NV_PRAMIN_CTX_3 [0xFC] @ 0x00700108 */
9856 #define NV_RAMDVD_CTX_TABLE_OBJECT_15_7 0xFFFF0000
9857 
9858 /* NV-Array NV_PNVM_DATA032 (4 byte access) */
9859 #define NV_PNVM_DATA032 0x08000000
9860 /* NV-Array size NV_PNVM_DATA032__SIZE_1 [0..33554431] */
9861 #ifndef NV_PNVM_DATA032__SIZE_1
9862 #define NV_PNVM_DATA032__SIZE_1 0x02000000
9863 #endif
9864 #define NV_PNVM_DATA032_VALUE 0xFFFFFFFF
9865 
9866 /* NV-Array NV_PNVM_DATA016 (4 byte access) */
9867 #define NV_PNVM_DATA016 0x08000000
9868 /* NV-Array size NV_PNVM_DATA016__SIZE_1 [0..67108863] */
9869 #ifndef NV_PNVM_DATA016__SIZE_1
9870 #define NV_PNVM_DATA016__SIZE_1 0x04000000
9871 #endif
9872 #define NV_PNVM_DATA016_VALUE 0x0000FFFF
9873 
9874 /* NV-Array NV_PNVM_DATA008 (1 byte access) */
9875 #define NV_PNVM_DATA008 0x08000000
9876 /* NV-Array size NV_PNVM_DATA008__SIZE_1 [0..134217727] */
9877 #ifndef NV_PNVM_DATA008__SIZE_1
9878 #define NV_PNVM_DATA008__SIZE_1 0x08000000
9879 #endif
9880 #define NV_PNVM_DATA008_VALUE 0x000000FF
9881 
9882 /* NV-Array NV_PRAMIN_DATA032 (4 byte access) */
9883 #define NV_PRAMIN_DATA032 0x00700000
9884 /* NV-Array size NV_PRAMIN_DATA032__SIZE_1 [0..524287] */
9885 #define NV_PRAMIN_DATA032__SIZE_1 0x00080000
9886 #define NV_PRAMIN_DATA032_VALUE 0xFFFFFFFF
9887 
9888 /* NV-Array NV_PRAMIN_DATA016 (4 byte access) */
9889 #define NV_PRAMIN_DATA016 0x00700000
9890 /* NV-Array size NV_PRAMIN_DATA016__SIZE_1 [0..1572863] */
9891 #define NV_PRAMIN_DATA016__SIZE_1 0x00180000
9892 #define NV_PRAMIN_DATA016_VALUE 0x0000FFFF
9893 
9894 /* NV-Array NV_PRAMIN_DATA008 (1 byte access) */
9895 #define NV_PRAMIN_DATA008 0x00700000
9896 /* NV-Array size NV_PRAMIN_DATA008__SIZE_1 [0..2097151] */
9897 #define NV_PRAMIN_DATA008__SIZE_1 0x00200000
9898 #define NV_PRAMIN_DATA008_VALUE 0x000000FF
9899 #define NV_TESTCTL_SCAN_MODE 0x00000008
9900 #define NV_TESTCTL_SCAN_MODE_ENABLE 0xFFFFFFF7
9901 #define NV_TESTCTL_SCAN_MODE_DISABLE 0x00000008
9902 #define NV_TESTCTL_TEST_SEL 0x00000007
9903 #define NV_TESTCTL_SEL_RAMTEST 0x00000000
9904 #define NV_TESTCTL_SEL_PTREE 0x00000001
9905 #define NV_TESTCTL_SEL_IDDQ 0x00000002
9906 #define NV_TESTCTL_SEL_LEAKAGE 0x00000003
9907 #define NV_TESTCTL_SEL_VOH 0x00000004
9908 #define NV_TESTCTL_SEL_VOL 0x00000005
9909 #define NV_TESTCTL_SEL_FMAX2 0x00000006
9910 #define NV_TESTCTL_SEL_FMAX1 0x00000007
9911 
9912 /* NV-Device NV_PTIMER */
9913 #define NV_PTIMER 0x00009000 /* size: 0x00000FFF */
9914 
9915 /* NV-Register NV_PTIMER_INTR_0 */
9916 #define NV_PTIMER_INTR_0 0x00009100
9917 #define NV_PTIMER_INTR_0_ALARM 0x00000001
9918 #define NV_PTIMER_INTR_0_ALARM_NOT_PENDING 0xFFFFFFFE
9919 #define NV_PTIMER_INTR_0_ALARM_PENDING 0x00000001
9920 #define NV_PTIMER_INTR_0_ALARM_RESET 0x00000001
9921 
9922 /* NV-Register NV_PTIMER_INTR_EN_0 */
9923 #define NV_PTIMER_INTR_EN_0 0x00009140
9924 #define NV_PTIMER_INTR_EN_0_ALARM 0x00000001
9925 #define NV_PTIMER_INTR_EN_0_ALARM_DISABLED 0xFFFFFFFE
9926 #define NV_PTIMER_INTR_EN_0_ALARM_ENABLED 0x00000001
9927 
9928 /* NV-Register NV_PTIMER_NUMERATOR */
9929 #define NV_PTIMER_NUMERATOR 0x00009200
9930 #define NV_PTIMER_NUMERATOR_VALUE 0x0000FFFF
9931 #define NV_PTIMER_NUMERATOR_VALUE_0 0x00000000
9932 
9933 /* NV-Register NV_PTIMER_DENOMINATOR */
9934 #define NV_PTIMER_DENOMINATOR 0x00009210
9935 #define NV_PTIMER_DENOMINATOR_VALUE 0x0000FFFF
9936 #define NV_PTIMER_DENOMINATOR_VALUE_0 0x00000000
9937 
9938 /* NV-Register NV_PTIMER_TIME_0 */
9939 #define NV_PTIMER_TIME_0 0x00009400
9940 #define NV_PTIMER_TIME_0_NSEC 0xFFFFFFE0
9941 
9942 /* NV-Register NV_PTIMER_TIME_1 */
9943 #define NV_PTIMER_TIME_1 0x00009410
9944 #define NV_PTIMER_TIME_1_NSEC 0x1FFFFFFF
9945 
9946 /* NV-Register NV_PTIMER_ALARM_0 */
9947 #define NV_PTIMER_ALARM_0 0x00009420
9948 #define NV_PTIMER_ALARM_0_NSEC 0xFFFFFFE0
9949 
9950 /* NV-Device NV_UREMAP */
9951 #define NV_UREMAP 0x006C0000 /* size: 0x0001FFFF */
9952 
9953 /* NV-Device NV_PREMAP */
9954 #define NV_PREMAP 0x006E0000 /* size: 0x00001FFF */
9955 
9956 /* NV-Array NV_UREMAP_FORMAT (0 byte access) */
9957 #define NV_UREMAP_FORMAT 0x00001000
9958 /* NV-Array size NV_UREMAP_FORMAT__SIZE [0..1] */
9959 #define NV_UREMAP_FORMAT__SIZE 0x00000002
9960 #define NV_UREMAP_FORMAT_BPP 0x0000000F
9961 #define NV_UREMAP_FORMAT_BPP_8 0x00000000
9962 #define NV_UREMAP_FORMAT_BPP_16 0x00000001
9963 #define NV_UREMAP_FORMAT_BPP_32 0x00000002
9964 #define NV_UREMAP_FORMAT_BPP_64 0x00000003
9965 #define NV_UREMAP_FORMAT_BPP_128 0x00000004
9966 #define NV_UREMAP_FORMAT_WIDTH 0x000000F0
9967 #define NV_UREMAP_FORMAT_WIDTH_1 0x00000000
9968 #define NV_UREMAP_FORMAT_WIDTH_2 0x00000010
9969 #define NV_UREMAP_FORMAT_WIDTH_4 0x00000020
9970 #define NV_UREMAP_FORMAT_WIDTH_8 0x00000030
9971 #define NV_UREMAP_FORMAT_WIDTH_16 0x00000040
9972 #define NV_UREMAP_FORMAT_WIDTH_32 0x00000050
9973 #define NV_UREMAP_FORMAT_WIDTH_64 0x00000060
9974 #define NV_UREMAP_FORMAT_WIDTH_128 0x00000070
9975 #define NV_UREMAP_FORMAT_WIDTH_256 0x00000080
9976 #define NV_UREMAP_FORMAT_WIDTH_512 0x00000090
9977 #define NV_UREMAP_FORMAT_HEIGHT 0x00000F00
9978 #define NV_UREMAP_FORMAT_HEIGHT_1 0x00000000
9979 #define NV_UREMAP_FORMAT_HEIGHT_2 0x00000100
9980 #define NV_UREMAP_FORMAT_HEIGHT_4 0x00000200
9981 #define NV_UREMAP_FORMAT_HEIGHT_8 0x00000300
9982 #define NV_UREMAP_FORMAT_HEIGHT_16 0x00000400
9983 #define NV_UREMAP_FORMAT_HEIGHT_32 0x00000500
9984 #define NV_UREMAP_FORMAT_HEIGHT_64 0x00000600
9985 #define NV_UREMAP_FORMAT_HEIGHT_128 0x00000700
9986 #define NV_UREMAP_FORMAT_HEIGHT_256 0x00000800
9987 #define NV_UREMAP_FORMAT_HEIGHT_512 0x00000900
9988 #define NV_UREMAP_FORMAT_DEPTH 0x0000F000
9989 #define NV_UREMAP_FORMAT_DEPTH_1 0x00000000
9990 #define NV_UREMAP_FORMAT_DEPTH_2 0x00001000
9991 #define NV_UREMAP_FORMAT_DEPTH_4 0x00002000
9992 #define NV_UREMAP_FORMAT_DEPTH_8 0x00003000
9993 #define NV_UREMAP_FORMAT_DEPTH_16 0x00004000
9994 #define NV_UREMAP_FORMAT_DEPTH_32 0x00005000
9995 #define NV_UREMAP_FORMAT_DEPTH_64 0x00006000
9996 #define NV_UREMAP_FORMAT_DEPTH_128 0x00007000
9997 #define NV_UREMAP_FORMAT_DEPTH_256 0x00008000
9998 #define NV_UREMAP_FORMAT_DEPTH_512 0x00009000
9999 
10000 /* NV-Array NV_UREMAP_OFFSET (4 byte access) */
10001 #define NV_UREMAP_OFFSET 0x00001000
10002 /* NV-Array size NV_UREMAP_OFFSET__SIZE [0..1] */
10003 #define NV_UREMAP_OFFSET__SIZE 0x00000002
10004 #define NV_UREMAP_OFFSET_ADDR 0xFFFFFFFF
10005 #define NV_UREMAP_OFFSET_ADDR_0 0x00000000
10006 
10007 /* NV-Array NV_PREMAP_BASE (0 byte access) */
10008 #define NV_PREMAP_BASE 0x00000010
10009 /* NV-Array size NV_PREMAP_BASE__SIZE [0..1] */
10010 #define NV_PREMAP_BASE__SIZE 0x00000002
10011 #define NV_PREMAP_ENDIAN 0x00000001
10012 #define NV_PREMAP_ENDIAN_LE 0xFFFFFFFE
10013 #define NV_PREMAP_ENDIAN_BE 0x00000001
10014 #define NV_PREMAP_BASE_ADDR 0x1FFFFFC0
10015 #define NV_PREMAP_BASE_ADDR_0 0x00000000
10016 
10017 /* NV-Array NV_PREMAP_LIMIT (4 byte access) */
10018 #define NV_PREMAP_LIMIT 0x00000010
10019 /* NV-Array size NV_PREMAP_LIMIT__SIZE [0..1] */
10020 #define NV_PREMAP_LIMIT__SIZE 0x00000002
10021 #define NV_PREMAP_LIMIT_ADDR 0x1FFFFFC0
10022 #define NV_PREMAP_LIMIT_ADDR_0 0x00000000
10023 
10024 /* NV-Register NV_PREMAP_CONTROL */
10025 #define NV_PREMAP_CONTROL 0x00000100
10026 #define NV_PREMAP_CONTROL_ALLOC_STATUS 0x00000003
10027 #define NV_PREMAP_CONTROL_NOT_ALLOCATED 0x00000000
10028 #define NV_PREMAP_CONTROL_ALLOCATE_CTX0 0x00000001
10029 #define NV_PREMAP_CONTROL_ALLOCATE_CTX1 0x00000002
10030 #define NV_PREMAP_CONTROL_DIRTY 0x80000000
10031 #define NV_PREMAP_CONTROL_DIRTY_RESET 0x7FFFFFFF
10032 #define NV_PREMAP_CONTROL_DIRTY_SET 0x80000000
10033 
10034 /* NV-Array NV_REMAP_BUFFER32 (4096 byte access) */
10035 #define NV_REMAP_BUFFER32 0x00000000
10036 /* NV-Array size NV_REMAP_BUFFER32__SIZE_1 [0..1] */
10037 #define NV_REMAP_BUFFER32__SIZE_1 0x00000002
10038 /* NV-Array size NV_REMAP_BUFFER32__SIZE_2 [0..127] */
10039 #define NV_REMAP_BUFFER32__SIZE_2 0x00000080
10040 #define NV_REMAP_BUFFER32_VALUE 0xFFFFFFFF
10041 
10042 /* NV-Array NV_REMAP_BUFFER16 (2 byte access) */
10043 #define NV_REMAP_BUFFER16 0x00001000
10044 /* NV-Array size NV_REMAP_BUFFER16__SIZE_1 [0..1] */
10045 #define NV_REMAP_BUFFER16__SIZE_1 0x00000002
10046 /* NV-Array size NV_REMAP_BUFFER16__SIZE_2 [0..255] */
10047 #define NV_REMAP_BUFFER16__SIZE_2 0x00000100
10048 #define NV_REMAP_BUFFER16_VALUE 0x0000FFFF
10049 
10050 /* NV-Array NV_REMAP_BUFFER8 (0 byte access) */
10051 #define NV_REMAP_BUFFER8 0x00001000
10052 /* NV-Array size NV_REMAP_BUFFER8__SIZE_1 [0..1] */
10053 #define NV_REMAP_BUFFER8__SIZE_1 0x00000002
10054 /* NV-Array size NV_REMAP_BUFFER8_SIZE_2 [0..511] */
10055 #define NV_REMAP_BUFFER8_SIZE_2 0x00000200
10056 #define NV_REMAP_BUFFER8_VALUE 0x000000FF
10057 
10058 /* NV-Array NV_PREMAP_BUFFER (2048 byte access) */
10059 #define NV_PREMAP_BUFFER 0x00000004
10060 /* NV-Array size NV_PREMAP_BUFFER__SIZE [0..511] */
10061 #define NV_PREMAP_BUFFER__SIZE 0x00000200
10062 #define NV_PREMAP_BUFFER_BYTE0 0x000001FF
10063 #define NV_PREMAP_BUFFER_BYTE1 0x01FF0000
10064 
10065 /* NV-Array NV_PREMAP_PFORMAT (512 byte access) */
10066 #define NV_PREMAP_PFORMAT 0x00000010
10067 /* NV-Array size NV_PREMAP_PFORMAT__SIZE [0..1] */
10068 #define NV_PREMAP_PFORMAT__SIZE 0x00000002
10069 #define NV_PREMAP_PFORMAT_ADDR 0x0000FFFF
10070 #define NV_PREMAP_PFORMAT_ADDR_0 0x00000000
10071 
10072 /* NV-Array NV_PREMAP_POFFSET (516 byte access) */
10073 #define NV_PREMAP_POFFSET 0x00000010
10074 /* NV-Array size NV_PREMAP_POFFSET__SIZE [0..1] */
10075 #define NV_PREMAP_POFFSET__SIZE 0x00000002
10076 #define NV_PREMAP_POFFSET_ADDR 0xFFFFFFFF
10077 #define NV_PREMAP_POFFSET_ADDR_0 0x00000000
10078 
10079 /* NV-Register NV_PREMAP_DBG_CONTROL */
10080 #define NV_PREMAP_DBG_CONTROL 0x00000400
10081 #define NV_PREMAP_DBG_CONTROL_FLUSH 0x00000001
10082 #define NV_PREMAP_DBG_CONTROL_FLUSH_REMAP 0x00000001
10083 #define NV_PREMAP_DBG_RAM_DIAG 0x00000010
10084 #define NV_PREMAP_DBG_RAM_DIAG_DISABLED 0xFFFFFFEF
10085 #define NV_PREMAP_DBG_RAM_DIAG_ENABLED 0x00000010
10086 #define NV_PREMAP_DBG_CONTEXT 0x00000100
10087 #define NV_PREMAP_DBG_CONTEXT_0 0xFFFFFEFF
10088 #define NV_PREMAP_DBG_CONTEXT_1 0x00000100
10089 #define NV_PREMAP_DBG_DIRTY_STATE 0x00001000
10090 #define NV_PREMAP_DBG_NOT_DIRTY 0xFFFFEFFF
10091 #define NV_PREMAP_DBG_DIRTY 0x00001000
10092 
10093 /* NV-Device NV_PRMCIO */
10094 #define NV_PRMCIO 0x00601000 /* size: 0x00000FFF */
10095 
10096 /* NV-Device NV_PRMVIO */
10097 #define NV_PRMVIO 0x000C0000 /* size: 0x00007FFF */
10098 
10099 /* NV-Device NV_PRMVGA */
10100 #define NV_PRMVGA 0x000A0000 /* size: 0x0001FFFF */
10101 
10102 /* NV-Device NV_CIO */
10103 #define NV_CIO 0x000003B0 /* size: 0x0000002F */
10104 
10105 /* NV-Register NV_PCRTC_INTR_0 */
10106 #define NV_PCRTC_INTR_0 0x00600100
10107 #define NV_PCRTC_INTR_0_VBLANK 0x00000001
10108 #define NV_PCRTC_INTR_0_VBLANK_NOT_PENDING 0xFFFFFFFE
10109 #define NV_PCRTC_INTR_0_VBLANK_PENDING 0x00000001
10110 #define NV_PCRTC_INTR_0_VBLANK_RESET 0x00000001
10111 
10112 /* NV-Register NV_PCRTC_INTR_EN_0 */
10113 #define NV_PCRTC_INTR_EN_0 0x00600140
10114 #define NV_PCRTC_INTR_EN_0_VBLANK 0x00000001
10115 #define NV_PCRTC_INTR_EN_0_VBLANK_DISABLED 0xFFFFFFFE
10116 #define NV_PCRTC_INTR_EN_0_VBLANK_ENABLED 0x00000001
10117 
10118 /* NV-Register NV_PCRTC_START */
10119 #define NV_PCRTC_START 0x00600800
10120 #define NV_PCRTC_START_ADDRESS 0xFFFFFFFC
10121 
10122 /* NV-Register NV_PCRTC_CONFIG */
10123 #define NV_PCRTC_CONFIG 0x00600804
10124 #define NV_PCRTC_CONFIG_START_ADDRESS 0x00000007
10125 #define NV_PCRTC_CONFIG_START_ADDRESS_VGA 0x00000000
10126 #define NV_PCRTC_CONFIG_START_ADDRESS_NON_VGA 0x00000001
10127 #define NV_PCRTC_CONFIG_START_ADDRESS_HSYNC 0x00000002
10128 #define NV_PCRTC_CONFIG_ENDIAN 0x80000000
10129 #define NV_PCRTC_CONFIG_ENDIAN_LITTLE 0x7FFFFFFF
10130 #define NV_PCRTC_CONFIG_ENDIAN_BIG 0x80000000
10131 
10132 /* NV-Register NV_PCRTC_RASTER */
10133 #define NV_PCRTC_RASTER 0x00600808
10134 #define NV_PCRTC_RASTER_POSITION 0x000007FF
10135 #define NV_PCRTC_RASTER_SA_LOAD 0x00003000
10136 #define NV_PCRTC_RASTER_SA_LOAD_DISPLAY 0x00000000
10137 #define NV_PCRTC_RASTER_SA_LOAD_BEFORE 0x00001000
10138 #define NV_PCRTC_RASTER_SA_LOAD_AFTER 0x00002000
10139 #define NV_PCRTC_RASTER_VERT_BLANK 0x00010000
10140 #define NV_PCRTC_RASTER_VERT_BLANK_ACTIVE 0x00010000
10141 #define NV_PCRTC_RASTER_VERT_BLANK_INACTIVE 0xFFFEFFFF
10142 #define NV_PCRTC_RASTER_FIELD 0x00100000
10143 #define NV_PCRTC_RASTER_FIELD_EVEN 0xFFEFFFFF
10144 #define NV_PCRTC_RASTER_FIELD_ODD 0x00100000
10145 #define NV_PCRTC_RASTER_STEREO 0x01000000
10146 #define NV_PCRTC_RASTER_STEREO_LEFT 0xFEFFFFFF
10147 #define NV_PCRTC_RASTER_STEREO_RIGHT 0x01000000
10148 
10149 /* NV-Register NV_PCRTC_CURSOR */
10150 #define NV_PCRTC_CURSOR 0x0060080C
10151 #define NV_PCRTC_CURSOR_ADDRESS 0xFFFFFFFF
10152 
10153 /* NV-Register NV_PCRTC_CURSOR_CONFIG */
10154 #define NV_PCRTC_CURSOR_CONFIG 0x00600810
10155 #define NV_PCRTC_CURSOR_CONFIG_ENABLE 0x00000001
10156 #define NV_PCRTC_CURSOR_CONFIG_ENABLE_ENABLE 0x00000001
10157 #define NV_PCRTC_CURSOR_CONFIG_ENABLE_DISABLE 0xFFFFFFFE
10158 #define NV_PCRTC_CURSOR_CONFIG_SCAN_DOUBLE 0x00000010
10159 #define NV_PCRTC_CURSOR_CONFIG_SCAN_DOUBLE_ENABLE 0x00000010
10160 #define NV_PCRTC_CURSOR_CONFIG_SCAN_DOUBLE_DISABLE 0xFFFFFFEF
10161 #define NV_PCRTC_CURSOR_CONFIG_ADDRESS_SPACE 0x00000100
10162 #define NV_PCRTC_CURSOR_CONFIG_ADDRESS_SPACE_PNVM 0x00000100
10163 #define NV_PCRTC_CURSOR_CONFIG_ADDRESS_SPACE_PINST 0xFFFFFEFF
10164 #define NV_PCRTC_CURSOR_CONFIG_CUR_BPP 0x00001000
10165 #define NV_PCRTC_CURSOR_CONFIG_CUR_BPP_16 0xFFFFEFFF
10166 #define NV_PCRTC_CURSOR_CONFIG_CUR_BPP_32 0x00001000
10167 #define NV_PCRTC_CURSOR_CONFIG_CUR_PIXELS 0x00010000
10168 #define NV_PCRTC_CURSOR_CONFIG_CUR_PIXELS_32 0xFFFEFFFF
10169 #define NV_PCRTC_CURSOR_CONFIG_CUR_PIXELS_64 0x00010000
10170 #define NV_PCRTC_CURSOR_CONFIG_CUR_LINES 0x0FF00000
10171 #define NV_PCRTC_CURSOR_CONFIG_CUR_LINES_32 0x02000000
10172 #define NV_PCRTC_CURSOR_CONFIG_CUR_LINES_64 0x04000000
10173 #define NV_PCRTC_CURSOR_CONFIG_CUR_BLEND 0x10000000
10174 #define NV_PCRTC_CURSOR_CONFIG_CUR_BLEND_ROP 0xEFFFFFFF
10175 #define NV_PCRTC_CURSOR_CONFIG_CUR_BLEND_ALPHA 0x10000000
10176 
10177 /* NV-Register NV_PCRTC_VIP_RASTER */
10178 #define NV_PCRTC_VIP_RASTER 0x00600814
10179 #define NV_PCRTC_VIP_RASTER_POSITION 0x000007FF
10180 
10181 /* NV-Register NV_PCRTC_GPIO */
10182 #define NV_PCRTC_GPIO 0x00600818
10183 #define NV_PCRTC_GPIO_0_OUTPUT 0x00000001
10184 #define NV_PCRTC_GPIO_0_OUTPUT_0 0xFFFFFFFE
10185 #define NV_PCRTC_GPIO_0_ENABLE 0x00000010
10186 #define NV_PCRTC_GPIO_0_ENABLE_DISABLE 0x00000010
10187 #define NV_PCRTC_GPIO_0_ENABLE_ENABLE 0xFFFFFFEF
10188 #define NV_PCRTC_GPIO_0_INPUT 0x00000100
10189 #define NV_PCRTC_GPIO_1_OUTPUT 0x00010000
10190 #define NV_PCRTC_GPIO_1_OUTPUT_0 0xFFFEFFFF
10191 #define NV_PCRTC_GPIO_1_ENABLE 0x00100000
10192 #define NV_PCRTC_GPIO_1_ENABLE_DISABLE 0x00100000
10193 #define NV_PCRTC_GPIO_1_ENABLE_ENABLE 0xFFEFFFFF
10194 #define NV_PCRTC_GPIO_1_INPUT 0x01000000
10195 
10196 /* NV-Register NV_PCRTC_FIFO_CNTRL */
10197 #define NV_PCRTC_FIFO_CNTRL 0x00600820
10198 #define NV_PCRTC_FIFO_CNTRL_ADDRESS 0x0000003F
10199 #define NV_PCRTC_FIFO_CNTRL_RAM 0x00000700
10200 #define NV_PCRTC_FIFO_CNTR_TESTMODE 0x00010000
10201 #define NV_PCRTC_FIFO_CNTR_TESTMODE_ENABLE 0x00010000
10202 #define NV_PCRTC_FIFO_CNTR_TESTMODE_DISABLE 0xFFFEFFFF
10203 
10204 /* NV-Register NV_PCRTC_FIFO_DATA */
10205 #define NV_PCRTC_FIFO_DATA 0x00600824
10206 #define NV_PCRTC_FIFO_DATA_VAL 0xFFFFFFFF
10207 
10208 /* NV-Register NV_PRMVIO_MBEN */
10209 #define NV_PRMVIO_MBEN 0x000C0094
10210 
10211 /* NV-Register NV_VIO_MBEN */
10212 #define NV_VIO_MBEN 0x00000094
10213 
10214 /* NV-Register NV_PRMVIO_ADDEN */
10215 #define NV_PRMVIO_ADDEN 0x000C46E8
10216 
10217 /* NV-Register NV_VIO_ADDEN */
10218 #define NV_VIO_ADDEN 0x000046E8
10219 
10220 /* NV-Register NV_PRMVIO_VSE1 */
10221 #define NV_PRMVIO_VSE1 0x000C0102
10222 
10223 /* NV-Register NV_VIO_VSE1 */
10224 #define NV_VIO_VSE1 0x00000102
10225 
10226 /* NV-Register NV_PRMVIO_VSE2 */
10227 #define NV_PRMVIO_VSE2 0x000C03C3
10228 
10229 /* NV-Register NV_VIO_VSE2 */
10230 #define NV_VIO_VSE2 0x000003C3
10231 
10232 /* NV-Register NV_PRMVIO_MISC__READ */
10233 #define NV_PRMVIO_MISC__READ 0x000C03CC
10234 
10235 /* NV-Register NV_VIO_MISC__READ */
10236 #define NV_VIO_MISC__READ 0x000003CC
10237 
10238 /* NV-Register NV_PRMVIO_MISC__WRITE */
10239 #define NV_PRMVIO_MISC__WRITE 0x000C03C2
10240 
10241 /* NV-Register NV_VIO_MISC__WRITE */
10242 #define NV_VIO_MISC__WRITE 0x000003C2
10243 
10244 /* NV-Register NV_PRMCIO_INP0 */
10245 #define NV_PRMCIO_INP0 0x006013C2
10246 
10247 /* NV-Register NV_CIO_INP0 */
10248 #define NV_CIO_INP0 0x000003C2
10249 
10250 /* NV-Register NV_PRMCIO_INP0__MONO */
10251 #define NV_PRMCIO_INP0__MONO 0x006013BA
10252 
10253 /* NV-Register NV_CIO_INP0__MONO */
10254 #define NV_CIO_INP0__MONO 0x000003BA
10255 
10256 /* NV-Register NV_PRMCIO_INP0__COLOR */
10257 #define NV_PRMCIO_INP0__COLOR 0x006013DA
10258 
10259 /* NV-Register NV_CIO_INP0__COLOR */
10260 #define NV_CIO_INP0__COLOR 0x000003DA
10261 
10262 /* NV-Register NV_PRMCIO_INP0__READ_MONO */
10263 #define NV_PRMCIO_INP0__READ_MONO 0x006013CA
10264 
10265 /* NV-Register NV_CIO_INP0__READ_MONO */
10266 #define NV_CIO_INP0__READ_MONO 0x000003CA
10267 
10268 /* NV-Register NV_PRMCIO_INP0__WRITE_MONO */
10269 #define NV_PRMCIO_INP0__WRITE_MONO 0x006013BA
10270 
10271 /* NV-Register NV_CIO_INP0__WRITE_MONO */
10272 #define NV_CIO_INP0__WRITE_MONO 0x000003BA
10273 
10274 /* NV-Register NV_PRMCIO_INP0__WRITE_COLOR */
10275 #define NV_PRMCIO_INP0__WRITE_COLOR 0x006013DA
10276 
10277 /* NV-Register NV_CIO_INP0__WRITE_COLOR */
10278 #define NV_CIO_INP0__WRITE_COLOR 0x000003DA
10279 
10280 /* NV-Register NV_PRMVIO_SRX */
10281 #define NV_PRMVIO_SRX 0x000C03C4
10282 
10283 /* NV-Register NV_VIO_SRX */
10284 #define NV_VIO_SRX 0x000003C4
10285 
10286 /* NV-Register NV_PRMVIO_SR_RESET */
10287 #define NV_PRMVIO_SR_RESET 0x000C03C5
10288 #define NV_PRMVIO_SR_RESET_INDEX 0x00000000
10289 
10290 /* NV-Register NV_VIO_SR_RESET */
10291 #define NV_VIO_SR_RESET 0x000003C5
10292 #define NV_VIO_SR_RESET_INDEX 0x00000000
10293 
10294 /* NV-Register NV_PRMVIO_SR_CLOCK */
10295 #define NV_PRMVIO_SR_CLOCK 0x000C03C5
10296 #define NV_PRMVIO_SR_CLOCK_INDEX 0x00000001
10297 
10298 /* NV-Register NV_VIO_SR_CLOCK */
10299 #define NV_VIO_SR_CLOCK 0x000003C5
10300 #define NV_VIO_SR_CLOCK_INDEX 0x00000001
10301 
10302 /* NV-Register NV_PRMVIO_SR_PLANE_MASK */
10303 #define NV_PRMVIO_SR_PLANE_MASK 0x000C03C5
10304 #define NV_PRMVIO_SR_PLANE_MASK_INDEX 0x00000002
10305 
10306 /* NV-Register NV_VIO_SR_PLANE_MASK */
10307 #define NV_VIO_SR_PLANE_MASK 0x000003C5
10308 #define NV_VIO_SR_PLANE_MASK_INDEX 0x00000002
10309 
10310 /* NV-Register NV_PRMVIO_SR_CHAR_MAP */
10311 #define NV_PRMVIO_SR_CHAR_MAP 0x000C03C5
10312 #define NV_PRMVIO_SR_CHAR_MAP_INDEX 0x00000003
10313 
10314 /* NV-Register NV_VIO_SR_CHAR_MAP */
10315 #define NV_VIO_SR_CHAR_MAP 0x000003C5
10316 #define NV_VIO_SR_CHAR_MAP_INDEX 0x00000003
10317 
10318 /* NV-Register NV_PRMVIO_SR_MEM_MODE */
10319 #define NV_PRMVIO_SR_MEM_MODE 0x000C03C5
10320 #define NV_PRMVIO_SR_MEM_MODE_INDEX 0x00000004
10321 
10322 /* NV-Register NV_VIO_SR_MEM_MODE */
10323 #define NV_VIO_SR_MEM_MODE 0x000003C5
10324 #define NV_VIO_SR_MEM_MODE_INDEX 0x00000004
10325 
10326 /* NV-Register NV_PRMVIO_GRX */
10327 #define NV_PRMVIO_GRX 0x000C03CE
10328 
10329 /* NV-Register NV_VIO_GRX */
10330 #define NV_VIO_GRX 0x000003CE
10331 
10332 /* NV-Register NV_PRMVIO_GX_SR */
10333 #define NV_PRMVIO_GX_SR 0x000C03CF
10334 #define NV_PRMVIO_GX_SR_INDEX 0x00000000
10335 
10336 /* NV-Register NV_VIO_GX_SR */
10337 #define NV_VIO_GX_SR 0x000003CF
10338 #define NV_VIO_GX_SR_INDEX 0x00000000
10339 
10340 /* NV-Register NV_PRMVIO_GX_SREN */
10341 #define NV_PRMVIO_GX_SREN 0x000C03CF
10342 #define NV_PRMVIO_GX_SREN_INDEX 0x00000001
10343 
10344 /* NV-Register NV_VIO_GX_SREN */
10345 #define NV_VIO_GX_SREN 0x000003CF
10346 #define NV_VIO_GX_SREN_INDEX 0x00000001
10347 
10348 /* NV-Register NV_PRMVIO_GX_CCOMP */
10349 #define NV_PRMVIO_GX_CCOMP 0x000C03CF
10350 #define NV_PRMVIO_GX_CCOMP_INDEX 0x00000002
10351 
10352 /* NV-Register NV_VIO_GX_CCOMP */
10353 #define NV_VIO_GX_CCOMP 0x000003CF
10354 #define NV_VIO_GX_CCOMP_INDEX 0x00000002
10355 
10356 /* NV-Register NV_PRMVIO_GX_ROP */
10357 #define NV_PRMVIO_GX_ROP 0x000C03CF
10358 #define NV_PRMVIO_GX_ROP_INDEX 0x00000003
10359 
10360 /* NV-Register NV_VIO_GX_ROP */
10361 #define NV_VIO_GX_ROP 0x000003CF
10362 #define NV_VIO_GX_ROP_INDEX 0x00000003
10363 
10364 /* NV-Register NV_PRMVIO_GX_READ_MAP */
10365 #define NV_PRMVIO_GX_READ_MAP 0x000C03CF
10366 #define NV_PRMVIO_GX_READ_MAP_INDEX 0x00000004
10367 
10368 /* NV-Register NV_VIO_GX_READ_MAP */
10369 #define NV_VIO_GX_READ_MAP 0x000003CF
10370 #define NV_VIO_GX_READ_MAP_INDEX 0x00000004
10371 
10372 /* NV-Register NV_PRMVIO_GX_MODE */
10373 #define NV_PRMVIO_GX_MODE 0x000C03CF
10374 #define NV_PRMVIO_GX_MODE_INDEX 0x00000005
10375 
10376 /* NV-Register NV_VIO_GX_MODE */
10377 #define NV_VIO_GX_MODE 0x000003CF
10378 #define NV_VIO_GX_MODE_INDEX 0x00000005
10379 
10380 /* NV-Register NV_PRMVIO_GX_MISC */
10381 #define NV_PRMVIO_GX_MISC 0x000C03CF
10382 #define NV_PRMVIO_GX_MISC_INDEX 0x00000006
10383 
10384 /* NV-Register NV_VIO_GX_MISC */
10385 #define NV_VIO_GX_MISC 0x000003CF
10386 #define NV_VIO_GX_MISC_INDEX 0x00000006
10387 
10388 /* NV-Register NV_PRMVIO_GX_DONT_CARE */
10389 #define NV_PRMVIO_GX_DONT_CARE 0x000C03CF
10390 #define NV_PRMVIO_GX_DONT_CARE_INDEX 0x00000007
10391 
10392 /* NV-Register NV_VIO_GX_DONT_CARE */
10393 #define NV_VIO_GX_DONT_CARE 0x000003CF
10394 #define NV_VIO_GX_DONT_CARE_INDEX 0x00000007
10395 
10396 /* NV-Register NV_PRMVIO_GX_BIT_MASK */
10397 #define NV_PRMVIO_GX_BIT_MASK 0x000C03CF
10398 #define NV_PRMVIO_GX_BIT_MASK_INDEX 0x00000008
10399 
10400 /* NV-Register NV_VIO_GX_BIT_MASK */
10401 #define NV_VIO_GX_BIT_MASK 0x000003CF
10402 #define NV_VIO_GX_BIT_MASK_INDEX 0x00000008
10403 
10404 /* NV-Register NV_PRMCIO_ARX */
10405 #define NV_PRMCIO_ARX 0x006013C0
10406 
10407 /* NV-Register NV_CIO_ARX */
10408 #define NV_CIO_ARX 0x000003C0
10409 
10410 /* NV-Register NV_PRMCIO_AR_PALETTE__WRITE */
10411 #define NV_PRMCIO_AR_PALETTE__WRITE 0x006013C0
10412 
10413 /* NV-Register NV_CIO_AR_PALETTE__WRITE */
10414 #define NV_CIO_AR_PALETTE__WRITE 0x000003C0
10415 
10416 /* NV-Register NV_PRMCIO_AR_PALETTE__READ */
10417 #define NV_PRMCIO_AR_PALETTE__READ 0x006013C1
10418 
10419 /* NV-Register NV_CIO_AR_PALETTE__READ */
10420 #define NV_CIO_AR_PALETTE__READ 0x000003C1
10421 
10422 /* NV-Register NV_PRMCIO_AR_MODE__WRITE */
10423 #define NV_PRMCIO_AR_MODE__WRITE 0x006013C0
10424 
10425 /* NV-Register NV_PRMCIO_AR_MODE__READ */
10426 #define NV_PRMCIO_AR_MODE__READ 0x006013C1
10427 #define NV_PRMCIO_AR_MODE_INDEX 0x00000010
10428 
10429 /* NV-Register NV_CIO_AR_MODE__WRITE */
10430 #define NV_CIO_AR_MODE__WRITE 0x000003C0
10431 
10432 /* NV-Register NV_CIO_AR_MODE__READ */
10433 #define NV_CIO_AR_MODE__READ 0x000003C1
10434 #define NV_CIO_AR_MODE_INDEX 0x00000010
10435 
10436 /* NV-Register NV_PRMCIO_AR_OSCAN__WRITE */
10437 #define NV_PRMCIO_AR_OSCAN__WRITE 0x006013C0
10438 
10439 /* NV-Register NV_PRMCIO_AR_OSCAN__READ */
10440 #define NV_PRMCIO_AR_OSCAN__READ 0x006013C1
10441 #define NV_PRMCIO_AR_OSCAN_INDEX 0x00000011
10442 
10443 /* NV-Register NV_CIO_AR_OSCAN__WRITE */
10444 #define NV_CIO_AR_OSCAN__WRITE 0x000003C0
10445 
10446 /* NV-Register NV_CIO_AR_OSCAN__READ */
10447 #define NV_CIO_AR_OSCAN__READ 0x000003C1
10448 #define NV_CIO_AR_OSCAN_INDEX 0x00000011
10449 
10450 /* NV-Register NV_PRMCIO_AR_PLANE__WRITE */
10451 #define NV_PRMCIO_AR_PLANE__WRITE 0x006013C0
10452 
10453 /* NV-Register NV_PRMCIO_AR_PLANE__READ */
10454 #define NV_PRMCIO_AR_PLANE__READ 0x006013C1
10455 #define NV_PRMCIO_AR_PLANE_INDEX 0x00000012
10456 
10457 /* NV-Register NV_CIO_AR_PLANE__WRITE */
10458 #define NV_CIO_AR_PLANE__WRITE 0x000003C0
10459 
10460 /* NV-Register NV_CIO_AR_PLANE__READ */
10461 #define NV_CIO_AR_PLANE__READ 0x000003C1
10462 #define NV_CIO_AR_PLANE_INDEX 0x00000012
10463 
10464 /* NV-Register NV_PRMCIO_AR_HPP__WRITE */
10465 #define NV_PRMCIO_AR_HPP__WRITE 0x006013C0
10466 
10467 /* NV-Register NV_PRMCIO_AR_HPP__READ */
10468 #define NV_PRMCIO_AR_HPP__READ 0x006013C1
10469 #define NV_PRMCIO_AR_HPP_INDEX 0x00000013
10470 
10471 /* NV-Register NV_CIO_AR_HPP__WRITE */
10472 #define NV_CIO_AR_HPP__WRITE 0x000003C0
10473 
10474 /* NV-Register NV_CIO_AR_HPP__READ */
10475 #define NV_CIO_AR_HPP__READ 0x000003C1
10476 #define NV_CIO_AR_HPP_INDEX 0x00000013
10477 
10478 /* NV-Register NV_PRMCIO_AR_CSEL__WRITE */
10479 #define NV_PRMCIO_AR_CSEL__WRITE 0x006013C0
10480 
10481 /* NV-Register NV_PRMCIO_AR_CSEL__READ */
10482 #define NV_PRMCIO_AR_CSEL__READ 0x006013C1
10483 #define NV_PRMCIO_AR_CSEL_INDEX 0x00000014
10484 
10485 /* NV-Register NV_CIO_AR_CSEL__WRITE */
10486 #define NV_CIO_AR_CSEL__WRITE 0x000003C0
10487 
10488 /* NV-Register NV_CIO_AR_CSEL__READ */
10489 #define NV_CIO_AR_CSEL__READ 0x000003C1
10490 #define NV_CIO_AR_CSEL_INDEX 0x00000014
10491 
10492 /* NV-Register NV_PRMCIO_CRX__MONO */
10493 #define NV_PRMCIO_CRX__MONO 0x006013B4
10494 
10495 /* NV-Register NV_PRMCIO_CRX__COLOR */
10496 #define NV_PRMCIO_CRX__COLOR 0x006013D4
10497 
10498 /* NV-Register NV_CIO_CRX__MONO */
10499 #define NV_CIO_CRX__MONO 0x000003B4
10500 
10501 /* NV-Register NV_CIO_CRX__COLOR */
10502 #define NV_CIO_CRX__COLOR 0x000003D4
10503 
10504 /* NV-Register NV_PRMCIO_CR__MONO */
10505 #define NV_PRMCIO_CR__MONO 0x006013B5
10506 
10507 /* NV-Register NV_PRMCIO_CR__COLOR */
10508 #define NV_PRMCIO_CR__COLOR 0x006013D5
10509 
10510 /* NV-Register NV_CIO_CR__MONO */
10511 #define NV_CIO_CR__MONO 0x000003B5
10512 
10513 /* NV-Register NV_CIO_CR__COLOR */
10514 #define NV_CIO_CR__COLOR 0x000003D5
10515 #define NV_CIO_CR_HDT_INDEX 0x00000000
10516 #define NV_CIO_CR_HDE_INDEX 0x00000001
10517 #define NV_CIO_CR_HBS_INDEX 0x00000002
10518 #define NV_CIO_CR_HBE_INDEX 0x00000003
10519 #define NV_CIO_CR_HBE_4_0 0x0000001F
10520 #define NV_CIO_CR_HRS_INDEX 0x00000004
10521 #define NV_CIO_CR_HRE_INDEX 0x00000005
10522 #define NV_CIO_CR_HRE_HBE_5 0x00000080
10523 #define NV_CIO_CR_HRE_4_0 0x0000001F
10524 #define NV_CIO_CR_VDT_INDEX 0x00000006
10525 #define NV_CIO_CR_OVL_INDEX 0x00000007
10526 #define NV_CIO_CR_OVL_VDE_8 0x00000002
10527 #define NV_CIO_CR_OVL_VDE_9 0x00000040
10528 #define NV_CIO_CR_OVL_VDT_8 0x00000001
10529 #define NV_CIO_CR_OVL_VDT_9 0x00000020
10530 #define NV_CIO_CR_OVL_VBS_8 0x00000008
10531 #define NV_CIO_CR_OVL_VRS_8 0x00000004
10532 #define NV_CIO_CR_OVL_VRS_9 0x00000080
10533 #define NV_CIO_CR_RSAL_INDEX 0x00000400
10534 #define NV_CIO_CR_RSAL_PANNING 0x00000060
10535 #define NV_CIO_CR_CELL_HT_INDEX 0x00000120
10536 #define NV_CIO_CR_CELL_HT_SCANDBL 0x00000080
10537 #define NV_CIO_CR_CELL_HT_VBS_9 0x00000020
10538 #define NV_CIO_CR_CURS_ST_INDEX 0x00000140
10539 #define NV_CIO_CR_CURS_END_INDEX 0x00000160
10540 #define NV_CIO_CR_SA_HI_INDEX 0x00000180
10541 #define NV_CIO_CR_SA_LO_INDEX 0x000001A0
10542 #define NV_CIO_CR_TCOFF_HI_INDEX 0x000001C0
10543 #define NV_CIO_CR_TCOFF_LO_INDEX 0x000001E0
10544 #define NV_CIO_CR_VRS_INDEX 0x00000200
10545 #define NV_CIO_CR_VRE_INDEX 0x00000220
10546 #define NV_CIO_CR_VRE_3_0 0x0000000F
10547 #define NV_CIO_CR_VDE_INDEX 0x00000012
10548 #define NV_CIO_CR_OFFSET_INDEX 0x00000013
10549 #define NV_CIO_CR_ULINE_INDEX 0x00000014
10550 #define NV_CIO_CR_VBS_INDEX 0x00000015
10551 #define NV_CIO_CR_VBE_INDEX 0x00000016
10552 #define NV_CIO_CR_MODE_INDEX 0x00000017
10553 #define NV_CIO_CR_LCOMP_INDEX 0x00000018
10554 #define NV_CIO_CR_GDATA_INDEX 0x00000022
10555 #define NV_CIO_CR_ARFF_INDEX 0x00000024
10556 #define NV_CIO_CR_ARX_INDEX 0x00000026
10557 
10558 /* NV-Register NV_PRMCIO_CRE__MONO */
10559 #define NV_PRMCIO_CRE__MONO 0x006013B5
10560 
10561 /* NV-Register NV_PRMCIO_CRE__COLOR */
10562 #define NV_PRMCIO_CRE__COLOR 0x006013D5
10563 
10564 /* NV-Register NV_CIO_CRE__MONO */
10565 #define NV_CIO_CRE__MONO 0x000003B5
10566 
10567 /* NV-Register NV_CIO_CRE__COLOR */
10568 #define NV_CIO_CRE__COLOR 0x000003D5
10569 #define NV_CIO_CRE_RPC0_INDEX 0x00000019
10570 #define NV_CIO_CRE_RPC0_START 0x0000001F
10571 #define NV_CIO_CRE_RPC0_OFFSET_10_8 0x000000E0
10572 #define NV_CIO_CRE_RPC1_INDEX 0x00000340
10573 #define NV_CIO_CRE_RPC1_LARGE 0x00000004
10574 #define NV_CIO_CRE_FF_INDEX 0x0000006C
10575 #define NV_CIO_CRE_FF_BURST 0x00000007
10576 #define NV_CIO_CRE_FF_BURST_32 0x00000000
10577 #define NV_CIO_CRE_FF_BURST_64 0x00000001
10578 #define NV_CIO_CRE_FF_BURST_128 0x00000002
10579 #define NV_CIO_CRE_FF_BURST_256 0x00000003
10580 #define NV_CIO_CRE_FF_BURST_512 0x00000004
10581 #define NV_CIO_CRE_FF_BURST_1024 0x00000005
10582 #define NV_CIO_CRE_ENH_INDEX 0x0000001C
10583 #define NV_CIO_CRE_PAGE0_INDEX 0x0000001D
10584 #define NV_CIO_CRE_PAGE1_INDEX 0x0000001E
10585 #define NV_CIO_SR_LOCK_INDEX 0x0000001F
10586 #define NV_CIO_SR_UNLOCK_RW_VALUE 0x00000057
10587 #define NV_CIO_SR_UNLOCK_RO_VALUE 0x00000075
10588 #define NV_CIO_SR_LOCK_VALUE 0x00000099
10589 #define NV_CIO_CRE_FFLWM__INDEX 0x00000020
10590 #define NV_CIO_CRE_FFLWM_LWM 0x000000FF
10591 #define NV_CIO_CRE_FABID_INDEX 0x00000025
10592 #define NV_CIO_CRE_LSR_INDEX 0x00000025
10593 #define NV_CIO_CRE_LSR_SA_27 0x00000080
10594 #define NV_CIO_CRE_LSR_SA_26 0x00000040
10595 #define NV_CIO_CRE_LSR_VDE_10 0x00000002
10596 #define NV_CIO_CRE_LSR_VDT_10 0x00000001
10597 #define NV_CIO_CRE_LSR_HBE_6 0x00000010
10598 #define NV_CIO_CRE_LSR_VBS_10 0x00000008
10599 #define NV_CIO_CRE_LSR_VRS_10 0x00000004
10600 #define NV_CIO_CRE_CHIP_ID_INDEX 0x0000009C
10601 #define NV_CIO_CRE_PIXEL_INDEX 0x000000A0
10602 #define NV_CIO_CRE_PIXEL_TV_ADJ 0x00000038
10603 #define NV_CIO_CRE_PIXEL_FORMAT 0x00000003
10604 #define NV_CIO_CRE_PIXEL_FORMAT_VGA 0x00000000
10605 #define NV_CIO_CRE_PIXEL_FORMAT_8BPP 0x00000001
10606 #define NV_CIO_CRE_PIXEL_FORMAT_16BPP 0x00000002
10607 #define NV_CIO_CRE_PIXEL_FORMAT_32BPP 0x00000003
10608 #define NV_CIO_CRE_PAGE_OVFL__INDEX 0x00000029
10609 #define NV_CIO_CRE_OSCOL__INDEX 0x0000002A
10610 #define NV_CIO_CRE_SCRATCH0__INDEX 0x0000002B
10611 #define NV_CIO_CRE_SCRATCH1__INDEX 0x0000002C
10612 #define NV_CIO_CRE_HEB__INDEX 0x0000002D
10613 #define NV_CIO_CRE_HEB_SA_25 0x00000080
10614 #define NV_CIO_CRE_HEB_SA_24 0x00000040
10615 #define NV_CIO_CRE_HEB_SA_23 0x00000020
10616 #define NV_CIO_CRE_HEB_ILC_8 0x00000010
10617 #define NV_CIO_CRE_HEB_HRS_8 0x00000008
10618 #define NV_CIO_CRE_HEB_HBS_8 0x00000004
10619 #define NV_CIO_CRE_HEB_HDE_8 0x00000002
10620 #define NV_CIO_CRE_HEB_HDT_8 0x00000001
10621 #define NV_CIO_CRE_HCUR_ADDR2_INDEX 0x0000002F
10622 #define NV_CIO_CRE_HCUR_ADDR2_ADR 0x000000FF
10623 #define NV_CIO_CRE_HCUR_ADDR0_INDEX 0x00000030
10624 #define NV_CIO_CRE_HCUR_ASI 0x00000080
10625 #define NV_CIO_CRE_HCUR_ADDR0_ADR 0x0000007F
10626 #define NV_CIO_CRE_HCUR_ADDR1_INDEX 0x00000031
10627 #define NV_CIO_CRE_HCUR_ADDR1_ADR 0x000000FC
10628 #define NV_CIO_CRE_HCUR_ADDR1_CUR_DBL 0x00000002
10629 #define NV_CIO_CRE_HCUR_ADDR1_ENABLE 0x00000001
10630 #define NV_CIO_CRE_VID_END0__INDEX 0x00000032
10631 #define NV_CIO_CRE_LCD__INDEX 0x00000033
10632 #define NV_CIO_CRE_LCD_LCD_SELECT 0x00000001
10633 #define NV_CIO_CRE_LCD_STEREO_ENABLE 0x00000080
10634 #define NV_CIO_GPIO0__INDEX 0x00001A00
10635 #define NV_CIO_GPIO1__INDEX 0x00001A80
10636 #define NV_CIO_CRE_DDC0_STATUS__INDEX 0x00001B00
10637 #define NV_CIO_CRE_DDC0_WR__INDEX 0x00001B80
10638 #define NV_CIO_CRE_RMA__INDEX 0x00001C00
10639 #define NV_CIO_CRE_ILACE__INDEX 0x00001C80
10640 #define NV_CIO_CRE_SCRATCH2__INDEX 0x00001D00
10641 #define NV_CIO_CRE_SCRATCH3__INDEX 0x00001D80
10642 #define NV_CIO_CRE_SCRATCH4__INDEX 0x00001E00
10643 #define NV_CIO_CRE_TREG__INDEX 0x00001E80
10644 #define NV_CIO_CRE_TREG_HCNT 0x00000040
10645 #define NV_CIO_CRE_TREG_VCNT 0x00000010
10646 #define NV_CIO_CRE_TREG_SHADOW 0x00000001
10647 #define NV_CIO_CRE_TREG_HCNT_INDEX 0xFFFFFFFE
10648 #define NV_CIO_CRE_TREG_VCNTA_INDEX 0x00000006
10649 #define NV_CIO_CRE_TREG_VCNTB_INDEX 0x00000007
10650 #define NV_CIO_CRE_DDC_STATUS__INDEX 0x0000003E
10651 #define NV_CIO_CRE_DDC_WR__INDEX 0x0000003F
10652 #define NV_CIO_CRE_PCI_TO__INDEX 0x00000040
10653 #define NV_CIO_CRE_PCI_TO_DELAY 0x000000FF
10654 #define NV_CIO_CRE_EBR_INDEX 0x00000041
10655 #define NV_CIO_CRE_EBR_VBS_11 0x00000040
10656 #define NV_CIO_CRE_EBR_VRS_11 0x00000010
10657 #define NV_CIO_CRE_EBR_VDE_11 0x00000004
10658 #define NV_CIO_CRE_EBR_VDT_11 0x00000001
10659 #define NV_CIO_CRE_USA_INDEX 0x00000042
10660 #define NV_CIO_CRE_USA_SA__31 0x00000008
10661 #define NV_CIO_CRE_USA_SA__30 0x00000004
10662 #define NV_CIO_CRE_USA_SA__29 0x00000002
10663 #define NV_CIO_CRE_USA_SA__28 0x00000001
10664 #define NV_CIO_CRE_MBI 0x00000043
10665 #define NV_CIO_CRE_MBI_EN 0x00000001
10666 #define NV_CIO_CRE_MBI_EN_ENABLE 0x00000001
10667 #define NV_CIO_CRE_MBI_EN_DISABLE 0xFFFFFFFE
10668 #define NV_CIO_CRE_CSB 0x00000045
10669 #define NV_CIO_CRE_CSB_VAL 0x00000003
10670 #define NV_CIO_CRE_CSB_VAL_NONE 0x00000000
10671 #define NV_CIO_CRE_CSB_VAL_3BY16 0x00000001
10672 #define NV_CIO_CRE_CSB_VAL_3BY08 0x00000002
10673 #define NV_CIO_CRE_CSB_VAL_3BY04 0x00000003
10674 #define NV_CIO_CRE_RCR 0x00000046
10675 #define NV_CIO_CRE_RCR_RNDM_REQ 0x00000003
10676 #define NV_CIO_CRE_RCR_RNDM_REQ_NONE 0x00000000
10677 #define NV_CIO_CRE_RCR_RNDM_REQ_08 0x00000001
10678 #define NV_CIO_CRE_RCR_RNDM_REQ_16 0x00000002
10679 #define NV_CIO_CRE_RCR_RNDM_REQ_32 0x00000003
10680 #define NV_CIO_CRE_RCR_ENDIAN 0x00000080
10681 #define NV_CIO_CRE_RCR_ENDIAN_LITTLE 0xFFFFFF7F
10682 #define NV_CIO_CRE_RCR_ENDIAN_BIG 0x00000080
10683 
10684 /* NV-Device NV_PVIDEO */
10685 #define NV_PVIDEO 0x00008000 /* size: 0x00000FFF */
10686 
10687 /* NV-Register NV_PVIDEO_DEBUG_0 */
10688 #define NV_PVIDEO_DEBUG_0 0x00008080
10689 #define NV_PVIDEO_DEBUG_0_HLF_RATE_ROW_RD 0x00000001
10690 #define NV_PVIDEO_DEBUG_0_HLF_RATE_ROW_RD_DISABLED 0xFFFFFFFE
10691 #define NV_PVIDEO_DEBUG_0_HLF_RATE_ROW_RD_ENABLED 0x00000001
10692 #define NV_PVIDEO_DEBUG_0_LIMIT_CHECK 0x00000010
10693 #define NV_PVIDEO_DEBUG_0_LIMIT_CHECK_DISABLED 0xFFFFFFEF
10694 #define NV_PVIDEO_DEBUG_0_LIMIT_CHECK_ENABLED 0x00000010
10695 #define NV_PVIDEO_DEBUG_0_HUE_FOLD 0x00000100
10696 #define NV_PVIDEO_DEBUG_0_HUE_FOLD_DISABLED 0xFFFFFEFF
10697 #define NV_PVIDEO_DEBUG_0_HUE_FOLD_ENABLED 0x00000100
10698 
10699 /* NV-Register NV_PVIDEO_DEBUG_1 */
10700 #define NV_PVIDEO_DEBUG_1 0x00008084
10701 #define NV_PVIDEO_DEBUG_1_REQ_DELAY 0x000007FF
10702 #define NV_PVIDEO_DEBUG_1_REQ_DELAY_DEFAULT 0x00000064
10703 #define NV_PVIDEO_DEBUG_1_REQ_DELAY_INIT 0x00000050
10704 
10705 /* NV-Register NV_PVIDEO_DEBUG_2 */
10706 #define NV_PVIDEO_DEBUG_2 0x00008088
10707 #define NV_PVIDEO_DEBUG_2_BURST1 0x000007E0
10708 #define NV_PVIDEO_DEBUG_2_BURST1_DEFAULT 0x00000100
10709 #define NV_PVIDEO_DEBUG_2_BURST1_INIT 0x00000200
10710 #define NV_PVIDEO_DEBUG_2_BURST2 0x07E00000
10711 #define NV_PVIDEO_DEBUG_2_BURST2_DEFAULT 0x02000000
10712 
10713 /* NV-Register NV_PVIDEO_DEBUG_3 */
10714 #define NV_PVIDEO_DEBUG_3 0x0000808C
10715 #define NV_PVIDEO_DEBUG_3_WATER_MARK1 0x000007F0
10716 #define NV_PVIDEO_DEBUG_3_WATER_MARK1_DEFAULT 0x000004B0
10717 #define NV_PVIDEO_DEBUG_3_WATER_MARK1_INIT 0x00000400
10718 #define NV_PVIDEO_DEBUG_3_WATER_MARK2 0x07F00000
10719 #define NV_PVIDEO_DEBUG_3_WATER_MARK2_DEFAULT 0x03B00000
10720 #define NV_PVIDEO_DEBUG_3_WATER_MARK2_INIT 0x04000000
10721 
10722 /* NV-Register NV_PVIDEO_DEBUG_4 */
10723 #define NV_PVIDEO_DEBUG_4 0x00008090
10724 #define NV_PVIDEO_DEBUG_4_V_COEFF_B 0x00FFFFE0
10725 #define NV_PVIDEO_DEBUG_4_V_COEFF_B_DEFAULT 0x0016A0A0
10726 #define NV_PVIDEO_DEBUG_4_V_COEFF_B_ALWAYS 0x00000000
10727 #define NV_PVIDEO_DEBUG_4_V_COEFF_B_NEVER 0x00FFFFE0
10728 
10729 /* NV-Register NV_PVIDEO_DEBUG_5 */
10730 #define NV_PVIDEO_DEBUG_5 0x00008094
10731 #define NV_PVIDEO_DEBUG_5_H_L_COEFF_D 0x003FFFF0
10732 #define NV_PVIDEO_DEBUG_5_H_L_COEFF_D_DEFAULT 0x00188160
10733 #define NV_PVIDEO_DEBUG_5_H_L_COEFF_D_ALWAYS 0x00000000
10734 #define NV_PVIDEO_DEBUG_5_H_L_COEFF_D_NEVER 0x003FFFF0
10735 
10736 /* NV-Register NV_PVIDEO_DEBUG_6 */
10737 #define NV_PVIDEO_DEBUG_6 0x00008098
10738 #define NV_PVIDEO_DEBUG_6_H_L_COEFF_C 0x003FFFF0
10739 #define NV_PVIDEO_DEBUG_6_H_L_COEFF_C_DEFAULT 0x0012C730
10740 #define NV_PVIDEO_DEBUG_6_H_L_COEFF_C_ALWAYS 0x00000000
10741 #define NV_PVIDEO_DEBUG_6_H_L_COEFF_C_NEVER 0x003FFFF0
10742 
10743 /* NV-Register NV_PVIDEO_DEBUG_7 */
10744 #define NV_PVIDEO_DEBUG_7 0x0000809C
10745 #define NV_PVIDEO_DEBUG_7_H_L_COEFF_B 0x003FFFF0
10746 #define NV_PVIDEO_DEBUG_7_H_L_COEFF_B_DEFAULT 0x00000000
10747 #define NV_PVIDEO_DEBUG_7_H_L_COEFF_B_ALWAYS 0x00000000
10748 #define NV_PVIDEO_DEBUG_7_H_L_COEFF_B_NEVER 0x003FFFF0
10749 
10750 /* NV-Register NV_PVIDEO_DEBUG_8 */
10751 #define NV_PVIDEO_DEBUG_8 0x000080A0
10752 #define NV_PVIDEO_DEBUG_8_PIPE_FILL 0x000007F0
10753 #define NV_PVIDEO_DEBUG_8_PIPE_FILL_DEFAULT 0x000000B0
10754 
10755 /* NV-Register NV_PVIDEO_DEBUG_9 */
10756 #define NV_PVIDEO_DEBUG_9 0x000080A4
10757 #define NV_PVIDEO_DEBUG_9_FIFO_A_UNDERFLOW 0x00000001
10758 #define NV_PVIDEO_DEBUG_9_FIFO_A_UNDERFLOW_FALSE 0xFFFFFFFE
10759 #define NV_PVIDEO_DEBUG_9_FIFO_A_UNDERFLOW_TRUE 0x00000001
10760 #define NV_PVIDEO_DEBUG_9_FIFO_A_UNDERFLOW_RESET 0x00000001
10761 #define NV_PVIDEO_DEBUG_9_FIFO_A_OVERFLOW 0x00000010
10762 #define NV_PVIDEO_DEBUG_9_FIFO_A_OVERFLOW_FALSE 0xFFFFFFEF
10763 #define NV_PVIDEO_DEBUG_9_FIFO_A_OVERFLOW_TRUE 0x00000010
10764 #define NV_PVIDEO_DEBUG_9_FIFO_A_OVERFLOW_RESET 0x00000010
10765 #define NV_PVIDEO_DEBUG_9_FIFO_B_UNDERFLOW 0x00000100
10766 #define NV_PVIDEO_DEBUG_9_FIFO_B_UNDERFLOW_FALSE 0xFFFFFEFF
10767 #define NV_PVIDEO_DEBUG_9_FIFO_B_UNDERFLOW_TRUE 0x00000100
10768 #define NV_PVIDEO_DEBUG_9_FIFO_B_UNDERFLOW_RESET 0x00000100
10769 #define NV_PVIDEO_DEBUG_9_FIFO_B_OVERFLOW 0x00001000
10770 #define NV_PVIDEO_DEBUG_9_FIFO_B_OVERFLOW_FALSE 0xFFFFEFFF
10771 #define NV_PVIDEO_DEBUG_9_FIFO_B_OVERFLOW_TRUE 0x00001000
10772 #define NV_PVIDEO_DEBUG_9_FIFO_B_OVERFLOW_RESET 0x00001000
10773 
10774 /* NV-Register NV_PVIDEO_DEBUG_10 */
10775 #define NV_PVIDEO_DEBUG_10 0x000080A8
10776 #define NV_PVIDEO_DEBUG_10_SCREEN_LINE 0x00001FFF
10777 #define NV_PVIDEO_DEBUG_10_SCREEN_LINE_FIRST 0x00000000
10778 #define NV_PVIDEO_DEBUG_10_SCAN_COUNT 0x001F0000
10779 #define NV_PVIDEO_DEBUG_10_SCAN_COUNT_FIRST 0x00000000
10780 #define NV_PVIDEO_DEBUG_10_SCAN_COUNT_OVERFLOW 0x00100000
10781 #define NV_PVIDEO_DEBUG_10_SCANNING 0x03000000
10782 #define NV_PVIDEO_DEBUG_10_SCANNING_NEITHER 0x00000000
10783 #define NV_PVIDEO_DEBUG_10_SCANNING_BUFFER_0 0x02000000
10784 #define NV_PVIDEO_DEBUG_10_SCANNING_BUFFER_1 0x03000000
10785 
10786 /* NV-Register NV_PVIDEO_INTR */
10787 #define NV_PVIDEO_INTR 0x00008100
10788 #define NV_PVIDEO_INTR_BUFFER_0 0x00000001
10789 #define NV_PVIDEO_INTR_BUFFER_0_NOT_PENDING 0xFFFFFFFE
10790 #define NV_PVIDEO_INTR_BUFFER_0_PENDING 0x00000001
10791 #define NV_PVIDEO_INTR_BUFFER_0_RESET 0x00000001
10792 #define NV_PVIDEO_INTR_BUFFER_1 0x00000010
10793 #define NV_PVIDEO_INTR_BUFFER_1_NOT_PENDING 0xFFFFFFEF
10794 #define NV_PVIDEO_INTR_BUFFER_1_PENDING 0x00000010
10795 #define NV_PVIDEO_INTR_BUFFER_1_RESET 0x00000010
10796 
10797 /* NV-Register NV_PVIDEO_INTR_REASON */
10798 #define NV_PVIDEO_INTR_REASON 0x00008104
10799 #define NV_PVIDEO_INTR_REASON_BUFFER_0 0x00000001
10800 #define NV_PVIDEO_INTR_REASON_BUFFER_0_NOTIFICATION 0xFFFFFFFE
10801 #define NV_PVIDEO_INTR_REASON_BUFFER_0_PROTECTION_FAULT 0x00000001
10802 #define NV_PVIDEO_INTR_REASON_BUFFER_1 0x00000010
10803 #define NV_PVIDEO_INTR_REASON_BUFFER_1_NOTIFICATION 0xFFFFFFEF
10804 #define NV_PVIDEO_INTR_REASON_BUFFER_1_PROTECTION_FAULT 0x00000010
10805 
10806 /* NV-Register NV_PVIDEO_INTR_EN */
10807 #define NV_PVIDEO_INTR_EN 0x00008140
10808 #define NV_PVIDEO_INTR_EN_BUFFER_0 0x00000001
10809 #define NV_PVIDEO_INTR_EN_BUFFER_0_DISABLED 0xFFFFFFFE
10810 #define NV_PVIDEO_INTR_EN_BUFFER_0_ENABLED 0x00000001
10811 #define NV_PVIDEO_INTR_EN_BUFFER_1 0x00000010
10812 #define NV_PVIDEO_INTR_EN_BUFFER_1_DISABLED 0xFFFFFFEF
10813 #define NV_PVIDEO_INTR_EN_BUFFER_1_ENABLED 0x00000010
10814 
10815 /* NV-Register NV_PVIDEO_BUFFER */
10816 #define NV_PVIDEO_BUFFER 0x00008700
10817 #define NV_PVIDEO_BUFFER_0_USE 0x00000001
10818 #define NV_PVIDEO_BUFFER_0_USE_NOT_PENDING 0xFFFFFFFE
10819 #define NV_PVIDEO_BUFFER_0_USE_PENDING 0x00000001
10820 #define NV_PVIDEO_BUFFER_0_USE_SET 0x00000001
10821 #define NV_PVIDEO_BUFFER_1_USE 0x00000010
10822 #define NV_PVIDEO_BUFFER_1_USE_NOT_PENDING 0xFFFFFFEF
10823 #define NV_PVIDEO_BUFFER_1_USE_PENDING 0x00000010
10824 #define NV_PVIDEO_BUFFER_1_USE_SET 0x00000010
10825 
10826 /* NV-Register NV_PVIDEO_STOP */
10827 #define NV_PVIDEO_STOP 0x00008704
10828 #define NV_PVIDEO_STOP_OVERLAY 0x00000001
10829 #define NV_PVIDEO_STOP_OVERLAY_INACTIVE 0xFFFFFFFE
10830 #define NV_PVIDEO_STOP_OVERLAY_ACTIVE 0x00000001
10831 #define NV_PVIDEO_STOP_METHOD 0x00000010
10832 #define NV_PVIDEO_STOP_METHOD_IMMEDIATELY 0xFFFFFFEF
10833 #define NV_PVIDEO_STOP_METHOD_NORMALLY 0x00000010
10834 
10835 /* NV-Array NV_PVIDEO_BASE (4 byte access) */
10836 #define NV_PVIDEO_BASE 0x00008900
10837 /* NV-Array size NV_PVIDEO_BASE__SIZE_1 [0..1] */
10838 #define NV_PVIDEO_BASE__SIZE_1 0x00000002
10839 #define NV_PVIDEO_BASE_VALUE 0x07FFFFC0
10840 
10841 /* NV-Array NV_PVIDEO_LIMIT (4 byte access) */
10842 #define NV_PVIDEO_LIMIT 0x00008908
10843 /* NV-Array size NV_PVIDEO_LIMIT__SIZE_1 [0..1] */
10844 #define NV_PVIDEO_LIMIT__SIZE_1 0x00000002
10845 #define NV_PVIDEO_LIMIT_VALUE 0x07FFFFC0
10846 #define NV_PVIDEO_LIMIT_VALUE_MAX 0x07FFFFC0
10847 
10848 /* NV-Array NV_PVIDEO_LUMINANCE (4 byte access) */
10849 #define NV_PVIDEO_LUMINANCE 0x00008910
10850 /* NV-Array size NV_PVIDEO_LUMINANCE__SIZE_1 [0..1] */
10851 #define NV_PVIDEO_LUMINANCE__SIZE_1 0x00000002
10852 #define NV_PVIDEO_LUMINANCE_CONTRAST 0x00001FF8
10853 #define NV_PVIDEO_LUMINANCE_CONTRAST_47 0x00001000
10854 #define NV_PVIDEO_LUMINANCE_CONTRAST_83 0x00001000
10855 #define NV_PVIDEO_LUMINANCE_CONTRAST_UNITY 0x00001000
10856 #define NV_PVIDEO_LUMINANCE_BRIGHTNESS 0x03FF0000
10857 #define NV_PVIDEO_LUMINANCE_BRIGHTNESS_47 0x00000000
10858 #define NV_PVIDEO_LUMINANCE_BRIGHTNESS_83 0x00000000
10859 #define NV_PVIDEO_LUMINANCE_BRIGHTNESS_UNITY 0x00000000
10860 
10861 /* NV-Array NV_PVIDEO_CHROMINANCE (4 byte access) */
10862 #define NV_PVIDEO_CHROMINANCE 0x00008918
10863 /* NV-Array size NV_PVIDEO_CHROMINANCE__SIZE_1 [0..1] */
10864 #define NV_PVIDEO_CHROMINANCE__SIZE_1 0x00000002
10865 #define NV_PVIDEO_CHROMINANCE_SAT_COS 0x00003FFC
10866 #define NV_PVIDEO_CHROMINANCE_SAT_COS_47 0x00001000
10867 #define NV_PVIDEO_CHROMINANCE_SAT_COS_83 0x00001000
10868 #define NV_PVIDEO_CHROMINANCE_SAT_COS_UNITY 0x00001000
10869 #define NV_PVIDEO_CHROMINANCE_SAT_SIN 0x3FFC0000
10870 #define NV_PVIDEO_CHROMINANCE_SAT_SIN_47 0x00000000
10871 #define NV_PVIDEO_CHROMINANCE_SAT_SIN_83 0x00000000
10872 #define NV_PVIDEO_CHROMINANCE_SAT_SIN_UNITY 0x00000000
10873 
10874 /* NV-Array NV_PVIDEO_OFFSET (4 byte access) */
10875 #define NV_PVIDEO_OFFSET 0x00008920
10876 /* NV-Array size NV_PVIDEO_OFFSET__SIZE_1 [0..1] */
10877 #define NV_PVIDEO_OFFSET__SIZE_1 0x00000002
10878 #define NV_PVIDEO_OFFSET_VALUE 0xFFFFFFC0
10879 #define NV_PVIDEO_OFFSET_VALUE_47 0x00000000
10880 #define NV_PVIDEO_OFFSET_VALUE_83 0x00000000
10881 #define NV_PVIDEO_OFFSET_VALUE_ZERO 0x00000000
10882 
10883 /* NV-Array NV_PVIDEO_SIZE_IN (4 byte access) */
10884 #define NV_PVIDEO_SIZE_IN 0x00008928
10885 /* NV-Array size NV_PVIDEO_SIZE_IN__SIZE_1 [0..1] */
10886 #define NV_PVIDEO_SIZE_IN__SIZE_1 0x00000002
10887 #define NV_PVIDEO_SIZE_IN_WIDTH 0x000007FE
10888 #define NV_PVIDEO_SIZE_IN_WIDTH_47 0x00000002
10889 #define NV_PVIDEO_SIZE_IN_WIDTH_83 0x00000002
10890 #define NV_PVIDEO_SIZE_IN_HEIGHT 0x07FF0000
10891 #define NV_PVIDEO_SIZE_IN_HEIGHT_47 0x00020000
10892 #define NV_PVIDEO_SIZE_IN_HEIGHT_83 0x00020000
10893 
10894 /* NV-Array NV_PVIDEO_POINT_IN (4 byte access) */
10895 #define NV_PVIDEO_POINT_IN 0x00008930
10896 /* NV-Array size NV_PVIDEO_POINT_IN__SIZE_1 [0..1] */
10897 #define NV_PVIDEO_POINT_IN__SIZE_1 0x00000002
10898 #define NV_PVIDEO_POINT_IN_S 0x00007FFF
10899 #define NV_PVIDEO_POINT_IN_S_47 0x00000000
10900 #define NV_PVIDEO_POINT_IN_S_83 0x00000000
10901 #define NV_PVIDEO_POINT_IN_S_ORIGIN 0x00000000
10902 #define NV_PVIDEO_POINT_IN_T 0xFFFE0000
10903 #define NV_PVIDEO_POINT_IN_T_47 0x00000000
10904 #define NV_PVIDEO_POINT_IN_T_83 0x00000000
10905 #define NV_PVIDEO_POINT_IN_T_ORIGIN 0x00000000
10906 
10907 /* NV-Array NV_PVIDEO_DS_DX (4 byte access) */
10908 #define NV_PVIDEO_DS_DX 0x00008938
10909 /* NV-Array size NV_PVIDEO_DS_DX__SIZE_1 [0..1] */
10910 #define NV_PVIDEO_DS_DX__SIZE_1 0x00000002
10911 #define NV_PVIDEO_DS_DX_RATIO 0x00FFFFF8
10912 #define NV_PVIDEO_DS_DX_RATIO_47 0x00000000
10913 #define NV_PVIDEO_DS_DX_RATIO_83 0x00000000
10914 #define NV_PVIDEO_DS_DX_RATIO_UNITY 0x00100000
10915 
10916 /* NV-Array NV_PVIDEO_DT_DY (4 byte access) */
10917 #define NV_PVIDEO_DT_DY 0x00008940
10918 /* NV-Array size NV_PVIDEO_DT_DY__SIZE_1 [0..1] */
10919 #define NV_PVIDEO_DT_DY__SIZE_1 0x00000002
10920 #define NV_PVIDEO_DT_DY_RATIO 0x00FFFFF0
10921 #define NV_PVIDEO_DT_DY_RATIO_47 0x00000000
10922 #define NV_PVIDEO_DT_DY_RATIO_83 0x00000000
10923 #define NV_PVIDEO_DT_DY_RATIO_UNITY 0x00100000
10924 
10925 /* NV-Array NV_PVIDEO_POINT_OUT (4 byte access) */
10926 #define NV_PVIDEO_POINT_OUT 0x00008948
10927 /* NV-Array size NV_PVIDEO_POINT_OUT__SIZE_1 [0..1] */
10928 #define NV_PVIDEO_POINT_OUT__SIZE_1 0x00000002
10929 #define NV_PVIDEO_POINT_OUT_X 0x00000FFF
10930 #define NV_PVIDEO_POINT_OUT_X_47 0x00000000
10931 #define NV_PVIDEO_POINT_OUT_X_83 0x00000000
10932 #define NV_PVIDEO_POINT_OUT_X_ORIGIN 0x00000000
10933 #define NV_PVIDEO_POINT_OUT_Y 0x0FFF0000
10934 #define NV_PVIDEO_POINT_OUT_Y_47 0x00000000
10935 #define NV_PVIDEO_POINT_OUT_Y_83 0x00000000
10936 #define NV_PVIDEO_POINT_OUT_Y_ORIGIN 0x00000000
10937 
10938 /* NV-Array NV_PVIDEO_SIZE_OUT (4 byte access) */
10939 #define NV_PVIDEO_SIZE_OUT 0x00008950
10940 /* NV-Array size NV_PVIDEO_SIZE_OUT__SIZE_1 [0..1] */
10941 #define NV_PVIDEO_SIZE_OUT__SIZE_1 0x00000002
10942 #define NV_PVIDEO_SIZE_OUT_WIDTH 0x00000FFF
10943 #define NV_PVIDEO_SIZE_OUT_WIDTH_47 0x00000000
10944 #define NV_PVIDEO_SIZE_OUT_WIDTH_83 0x00000000
10945 #define NV_PVIDEO_SIZE_OUT_HEIGHT 0x0FFF0000
10946 #define NV_PVIDEO_SIZE_OUT_HEIGHT_47 0x00000000
10947 #define NV_PVIDEO_SIZE_OUT_HEIGHT_83 0x00000000
10948 
10949 /* NV-Array NV_PVIDEO_FORMAT (4 byte access) */
10950 #define NV_PVIDEO_FORMAT 0x00008958
10951 /* NV-Array size NV_PVIDEO_FORMAT__SIZE_1 [0..1] */
10952 #define NV_PVIDEO_FORMAT__SIZE_1 0x00000002
10953 #define NV_PVIDEO_FORMAT_PITCH 0x00001FC0
10954 #define NV_PVIDEO_FORMAT_PITCH_47 0x00000000
10955 #define NV_PVIDEO_FORMAT_PITCH_83 0x00000000
10956 #define NV_PVIDEO_FORMAT_COLOR 0x00030000
10957 #define NV_PVIDEO_FORMAT_COLOR_47 0x00000000
10958 #define NV_PVIDEO_FORMAT_COLOR_83 0x00000000
10959 #define NV_PVIDEO_FORMAT_COLOR_LE_YB8CR8YA8CB8 0x00000000
10960 #define NV_PVIDEO_FORMAT_COLOR_LE_CR8YB8CB8YA8 0x00010000
10961 #define NV_PVIDEO_FORMAT_COLOR_LE_ECR8EYB8ECB8EYA8 0x00110000
10962 #define NV_PVIDEO_FORMAT_DISPLAY 0x00100000
10963 #define NV_PVIDEO_FORMAT_DISPLAY_47 0xFFEFFFFF
10964 #define NV_PVIDEO_FORMAT_DISPLAY_83 0xFFEFFFFF
10965 #define NV_PVIDEO_FORMAT_DISPLAY_ALWAYS 0xFFEFFFFF
10966 #define NV_PVIDEO_FORMAT_DISPLAY_COLOR_KEY_EQUAL 0x00100000
10967 #define NV_PVIDEO_FORMAT_MATRIX 0x01000000
10968 #define NV_PVIDEO_FORMAT_MATRIX_ITURBT601 0xFEFFFFFF
10969 #define NV_PVIDEO_FORMAT_MATRIX_ITURBT709 0x01000000
10970 
10971 /* NV-Register NV_PVIDEO_COLOR_KEY */
10972 #define NV_PVIDEO_COLOR_KEY 0x00008B00
10973 #define NV_PVIDEO_COLOR_KEY_VALUE 0xFFFFFFFF
10974 #define NV_PVIDEO_COLOR_KEY_VALUE_47 0x00000000
10975 #define NV_PVIDEO_COLOR_KEY_VALUE_83 0x00000000
10976 #define NV_PVIDEO_COLOR_KEY_VALUE_DONT_CARE 0x00000000
10977 
10978 /* NV-Register NV_PVIDEO_TEST */
10979 #define NV_PVIDEO_TEST 0x00008D00
10980 #define NV_PVIDEO_TEST_MODE 0x00000001
10981 #define NV_PVIDEO_TEST_MODE_DISABLE 0xFFFFFFFE
10982 #define NV_PVIDEO_TEST_MODE_ENABLE 0x00000001
10983 #define NV_PVIDEO_TEST_ADDRESS 0x00007F00
10984 
10985 /* NV-Array NV_PVIDEO_TST_WRITE (4 byte access) */
10986 #define NV_PVIDEO_TST_WRITE 0x00008D10
10987 /* NV-Array size NV_PVIDEO_TST_WRITE__SIZE_1 [0..11] */
10988 #define NV_PVIDEO_TST_WRITE__SIZE_1 0x0000000C
10989 #define NV_PVIDEO_TST_WRITE_VALUE 0xFFFFFFFF
10990 
10991 /* NV-Array NV_PVIDEO_TST_READ (4 byte access) */
10992 #define NV_PVIDEO_TST_READ 0x00008D40
10993 /* NV-Array size NV_PVIDEO_TST_READ__SIZE_1 [0..11] */
10994 #define NV_PVIDEO_TST_READ__SIZE_1 0x0000000C
10995 #define NV_PVIDEO_TST_READ_VALUE 0xFFFFFFFF
10996 
10997 /* NV-Device NV_UBETA */
10998 #define NV_UBETA 0x00410000 /* size: 0x00001FFF */
10999 #define NV_BETA_SOLID 0x00000012
11000 
11001 /* NV-Register NV_UBETA_CTX_SWITCH */
11002 #define NV_UBETA_CTX_SWITCH 0x00410000
11003 #define NV_UBETA_CTX_SWITCH_INSTANCE 0x0000FFFF
11004 #define NV_UBETA_CTX_SWITCH_CHID 0x007F0000
11005 #define NV_UBETA_CTX_SWITCH_VOLATILE 0x80000000
11006 #define NV_UBETA_CTX_SWITCH_VOLATILE_IGNORE 0x7FFFFFFF
11007 #define NV_UBETA_CTX_SWITCH_VOLATILE_RESET 0x80000000
11008 
11009 /* NV-Register NV_UBETA_NOTIFY */
11010 #define NV_UBETA_NOTIFY 0x00410104
11011 #define NV_UBETA_NOTIFY_STYLE 0xFFFFFFFF
11012 #define NV_UBETA_NOTIFY_STYLE_WRITE_ONLY 0x00000000
11013 #define NV_UBETA_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001
11014 
11015 /* NV-Register NV_UBETA_SET_NOTIFY */
11016 #define NV_UBETA_SET_NOTIFY 0x00410104
11017 /* Alias NV_UBETA_NOTIFY */
11018 /* Alias NV_UBETA_NOTIFY */
11019 #define NV_UBETA_SET_NOTIFY_PARAMETER 0xFFFFFFFF
11020 #define NV_UBETA_SET_NOTIFY_PARAMETER_WRITE 0x00000000
11021 
11022 /* NV-Register NV_UBETA_SET_CONTEXT_DMA_NOTIFY */
11023 #define NV_UBETA_SET_CONTEXT_DMA_NOTIFY 0x00410180
11024 #define NV_UBETA_SET_CONTEXT_DMA_NOTIFY_PARAMETER 0xFFFFFFFF
11025 
11026 /* NV-Register NV_UBETA_SET_BETA_OUTPUT */
11027 #define NV_UBETA_SET_BETA_OUTPUT 0x00410200
11028 #define NV_UBETA_SET_BETA_OUTPUT_PARAMETER 0xFFFFFFFF
11029 
11030 /* NV-Register NV_UBETA_SET_BETA1D31 */
11031 #define NV_UBETA_SET_BETA1D31 0x00410300
11032 #define NV_UBETA_SET_BETA1D31_VALUE_FRACTION 0x7FE00000
11033 #define NV_UBETA_SET_BETA1D31_VALUE 0x80000000
11034 
11035 /* NV-Device NV_UCLIP */
11036 #define NV_UCLIP 0x00450000 /* size: 0x00001FFF */
11037 #define NV_IMAGE_BLACK_RECTANGLE 0x80000000
11038 
11039 /* NV-Register NV_UCLIP_CTX_SWITCH */
11040 #define NV_UCLIP_CTX_SWITCH 0x00450000
11041 #define NV_UCLIP_CTX_SWITCH_INSTANCE 0x0000FFFF
11042 #define NV_UCLIP_CTX_SWITCH_CHID 0x007F0000
11043 #define NV_UCLIP_CTX_SWITCH_VOLATILE 0x80000000
11044 #define NV_UCLIP_CTX_SWITCH_VOLATILE_IGNORE 0x7FFFFFFF
11045 #define NV_UCLIP_CTX_SWITCH_VOLATILE_RESET 0x80000000
11046 
11047 /* NV-Register NV_UCLIP_NOTIFY */
11048 #define NV_UCLIP_NOTIFY 0x00450104
11049 #define NV_UCLIP_NOTIFY_STYLE 0xFFFFFFFF
11050 #define NV_UCLIP_NOTIFY_STYLE_WRITE_ONLY 0x00000000
11051 #define NV_UCLIP_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001
11052 
11053 /* NV-Register NV_UCLIP_SET_NOTIFY */
11054 #define NV_UCLIP_SET_NOTIFY 0x00450104
11055 /* Alias NV_UCLIP_NOTIFY */
11056 /* Alias NV_UCLIP_NOTIFY */
11057 #define NV_UCLIP_SET_NOTIFY_PARAMETER 0xFFFFFFFF
11058 #define NV_UCLIP_SET_NOTIFY_PARAMETER_WRITE 0x00000000
11059 
11060 /* NV-Register NV_UCLIP_SET_CONTEXT_DMA_NOTIFY */
11061 #define NV_UCLIP_SET_CONTEXT_DMA_NOTIFY 0x00450180
11062 #define NV_UCLIP_SET_CONTEXT_DMA_NOTIFY_PARAMETER 0xFFFFFFFF
11063 
11064 /* NV-Register NV_UCLIP_SET_IMAGE_OUTPUT */
11065 #define NV_UCLIP_SET_IMAGE_OUTPUT 0x00450200
11066 #define NV_UCLIP_SET_IMAGE_OUTPUT_PARAMETER 0xFFFFFFFF
11067 
11068 /* NV-Register NV_UCLIP_SET_RECT_0 */
11069 #define NV_UCLIP_SET_RECT_0 0x00450300
11070 #define NV_UCLIP_SET_RECT_0_X 0x0000FFFF
11071 #define NV_UCLIP_SET_RECT_0_Y 0xFFFF0000
11072 
11073 /* NV-Register NV_UCLIP_SET_RECT_1 */
11074 #define NV_UCLIP_SET_RECT_1 0x00450304
11075 #define NV_UCLIP_SET_RECT_1_WIDTH 0x0000FFFF
11076 #define NV_UCLIP_SET_RECT_1_HEIGHT 0xFFFF0000
11077 
11078 /* NV-Device NV_UIMAGEKEY */
11079 #define NV_UIMAGEKEY 0x00590000 /* size: 0x00001FFF */
11080 #define NV_IMAGE_COLOR_KEY 0x00150000
11081 
11082 /* NV-Register NV_UIMAGEKEY_CTX_SWITCH */
11083 #define NV_UIMAGEKEY_CTX_SWITCH 0x00590000
11084 #define NV_UIMAGEKEY_CTX_SWITCH_INSTANCE 0x0000FFFF
11085 #define NV_UIMAGEKEY_CTX_SWITCH_CHID 0x007F0000
11086 #define NV_UIMAGEKEY_CTX_SWITCH_VOLATILE 0x80000000
11087 #define NV_UIMAGEKEY_CTX_SWITCH_VOLATILE_IGNORE 0x7FFFFFFF
11088 #define NV_UIMAGEKEY_CTX_SWITCH_VOLATILE_RESET 0x80000000
11089 
11090 /* NV-Register NV_UIMAGEKEY_NOTIFY */
11091 #define NV_UIMAGEKEY_NOTIFY 0x00590104
11092 #define NV_UIMAGEKEY_NOTIFY_STYLE 0xFFFFFFFF
11093 #define NV_UIMAGEKEY_NOTIFY_STYLE_WRITE_ONLY 0x00000000
11094 #define NV_UIMAGEKEY_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001
11095 
11096 /* NV-Register NV_UIMAGEKEY_SET_CONTEXT_DMA_NOTIFY */
11097 #define NV_UIMAGEKEY_SET_CONTEXT_DMA_NOTIFY 0x00590180
11098 #define NV_UIMAGEKEY_SET_CONTEXT_DMA_NOTIFY_PARAMETER 0xFFFFFFFF
11099 
11100 /* NV-Register NV_UIMAGEKEY_SET_IMAGE_OUTPUT */
11101 #define NV_UIMAGEKEY_SET_IMAGE_OUTPUT 0x00590200
11102 #define NV_UIMAGEKEY_SET_IMAGE_OUTPUT_PARAMETER 0xFFFFFFFF
11103 
11104 /* NV-Array NV_UIMAGEKEY_SET_IMAGE_INPUT (4 byte access) */
11105 #define NV_UIMAGEKEY_SET_IMAGE_INPUT 0x00590204
11106 /* NV-Array size NV_UIMAGEKEY_SET_IMAGE_INPUT__SIZE_1 [0..1] */
11107 #define NV_UIMAGEKEY_SET_IMAGE_INPUT__SIZE_1 0x00000002
11108 #define NV_UIMAGEKEY_SET_IMAGE_INPUT_PARAMETER 0xFFFFFFFF
11109 #define NV_CONTEXT_DMA_IN_MEMORY 0x0000003D
11110 #define NV_CONTEXT_DMA_FROM_MEMORY 0x00000002
11111 #define NV_CONTEXT_DMA_TO_MEMORY 0x00000003
11112 #define NV4_CONTEXT_SURFACES_ARGB_ZS 0x00000053
11113 
11114 /* NV-Device NV_053 */
11115 #define NV_053 0x00600000 /* size: 0x00001FFF */
11116 #define NV4_CONTEXT_SURFACES_ARGB_ZS 0x00000053
11117 
11118 /* NV-Register NV_053_NV4_CONTEXT_SURFACES_ARGB_ZS */
11119 #define NV_053_NV4_CONTEXT_SURFACES_ARGB_ZS 0x00600000
11120 
11121 /* NV-Register NV_053_NOP */
11122 #define NV_053_NOP 0x00600100
11123 #define NV_053_NOP_PARAMETER 0xFFFFFFFF
11124 
11125 /* NV-Register NV_053_NOTIFY */
11126 #define NV_053_NOTIFY 0x00600104
11127 #define NV_053_NOTIFY_STYLE 0xFFFFFFFF
11128 #define NV_053_NOTIFY_STYLE_WRITE_ONLY 0x00000000
11129 #define NV_053_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001
11130 
11131 /* NV-Register NV_053_SET_CONTEXT_DMA_NOTIFY */
11132 #define NV_053_SET_CONTEXT_DMA_NOTIFY 0x00600180
11133 #define NV_053_SET_CONTEXT_DMA_NOTIFY_PARAMETER 0xFFFFFFFF
11134 
11135 /* NV-Register NV_053_SET_CONTEXT_DMA_COLOR */
11136 #define NV_053_SET_CONTEXT_DMA_COLOR 0x00600184
11137 #define NV_053_SET_CONTEXT_DMA_COLOR_PARAMETER 0xFFFFFFFF
11138 
11139 /* NV-Register NV_053_SET_CONTEXT_DMA_ZETA */
11140 #define NV_053_SET_CONTEXT_DMA_ZETA 0x00600188
11141 #define NV_053_SET_CONTEXT_DMA_ZETA_PARAMETER 0xFFFFFFFF
11142 
11143 /* NV-Register NV_053_SET_CLIP_HORIZONTAL */
11144 #define NV_053_SET_CLIP_HORIZONTAL 0x006002F8
11145 #define NV_053_SET_CLIP_HORIZONTAL_X 0x0000FFFF
11146 #define NV_053_SET_CLIP_HORIZONTAL_WIDTH 0xFFFF0000
11147 
11148 /* NV-Register NV_053_SET_CLIP_VERTICAL */
11149 #define NV_053_SET_CLIP_VERTICAL 0x006002FC
11150 #define NV_053_SET_CLIP_VERTICAL_Y 0x0000FFFF
11151 #define NV_053_SET_CLIP_VERTICAL_HEIGHT 0xFFFF0000
11152 
11153 /* NV-Register NV_053_SET_FORMAT */
11154 #define NV_053_SET_FORMAT 0x00600300
11155 #define NV_053_SET_FORMAT_COLOR 0x000000FF
11156 #define NV_053_SET_FORMAT_COLOR_LE_X1R5G5B5_Z1R5G5B5 0x00000001
11157 #define NV_053_SET_FORMAT_COLOR_LE_X1R5G5B5_O1R5G5B5 0x00000002
11158 #define NV_053_SET_FORMAT_COLOR_LE_R5G6B5 0x00000003
11159 #define NV_053_SET_FORMAT_COLOR_LE_X8R8G8B8_Z8R8G8B8 0x00000004
11160 #define NV_053_SET_FORMAT_COLOR_LE_X8R8G8B8_O8R8G8B8 0x00000005
11161 #define NV_053_SET_FORMAT_COLOR_LE_X1A7R8G8B8_Z1A7R8G8B8 0x00000006
11162 #define NV_053_SET_FORMAT_COLOR_LE_X1A7R8G8B8_O1A7R8G8B8 0x00000007
11163 #define NV_053_SET_FORMAT_COLOR_LE_A8R8G8B8 0x00000008
11164 #define NV_053_SET_FORMAT_TYPE 0x0000FF00
11165 #define NV_053_SET_FORMAT_TYPE_PITCH 0x00000100
11166 #define NV_053_SET_FORMAT_TYPE_SWIZZLE 0x00000200
11167 #define NV_053_SET_FORMAT_WIDTH 0x00FF0000
11168 #define NV_053_SET_FORMAT_HEIGHT 0xFF000000
11169 
11170 /* NV-Register NV_053_SET_CLIP_SIZE */
11171 #define NV_053_SET_CLIP_SIZE 0x00600304
11172 #define NV_053_SET_CLIP_SIZE_WIDTH 0x0000FFFF
11173 #define NV_053_SET_CLIP_SIZE_HEIGHT 0xFFFF0000
11174 
11175 /* NV-Register NV_053_SET_PITCH */
11176 #define NV_053_SET_PITCH 0x00600308
11177 #define NV_053_SET_PITCH_COLOR 0x0000FFFF
11178 #define NV_053_SET_PITCH_ZETA 0xFFFF0000
11179 
11180 /* NV-Register NV_053_SET_OFFSET_COLOR */
11181 #define NV_053_SET_OFFSET_COLOR 0x0060030C
11182 #define NV_053_SET_OFFSET_COLOR_VALUE 0xFFFFFFFF
11183 
11184 /* NV-Register NV_053_SET_OFFSET_ZETA */
11185 #define NV_053_SET_OFFSET_ZETA 0x00600310
11186 #define NV_053_SET_OFFSET_ZETA_VALUE 0xFFFFFFFF
11187 
11188 /* NV-Device NV_UD3D0Z */
11189 #define NV_UD3D0Z 0x00570000 /* size: 0x00001FFF */
11190 #define NV_RENDER_D3D0_TRIANGLE_ZETA 0x00000048
11191 
11192 /* NV-Register NV_UD3D0Z_CTX_SWITCH */
11193 #define NV_UD3D0Z_CTX_SWITCH 0x00570000
11194 #define NV_UD3D0Z_CTX_SWITCH_INSTANCE 0x0000FFFF
11195 #define NV_UD3D0Z_CTX_SWITCH_CHID 0x007F0000
11196 #define NV_UD3D0Z_CTX_SWITCH_VOLATILE 0x80000000
11197 #define NV_UD3D0Z_CTX_SWITCH_VOLATILE_IGNORE 0x7FFFFFFF
11198 #define NV_UD3D0Z_CTX_SWITCH_VOLATILE_RESET 0x80000000
11199 
11200 /* NV-Register NV_UD3D0Z_NOP */
11201 #define NV_UD3D0Z_NOP 0x00570100
11202 #define NV_UD3D0Z_NOP_PARAMETER 0xFFFFFFFF
11203 
11204 /* NV-Register NV_UD3D0Z_NOTIFY */
11205 #define NV_UD3D0Z_NOTIFY 0x00570104
11206 #define NV_UD3D0Z_NOTIFY_STYLE 0xFFFFFFFF
11207 #define NV_UD3D0Z_NOTIFY_STYLE_WRITE_ONLY 0x00000000
11208 #define NV_UD3D0Z_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001
11209 #define NV_UD3D0Z_NOTIFY_STYLE_NOT_PENDING 0x00000002
11210 
11211 /* NV-Register NV_UD3D0Z_SET_NOTIFY */
11212 #define NV_UD3D0Z_SET_NOTIFY 0x00570104
11213 /* Alias NV_UD3D0Z_NOTIFY */
11214 /* Alias NV_UD3D0Z_NOTIFY */
11215 #define NV_UD3D0Z_SET_NOTIFY_PARAMETER 0xFFFFFFFF
11216 #define NV_UD3D0Z_SET_NOTIFY_PARAMETER_WRITE 0x00000000
11217 
11218 /* NV-Register NV_UD3D0Z_SET_PATCH */
11219 #define NV_UD3D0Z_SET_PATCH 0x0057010C
11220 #define NV_UD3D0Z_SET_PATCH_PARAMETER 0xFFFFFFFF
11221 #define NV_UD3D0Z_SET_PATCH_PARAMETER_INVALIDATE 0x00000000
11222 #define NV_UD3D0Z_SET_PATCH_PARAMETER_VALIDATE 0x00000001
11223 
11224 /* NV-Register NV_UD3D0Z_SET_CONTEXT_DMA_NOTIFY */
11225 #define NV_UD3D0Z_SET_CONTEXT_DMA_NOTIFY 0x00570180
11226 #define NV_UD3D0Z_SET_CONTEXT_DMA_NOTIFY_PARAMETER 0xFFFFFFFF
11227 
11228 /* NV-Register NV_UD3D0Z_SET_CONTEXT_DMA_TEXTURE */
11229 #define NV_UD3D0Z_SET_CONTEXT_DMA_TEXTURE 0x00570184
11230 #define NV_UD3D0Z_SET_CONTEXT_DMA_TEXTURE_PARAMETER 0xFFFFFFFF
11231 
11232 /* NV-Register NV_UD3D0Z_SET_IMAGE_COLOR_OUTPUT */
11233 #define NV_UD3D0Z_SET_IMAGE_COLOR_OUTPUT 0x00570200
11234 #define NV_UD3D0Z_SET_IMAGE_COLOR_OUTPUT_PARAMETER 0xFFFFFFFF
11235 
11236 /* NV-Register NV_UD3D0Z_SET_IMAGE_COLOR_INPUT */
11237 #define NV_UD3D0Z_SET_IMAGE_COLOR_INPUT 0x00570204
11238 #define NV_UD3D0Z_SET_IMAGE_COLOR_INPUT_PARAMETER 0xFFFFFFFF
11239 
11240 /* NV-Register NV_UD3D0Z_SET_IMAGE_ZETA_OUTPUT */
11241 #define NV_UD3D0Z_SET_IMAGE_ZETA_OUTPUT 0x00570208
11242 #define NV_UD3D0Z_SET_IMAGE_ZETA_OUTPUT_PARAMETER 0xFFFFFFFF
11243 
11244 /* NV-Register NV_UD3D0Z_SET_IMAGE_ZETA_INPUT */
11245 #define NV_UD3D0Z_SET_IMAGE_ZETA_INPUT 0x0057020C
11246 #define NV_UD3D0Z_SET_IMAGE_ZETA_INPUT_PARAMETER 0xFFFFFFFF
11247 
11248 /* NV-Register NV_UD3D0Z_TEXTURE_OFFSET */
11249 #define NV_UD3D0Z_TEXTURE_OFFSET 0x00570304
11250 #define NV_UD3D0Z_TEXTURE_OFFSET_VALUE 0xFFFFFFFF
11251 
11252 /* NV-Register NV_UD3D0Z_TEXTURE_FORMAT */
11253 #define NV_UD3D0Z_TEXTURE_FORMAT 0x00570308
11254 #define NV_UD3D0Z_TEXTURE_FORMAT_COLOR_KEY_COLOR_MASK 0x0000FFFF
11255 #define NV_UD3D0Z_TEXTURE_FORMAT_COLOR_KEY 0x000F0000
11256 #define NV_UD3D0Z_TEXTURE_FORMAT_COLOR_KEY_DISABLED 0x00000000
11257 #define NV_UD3D0Z_TEXTURE_FORMAT_COLOR_KEY_ENABLED 0x00010000
11258 #define NV_UD3D0Z_TEXTURE_FORMAT_COLOR_FORMAT 0x00F00000
11259 #define NV_UD3D0Z_TEXTURE_FORMAT_COLOR_FORMAT_A1R5G5B5 0x00000000
11260 #define NV_UD3D0Z_TEXTURE_FORMAT_COLOR_FORMAT_X1R5G5B5 0x00100000
11261 #define NV_UD3D0Z_TEXTURE_FORMAT_COLOR_FORMAT_A4R4G4B4 0x00200000
11262 #define NV_UD3D0Z_TEXTURE_FORMAT_COLOR_FORMAT_R5G6B5 0x00300000
11263 #define NV_UD3D0Z_TEXTURE_FORMAT_SIZE_MIN 0x0F000000
11264 #define NV_UD3D0Z_TEXTURE_FORMAT_SIZE_MIN_4X4 0x02000000
11265 #define NV_UD3D0Z_TEXTURE_FORMAT_SIZE_MIN_8X8 0x03000000
11266 #define NV_UD3D0Z_TEXTURE_FORMAT_SIZE_MIN_16X16 0x04000000
11267 #define NV_UD3D0Z_TEXTURE_FORMAT_SIZE_MIN_32X32 0x05000000
11268 #define NV_UD3D0Z_TEXTURE_FORMAT_SIZE_MIN_64X64 0x06000000
11269 #define NV_UD3D0Z_TEXTURE_FORMAT_SIZE_MIN_128X128 0x07000000
11270 #define NV_UD3D0Z_TEXTURE_FORMAT_SIZE_MIN_256X256 0x08000000
11271 #define NV_UD3D0Z_TEXTURE_FORMAT_SIZE_MIN_512X512 0x09000000
11272 #define NV_UD3D0Z_TEXTURE_FORMAT_SIZE_MIN_1024X1024 0x0A000000
11273 #define NV_UD3D0Z_TEXTURE_FORMAT_SIZE_MIN_2048X2048 0x0B000000
11274 #define NV_UD3D0Z_TEXTURE_FORMAT_SIZE_MAX 0xF0000000
11275 #define NV_UD3D0Z_TEXTURE_FORMAT_SIZE_MAX_4X4 0x20000000
11276 #define NV_UD3D0Z_TEXTURE_FORMAT_SIZE_MAX_8X8 0x30000000
11277 #define NV_UD3D0Z_TEXTURE_FORMAT_SIZE_MAX_16X16 0x40000000
11278 #define NV_UD3D0Z_TEXTURE_FORMAT_SIZE_MAX_32X32 0x50000000
11279 #define NV_UD3D0Z_TEXTURE_FORMAT_SIZE_MAX_64X64 0x60000000
11280 #define NV_UD3D0Z_TEXTURE_FORMAT_SIZE_MAX_128X128 0x70000000
11281 #define NV_UD3D0Z_TEXTURE_FORMAT_SIZE_MAX_256X256 0x80000000
11282 #define NV_UD3D0Z_TEXTURE_FORMAT_SIZE_MAX_512X512 0x90000000
11283 #define NV_UD3D0Z_TEXTURE_FORMAT_SIZE_MAX_1024X1024 0xA0000000
11284 #define NV_UD3D0Z_TEXTURE_FORMAT_SIZE_MAX_2048X2048 0xB0000000
11285 
11286 /* NV-Register NV_UD3D0Z_FILTER */
11287 #define NV_UD3D0Z_FILTER 0x0057030C
11288 #define NV_UD3D0Z_FILTER_SPREADX 0x0000001F
11289 #define NV_UD3D0Z_FILTER_IGNORE0 0x000000E0
11290 #define NV_UD3D0Z_FILTER_SPREADY 0x00001F00
11291 #define NV_UD3D0Z_FILTER_IGNORE1 0x0000E000
11292 #define NV_UD3D0Z_FILTER_SIZEADJ 0x00FF0000
11293 #define NV_UD3D0Z_FILTER_IGNORE2 0xFF000000
11294 
11295 /* NV-Register NV_UD3D0Z_FOG_COLOR */
11296 #define NV_UD3D0Z_FOG_COLOR 0x00570310
11297 #define NV_UD3D0Z_FOG_COLOR_BLU 0x000000FF
11298 #define NV_UD3D0Z_FOG_COLOR_GRN 0x0000FF00
11299 #define NV_UD3D0Z_FOG_COLOR_RED 0x00FF0000
11300 #define NV_UD3D0Z_FOG_COLOR_VALUE 0xFFFFFFFF
11301 
11302 /* NV-Register NV_UD3D0Z_CONTROL_OUT */
11303 #define NV_UD3D0Z_CONTROL_OUT 0x00570314
11304 #define NV_UD3D0Z_CONTROL_OUT_INTERPOLATOR 0x0000000F
11305 #define NV_UD3D0Z_CONTROL_OUT_INTERPOLATOR_ZOH_MS 0x00000000
11306 #define NV_UD3D0Z_CONTROL_OUT_INTERPOLATOR_ZOH 0x00000001
11307 #define NV_UD3D0Z_CONTROL_OUT_INTERPOLATOR_FOH 0x00000002
11308 #define NV_UD3D0Z_CONTROL_OUT_WRAP_U 0x00000030
11309 #define NV_UD3D0Z_CONTROL_OUT_WRAP_U_CYLINDRICAL 0x00000000
11310 #define NV_UD3D0Z_CONTROL_OUT_WRAP_U_WRAP 0x00000010
11311 #define NV_UD3D0Z_CONTROL_OUT_WRAP_U_MIRROR 0x00000020
11312 #define NV_UD3D0Z_CONTROL_OUT_WRAP_U_CLAMP 0x00000030
11313 #define NV_UD3D0Z_CONTROL_OUT_WRAP_V 0x000000C0
11314 #define NV_UD3D0Z_CONTROL_OUT_WRAP_V_CYLINDRICAL 0x00000000
11315 #define NV_UD3D0Z_CONTROL_OUT_WRAP_V_WRAP 0x00000040
11316 #define NV_UD3D0Z_CONTROL_OUT_WRAP_V_MIRROR 0x00000080
11317 #define NV_UD3D0Z_CONTROL_OUT_WRAP_V_CLAMP 0x000000C0
11318 #define NV_UD3D0Z_CONTROL_OUT_COLOR_FORMAT 0x00000300
11319 #define NV_UD3D0Z_CONTROL_OUT_COLOR_FORMAT_LE_X8R8G8B8 0x00000000
11320 #define NV_UD3D0Z_CONTROL_OUT_COLOR_FORMAT_LE_A8R8G8B8 0x00000100
11321 #define NV_UD3D0Z_CONTROL_OUT_SRCCOLOR 0x00000C00
11322 #define NV_UD3D0Z_CONTROL_OUT_SRCCOLOR_NORMAL 0x00000000
11323 #define NV_UD3D0Z_CONTROL_OUT_SRCCOLOR_COLOR_INVERSE 0x00000400
11324 #define NV_UD3D0Z_CONTROL_OUT_SRCCOLOR_ALPHA_INVERSE 0x00000800
11325 #define NV_UD3D0Z_CONTROL_OUT_SRCCOLOR_ALPHA_ONE 0x00000C00
11326 #define NV_UD3D0Z_CONTROL_OUT_CULLING 0x00007000
11327 #define NV_UD3D0Z_CONTROL_OUT_CULLING_NONE 0x00001000
11328 #define NV_UD3D0Z_CONTROL_OUT_CULLING_COUNTERCLOCKWISE 0x00002000
11329 #define NV_UD3D0Z_CONTROL_OUT_CULLING_CLOCKWISE 0x00003000
11330 #define NV_UD3D0Z_CONTROL_OUT_ZBUFFER 0x00008000
11331 #define NV_UD3D0Z_CONTROL_OUT_ZBUFFER_SCREEN 0xFFFF7FFF
11332 #define NV_UD3D0Z_CONTROL_OUT_ZBUFFER_LINEAR 0x00008000
11333 #define NV_UD3D0Z_CONTROL_OUT_ZETA_COMPARE 0x000F0000
11334 #define NV_UD3D0Z_CONTROL_OUT_ZETA_COMPARE_FALSE 0x00010000
11335 #define NV_UD3D0Z_CONTROL_OUT_ZETA_COMPARE_LT 0x00020000
11336 #define NV_UD3D0Z_CONTROL_OUT_ZETA_COMPARE_EQ 0x00030000
11337 #define NV_UD3D0Z_CONTROL_OUT_ZETA_COMPARE_LE 0x00040000
11338 #define NV_UD3D0Z_CONTROL_OUT_ZETA_COMPARE_GT 0x00050000
11339 #define NV_UD3D0Z_CONTROL_OUT_ZETA_COMPARE_NE 0x00060000
11340 #define NV_UD3D0Z_CONTROL_OUT_ZETA_COMPARE_GE 0x00070000
11341 #define NV_UD3D0Z_CONTROL_OUT_ZETA_COMPARE_TRUE 0x00080000
11342 #define NV_UD3D0Z_CONTROL_OUT_ZETA_WRITE 0x00F00000
11343 #define NV_UD3D0Z_CONTROL_OUT_ZETA_WRITE_NEVER 0x00000000
11344 #define NV_UD3D0Z_CONTROL_OUT_ZETA_WRITE_ALPHA 0x00100000
11345 #define NV_UD3D0Z_CONTROL_OUT_ZETA_WRITE_ALPHA_ZETA 0x00200000
11346 #define NV_UD3D0Z_CONTROL_OUT_ZETA_WRITE_ZETA 0x00300000
11347 #define NV_UD3D0Z_CONTROL_OUT_ZETA_WRITE_ALWAYS 0x00400000
11348 #define NV_UD3D0Z_CONTROL_OUT_COLOR_WRITE 0x0F000000
11349 #define NV_UD3D0Z_CONTROL_OUT_COLOR_WRITE_NEVER 0x00000000
11350 #define NV_UD3D0Z_CONTROL_OUT_COLOR_WRITE_ALPHA 0x01000000
11351 #define NV_UD3D0Z_CONTROL_OUT_COLOR_WRITE_ALPHA_ZETA 0x02000000
11352 #define NV_UD3D0Z_CONTROL_OUT_COLOR_WRITE_ZETA 0x03000000
11353 #define NV_UD3D0Z_CONTROL_OUT_COLOR_WRITE_ALWAYS 0x04000000
11354 #define NV_UD3D0Z_CONTROL_OUT_ROP 0x10000000
11355 #define NV_UD3D0Z_CONTROL_OUT_ROP_BLEND_AND 0xEFFFFFFF
11356 #define NV_UD3D0Z_CONTROL_OUT_ROP_ADD_WITH_SATURATION 0x10000000
11357 #define NV_UD3D0Z_CONTROL_OUT_BLEND_BETA 0x20000000
11358 #define NV_UD3D0Z_CONTROL_OUT_BLEND_BETA_SRCALPHA 0xDFFFFFFF
11359 #define NV_UD3D0Z_CONTROL_OUT_BLEND_BETA_DESTCOLOR 0x20000000
11360 #define NV_UD3D0Z_CONTROL_OUT_BLEND_INPUT0 0x40000000
11361 #define NV_UD3D0Z_CONTROL_OUT_BLEND_INPUT0_DESTCOLOR 0xBFFFFFFF
11362 #define NV_UD3D0Z_CONTROL_OUT_BLEND_INPUT0_ZERO 0x40000000
11363 #define NV_UD3D0Z_CONTROL_OUT_BLEND_INPUT1 0x80000000
11364 #define NV_UD3D0Z_CONTROL_OUT_BLEND_INPUT1_SRCCOLOR 0x7FFFFFFF
11365 #define NV_UD3D0Z_CONTROL_OUT_BLEND_INPUT1_ZERO 0x80000000
11366 
11367 /* NV-Register NV_UD3D0Z_ALPHA_CONTROL */
11368 #define NV_UD3D0Z_ALPHA_CONTROL 0x00570318
11369 #define NV_UD3D0Z_ALPHA_CONTROL_ALPHA_KEY 0x000000FF
11370 #define NV_UD3D0Z_ALPHA_CONTROL_ALPHA_COMPARE 0xFFFFFF00
11371 #define NV_UD3D0Z_ALPHA_CONTROL_ALPHA_COMPARE_ILLEGAL 0x00000000
11372 #define NV_UD3D0Z_ALPHA_CONTROL_ALPHA_COMPARE_FALSE 0x00000100
11373 #define NV_UD3D0Z_ALPHA_CONTROL_ALPHA_COMPARE_LT 0x00000200
11374 #define NV_UD3D0Z_ALPHA_CONTROL_ALPHA_COMPARE_EQ 0x00000300
11375 #define NV_UD3D0Z_ALPHA_CONTROL_ALPHA_COMPARE_LE 0x00000400
11376 #define NV_UD3D0Z_ALPHA_CONTROL_ALPHA_COMPARE_GT 0x00000500
11377 #define NV_UD3D0Z_ALPHA_CONTROL_ALPHA_COMPARE_NE 0x00000600
11378 #define NV_UD3D0Z_ALPHA_CONTROL_ALPHA_COMPARE_GE 0x00000700
11379 #define NV_UD3D0Z_ALPHA_CONTROL_ALPHA_COMPARE_TRUE 0x00000800
11380 
11381 /* NV-Array NV_UD3D0Z_SPECULAR (32 byte access) */
11382 #define NV_UD3D0Z_SPECULAR 0x00571000
11383 /* NV-Array size NV_UD3D0Z_SPECULAR__SIZE_1 [0..127] */
11384 #define NV_UD3D0Z_SPECULAR__SIZE_1 0x00000080
11385 #define NV_UD3D0Z_SPECULAR_I0 0x0000000F
11386 #define NV_UD3D0Z_SPECULAR_I1 0x000000F0
11387 #define NV_UD3D0Z_SPECULAR_I2 0x00000F00
11388 #define NV_UD3D0Z_SPECULAR_I3 0x0000F000
11389 #define NV_UD3D0Z_SPECULAR_I4 0x000F0000
11390 #define NV_UD3D0Z_SPECULAR_I5 0x00F00000
11391 #define NV_UD3D0Z_SPECULAR_FOG 0xFF000000
11392 
11393 /* NV-Array NV_UD3D0Z_COLOR (32 byte access) */
11394 #define NV_UD3D0Z_COLOR 0x00571004
11395 /* NV-Array size NV_UD3D0Z_COLOR__SIZE_1 [0..127] */
11396 #define NV_UD3D0Z_COLOR__SIZE_1 0x00000080
11397 #define NV_UD3D0Z_COLOR_B8 0x000000FF
11398 #define NV_UD3D0Z_COLOR_G8 0x0001FF00
11399 #define NV_UD3D0Z_COLOR_R8 0x00FF0000
11400 #define NV_UD3D0Z_COLOR_A8 0xFF000000
11401 
11402 /* NV-Array NV_UD3D0Z_X (32 byte access) */
11403 #define NV_UD3D0Z_X 0x00571008
11404 /* NV-Array size NV_UD3D0Z_X__SIZE_1 [0..127] */
11405 #define NV_UD3D0Z_X__SIZE_1 0x00000080
11406 #define NV_UD3D0Z_X_VALUE 0xFFFFFFFF
11407 
11408 /* NV-Array NV_UD3D0Z_Y (32 byte access) */
11409 #define NV_UD3D0Z_Y 0x0057100C
11410 /* NV-Array size NV_UD3D0Z_Y__SIZE_1 [0..127] */
11411 #define NV_UD3D0Z_Y__SIZE_1 0x00000080
11412 #define NV_UD3D0Z_Y_VALUE 0xFFFFFFFF
11413 
11414 /* NV-Array NV_UD3D0Z_Z (32 byte access) */
11415 #define NV_UD3D0Z_Z 0x00571010
11416 /* NV-Array size NV_UD3D0Z_Z__SIZE_1 [0..127] */
11417 #define NV_UD3D0Z_Z__SIZE_1 0x00000080
11418 #define NV_UD3D0Z_Z_VALUE 0xFFFFFFFF
11419 
11420 /* NV-Array NV_UD3D0Z_M (32 byte access) */
11421 #define NV_UD3D0Z_M 0x00571014
11422 /* NV-Array size NV_UD3D0Z_M__SIZE_1 [0..127] */
11423 #define NV_UD3D0Z_M__SIZE_1 0x00000080
11424 #define NV_UD3D0Z_M_VALUE 0xFFFFFFFF
11425 
11426 /* NV-Array NV_UD3D0Z_U (32 byte access) */
11427 #define NV_UD3D0Z_U 0x00571018
11428 /* NV-Array size NV_UD3D0Z_U__SIZE_1 [0..127] */
11429 #define NV_UD3D0Z_U__SIZE_1 0x00000080
11430 #define NV_UD3D0Z_U_VALUE 0xFFFFFFFF
11431 
11432 /* NV-Array NV_UD3D0Z_V (32 byte access) */
11433 #define NV_UD3D0Z_V 0x0057101C
11434 /* NV-Array size NV_UD3D0Z_V__SIZE_1 [0..127] */
11435 #define NV_UD3D0Z_V__SIZE_1 0x00000080
11436 #define NV_UD3D0Z_V_VALUE 0xFFFFFFFF
11437 
11438 /* NV-Device NV_038 */
11439 #define NV_038 0x004F0000 /* size: 0x00001FFF */
11440 #define NV4_DVD_SUBPICTURE 0x00000038
11441 
11442 /* NV-Register NV_038_NV4_DVD_SUBPICTURE */
11443 #define NV_038_NV4_DVD_SUBPICTURE 0x004F0000
11444 
11445 /* NV-Register NV_038_NOP */
11446 #define NV_038_NOP 0x004F0100
11447 #define NV_038_NOP_PARAMETER 0xFFFFFFFF
11448 
11449 /* NV-Register NV_038_NOTIFY */
11450 #define NV_038_NOTIFY 0x004F0104
11451 #define NV_038_NOTIFY_STYLE 0xFFFFFFFF
11452 #define NV_038_NOTIFY_STYLE_WRITE_ONLY 0x00000000
11453 #define NV_038_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001
11454 /* Alias NV_038_SET_NOTIFY */
11455 /* Alias NV_038_SET_NOTIFY */
11456 #define NV_038_SET_NOTIFY_PARAMETER 0xFFFFFFFF
11457 #define NV_038_SET_NOTIFY_PARAMETER_WRITE 0x00000000
11458 
11459 /* NV-Register NV_038_SET_CONTEXT_DMA_NOTIFY */
11460 #define NV_038_SET_CONTEXT_DMA_NOTIFY 0x004F0180
11461 #define NV_038_SET_CONTEXT_DMA_NOTIFY_PARAMETER 0xFFFFFFFF
11462 
11463 /* NV-Register NV_038_SET_CONTEXT_DMA_OVERLAY */
11464 #define NV_038_SET_CONTEXT_DMA_OVERLAY 0x004F0184
11465 #define NV_038_SET_CONTEXT_DMA_OVERLAY_PARAMETER 0xFFFFFFFF
11466 
11467 /* NV-Register NV_038_SET_CONTEXT_DMA_IMAGEIN */
11468 #define NV_038_SET_CONTEXT_DMA_IMAGEIN 0x004F0188
11469 #define NV_038_SET_CONTEXT_DMA_IMAGEIN_PARAMETER 0xFFFFFFFF
11470 
11471 /* NV-Register NV_038_SET_CONTEXT_DMA_IMAGEOUT */
11472 #define NV_038_SET_CONTEXT_DMA_IMAGEOUT 0x004F018C
11473 #define NV_038_SET_CONTEXT_DMA_IMAGEOUT_PARAMETER 0xFFFFFFFF
11474 
11475 /* NV-Register NV_038_IMAGEOUT_POINT */
11476 #define NV_038_IMAGEOUT_POINT 0x004F0300
11477 #define NV_038_IMAGEOUT_POINT_X 0x0000FFFF
11478 #define NV_038_IMAGEOUT_POINT_Y 0xFFFF0000
11479 
11480 /* NV-Register NV_038_IMAGEOUT_SIZE */
11481 #define NV_038_IMAGEOUT_SIZE 0x004F0304
11482 #define NV_038_IMAGEOUT_SIZE_WIDTH 0x0000FFFF
11483 #define NV_038_IMAGEOUT_SIZE_HEIGHT 0xFFFF0000
11484 
11485 /* NV-Register NV_038_IMAGEOUT_FMT */
11486 #define NV_038_IMAGEOUT_FMT 0x004F0308
11487 #define NV_038_IMAGEOUT_FMT_PITCH 0x0000FFFF
11488 #define NV_038_IMAGEOUT_FMT_COLOR 0xFFFF0000
11489 #define NV_038_IMAGEOUT_FMT_COLOR_INVALID 0x00000000
11490 #define NV_038_IMAGEOUT_FMT_COLOR_LE_V8YB8U8YA8 0x00010000
11491 #define NV_038_IMAGEOUT_FMT_COLOR_LE_YB8V8YA8U8 0x00020000
11492 
11493 /* NV-Register NV_038_IMAGEOUT_OFFSET */
11494 #define NV_038_IMAGEOUT_OFFSET 0x004F030C
11495 #define NV_038_IMAGEOUT_OFFSET_VALUE 0xFFFFFFFF
11496 
11497 /* NV-Register NV_038_IMAGEIN_DELTA_DU_DX */
11498 #define NV_038_IMAGEIN_DELTA_DU_DX 0x004F0310
11499 #define NV_038_IMAGEIN_DELTA_DU_DX_R_FRACTION 0x000FFFFF
11500 #define NV_038_IMAGEIN_DELTA_DU_DX_R_INT 0xFFF00000
11501 #define NV_038_IMAGEIN_DELTA_DU_DX_R 0xFFFFFFFF
11502 
11503 /* NV-Register NV_038_IMAGEIN_DELTA_DV_DY */
11504 #define NV_038_IMAGEIN_DELTA_DV_DY 0x004F0314
11505 #define NV_038_IMAGEIN_DELTA_DV_DY_R_FRACTION 0x000FFFFF
11506 #define NV_038_IMAGEIN_DELTA_DV_DY_R_INT 0xFFF00000
11507 #define NV_038_IMAGEIN_DELTA_DV_DY_R 0xFFFFFFFF
11508 
11509 /* NV-Register NV_038_IMAGEIN_SIZE */
11510 #define NV_038_IMAGEIN_SIZE 0x004F0318
11511 #define NV_038_IMAGEIN_SIZE_WIDTH 0x0000FFFF
11512 #define NV_038_IMAGEIN_SIZE_HEIGHT 0xFFFF0000
11513 
11514 /* NV-Register NV_038_IMAGEIN_FMT */
11515 #define NV_038_IMAGEIN_FMT 0x004F031C
11516 #define NV_038_IMAGEIN_FMT_PITCH 0x0000FFFF
11517 #define NV_038_IMAGEIN_FMT_COLOR 0xFFFF0000
11518 #define NV_038_IMAGEIN_FMT_COLOR_INVALID 0x00000000
11519 #define NV_038_IMAGEIN_FMT_COLOR_LE_V8YB8U8YA8 0x00010000
11520 #define NV_038_IMAGEIN_FMT_COLOR_LE_YB8V8YA8U8 0x00020000
11521 
11522 /* NV-Register NV_038_IMAGEIN_OFFSET */
11523 #define NV_038_IMAGEIN_OFFSET 0x004F0320
11524 #define NV_038_IMAGEIN_OFFSET_VALUE 0xFFFFFFFF
11525 
11526 /* NV-Register NV_038_IMAGEIN_POINT */
11527 #define NV_038_IMAGEIN_POINT 0x004F0324
11528 #define NV_038_IMAGEIN_POINT_U_FRACTION 0x0000000F
11529 #define NV_038_IMAGEIN_POINT_U_INT 0x0000FFF0
11530 #define NV_038_IMAGEIN_POINT_U_VALUE 0x0000FFFF
11531 #define NV_038_IMAGEIN_POINT_V_FRACTION 0x000F0000
11532 #define NV_038_IMAGEIN_POINT_V_INT 0xFFF00000
11533 #define NV_038_IMAGEIN_POINT_V_VALUE 0xFFFFFFFF
11534 
11535 /* NV-Register NV_038_OVERLAY_DELTA_DU_DX */
11536 #define NV_038_OVERLAY_DELTA_DU_DX 0x004F0328
11537 #define NV_038_OVERLAY_DELTA_DU_DX_R_FRACTION 0x000FFFFF
11538 #define NV_038_OVERLAY_DELTA_DU_DX_R_INT 0xFFF00000
11539 #define NV_038_OVERLAY_DELTA_DU_DX_R 0xFFFFFFFF
11540 
11541 /* NV-Register NV_038_OVERLAY_DELTA_DV_DY */
11542 #define NV_038_OVERLAY_DELTA_DV_DY 0x004F032C
11543 #define NV_038_OVERLAY_DELTA_DV_DY_R_FRACTION 0x000FFFFF
11544 #define NV_038_OVERLAY_DELTA_DV_DY_R_INT 0xFFF00000
11545 #define NV_038_OVERLAY_DELTA_DV_DY_R 0xFFFFFFFF
11546 
11547 /* NV-Register NV_038_OVERLAY_SIZE */
11548 #define NV_038_OVERLAY_SIZE 0x004F0330
11549 #define NV_038_OVERLAY_SIZE_WIDTH 0x0000FFFF
11550 #define NV_038_OVERLAY_SIZE_HEIGHT 0xFFFF0000
11551 
11552 /* NV-Register NV_038_OVERLAY_FMT */
11553 #define NV_038_OVERLAY_FMT 0x004F0334
11554 #define NV_038_OVERLAY_FMT_PITCH 0x0000FFFF
11555 #define NV_038_OVERLAY_FMT_COLOR 0xFFFF0000
11556 #define NV_038_OVERLAY_FMT_COLOR_INVALID 0x00000000
11557 #define NV_038_OVERLAY_FMT_COLOR_LE_A8V8U8Y8 0x00010000
11558 #define NV_038_OVERLAY_FMT_COLOR_LE_A4V6YB6A4U6YA6 0x00020000
11559 #define NV_038_OVERLAY_FMT_COLOR_LE_TRANSPARENT 0x00030000
11560 
11561 /* NV-Register NV_038_OVERLAY_OFFSET */
11562 #define NV_038_OVERLAY_OFFSET 0x004F0338
11563 #define NV_038_OVERLAY_OFFSET_VALUE 0xFFFFFFFF
11564 
11565 /* NV-Register NV_038_OVERLAY_POINT */
11566 #define NV_038_OVERLAY_POINT 0x004F033C
11567 #define NV_038_OVERLAY_POINT_U_FRACTION 0x0000000F
11568 #define NV_038_OVERLAY_POINT_U_INT 0x0000FFF0
11569 #define NV_038_OVERLAY_POINT_U_VALUE 0x0000FFFF
11570 #define NV_038_OVERLAY_POINT_V_FRACTION 0x000F0000
11571 #define NV_038_OVERLAY_POINT_V_INT 0xFFF00000
11572 #define NV_038_OVERLAY_POINT_V_VALUE 0xFFFFFFFF
11573 
11574 /* NV-Device NV_054 */
11575 #define NV_054 0x005E0000 /* size: 0x00001FFF */
11576 #define NV4_DX5_TEXTURE_TRIANGLE 0x00000054
11577 
11578 /* NV-Register NV_054_NV4_DX5_TEXTURE_TRIANGLE */
11579 #define NV_054_NV4_DX5_TEXTURE_TRIANGLE 0x005E0000
11580 #define NV_054_NV4_DX5_TEXTURE_TRIANGLE_HANDLE 0xFFFFFFFF
11581 
11582 /* NV-Register NV_054_NOP */
11583 #define NV_054_NOP 0x005E0100
11584 #define NV_054_NOP_PARAMETER 0xFFFFFFFF
11585 
11586 /* NV-Register NV_054_NOTIFY */
11587 #define NV_054_NOTIFY 0x005E0104
11588 #define NV_054_NOTIFY_STYLE 0xFFFFFFFF
11589 #define NV_054_NOTIFY_STYLE_WRITE_ONLY 0x00000000
11590 #define NV_054_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001
11591 /* Alias NV_054_SET NOTIFY */
11592 #define NV_054_SET_NOTIFY_PARAMETER 0xFFFFFFFF
11593 #define NV_054_SET_NOTIFY_PARAMETER_WRITE 0x00000000
11594 
11595 /* NV-Register NV_054_SET_CONTEXT_DMA_NOTIFY */
11596 #define NV_054_SET_CONTEXT_DMA_NOTIFY 0x005E0180
11597 #define NV_054_SET_CONTEXT_DMA_NOTIFY_PARAMETER 0xFFFFFFFF
11598 
11599 /* NV-Register NV_054_SET_CONTEXT_DMA_A */
11600 #define NV_054_SET_CONTEXT_DMA_A 0x005E0184
11601 #define NV_054_SET_CONTEXT_DMA_A_PARAMETER 0xFFFFFFFF
11602 
11603 /* NV-Register NV_054_SET_CONTEXT_DMA_B */
11604 #define NV_054_SET_CONTEXT_DMA_B 0x005E0188
11605 #define NV_054_SET_CONTEXT_DMA_B_PARAMETER 0xFFFFFFFF
11606 
11607 /* NV-Register NV_054_SET_CONTEXT_SURFACES */
11608 #define NV_054_SET_CONTEXT_SURFACES 0x005E018C
11609 #define NV_054_SET_CONTEXT_SURFACES_PARAMETER 0xFFFFFFFF
11610 
11611 /* NV-Register NV_054_COLORKEY */
11612 #define NV_054_COLORKEY 0x005E0300
11613 #define NV_054_COLORKEY_VALUE 0xFFFFFFFF
11614 
11615 /* NV-Register NV_054_OFFSET */
11616 #define NV_054_OFFSET 0x005E0304
11617 #define NV_054_OFFSET_VALUE 0xFFFFFFFF
11618 
11619 /* NV-Register NV_054_FORMAT */
11620 #define NV_054_FORMAT 0x005E0308
11621 #define NV_054_FORMAT_CONTEXT_DMA 0x00000003
11622 #define NV_054_FORMAT_CONTEXT_DMA_A 0x00000001
11623 #define NV_054_FORMAT_CONTEXT_DMA_B 0x00000002
11624 #define NV_054_FORMAT_COLORKEYENABLE 0x0000000C
11625 #define NV_054_FORMAT_COLORKEYENABLE_FALSE 0x00000000
11626 #define NV_054_FORMAT_COLORKEYENABLE_TRUE 0x00000004
11627 #define NV_054_FORMAT_ORIGIN_ZOH 0x00000030
11628 #define NV_054_FORMAT_ORIGIN_ZOH_CENTER 0x00000010
11629 #define NV_054_FORMAT_ORIGIN_ZOH_CORNER 0x00000020
11630 #define NV_054_FORMAT_ORIGIN_FOH 0x000000C0
11631 #define NV_054_FORMAT_ORIGIN_FOH_CENTER 0x00000040
11632 #define NV_054_FORMAT_ORIGIN_FOH_CORNER 0x00000080
11633 #define NV_054_FORMAT_COLOR 0x00000F00
11634 #define NV_054_FORMAT_COLOR_LE_Y8 0x00000100
11635 #define NV_054_FORMAT_COLOR_LE_A1R5G5B5 0x00000200
11636 #define NV_054_FORMAT_COLOR_LE_X1R5G5B5 0x00000300
11637 #define NV_054_FORMAT_COLOR_LE_A4R4G4B4 0x00000400
11638 #define NV_054_FORMAT_COLOR_LE_R5G6B5 0x00000500
11639 #define NV_054_FORMAT_COLOR_LE_A8R8G8B8 0x00000600
11640 #define NV_054_FORMAT_COLOR_LE_X8R8G8B8 0x00000700
11641 #define NV_054_FORMAT_MIPMAP_LEVELS 0x0000F000
11642 #define NV_054_FORMAT_BASE_SIZE_U 0x000F0000
11643 #define NV_054_FORMAT_BASE_SIZE_U_1X1 0x00000000
11644 #define NV_054_FORMAT_BASE_SIZE_U_2X2 0x00010000
11645 #define NV_054_FORMAT_BASE_SIZE_U_4X4 0x00020000
11646 #define NV_054_FORMAT_BASE_SIZE_U_8X8 0x00030000
11647 #define NV_054_FORMAT_BASE_SIZE_U_16X16 0x00040000
11648 #define NV_054_FORMAT_BASE_SIZE_U_32X32 0x00050000
11649 #define NV_054_FORMAT_BASE_SIZE_U_64X64 0x00060000
11650 #define NV_054_FORMAT_BASE_SIZE_U_128X128 0x00070000
11651 #define NV_054_FORMAT_BASE_SIZE_U_256X256 0x00080000
11652 #define NV_054_FORMAT_BASE_SIZE_U_512X512 0x00090000
11653 #define NV_054_FORMAT_BASE_SIZE_U_1024X1024 0x000A0000
11654 #define NV_054_FORMAT_BASE_SIZE_U_2048X2048 0x000B0000
11655 #define NV_054_FORMAT_BASE_SIZE_V 0x00F00000
11656 #define NV_054_FORMAT_BASE_SIZE_V_1X1 0x00000000
11657 #define NV_054_FORMAT_BASE_SIZE_V_2X2 0x00100000
11658 #define NV_054_FORMAT_BASE_SIZE_V_4X4 0x00200000
11659 #define NV_054_FORMAT_BASE_SIZE_V_8X8 0x00300000
11660 #define NV_054_FORMAT_BASE_SIZE_V_16X16 0x00400000
11661 #define NV_054_FORMAT_BASE_SIZE_V_32X32 0x00500000
11662 #define NV_054_FORMAT_BASE_SIZE_V_64X64 0x00600000
11663 #define NV_054_FORMAT_BASE_SIZE_V_128X128 0x00700000
11664 #define NV_054_FORMAT_BASE_SIZE_V_256X256 0x00800000
11665 #define NV_054_FORMAT_BASE_SIZE_V_512X512 0x00900000
11666 #define NV_054_FORMAT_BASE_SIZE_V_1024X1024 0x00A00000
11667 #define NV_054_FORMAT_BASE_SIZE_V_2048X2048 0x00B00000
11668 #define NV_054_FORMAT_TEXTUREADDRESSU 0x07000000
11669 #define NV_054_FORMAT_TEXTUREADDRESSU_WRAP 0x01000000
11670 #define NV_054_FORMAT_TEXTUREADDRESSU_MIRROR 0x02000000
11671 #define NV_054_FORMAT_TEXTUREADDRESSU_CLAMP 0x03000000
11672 #define NV_054_FORMAT_TEXTUREADDRESSU_BORDER 0x04000000
11673 #define NV_054_FORMAT_WRAPU 0x08000000
11674 #define NV_054_FORMAT_WRAPU_FALSE 0xF7FFFFFF
11675 #define NV_054_FORMAT_WRAPU_TRUE 0x08000000
11676 #define NV_054_FORMAT_TEXTUREADDRESSV 0x70000000
11677 #define NV_054_FORMAT_TEXTUREADDRESSV_WRAP 0x10000000
11678 #define NV_054_FORMAT_TEXTUREADDRESSV_MIRROR 0x20000000
11679 #define NV_054_FORMAT_TEXTUREADDRESSV_CLAMP 0x30000000
11680 #define NV_054_FORMAT_TEXTUREADDRESSV_BORDER 0x40000000
11681 #define NV_054_FORMAT_WRAPV 0x80000000
11682 #define NV_054_FORMAT_WRAPV_FALSE 0x7FFFFFFF
11683 #define NV_054_FORMAT_WRAPV_TRUE 0x80000000
11684 
11685 /* NV-Register NV_054_FILTER */
11686 #define NV_054_FILTER 0x005E030C
11687 #define NV_054_FILTER_KERNEL_SIZE_X 0x000000FF
11688 #define NV_054_FILTER_KERNEL_SIZE_Y 0x00007F00
11689 #define NV_054_FILTER_MIPMAP_DITHER_ENABLE 0x00008000
11690 #define NV_054_FILTER_MIPMAP_DITHER_ENABLE_FALSE 0xFFFF7FFF
11691 #define NV_054_FILTER_MIPMAP_DITHER_ENABLE_TRUE 0x00008000
11692 #define NV_054_FILTER_MIPMAPLODBIAS 0x00FF0000
11693 #define NV_054_FILTER_TEXTUREMIN 0x07000000
11694 #define NV_054_FILTER_TEXTUREMIN_NEAREST 0x01000000
11695 #define NV_054_FILTER_TEXTUREMIN_LINEAR 0x02000000
11696 #define NV_054_FILTER_TEXTUREMIN_MIPNEAREST 0x03000000
11697 #define NV_054_FILTER_TEXTUREMIN_MIPLINEAR 0x04000000
11698 #define NV_054_FILTER_TEXTUREMIN_LINEARMIPNEAREST 0x05000000
11699 #define NV_054_FILTER_TEXTUREMIN_LINEARMIPLINEAR 0x06000000
11700 #define NV_054_FILTER_ANISOTROPIC_MIN_ENABLE 0x08000000
11701 #define NV_054_FILTER_ANISOTROPIC_MIN_ENABLE_FALSE 0xF7FFFFFF
11702 #define NV_054_FILTER_ANISOTROPIC_MIN_ENABLE_TRUE 0x08000000
11703 #define NV_054_FILTER_TEXTUREMAG 0x70000000
11704 #define NV_054_FILTER_TEXTUREMAG_NEAREST 0x10000000
11705 #define NV_054_FILTER_TEXTUREMAG_LINEAR 0x20000000
11706 #define NV_054_FILTER_TEXTUREMAG_MIPNEAREST 0x30000000
11707 #define NV_054_FILTER_TEXTUREMAG_MIPLINEAR 0x40000000
11708 #define NV_054_FILTER_TEXTUREMAG_LINEARMIPNEAREST 0x50000000
11709 #define NV_054_FILTER_TEXTUREMAG_LINEARMIPLINEAR 0x60000000
11710 #define NV_054_FILTER_ANISOTROPIC_MAG_ENABLE 0x80000000
11711 #define NV_054_FILTER_ANISOTROPIC_MAG_ENABLE_FALSE 0x7FFFFFFF
11712 #define NV_054_FILTER_ANISOTROPIC_MAG_ENABLE_TRUE 0x80000000
11713 
11714 /* NV-Register NV_054_BLEND */
11715 #define NV_054_BLEND 0x005E0310
11716 #define NV_054_BLEND_TEXTUREMAPBLEND 0x0000000F
11717 #define NV_054_BLEND_TEXTUREMAPBLEND_DECAL 0x00000001
11718 #define NV_054_BLEND_TEXTUREMAPBLEND_MODULATE 0x00000002
11719 #define NV_054_BLEND_TEXTUREMAPBLEND_DECALALPHA 0x00000003
11720 #define NV_054_BLEND_TEXTUREMAPBLEND_MODULATEALPHA 0x00000004
11721 #define NV_054_BLEND_TEXTUREMAPBLEND_DECALMASK 0x00000005
11722 #define NV_054_BLEND_TEXTUREMAPBLEND_MODULATEMASK 0x00000006
11723 #define NV_054_BLEND_TEXTUREMAPBLEND_COPY 0x00000007
11724 #define NV_054_BLEND_TEXTUREMAPBLEND_ADD 0x00000008
11725 #define NV_054_BLEND_OPERATION 0x00000030
11726 #define NV_054_BLEND_OPERATION_MUX_TALPHALSB 0x00000010
11727 #define NV_054_BLEND_OPERATION_MUX_TALPHAMSB 0x00000020
11728 #define NV_054_BLEND_SHADEMODE 0x000000C0
11729 #define NV_054_BLEND_SHADEMODE_FLAT 0x00000040
11730 #define NV_054_BLEND_SHADEMODE_GOURAUD 0x00000080
11731 #define NV_054_BLEND_SHADEMODE_PHONG 0x000000C0
11732 #define NV_054_BLEND_TEXTUREPERSPECTIVE 0x00000F00
11733 #define NV_054_BLEND_TEXTUREPERSPECTIVE_FALSE 0x00000000
11734 #define NV_054_BLEND_TEXTUREPERSPECTIVE_TRUE 0x00000100
11735 #define NV_054_BLEND_SPECULARENABLE 0x0000F000
11736 #define NV_054_BLEND_SPECULARENABLE_FALSE 0x00000000
11737 #define NV_054_BLEND_SPECULARENABLE_TRUE 0x00001000
11738 #define NV_054_BLEND_FOGENABLE 0x000F0000
11739 #define NV_054_BLEND_FOGENABLE_FALSE 0x00000000
11740 #define NV_054_BLEND_FOGENABLE_TRUE 0x00010000
11741 #define NV_054_BLEND_ALPHABLENDENABLE 0x00F00000
11742 #define NV_054_BLEND_ALPHABLENDENABLE_FALSE 0x00000000
11743 #define NV_054_BLEND_ALPHABLENDENABLE_TRUE 0x00100000
11744 #define NV_054_BLEND_SRCBLEND 0x0F000000
11745 #define NV_054_BLEND_SRCBLEND_ZERO 0x01000000
11746 #define NV_054_BLEND_SRCBLEND_ONE 0x02000000
11747 #define NV_054_BLEND_SRCBLEND_SRCCOLOR 0x03000000
11748 #define NV_054_BLEND_SRCBLEND_INVSRCCOLOR 0x04000000
11749 #define NV_054_BLEND_SRCBLEND_SRCALPHA 0x05000000
11750 #define NV_054_BLEND_SRCBLEND_INVSRCALPHA 0x06000000
11751 #define NV_054_BLEND_SRCBLEND_DESTALPHA 0x07000000
11752 #define NV_054_BLEND_SRCBLEND_INVDESTALPHA 0x08000000
11753 #define NV_054_BLEND_SRCBLEND_DESTCOLOR 0x09000000
11754 #define NV_054_BLEND_SRCBLEND_INVDESTCOLOR 0x0A000000
11755 #define NV_054_BLEND_SRCBLEND_SRCALPHASAT 0x0B000000
11756 #define NV_054_BLEND_DESTBLEND 0xF0000000
11757 #define NV_054_BLEND_DESTBLEND_ZERO 0x10000000
11758 #define NV_054_BLEND_DESTBLEND_ONE 0x20000000
11759 #define NV_054_BLEND_DESTBLEND_SRCCOLOR 0x30000000
11760 #define NV_054_BLEND_DESTBLEND_INVSRCCOLOR 0x40000000
11761 #define NV_054_BLEND_DESTBLEND_SRCALPHA 0x50000000
11762 #define NV_054_BLEND_DESTBLEND_INVSRCALPHA 0x60000000
11763 #define NV_054_BLEND_DESTBLEND_DESTALPHA 0x70000000
11764 #define NV_054_BLEND_DESTBLEND_INVDESTALPHA 0x80000000
11765 #define NV_054_BLEND_DESTBLEND_DESTCOLOR 0x90000000
11766 #define NV_054_BLEND_DESTBLEND_INVDESTCOLOR 0xA0000000
11767 #define NV_054_BLEND_DESTBLEND_SRCALPHASAT 0xB0000000
11768 
11769 /* NV-Register NV_054_CONTROL */
11770 #define NV_054_CONTROL 0x005E0314
11771 #define NV_054_CONTROL_ALPHAREF 0x000000FF
11772 #define NV_054_CONTROL_ALPHAFUNC 0x00000F00
11773 #define NV_054_CONTROL_ALPHAFUNC_NEVER 0x00000100
11774 #define NV_054_CONTROL_ALPHAFUNC_LESS 0x00000200
11775 #define NV_054_CONTROL_ALPHAFUNC_EQUAL 0x00000300
11776 #define NV_054_CONTROL_ALPHAFUNC_LESSEQUAL 0x00000400
11777 #define NV_054_CONTROL_ALPHAFUNC_GREATER 0x00000500
11778 #define NV_054_CONTROL_ALPHAFUNC_NOTEQUAL 0x00000600
11779 #define NV_054_CONTROL_ALPHAFUNC_GREATEREQUAL 0x00000700
11780 #define NV_054_CONTROL_ALPHAFUNC_ALWAYS 0x00000800
11781 #define NV_054_CONTROL_ALPHATESTENABLE 0x00001000
11782 #define NV_054_CONTROL_ALPHATESTENABLE_FALSE 0xFFFFEFFF
11783 #define NV_054_CONTROL_ALPHATESTENABLE_TRUE 0x00001000
11784 #define NV_054_CONTROL_ORIGIN 0x00002000
11785 #define NV_054_CONTROL_ORIGIN_CENTER 0xFFFFDFFF
11786 #define NV_054_CONTROL_ORIGIN_CORNER 0x00002000
11787 #define NV_054_CONTROL_ZENABLE 0x0000C000
11788 #define NV_054_CONTROL_ZENABLE_FALSE 0x00000000
11789 #define NV_054_CONTROL_ZENABLE_TRUE 0x00004000
11790 #define NV_054_CONTROL_ZFUNC 0x000F0000
11791 #define NV_054_CONTROL_ZFUNC_NEVER 0x00010000
11792 #define NV_054_CONTROL_ZFUNC_LESS 0x00020000
11793 #define NV_054_CONTROL_ZFUNC_EQUAL 0x00030000
11794 #define NV_054_CONTROL_ZFUNC_LESSEQUAL 0x00040000
11795 #define NV_054_CONTROL_ZFUNC_GREATER 0x00050000
11796 #define NV_054_CONTROL_ZFUNC_NOTEQUAL 0x00060000
11797 #define NV_054_CONTROL_ZFUNC_GREATEREQUAL 0x00070000
11798 #define NV_054_CONTROL_ZFUNC_ALWAYS 0x00080000
11799 #define NV_054_CONTROL_CULLMODE 0x00300000
11800 #define NV_054_CONTROL_CULLMODE_NONE 0x00100000
11801 #define NV_054_CONTROL_CULLMODE_CW 0x00200000
11802 #define NV_054_CONTROL_CULLMODE_CCW 0x00300000
11803 #define NV_054_CONTROL_DITHERENABLE 0x00400000
11804 #define NV_054_CONTROL_DITHERENABLE_FALSE 0xFFBFFFFF
11805 #define NV_054_CONTROL_DITHERENABLE_TRUE 0x00400000
11806 #define NV_054_CONTROL_Z_PERSPECTIVE_ENABLE 0x00800000
11807 #define NV_054_CONTROL_Z_PERSPECTIVE_ENABLE_FALSE 0xFF7FFFFF
11808 #define NV_054_CONTROL_Z_PERSPECTIVE_ENABLE_TRUE 0x00800000
11809 #define NV_054_CONTROL_ZWRITEENABLE 0x3F000000
11810 #define NV_054_CONTROL_ZWRITEENABLE_FALSE 0x00000000
11811 #define NV_054_CONTROL_ZWRITEENABLE_TRUE 0x01000000
11812 #define NV_054_CONTROL_Z_FORMAT 0xC0000000
11813 #define NV_054_CONTROL_Z_FORMAT_FIXED 0x40000000
11814 #define NV_054_CONTROL_Z_FORMAT_FLOAT 0x80000000
11815 
11816 /* NV-Register NV_054_FOGCOLOR */
11817 #define NV_054_FOGCOLOR 0x005E0318
11818 #define NV_054_FOGCOLOR_VALUE 0xFFFFFFFF
11819 
11820 /* NV-Array NV_054_TLVERTEX_SX (32 byte access) */
11821 #define NV_054_TLVERTEX_SX 0x005E0400
11822 /* NV-Array size NV_054_TLVERTEX_SX__SIZE_1 [0..15] */
11823 #define NV_054_TLVERTEX_SX__SIZE_1 0x00000010
11824 #define NV_054_TLVERTEX_SX_VALUE 0xFFFFFFFF
11825 
11826 /* NV-Array NV_054_TLVERTEX_SY (32 byte access) */
11827 #define NV_054_TLVERTEX_SY 0x005E0404
11828 /* NV-Array size NV_054_TLVERTEX_SY__SIZE_1 [0..15] */
11829 #define NV_054_TLVERTEX_SY__SIZE_1 0x00000010
11830 #define NV_054_TLVERTEX_SY_VALUE 0xFFFFFFFF
11831 
11832 /* NV-Array NV_054_TLVERTEX_SZ (32 byte access) */
11833 #define NV_054_TLVERTEX_SZ 0x005E0408
11834 /* NV-Array size NV_054_TLVERTEX_SZ__SIZE_1 [0..15] */
11835 #define NV_054_TLVERTEX_SZ__SIZE_1 0x00000010
11836 #define NV_054_TLVERTEX_SZ_VALUE 0xFFFFFFFF
11837 
11838 /* NV-Array NV_054_TLVERTEX_RHW (32 byte access) */
11839 #define NV_054_TLVERTEX_RHW 0x005E040C
11840 /* NV-Array size NV_054_TLVERTEX_RHW__SIZE_1 [0..15] */
11841 #define NV_054_TLVERTEX_RHW__SIZE_1 0x00000010
11842 #define NV_054_TLVERTEX_RHW_VALUE 0xFFFFFFFF
11843 
11844 /* NV-Array NV_054_TLVERTEX_COLOR (32 byte access) */
11845 #define NV_054_TLVERTEX_COLOR 0x005E0410
11846 /* NV-Array size NV_054_TLVERTEX_COLOR__SIZE_1 [0..15] */
11847 #define NV_054_TLVERTEX_COLOR__SIZE_1 0x00000010
11848 #define NV_054_TLVERTEX_COLOR_VALUE 0xFFFFFFFF
11849 #define NV_054_TLVERTEX_COLOR_BLUE 0x000000FF
11850 #define NV_054_TLVERTEX_COLOR_GREEN 0x0000FF00
11851 #define NV_054_TLVERTEX_COLOR_RED 0x00FF0000
11852 #define NV_054_TLVERTEX_COLOR_ALPHA 0xFF000000
11853 
11854 /* NV-Array NV_054_TLVERTEX_SPECULAR (32 byte access) */
11855 #define NV_054_TLVERTEX_SPECULAR 0x005E0414
11856 /* NV-Array size NV_054_TLVERTEX_SPECULAR__SIZE_1 [0..15] */
11857 #define NV_054_TLVERTEX_SPECULAR__SIZE_1 0x00000010
11858 #define NV_054_TLVERTEX_SPECULAR_VALUE 0xFFFFFFFF
11859 #define NV_054_TLVERTEX_SPECULAR_BLUE 0x000000FF
11860 #define NV_054_TLVERTEX_SPECULAR_GREEN 0x0000FF00
11861 #define NV_054_TLVERTEX_SPECULAR_RED 0x00FF0000
11862 #define NV_054_TLVERTEX_SPECULAR_FOG 0xFF000000
11863 
11864 /* NV-Array NV_054_TLVERTEX_TU (32 byte access) */
11865 #define NV_054_TLVERTEX_TU 0x005E0418
11866 /* NV-Array size NV_054_TLVERTEX_TU__SIZE_1 [0..15] */
11867 #define NV_054_TLVERTEX_TU__SIZE_1 0x00000010
11868 #define NV_054_TLVERTEX_TU_VALUE 0xFFFFFFFF
11869 
11870 /* NV-Array NV_054_TLVERTEX_TV (32 byte access) */
11871 #define NV_054_TLVERTEX_TV 0x005E041C
11872 /* NV-Array size NV_054_TLVERTEX_TV__SIZE_1 [0..15] */
11873 #define NV_054_TLVERTEX_TV__SIZE_1 0x00000010
11874 #define NV_054_TLVERTEX_TV_VALUE 0xFFFFFFFF
11875 
11876 /* NV-Array NV_054_TLVERTEX_DRAWPRIMITIVE (4 byte access) */
11877 #define NV_054_TLVERTEX_DRAWPRIMITIVE 0x005E0600
11878 /* NV-Array size NV_054_TLVERTEX_DRAWPRIMITIVE__SIZE_1 [0..63] */
11879 #define NV_054_TLVERTEX_DRAWPRIMITIVE__SIZE_1 0x00000040
11880 #define NV_054_TLVERTEX_DRAWPRIMITIVE_I0 0x0000000F
11881 #define NV_054_TLVERTEX_DRAWPRIMITIVE_I1 0x000000F0
11882 #define NV_054_TLVERTEX_DRAWPRIMITIVE_I2 0x00000F00
11883 #define NV_054_TLVERTEX_DRAWPRIMITIVE_I3 0x0000F000
11884 #define NV_054_TLVERTEX_DRAWPRIMITIVE_I4 0x000F0000
11885 #define NV_054_TLVERTEX_DRAWPRIMITIVE_I5 0xFFF00000
11886 
11887 /* NV-Device NV_055 */
11888 #define NV_055 0x005F0000 /* size: 0x00001FFF */
11889 #define NV4_DX6_MULTI_TEXTURE_TRIANGLE 0x05500000
11890 
11891 /* NV-Register NV_055_NV4_DX6_MULTI_TEXTURE_TRIANGLE */
11892 #define NV_055_NV4_DX6_MULTI_TEXTURE_TRIANGLE 0x005F0000
11893 #define NV_055_NV4_DX6_MULTI_TEXTURE_TRIANGLE_HANDLE 0xFFFFFFFF
11894 
11895 /* NV-Register NV_055_NOP */
11896 #define NV_055_NOP 0x005F0100
11897 #define NV_055_NOP_PARAMETER 0xFFFFFFFF
11898 
11899 /* NV-Register NV_055_NOTIFY */
11900 #define NV_055_NOTIFY 0x005F0104
11901 #define NV_055_NOTIFY_STYLE 0xFFFFFFFF
11902 #define NV_055_NOTIFY_STYLE_WRITE_ONLY 0x00000000
11903 #define NV_055_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001
11904 #define NV_055_NOTIFY_STYLE_NOT_PENDING 0x00000002
11905 
11906 /* NV-Register NV_055_SET_CONTEXT_DMA_NOTIFY */
11907 #define NV_055_SET_CONTEXT_DMA_NOTIFY 0x005F0180
11908 #define NV_055_SET_CONTEXT_DMA_NOTIFY_PARAMETER 0xFFFFFFFF
11909 
11910 /* NV-Register NV_055_SET_CONTEXT_DMA_A */
11911 #define NV_055_SET_CONTEXT_DMA_A 0x005F0184
11912 #define NV_055_SET_CONTEXT_DMA_A_PARAMETER 0xFFFFFFFF
11913 
11914 /* NV-Register NV_055_SET_CONTEXT_DMA_B */
11915 #define NV_055_SET_CONTEXT_DMA_B 0x005F0188
11916 #define NV_055_SET_CONTEXT_DMA_B_PARAMETER 0xFFFFFFFF
11917 
11918 /* NV-Register NV_055_SET_CONTEXT_SURFACES */
11919 #define NV_055_SET_CONTEXT_SURFACES 0x005F018C
11920 #define NV_055_SET_CONTEXT_SURFACES_PARAMETER 0xFFFFFFFF
11921 
11922 /* NV-Array NV_055_OFFSET (4 byte access) */
11923 #define NV_055_OFFSET 0x005F0308
11924 /* NV-Array size NV_055_OFFSET__SIZE_1 [0..1] */
11925 #define NV_055_OFFSET__SIZE_1 0x00000002
11926 #define NV_055_OFFSET_VALUE 0xFFFFFFFF
11927 
11928 /* NV-Array NV_055_FORMAT (4 byte access) */
11929 #define NV_055_FORMAT 0x005F0310
11930 /* NV-Array size NV_055_FORMAT__SIZE_1 [0..1] */
11931 #define NV_055_FORMAT__SIZE_1 0x00000002
11932 #define NV_055_FORMAT_CONTEXT_DMA 0x0000000F
11933 #define NV_055_FORMAT_CONTEXT_DMA_A 0x00000001
11934 #define NV_055_FORMAT_CONTEXT_DMA_B 0x00000002
11935 #define NV_055_FORMAT_ORIGIN_ZOH 0x00000030
11936 #define NV_055_FORMAT_ORIGIN_ZOH_CENTER 0x00000010
11937 #define NV_055_FORMAT_ORIGIN_ZOH_CORNER 0x00000020
11938 #define NV_055_FORMAT_ORIGIN_FOH 0x000000C0
11939 #define NV_055_FORMAT_ORIGIN_FOH_CENTER 0x00000040
11940 #define NV_055_FORMAT_ORIGIN_FOH_CORNER 0x00000080
11941 #define NV_055_FORMAT_COLOR 0x00000F00
11942 #define NV_055_FORMAT_COLOR_LE_AY8 0x00000100
11943 #define NV_055_FORMAT_COLOR_LE_A1R5G5B5 0x00000200
11944 #define NV_055_FORMAT_COLOR_LE_X1R5G5B5 0x00000300
11945 #define NV_055_FORMAT_COLOR_LE_A4R4G4G4 0x00000400
11946 #define NV_055_FORMAT_COLOR_LE_R5G6B5 0x00000500
11947 #define NV_055_FORMAT_COLOR_LE_A8R8G8B8 0x00000600
11948 #define NV_055_FORMAT_COLOR_LE_X8R8G8B8 0x00000700
11949 #define NV_055_FORMAT_MIPMAP_LEVELS 0x0000F000
11950 #define NV_055_FORMAT_MIPMAP_LEVELS_1 0x00001000
11951 #define NV_055_FORMAT_MIPMAP_LEVELS_2 0x00002000
11952 #define NV_055_FORMAT_MIPMAP_LEVELS_3 0x00003000
11953 #define NV_055_FORMAT_MIPMAP_LEVELS_4 0x00004000
11954 #define NV_055_FORMAT_MIPMAP_LEVELS_5 0x00005000
11955 #define NV_055_FORMAT_MIPMAP_LEVELS_6 0x00006000
11956 #define NV_055_FORMAT_MIPMAP_LEVELS_7 0x00007000
11957 #define NV_055_FORMAT_MIPMAP_LEVELS_8 0x00008000
11958 #define NV_055_FORMAT_MIPMAP_LEVELS_9 0x00009000
11959 #define NV_055_FORMAT_MIPMAP_LEVELS_10 0x0000A000
11960 #define NV_055_FORMAT_MIPMAP_LEVELS_11 0x0000B000
11961 #define NV_055_FORMAT_MIPMAP_LEVELS_12 0x0000C000
11962 #define NV_055_FORMAT_MIPMAP_LEVELS_13 0x0000D000
11963 #define NV_055_FORMAT_MIPMAP_LEVELS_14 0x0000E000
11964 #define NV_055_FORMAT_MIPMAP_LEVELS_15 0x0000F000
11965 #define NV_055_FORMAT_BASE_SIZE_U 0x000F0000
11966 #define NV_055_FORMAT_BASE_SIZE_U_1X1 0x00000000
11967 #define NV_055_FORMAT_BASE_SIZE_U_2X2 0x00010000
11968 #define NV_055_FORMAT_BASE_SIZE_U_4X4 0x00020000
11969 #define NV_055_FORMAT_BASE_SIZE_U_8X8 0x00030000
11970 #define NV_055_FORMAT_BASE_SIZE_U_16X16 0x00040000
11971 #define NV_055_FORMAT_BASE_SIZE_U_32X32 0x00050000
11972 #define NV_055_FORMAT_BASE_SIZE_U_64X64 0x00060000
11973 #define NV_055_FORMAT_BASE_SIZE_U_128X128 0x00070000
11974 #define NV_055_FORMAT_BASE_SIZE_U_256X256 0x00080000
11975 #define NV_055_FORMAT_BASE_SIZE_U_512X512 0x00090000
11976 #define NV_055_FORMAT_BASE_SIZE_U_1024X1024 0x000A0000
11977 #define NV_055_FORMAT_BASE_SIZE_U_2048X2048 0x000B0000
11978 #define NV_055_FORMAT_BASE_SIZE_V 0x00F00000
11979 #define NV_055_FORMAT_BASE_SIZE_V_1X1 0x00000000
11980 #define NV_055_FORMAT_BASE_SIZE_V_2X2 0x00100000
11981 #define NV_055_FORMAT_BASE_SIZE_V_4X4 0x00200000
11982 #define NV_055_FORMAT_BASE_SIZE_V_8X8 0x00300000
11983 #define NV_055_FORMAT_BASE_SIZE_V_16X16 0x00400000
11984 #define NV_055_FORMAT_BASE_SIZE_V_32X32 0x00500000
11985 #define NV_055_FORMAT_BASE_SIZE_V_64X64 0x00600000
11986 #define NV_055_FORMAT_BASE_SIZE_V_128X128 0x00700000
11987 #define NV_055_FORMAT_BASE_SIZE_V_256X256 0x00800000
11988 #define NV_055_FORMAT_BASE_SIZE_V_512X512 0x00900000
11989 #define NV_055_FORMAT_BASE_SIZE_V_1024X1024 0x00A00000
11990 #define NV_055_FORMAT_BASE_SIZE_V_2048X2048 0x00B00000
11991 #define NV_055_FORMAT_TEXTUREADDRESSU 0x07000000
11992 #define NV_055_FORMAT_TEXTUREADDRESSU_WRAP 0x01000000
11993 #define NV_055_FORMAT_TEXTUREADDRESSU_MIRROR 0x02000000
11994 #define NV_055_FORMAT_TEXTUREADDRESSU_CLAMP 0x03000000
11995 #define NV_055_FORMAT_TEXTUREADDRESSU_BORDER 0x04000000
11996 #define NV_055_FORMAT_WRAPU 0x08000000
11997 #define NV_055_FORMAT_WRAPU_FALSE 0xF7FFFFFF
11998 #define NV_055_FORMAT_WRAPU_TRUE 0x08000000
11999 #define NV_055_FORMAT_TEXTUREADDRESSV 0x70000000
12000 #define NV_055_FORMAT_TEXTUREADDRESSV_WRAP 0x10000000
12001 #define NV_055_FORMAT_TEXTUREADDRESSV_MIRROR 0x20000000
12002 #define NV_055_FORMAT_TEXTUREADDRESSV_CLAMP 0x30000000
12003 #define NV_055_FORMAT_TEXTUREADDRESSV_BORDER 0x40000000
12004 #define NV_055_FORMAT_WRAPV 0x80000000
12005 #define NV_055_FORMAT_WRAPV_FALSE 0x7FFFFFFF
12006 #define NV_055_FORMAT_WRAPV_TRUE 0x80000000
12007 
12008 /* NV-Array NV_055_FILTER (4 byte access) */
12009 #define NV_055_FILTER 0x005F0318
12010 /* NV-Array size NV_055_FILTER__SIZE_1 [0..1] */
12011 #define NV_055_FILTER__SIZE_1 0x00000002
12012 #define NV_055_FILTER_KERNEL_SIZE_X 0x000000FF
12013 #define NV_055_FILTER_KERNEL_SIZE_Y 0x00007F00
12014 #define NV_055_FILTER_MIPMAP_DITHER_ENABLE 0x00008000
12015 #define NV_055_FILTER_MIPMAP_DITHER_ENABLE_FALSE 0xFFFF7FFF
12016 #define NV_055_FILTER_MIPMAP_DITHER_ENABLE_TRUE 0x00008000
12017 #define NV_055_FILTER_MIPMAPLODBIAS 0x00FF0000
12018 #define NV_055_FILTER_TEXTUREMIN 0x07000000
12019 #define NV_055_FILTER_TEXTUREMIN_NEAREST 0x01000000
12020 #define NV_055_FILTER_TEXTUREMIN_LINEAR 0x02000000
12021 #define NV_055_FILTER_TEXTUREMIN_MIPNEAREST 0x03000000
12022 #define NV_055_FILTER_TEXTUREMIN_MIPLINEAR 0x04000000
12023 #define NV_055_FILTER_TEXTUREMIN_LINEARMIPNEAREST 0x05000000
12024 #define NV_055_FILTER_TEXTUREMIN_LINEARMIPLINEAR 0x06000000
12025 #define NV_055_FILTER_ANISOTROPIC_MIN_ENABLE 0x08000000
12026 #define NV_055_FILTER_ANISOTROPIC_MIN_ENABLE_FALSE 0xF7FFFFFF
12027 #define NV_055_FILTER_ANISOTROPIC_MIN_ENABLE_TRUE 0x08000000
12028 #define NV_055_FILTER_TEXTUREMAG 0x70000000
12029 #define NV_055_FILTER_TEXTUREMAG_NEAREST 0x10000000
12030 #define NV_055_FILTER_TEXTUREMAG_LINEAR 0x20000000
12031 #define NV_055_FILTER_TEXTUREMAG_MIPNEAREST 0x30000000
12032 #define NV_055_FILTER_TEXTUREMAG_MIPLINEAR 0x40000000
12033 #define NV_055_FILTER_TEXTUREMAG_LINEARMIPNEAREST 0x50000000
12034 #define NV_055_FILTER_TEXTUREMAG_LINEARMIPLINEAR 0x60000000
12035 #define NV_055_FILTER_ANISOTROPIC_MAG_ENABLE 0x80000000
12036 #define NV_055_FILTER_ANISOTROPIC_MAG_ENABLE_FALSE 0x7FFFFFFF
12037 #define NV_055_FILTER_ANISOTROPIC_MAG_ENABLE_TRUE 0x80000000
12038 
12039 /* NV-Register NV_055_COMBINE_0_ALPHA */
12040 #define NV_055_COMBINE_0_ALPHA 0x005F0320
12041 #define NV_055_COMBINE_0_ALPHA_INVERSE_0 0x00000001
12042 #define NV_055_COMBINE_0_ALPHA_INVERSE_0_NORMAL 0xFFFFFFFE
12043 #define NV_055_COMBINE_0_ALPHA_INVERSE_0_INVERSE 0x00000001
12044 #define NV_055_COMBINE_0_ALPHA_ALPHA_0 0x00000002
12045 #define NV_055_COMBINE_0_ALPHA_ARGUMENT_0 0x000000FC
12046 #define NV_055_COMBINE_0_ALPHA_ARGUMENT_0_ZERO 0x00000004
12047 #define NV_055_COMBINE_0_ALPHA_ARGUMENT_0_FACTOR 0x00000008
12048 #define NV_055_COMBINE_0_ALPHA_ARGUMENT_0_DIFFUSE 0x0000000C
12049 #define NV_055_COMBINE_0_ALPHA_ARGUMENT_0_INPUT 0x00000010
12050 #define NV_055_COMBINE_0_ALPHA_ARGUMENT_0_TEXTURE0 0x00000014
12051 #define NV_055_COMBINE_0_ALPHA_ARGUMENT_0_TEXTURE1 0x00000018
12052 #define NV_055_COMBINE_0_ALPHA_ARGUMENT_0_TEXTURELOD 0x0000001C
12053 #define NV_055_COMBINE_0_ALPHA_INVERSE_1 0x00000100
12054 #define NV_055_COMBINE_0_ALPHA_INVERSE_1_NORMAL 0xFFFFFEFF
12055 #define NV_055_COMBINE_0_ALPHA_INVERSE_1_INVERSE 0x00000100
12056 #define NV_055_COMBINE_0_ALPHA_ALPHA_1 0x00000200
12057 #define NV_055_COMBINE_0_ALPHA_ARGUMENT_1 0x0000FC00
12058 #define NV_055_COMBINE_0_ALPHA_ARGUMENT_1_ZERO 0x00000400
12059 #define NV_055_COMBINE_0_ALPHA_ARGUMENT_1_FACTOR 0x00000800
12060 #define NV_055_COMBINE_0_ALPHA_ARGUMENT_1_DIFFUSE 0x00000C00
12061 #define NV_055_COMBINE_0_ALPHA_ARGUMENT_1_INPUT 0x00001000
12062 #define NV_055_COMBINE_0_ALPHA_ARGUMENT_1_TEXTURE0 0x00001400
12063 #define NV_055_COMBINE_0_ALPHA_ARGUMENT_1_TEXTURE1 0x00001800
12064 #define NV_055_COMBINE_0_ALPHA_ARGUMENT_1_TEXTURELOD 0x00001C00
12065 #define NV_055_COMBINE_0_ALPHA_INVERSE_2 0x00010000
12066 #define NV_055_COMBINE_0_ALPHA_INVERSE_2_NORMAL 0xFFFEFFFF
12067 #define NV_055_COMBINE_0_ALPHA_INVERSE_2_INVERSE 0x00010000
12068 #define NV_055_COMBINE_0_ALPHA_ALPHA_2 0x00020000
12069 #define NV_055_COMBINE_0_ALPHA_ARGUMENT_2 0x00FC0000
12070 #define NV_055_COMBINE_0_ALPHA_ARGUMENT_2_ZERO 0x00040000
12071 #define NV_055_COMBINE_0_ALPHA_ARGUMENT_2_FACTOR 0x00080000
12072 #define NV_055_COMBINE_0_ALPHA_ARGUMENT_2_DIFFUSE 0x000C0000
12073 #define NV_055_COMBINE_0_ALPHA_ARGUMENT_2_INPUT 0x00100000
12074 #define NV_055_COMBINE_0_ALPHA_ARGUMENT_2_TEXTURE0 0x00140000
12075 #define NV_055_COMBINE_0_ALPHA_ARGUMENT_2_TEXTURE1 0x00180000
12076 #define NV_055_COMBINE_0_ALPHA_ARGUMENT_2_TEXTURELOD 0x001C0000
12077 #define NV_055_COMBINE_0_ALPHA_INVERSE_3 0x01000000
12078 #define NV_055_COMBINE_0_ALPHA_INVERSE_3_NORMAL 0xFEFFFFFF
12079 #define NV_055_COMBINE_0_ALPHA_INVERSE_3_INVERSE 0x01000000
12080 #define NV_055_COMBINE_0_ALPHA_ALPHA_3 0x02000000
12081 #define NV_055_COMBINE_0_ALPHA_ARGUMENT_3 0x1C000000
12082 #define NV_055_COMBINE_0_ALPHA_ARGUMENT_3_ZERO 0x04000000
12083 #define NV_055_COMBINE_0_ALPHA_ARGUMENT_3_FACTOR 0x08000000
12084 #define NV_055_COMBINE_0_ALPHA_ARGUMENT_3_DIFFUSE 0x0C000000
12085 #define NV_055_COMBINE_0_ALPHA_ARGUMENT_3_INPUT 0x10000000
12086 #define NV_055_COMBINE_0_ALPHA_ARGUMENT_3_TEXTURE0 0x14000000
12087 #define NV_055_COMBINE_0_ALPHA_ARGUMENT_3_TEXTURE1 0x18000000
12088 #define NV_055_COMBINE_0_ALPHA_ARGUMENT_3_TEXTURELOD 0x1C000000
12089 #define NV_055_COMBINE_0_ALPHA_OPERATION 0xE0000000
12090 #define NV_055_COMBINE_0_ALPHA_OPERATION_ADD 0x20000000
12091 #define NV_055_COMBINE_0_ALPHA_OPERATION_ADD2 0x40000000
12092 #define NV_055_COMBINE_0_ALPHA_OPERATION_ADD4 0x60000000
12093 #define NV_055_COMBINE_0_ALPHA_OPERATION_ADDSIGNED 0x80000000
12094 #define NV_055_COMBINE_0_ALPHA_OPERATION_MUX 0xA0000000
12095 #define NV_055_COMBINE_0_ALPHA_OPERATION_ADDCOMPLEMENT 0xC0000000
12096 #define NV_055_COMBINE_0_ALPHA_OPERATION_ADDSIGNED2 0xE0000000
12097 
12098 /* NV-Register NV_055_COMBINE_0_COLOR */
12099 #define NV_055_COMBINE_0_COLOR 0x005F0324
12100 #define NV_055_COMBINE_0_COLOR_INVERSE_0 0x00000001
12101 #define NV_055_COMBINE_0_COLOR_INVERSE_0_NORMAL 0xFFFFFFFE
12102 #define NV_055_COMBINE_0_COLOR_INVERSE_0_INVERSE 0x00000001
12103 #define NV_055_COMBINE_0_COLOR_ALPHA_0 0x00000002
12104 #define NV_055_COMBINE_0_COLOR_ALPHA_0_COLOR 0xFFFFFFFD
12105 #define NV_055_COMBINE_0_COLOR_ALPHA_0_ALPHA 0x00000002
12106 #define NV_055_COMBINE_0_COLOR_ARGUMENT_0 0x000000FC
12107 #define NV_055_COMBINE_0_COLOR_ARGUMENT_0_ZERO 0x00000004
12108 #define NV_055_COMBINE_0_COLOR_ARGUMENT_0_FACTOR 0x00000008
12109 #define NV_055_COMBINE_0_COLOR_ARGUMENT_0_DIFFUSE 0x0000000C
12110 #define NV_055_COMBINE_0_COLOR_ARGUMENT_0_INPUT 0x00000010
12111 #define NV_055_COMBINE_0_COLOR_ARGUMENT_0_TEXTURE0 0x00000014
12112 #define NV_055_COMBINE_0_COLOR_ARGUMENT_0_TEXTURE1 0x00000018
12113 #define NV_055_COMBINE_0_COLOR_ARGUMENT_0_TEXTURELOD 0x0000001C
12114 #define NV_055_COMBINE_0_COLOR_INVERSE_1 0x00000100
12115 #define NV_055_COMBINE_0_COLOR_INVERSE_1_NORMAL 0xFFFFFEFF
12116 #define NV_055_COMBINE_0_COLOR_INVERSE_1_INVERSE 0x00000100
12117 #define NV_055_COMBINE_0_COLOR_ALPHA_1 0x00000200
12118 #define NV_055_COMBINE_0_COLOR_ALPHA_1_COLOR 0xFFFFFDFF
12119 #define NV_055_COMBINE_0_COLOR_ALPHA_1_ALPHA 0x00000200
12120 #define NV_055_COMBINE_0_COLOR_ARGUMENT_1 0x0000FC00
12121 #define NV_055_COMBINE_0_COLOR_ARGUMENT_1_ZERO 0x00000400
12122 #define NV_055_COMBINE_0_COLOR_ARGUMENT_1_FACTOR 0x00000800
12123 #define NV_055_COMBINE_0_COLOR_ARGUMENT_1_DIFFUSE 0x00000C00
12124 #define NV_055_COMBINE_0_COLOR_ARGUMENT_1_INPUT 0x00001000
12125 #define NV_055_COMBINE_0_COLOR_ARGUMENT_1_TEXTURE0 0x00001400
12126 #define NV_055_COMBINE_0_COLOR_ARGUMENT_1_TEXTURE1 0x00001800
12127 #define NV_055_COMBINE_0_COLOR_ARGUMENT_1_TEXTURELOD 0x00001C00
12128 #define NV_055_COMBINE_0_COLOR_INVERSE_2 0x00010000
12129 #define NV_055_COMBINE_0_COLOR_INVERSE_2_NORMAL 0xFFFEFFFF
12130 #define NV_055_COMBINE_0_COLOR_INVERSE_2_INVERSE 0x00010000
12131 #define NV_055_COMBINE_0_COLOR_ALPHA_2 0x00020000
12132 #define NV_055_COMBINE_0_COLOR_ALPHA_2_COLOR 0xFFFDFFFF
12133 #define NV_055_COMBINE_0_COLOR_ALPHA_2_ALPHA 0x00020000
12134 #define NV_055_COMBINE_0_COLOR_ARGUMENT_2 0x00FC0000
12135 #define NV_055_COMBINE_0_COLOR_ARGUMENT_2_ZERO 0x00040000
12136 #define NV_055_COMBINE_0_COLOR_ARGUMENT_2_FACTOR 0x00080000
12137 #define NV_055_COMBINE_0_COLOR_ARGUMENT_2_DIFFUSE 0x000C0000
12138 #define NV_055_COMBINE_0_COLOR_ARGUMENT_2_INPUT 0x00100000
12139 #define NV_055_COMBINE_0_COLOR_ARGUMENT_2_TEXTURE0 0x00140000
12140 #define NV_055_COMBINE_0_COLOR_ARGUMENT_2_TEXTURE1 0x00180000
12141 #define NV_055_COMBINE_0_COLOR_ARGUMENT_2_TEXTURELOD 0x001C0000
12142 #define NV_055_COMBINE_0_COLOR_INVERSE_3 0x01000000
12143 #define NV_055_COMBINE_0_COLOR_INVERSE_3_NORMAL 0xFEFFFFFF
12144 #define NV_055_COMBINE_0_COLOR_INVERSE_3_INVERSE 0x01000000
12145 #define NV_055_COMBINE_0_COLOR_ALPHA_3 0x02000000
12146 #define NV_055_COMBINE_0_COLOR_ALPHA_3_COLOR 0xFDFFFFFF
12147 #define NV_055_COMBINE_0_COLOR_ALPHA_3_ALPHA 0x02000000
12148 #define NV_055_COMBINE_0_COLOR_ARGUMENT_3 0x1C000000
12149 #define NV_055_COMBINE_0_COLOR_ARGUMENT_3_ZERO 0x04000000
12150 #define NV_055_COMBINE_0_COLOR_ARGUMENT_3_FACTOR 0x08000000
12151 #define NV_055_COMBINE_0_COLOR_ARGUMENT_3_DIFFUSE 0x0C000000
12152 #define NV_055_COMBINE_0_COLOR_ARGUMENT_3_INPUT 0x10000000
12153 #define NV_055_COMBINE_0_COLOR_ARGUMENT_3_TEXTURE0 0x14000000
12154 #define NV_055_COMBINE_0_COLOR_ARGUMENT_3_TEXTURE1 0x18000000
12155 #define NV_055_COMBINE_0_COLOR_ARGUMENT_3_TEXTURELOD 0x1C000000
12156 #define NV_055_COMBINE_0_COLOR_OPERATION 0xE0000000
12157 #define NV_055_COMBINE_0_COLOR_OPERATION_ADD 0x20000000
12158 #define NV_055_COMBINE_0_COLOR_OPERATION_ADD2 0x40000000
12159 #define NV_055_COMBINE_0_COLOR_OPERATION_ADD4 0x60000000
12160 #define NV_055_COMBINE_0_COLOR_OPERATION_ADDSIGNED 0x80000000
12161 #define NV_055_COMBINE_0_COLOR_OPERATION_MUX 0xA0000000
12162 #define NV_055_COMBINE_0_COLOR_OPERATION_ADDCOMPLEMENT 0xC0000000
12163 #define NV_055_COMBINE_0_COLOR_OPERATION_ADDSIGNED2 0xE0000000
12164 
12165 /* NV-Register NV_055_COMBINE_1_ALPHA */
12166 #define NV_055_COMBINE_1_ALPHA 0x005F032C
12167 #define NV_055_COMBINE_1_ALPHA_INVERSE_0 0x00000001
12168 #define NV_055_COMBINE_1_ALPHA_INVERSE_0_NORMAL 0xFFFFFFFE
12169 #define NV_055_COMBINE_1_ALPHA_INVERSE_0_INVERSE 0x00000001
12170 #define NV_055_COMBINE_1_ALPHA_ALPHA_0 0x00000002
12171 #define NV_055_COMBINE_1_ALPHA_ARGUMENT_0 0x000000FC
12172 #define NV_055_COMBINE_1_ALPHA_ARGUMENT_0_ZERO 0x00000004
12173 #define NV_055_COMBINE_1_ALPHA_ARGUMENT_0_FACTOR 0x00000008
12174 #define NV_055_COMBINE_1_ALPHA_ARGUMENT_0_DIFFUSE 0x0000000C
12175 #define NV_055_COMBINE_1_ALPHA_ARGUMENT_0_INPUT 0x00000010
12176 #define NV_055_COMBINE_1_ALPHA_ARGUMENT_0_TEXTURE0 0x00000014
12177 #define NV_055_COMBINE_1_ALPHA_ARGUMENT_0_TEXTURE1 0x00000018
12178 #define NV_055_COMBINE_1_ALPHA_INVERSE_1 0x00000100
12179 #define NV_055_COMBINE_1_ALPHA_INVERSE_1_NORMAL 0xFFFFFEFF
12180 #define NV_055_COMBINE_1_ALPHA_INVERSE_1_INVERSE 0x00000100
12181 #define NV_055_COMBINE_1_ALPHA_ALPHA_1 0x00000200
12182 #define NV_055_COMBINE_1_ALPHA_ARGUMENT_1 0x0000FC00
12183 #define NV_055_COMBINE_1_ALPHA_ARGUMENT_1_ZERO 0x00000400
12184 #define NV_055_COMBINE_1_ALPHA_ARGUMENT_1_FACTOR 0x00000800
12185 #define NV_055_COMBINE_1_ALPHA_ARGUMENT_1_DIFFUSE 0x00000C00
12186 #define NV_055_COMBINE_1_ALPHA_ARGUMENT_1_INPUT 0x00001000
12187 #define NV_055_COMBINE_1_ALPHA_ARGUMENT_1_TEXTURE0 0x00001400
12188 #define NV_055_COMBINE_1_ALPHA_ARGUMENT_1_TEXTURE1 0x00001800
12189 #define NV_055_COMBINE_1_ALPHA_INVERSE_2 0x00010000
12190 #define NV_055_COMBINE_1_ALPHA_INVERSE_2_NORMAL 0xFFFEFFFF
12191 #define NV_055_COMBINE_1_ALPHA_INVERSE_2_INVERSE 0x00010000
12192 #define NV_055_COMBINE_1_ALPHA_ALPHA_2 0x00020000
12193 #define NV_055_COMBINE_1_ALPHA_ARGUMENT_2 0x00FC0000
12194 #define NV_055_COMBINE_1_ALPHA_ARGUMENT_2_ZERO 0x00040000
12195 #define NV_055_COMBINE_1_ALPHA_ARGUMENT_2_FACTOR 0x00080000
12196 #define NV_055_COMBINE_1_ALPHA_ARGUMENT_2_DIFFUSE 0x000C0000
12197 #define NV_055_COMBINE_1_ALPHA_ARGUMENT_2_INPUT 0x00100000
12198 #define NV_055_COMBINE_1_ALPHA_ARGUMENT_2_TEXTURE0 0x00140000
12199 #define NV_055_COMBINE_1_ALPHA_ARGUMENT_2_TEXTURE1 0x00180000
12200 #define NV_055_COMBINE_1_ALPHA_INVERSE_3 0x01000000
12201 #define NV_055_COMBINE_1_ALPHA_INVERSE_3_NORMAL 0xFEFFFFFF
12202 #define NV_055_COMBINE_1_ALPHA_INVERSE_3_INVERSE 0x01000000
12203 #define NV_055_COMBINE_1_ALPHA_ALPHA_3 0x02000000
12204 #define NV_055_COMBINE_1_ALPHA_ARGUMENT_3 0x1C000000
12205 #define NV_055_COMBINE_1_ALPHA_ARGUMENT_3_ZERO 0x04000000
12206 #define NV_055_COMBINE_1_ALPHA_ARGUMENT_3_FACTOR 0x08000000
12207 #define NV_055_COMBINE_1_ALPHA_ARGUMENT_3_DIFFUSE 0x0C000000
12208 #define NV_055_COMBINE_1_ALPHA_ARGUMENT_3_INPUT 0x10000000
12209 #define NV_055_COMBINE_1_ALPHA_ARGUMENT_3_TEXTURE0 0x14000000
12210 #define NV_055_COMBINE_1_ALPHA_ARGUMENT_3_TEXTURE1 0x18000000
12211 #define NV_055_COMBINE_1_ALPHA_OPERATION 0xE0000000
12212 #define NV_055_COMBINE_1_ALPHA_OPERATION_ADD 0x20000000
12213 #define NV_055_COMBINE_1_ALPHA_OPERATION_ADD2 0x40000000
12214 #define NV_055_COMBINE_1_ALPHA_OPERATION_ADD4 0x60000000
12215 #define NV_055_COMBINE_1_ALPHA_OPERATION_ADDSIGNED 0x80000000
12216 #define NV_055_COMBINE_1_ALPHA_OPERATION_MUX 0xA0000000
12217 #define NV_055_COMBINE_1_ALPHA_OPERATION_ADDCOMPLEMENT 0xC0000000
12218 #define NV_055_COMBINE_1_ALPHA_OPERATION_ADDSIGNED2 0xE0000000
12219 
12220 /* NV-Register NV_055_COMBINE_1_COLOR */
12221 #define NV_055_COMBINE_1_COLOR 0x005F0330
12222 #define NV_055_COMBINE_1_COLOR_INVERSE_0 0x00000001
12223 #define NV_055_COMBINE_1_COLOR_INVERSE_0_NORMAL 0xFFFFFFFE
12224 #define NV_055_COMBINE_1_COLOR_INVERSE_0_INVERSE 0x00000001
12225 #define NV_055_COMBINE_1_COLOR_ALPHA_0 0x00000002
12226 #define NV_055_COMBINE_1_COLOR_ALPHA_0_COLOR 0xFFFFFFFD
12227 #define NV_055_COMBINE_1_COLOR_ALPHA_0_ALPHA 0x00000002
12228 #define NV_055_COMBINE_1_COLOR_ARGUMENT_0 0x000000FC
12229 #define NV_055_COMBINE_1_COLOR_ARGUMENT_0_ZERO 0x00000004
12230 #define NV_055_COMBINE_1_COLOR_ARGUMENT_0_FACTOR 0x00000008
12231 #define NV_055_COMBINE_1_COLOR_ARGUMENT_0_DIFFUSE 0x0000000C
12232 #define NV_055_COMBINE_1_COLOR_ARGUMENT_0_INPUT 0x00000010
12233 #define NV_055_COMBINE_1_COLOR_ARGUMENT_0_TEXTURE0 0x00000014
12234 #define NV_055_COMBINE_1_COLOR_ARGUMENT_0_TEXTURE1 0x00000018
12235 #define NV_055_COMBINE_1_COLOR_INVERSE_1 0x00000100
12236 #define NV_055_COMBINE_1_COLOR_INVERSE_1_NORMAL 0xFFFFFEFF
12237 #define NV_055_COMBINE_1_COLOR_INVERSE_1_INVERSE 0x00000100
12238 #define NV_055_COMBINE_1_COLOR_ALPHA_1 0x00000200
12239 #define NV_055_COMBINE_1_COLOR_ALPHA_1_COLOR 0xFFFFFDFF
12240 #define NV_055_COMBINE_1_COLOR_ALPHA_1_ALPHA 0x00000200
12241 #define NV_055_COMBINE_1_COLOR_ARGUMENT_1 0x0000FC00
12242 #define NV_055_COMBINE_1_COLOR_ARGUMENT_1_ZERO 0x00000400
12243 #define NV_055_COMBINE_1_COLOR_ARGUMENT_1_FACTOR 0x00000800
12244 #define NV_055_COMBINE_1_COLOR_ARGUMENT_1_DIFFUSE 0x00000C00
12245 #define NV_055_COMBINE_1_COLOR_ARGUMENT_1_INPUT 0x00001000
12246 #define NV_055_COMBINE_1_COLOR_ARGUMENT_1_TEXTURE0 0x00001400
12247 #define NV_055_COMBINE_1_COLOR_ARGUMENT_1_TEXTURE1 0x00001800
12248 #define NV_055_COMBINE_1_COLOR_INVERSE_2 0x00010000
12249 #define NV_055_COMBINE_1_COLOR_INVERSE_2_NORMAL 0xFFFEFFFF
12250 #define NV_055_COMBINE_1_COLOR_INVERSE_2_INVERSE 0x00010000
12251 #define NV_055_COMBINE_1_COLOR_ALPHA_2 0x00020000
12252 #define NV_055_COMBINE_1_COLOR_ALPHA_2_COLOR 0xFFFDFFFF
12253 #define NV_055_COMBINE_1_COLOR_ALPHA_2_ALPHA 0x00020000
12254 #define NV_055_COMBINE_1_COLOR_ARGUMENT_2 0x00FC0000
12255 #define NV_055_COMBINE_1_COLOR_ARGUMENT_2_ZERO 0x00040000
12256 #define NV_055_COMBINE_1_COLOR_ARGUMENT_2_FACTOR 0x00080000
12257 #define NV_055_COMBINE_1_COLOR_ARGUMENT_2_DIFFUSE 0x000C0000
12258 #define NV_055_COMBINE_1_COLOR_ARGUMENT_2_INPUT 0x00100000
12259 #define NV_055_COMBINE_1_COLOR_ARGUMENT_2_TEXTURE0 0x00140000
12260 #define NV_055_COMBINE_1_COLOR_ARGUMENT_2_TEXTURE1 0x00180000
12261 #define NV_055_COMBINE_1_COLOR_INVERSE_3 0x01000000
12262 #define NV_055_COMBINE_1_COLOR_INVERSE_3_NORMAL 0xFEFFFFFF
12263 #define NV_055_COMBINE_1_COLOR_INVERSE_3_INVERSE 0x01000000
12264 #define NV_055_COMBINE_1_COLOR_ALPHA_3 0x02000000
12265 #define NV_055_COMBINE_1_COLOR_ALPHA_3_COLOR 0xFDFFFFFF
12266 #define NV_055_COMBINE_1_COLOR_ALPHA_3_ALPHA 0x02000000
12267 #define NV_055_COMBINE_1_COLOR_ARGUMENT_3 0x1C000000
12268 #define NV_055_COMBINE_1_COLOR_ARGUMENT_3_ZERO 0x04000000
12269 #define NV_055_COMBINE_1_COLOR_ARGUMENT_3_FACTOR 0x08000000
12270 #define NV_055_COMBINE_1_COLOR_ARGUMENT_3_DIFFUSE 0x0C000000
12271 #define NV_055_COMBINE_1_COLOR_ARGUMENT_3_INPUT 0x10000000
12272 #define NV_055_COMBINE_1_COLOR_ARGUMENT_3_TEXTURE0 0x14000000
12273 #define NV_055_COMBINE_1_COLOR_ARGUMENT_3_TEXTURE1 0x18000000
12274 #define NV_055_COMBINE_1_COLOR_OPERATION 0xE0000000
12275 #define NV_055_COMBINE_1_COLOR_OPERATION_ADD 0x20000000
12276 #define NV_055_COMBINE_1_COLOR_OPERATION_ADD2 0x40000000
12277 #define NV_055_COMBINE_1_COLOR_OPERATION_ADD4 0x60000000
12278 #define NV_055_COMBINE_1_COLOR_OPERATION_ADDSIGNED 0x80000000
12279 #define NV_055_COMBINE_1_COLOR_OPERATION_MUX 0xA0000000
12280 #define NV_055_COMBINE_1_COLOR_OPERATION_ADDCOMPLEMENT 0xC0000000
12281 #define NV_055_COMBINE_1_COLOR_OPERATION_ADDSIGNED2 0xE0000000
12282 
12283 /* NV-Register NV_055_COMBINE_FACTOR */
12284 #define NV_055_COMBINE_FACTOR 0x005F0334
12285 #define NV_055_COMBINE_FACTOR_BLUE 0x000000FF
12286 #define NV_055_COMBINE_FACTOR_GREEN 0x0000FF00
12287 #define NV_055_COMBINE_FACTOR_RED 0x00FF0000
12288 #define NV_055_COMBINE_FACTOR_ALPHA 0xFF000000
12289 
12290 /* NV-Register NV_055_BLEND */
12291 #define NV_055_BLEND 0x005F0338
12292 #define NV_055_BLEND_MASK_BIT 0x0000003F
12293 #define NV_055_BLEND_MASK_BIT_LSB 0x00000010
12294 #define NV_055_BLEND_MASK_BIT_MSB 0x00000020
12295 #define NV_055_BLEND_SHADEMODE 0x000000C0
12296 #define NV_055_BLEND_SHADEMODE_FLAT 0x00000040
12297 #define NV_055_BLEND_SHADEMODE_GOURAUD 0x00000080
12298 #define NV_055_BLEND_SHADEMODE_PHONG 0x000000C0
12299 #define NV_055_BLEND_TEXTUREPERSPECTIVE 0x00000F00
12300 #define NV_055_BLEND_TEXTUREPERSPECTIVE_FALSE 0x00000000
12301 #define NV_055_BLEND_TEXTUREPERSPECTIVE_TRUE 0x00000100
12302 #define NV_055_BLEND_SPECULARENABLE 0x0000F000
12303 #define NV_055_BLEND_SPECULARENABLE_FALSE 0x00000000
12304 #define NV_055_BLEND_SPECULARENABLE_TRUE 0x00001000
12305 #define NV_055_BLEND_FOGENABLE 0x000F0000
12306 #define NV_055_BLEND_FOGENABLE_FALSE 0x00000000
12307 #define NV_055_BLEND_FOGENABLE_TRUE 0x00010000
12308 #define NV_055_BLEND_ALPHABLENDENABLE 0x00F00000
12309 #define NV_055_BLEND_ALPHABLENDENABLE_FALSE 0x00000000
12310 #define NV_055_BLEND_ALPHABLENDENABLE_TRUE 0x00100000
12311 #define NV_055_BLEND_SRCBLEND 0x0F000000
12312 #define NV_055_BLEND_SRCBLEND_ZERO 0x01000000
12313 #define NV_055_BLEND_SRCBLEND_ONE 0x02000000
12314 #define NV_055_BLEND_SRCBLEND_SRCCOLOR 0x03000000
12315 #define NV_055_BLEND_SRCBLEND_INVSRCCOLOR 0x04000000
12316 #define NV_055_BLEND_SRCBLEND_SRCALPHA 0x05000000
12317 #define NV_055_BLEND_SRCBLEND_INVSRCALPHA 0x06000000
12318 #define NV_055_BLEND_SRCBLEND_DESTALPHA 0x07000000
12319 #define NV_055_BLEND_SRCBLEND_INVDESTALPHA 0x08000000
12320 #define NV_055_BLEND_SRCBLEND_DESTCOLOR 0x09000000
12321 #define NV_055_BLEND_SRCBLEND_INVDESTCOLOR 0x0A000000
12322 #define NV_055_BLEND_SRCBLEND_SRCALPHASAT 0x0B000000
12323 #define NV_055_BLEND_DESTBLEND 0xF0000000
12324 #define NV_055_BLEND_DESTBLEND_ZERO 0x10000000
12325 #define NV_055_BLEND_DESTBLEND_ONE 0x20000000
12326 #define NV_055_BLEND_DESTBLEND_SRCCOLOR 0x30000000
12327 #define NV_055_BLEND_DESTBLEND_INVSRCCOLOR 0x40000000
12328 #define NV_055_BLEND_DESTBLEND_SRCALPHA 0x50000000
12329 #define NV_055_BLEND_DESTBLEND_INVSRCALPHA 0x60000000
12330 #define NV_055_BLEND_DESTBLEND_DESTALPHA 0x70000000
12331 #define NV_055_BLEND_DESTBLEND_INVDESTALPHA 0x80000000
12332 #define NV_055_BLEND_DESTBLEND_DESTCOLOR 0x90000000
12333 #define NV_055_BLEND_DESTBLEND_INVDESTCOLOR 0xA0000000
12334 #define NV_055_BLEND_DESTBLEND_SRCALPHASAT 0xB0000000
12335 
12336 /* NV-Register NV_055_CONTROL0 */
12337 #define NV_055_CONTROL0 0x005F033C
12338 #define NV_055_CONTROL0_ALPHAREF 0x000000FF
12339 #define NV_055_CONTROL0_ALPHAFUNC 0x00000F00
12340 #define NV_055_CONTROL0_ALPHAFUNC_NEVER 0x00000100
12341 #define NV_055_CONTROL0_ALPHAFUNC_LESS 0x00000200
12342 #define NV_055_CONTROL0_ALPHAFUNC_EQUAL 0x00000300
12343 #define NV_055_CONTROL0_ALPHAFUNC_LESSEQUAL 0x00000400
12344 #define NV_055_CONTROL0_ALPHAFUNC_GREATER 0x00000500
12345 #define NV_055_CONTROL0_ALPHAFUNC_NOTEQUAL 0x00000600
12346 #define NV_055_CONTROL0_ALPHAFUNC_GREATEREQUAL 0x00000700
12347 #define NV_055_CONTROL0_ALPHAFUNC_ALWAYS 0x00000800
12348 #define NV_055_CONTROL0_ALPHATESTENABLE 0x00001000
12349 #define NV_055_CONTROL0_ALPHATESTENABLE_FALSE 0xFFFFEFFF
12350 #define NV_055_CONTROL0_ALPHATESTENABLE_TRUE 0x00001000
12351 #define NV_055_CONTROL0_ORIGIN 0x00002000
12352 #define NV_055_CONTROL0_ORIGIN_CENTER 0xFFFFDFFF
12353 #define NV_055_CONTROL0_ORIGIN_CORNER 0x00002000
12354 #define NV_055_CONTROL0_ZENABLE 0x0000C000
12355 #define NV_055_CONTROL0_ZENABLE_FALSE 0x00000000
12356 #define NV_055_CONTROL0_ZENABLE_TRUE 0x00004000
12357 #define NV_055_CONTROL0_ZFUNC 0x000F0000
12358 #define NV_055_CONTROL0_ZFUNC_NEVER 0x00010000
12359 #define NV_055_CONTROL0_ZFUNC_LESS 0x00020000
12360 #define NV_055_CONTROL0_ZFUNC_EQUAL 0x00030000
12361 #define NV_055_CONTROL0_ZFUNC_LESSEQUAL 0x00040000
12362 #define NV_055_CONTROL0_ZFUNC_GREATER 0x00050000
12363 #define NV_055_CONTROL0_ZFUNC_NOTEQUAL 0x00060000
12364 #define NV_055_CONTROL0_ZFUNC_GREATEREQUAL 0x00070000
12365 #define NV_055_CONTROL0_ZFUNC_ALWAYS 0x00080000
12366 #define NV_055_CONTROL0_CULLMODE 0x00300000
12367 #define NV_055_CONTROL0_CULLMODE_NONE 0x00100000
12368 #define NV_055_CONTROL0_CULLMODE_CW 0x00200000
12369 #define NV_055_CONTROL0_CULLMODE_CCW 0x00300000
12370 #define NV_055_CONTROL0_DITHERENABLE 0x00400000
12371 #define NV_055_CONTROL0_DITHERENABLE_FALSE 0xFFBFFFFF
12372 #define NV_055_CONTROL0_DITHERENABLE_TRUE 0x00400000
12373 #define NV_055_CONTROL0_Z_PERSPECTIVE_ENABLE 0x00800000
12374 #define NV_055_CONTROL0_Z_PERSPECTIVE_ENABLE_FALSE 0xFF7FFFFF
12375 #define NV_055_CONTROL0_Z_PERSPECTIVE_ENABLE_TRUE 0x00800000
12376 #define NV_055_CONTROL0_ZWRITEENABLE 0x01000000
12377 #define NV_055_CONTROL0_ZWRITEENABLE_FALSE 0xFEFFFFFF
12378 #define NV_055_CONTROL0_ZWRITEENABLE_TRUE 0x01000000
12379 #define NV_055_CONTROL0_STENCIL_WRITE_ENABLE 0x02000000
12380 #define NV_055_CONTROL0_STENCIL_WRITE_ENABLE_FALSE 0xFDFFFFFF
12381 #define NV_055_CONTROL0_STENCIL_WRITE_ENABLE_TRUE 0x02000000
12382 #define NV_055_CONTROL0_ALPHA_WRITE_ENABLE 0x04000000
12383 #define NV_055_CONTROL0_ALPHA_WRITE_ENABLE_FALSE 0xFBFFFFFF
12384 #define NV_055_CONTROL0_ALPHA_WRITE_ENABLE_TRUE 0x04000000
12385 #define NV_055_CONTROL0_RED_WRITE_ENABLE 0x08000000
12386 #define NV_055_CONTROL0_RED_WRITE_ENABLE_FALSE 0xF7FFFFFF
12387 #define NV_055_CONTROL0_RED_WRITE_ENABLE_TRUE 0x08000000
12388 #define NV_055_CONTROL0_GREEN_WRITE_ENABLE 0x10000000
12389 #define NV_055_CONTROL0_GREEN_WRITE_ENABLE_FALSE 0xEFFFFFFF
12390 #define NV_055_CONTROL0_GREEN_WRITE_ENABLE_TRUE 0x10000000
12391 #define NV_055_CONTROL0_BLUE_WRITE_ENABLE 0x20000000
12392 #define NV_055_CONTROL0_BLUE_WRITE_ENABLE_FALSE 0xDFFFFFFF
12393 #define NV_055_CONTROL0_BLUE_WRITE_ENABLE_TRUE 0x20000000
12394 #define NV_055_CONTROL0_Z_FORMAT 0xC0000000
12395 #define NV_055_CONTROL0_Z_FORMAT_FIXED 0x40000000
12396 #define NV_055_CONTROL0_Z_FORMAT_FLOAT 0x80000000
12397 
12398 /* NV-Register NV_055_CONTROL1 */
12399 #define NV_055_CONTROL1 0x005F0340
12400 #define NV_055_CONTROL1_STENCIL_TEST_ENABLE 0x0000000F
12401 #define NV_055_CONTROL1_STENCIL_TEST_ENABLE_FALSE 0x00000000
12402 #define NV_055_CONTROL1_STENCIL_TEST_ENABLE_TRUE 0x00000001
12403 #define NV_055_CONTROL1_STENCIL_FUNC 0x000000F0
12404 #define NV_055_CONTROL1_STENCIL_FUNC_NEVER 0x00000010
12405 #define NV_055_CONTROL1_STENCIL_FUNC_LESS 0x00000020
12406 #define NV_055_CONTROL1_STENCIL_FUNC_EQUAL 0x00000030
12407 #define NV_055_CONTROL1_STENCIL_FUNC_LESSEQUAL 0x00000040
12408 #define NV_055_CONTROL1_STENCIL_FUNC_GREATER 0x00000050
12409 #define NV_055_CONTROL1_STENCIL_FUNC_NOTEQUAL 0x00000060
12410 #define NV_055_CONTROL1_STENCIL_FUNC_GREATEREQUAL 0x00000070
12411 #define NV_055_CONTROL1_STENCIL_FUNC_ALWAYS 0x00000080
12412 #define NV_055_CONTROL1_STENCIL_REF 0x0000FF00
12413 #define NV_055_CONTROL1_STENCIL_MASK_READ 0x00FF0000
12414 #define NV_055_CONTROL1_STENCIL_MASK_WRITE 0xFF000000
12415 
12416 /* NV-Register NV_055_CONTROL2 */
12417 #define NV_055_CONTROL2 0x005F0344
12418 #define NV_055_CONTROL2_STENCIL_OP_FAIL 0x0000000F
12419 #define NV_055_CONTROL2_STENCIL_OP_FAIL_KEEP 0x00000001
12420 #define NV_055_CONTROL2_STENCIL_OP_FAIL_ZERO 0x00000002
12421 #define NV_055_CONTROL2_STENCIL_OP_FAIL_REPLACE 0x00000003
12422 #define NV_055_CONTROL2_STENCIL_OP_FAIL_INCRSAT 0x00000004
12423 #define NV_055_CONTROL2_STENCIL_OP_FAIL_DECRSAT 0x00000005
12424 #define NV_055_CONTROL2_STENCIL_OP_FAIL_INVERT 0x00000006
12425 #define NV_055_CONTROL2_STENCIL_OP_FAIL_INCR 0x00000007
12426 #define NV_055_CONTROL2_STENCIL_OP_FAIL_DECR 0x00000008
12427 #define NV_055_CONTROL2_STENCIL_OP_ZFAIL 0x000000F0
12428 #define NV_055_CONTROL2_STENCIL_OP_ZFAIL_KEEP 0x00000010
12429 #define NV_055_CONTROL2_STENCIL_OP_ZFAIL_ZERO 0x00000020
12430 #define NV_055_CONTROL2_STENCIL_OP_ZFAIL_REPLACE 0x00000030
12431 #define NV_055_CONTROL2_STENCIL_OP_ZFAIL_INCRSAT 0x00000040
12432 #define NV_055_CONTROL2_STENCIL_OP_ZFAIL_DECRSAT 0x00000050
12433 #define NV_055_CONTROL2_STENCIL_OP_ZFAIL_INVERT 0x00000060
12434 #define NV_055_CONTROL2_STENCIL_OP_ZFAIL_INCR 0x00000070
12435 #define NV_055_CONTROL2_STENCIL_OP_ZFAIL_DECR 0x00000080
12436 #define NV_055_CONTROL2_STENCIL_OP_ZPASS 0xFFFFFF00
12437 #define NV_055_CONTROL2_STENCIL_OP_ZPASS_KEEP 0x00000100
12438 #define NV_055_CONTROL2_STENCIL_OP_ZPASS_ZERO 0x00000200
12439 #define NV_055_CONTROL2_STENCIL_OP_ZPASS_REPLACE 0x00000300
12440 #define NV_055_CONTROL2_STENCIL_OP_ZPASS_INCRSAT 0x00000400
12441 #define NV_055_CONTROL2_STENCIL_OP_ZPASS_DECRSAT 0x00000500
12442 #define NV_055_CONTROL2_STENCIL_OP_ZPASS_INVERT 0x00000600
12443 #define NV_055_CONTROL2_STENCIL_OP_ZPASS_INCR 0x00000700
12444 #define NV_055_CONTROL2_STENCIL_OP_ZPASS_DECR 0x00000800
12445 
12446 /* NV-Register NV_055_FOGCOLOR */
12447 #define NV_055_FOGCOLOR 0x005F0348
12448 #define NV_055_FOGCOLOR_VALUE 0xFFFFFFFF
12449 
12450 /* NV-Array NV_055_TLMTVERTEX_SX (40 byte access) */
12451 #define NV_055_TLMTVERTEX_SX 0x005F0400
12452 /* NV-Array size NV_055_TLMTVERTEX_SX__SIZE_1 [0..7] */
12453 #define NV_055_TLMTVERTEX_SX__SIZE_1 0x00000008
12454 #define NV_055_TLMTVERTEX_SX_VALUE 0xFFFFFFFF
12455 
12456 /* NV-Array NV_055_TLMTVERTEX_SY (40 byte access) */
12457 #define NV_055_TLMTVERTEX_SY 0x005F0404
12458 /* NV-Array size NV_055_TLMTVERTEX_SY__SIZE_1 [0..7] */
12459 #define NV_055_TLMTVERTEX_SY__SIZE_1 0x00000008
12460 #define NV_055_TLMTVERTEX_SY_VALUE 0xFFFFFFFF
12461 
12462 /* NV-Array NV_055_TLMTVERTEX_SZ (40 byte access) */
12463 #define NV_055_TLMTVERTEX_SZ 0x005F0408
12464 /* NV-Array size NV_055_TLMTVERTEX_SZ__SIZE_1 [0..7] */
12465 #define NV_055_TLMTVERTEX_SZ__SIZE_1 0x00000008
12466 #define NV_055_TLMTVERTEX_SZ_VALUE 0xFFFFFFFF
12467 
12468 /* NV-Array NV_055_TLMTVERTEX_RHW (40 byte access) */
12469 #define NV_055_TLMTVERTEX_RHW 0x005F040C
12470 /* NV-Array size NV_055_TLMTVERTEX_RHW__SIZE_1 [0..7] */
12471 #define NV_055_TLMTVERTEX_RHW__SIZE_1 0x00000008
12472 #define NV_055_TLMTVERTEX_RHW_VALUE 0xFFFFFFFF
12473 
12474 /* NV-Array NV_055_TLMTVERTEX_COLOR (40 byte access) */
12475 #define NV_055_TLMTVERTEX_COLOR 0x005F0410
12476 /* NV-Array size NV_055_TLMTVERTEX_COLOR__SIZE_1 [0..7] */
12477 #define NV_055_TLMTVERTEX_COLOR__SIZE_1 0x00000008
12478 #define NV_055_TLMTVERTEX_COLOR_VALUE 0xFFFFFFFF
12479 #define NV_055_TLMTVERTEX_COLOR_BLUE 0x000000FF
12480 #define NV_055_TLMTVERTEX_COLOR_GREEN 0x0000FF00
12481 #define NV_055_TLMTVERTEX_COLOR_RED 0x00FF0000
12482 #define NV_055_TLMTVERTEX_COLOR_ALPHA 0xFF000000
12483 
12484 /* NV-Array NV_055_TLMTVERTEX_SPECULAR (40 byte access) */
12485 #define NV_055_TLMTVERTEX_SPECULAR 0x005F0414
12486 /* NV-Array size NV_055_TLMTVERTEX_SPECULAR__SIZE_1 [0..7] */
12487 #define NV_055_TLMTVERTEX_SPECULAR__SIZE_1 0x00000008
12488 #define NV_055_TLMTVERTEX_SPECULAR_VALUE 0xFFFFFFFF
12489 #define NV_055_TLMTVERTEX_SPECULAR_BLUE 0x000000FF
12490 #define NV_055_TLMTVERTEX_SPECULAR_GREEN 0x0000FF00
12491 #define NV_055_TLMTVERTEX_SPECULAR_RED 0x00FF0000
12492 #define NV_055_TLMTVERTEX_SPECULAR_FOG 0xFF000000
12493 
12494 /* NV-Array NV_055_TLMTVERTEX_TU0 (40 byte access) */
12495 #define NV_055_TLMTVERTEX_TU0 0x005F0418
12496 /* NV-Array size NV_055_TLMTVERTEX_TU0__SIZE_1 [0..7] */
12497 #define NV_055_TLMTVERTEX_TU0__SIZE_1 0x00000008
12498 #define NV_055_TLMTVERTEX_TU0_VALUE 0xFFFFFFFF
12499 
12500 /* NV-Array NV_055_TLMTVERTEX_TV0 (40 byte access) */
12501 #define NV_055_TLMTVERTEX_TV0 0x005F041C
12502 /* NV-Array size NV_055_TLMTVERTEX_TV0__SIZE_1 [0..7] */
12503 #define NV_055_TLMTVERTEX_TV0__SIZE_1 0x00000008
12504 #define NV_055_TLMTVERTEX_TV0_VALUE 0xFFFFFFFF
12505 
12506 /* NV-Array NV_055_TLMTVERTEX_TU1 (40 byte access) */
12507 #define NV_055_TLMTVERTEX_TU1 0x005F0420
12508 /* NV-Array size NV_055_TLMTVERTEX_TU1__SIZE_1 [0..7] */
12509 #define NV_055_TLMTVERTEX_TU1__SIZE_1 0x00000008
12510 #define NV_055_TLMTVERTEX_TU1_VALUE 0xFFFFFFFF
12511 
12512 /* NV-Array NV_055_TLMTVERTEX_TV1 (40 byte access) */
12513 #define NV_055_TLMTVERTEX_TV1 0x005F0424
12514 /* NV-Array size NV_055_TLMTVERTEX_TV1__SIZE_1 [0..7] */
12515 #define NV_055_TLMTVERTEX_TV1__SIZE_1 0x00000008
12516 #define NV_055_TLMTVERTEX_TV1_VALUE 0xFFFFFFFF
12517 
12518 /* NV-Array NV_055_TLMTVERTEX_DRAWPRIMITIVE (4 byte access) */
12519 #define NV_055_TLMTVERTEX_DRAWPRIMITIVE 0x005F0540
12520 /* NV-Array size NV_055_TLMTVERTEX_DRAWPRIMITIVE__SIZE_1 [0..47] */
12521 #define NV_055_TLMTVERTEX_DRAWPRIMITIVE__SIZE_1 0x00000030
12522 #define NV_055_TLMTVERTEX_DRAWPRIMITIVE_I0 0x0000000F
12523 #define NV_055_TLMTVERTEX_DRAWPRIMITIVE_I1 0x000000F0
12524 #define NV_055_TLMTVERTEX_DRAWPRIMITIVE_I2 0x00000F00
12525 #define NV_055_TLMTVERTEX_DRAWPRIMITIVE_I3 0x0000F000
12526 #define NV_055_TLMTVERTEX_DRAWPRIMITIVE_I4 0x000F0000
12527 #define NV_055_TLMTVERTEX_DRAWPRIMITIVE_I5 0xFFF00000
12528 
12529 /* NV-Device NV_UIMAGEBLEND */
12530 #define NV_UIMAGEBLEND 0x005B0000 /* size: 0x00001FFF */
12531 #define NV_IMAGE_BLEND_AND 0x01100000
12532 
12533 /* NV-Register NV_UIMAGEBLEND_CTX_SWITCH */
12534 #define NV_UIMAGEBLEND_CTX_SWITCH 0x005B0000
12535 #define NV_UIMAGEBLEND_CTX_SWITCH_INSTANCE 0x0000FFFF
12536 #define NV_UIMAGEBLEND_CTX_SWITCH_CHID 0x007F0000
12537 #define NV_UIMAGEBLEND_CTX_SWITCH_VOLATILE 0x80000000
12538 #define NV_UIMAGEBLEND_CTX_SWITCH_VOLATILE_IGNORE 0x7FFFFFFF
12539 #define NV_UIMAGEBLEND_CTX_SWITCH_VOLATILE_RESET 0x80000000
12540 
12541 /* NV-Register NV_UIMAGEBLEND_NOTIFY */
12542 #define NV_UIMAGEBLEND_NOTIFY 0x005B0104
12543 #define NV_UIMAGEBLEND_NOTIFY_STYLE 0xFFFFFFFF
12544 #define NV_UIMAGEBLEND_NOTIFY_STYLE_WRITE_ONLY 0x00000000
12545 #define NV_UIMAGEBLEND_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001
12546 
12547 /* NV-Register NV_UIMAGEBLEND_SET_CONTEXT_DMA_NOTIFY */
12548 #define NV_UIMAGEBLEND_SET_CONTEXT_DMA_NOTIFY 0x005B0180
12549 #define NV_UIMAGEBLEND_SET_CONTEXT_DMA_NOTIFY_PARAMETER 0xFFFFFFFF
12550 
12551 /* NV-Register NV_UIMAGEBLEND_SET_IMAGE_OUTPUT */
12552 #define NV_UIMAGEBLEND_SET_IMAGE_OUTPUT 0x005B0200
12553 #define NV_UIMAGEBLEND_SET_IMAGE_OUTPUT_PARAMETER 0xFFFFFFFF
12554 
12555 /* NV-Register NV_UIMAGEBLEND_SET_BETA_INPUT */
12556 #define NV_UIMAGEBLEND_SET_BETA_INPUT 0x005B0204
12557 #define NV_UIMAGEBLEND_SET_BETA_INPUT_PARAMETER 0xFFFFFFFF
12558 
12559 /* NV-Array NV_UIMAGEBLEND_SET_IMAGE_INPUT (4 byte access) */
12560 #define NV_UIMAGEBLEND_SET_IMAGE_INPUT 0x005B0208
12561 /* NV-Array size NV_UIMAGEBLEND_SET_IMAGE_INPUT__SIZE_1 [0..1] */
12562 #define NV_UIMAGEBLEND_SET_IMAGE_INPUT__SIZE_1 0x00000002
12563 #define NV_UIMAGEBLEND_SET_IMAGE_INPUT_PARAMETER 0xFFFFFFFF
12564 
12565 /* NV-Device NV_UBLIT */
12566 #define NV_UBLIT 0x00500000 /* size: 0x00001FFF */
12567 #define NV1_IMAGE_BLIT 0x0000001F
12568 
12569 /* NV-Register NV_UBLIT_CTX_SWITCH */
12570 #define NV_UBLIT_CTX_SWITCH 0x00500000
12571 #define NV_UBLIT_CTX_SWITCH_INSTANCE 0x0000FFFF
12572 #define NV_UBLIT_CTX_SWITCH_CHID 0x007F0000
12573 #define NV_UBLIT_CTX_SWITCH_VOLATILE 0x80000000
12574 #define NV_UBLIT_CTX_SWITCH_VOLATILE_IGNORE 0x7FFFFFFF
12575 #define NV_UBLIT_CTX_SWITCH_VOLATILE_RESET 0x80000000
12576 
12577 /* NV-Register NV_042_NOP */
12578 #define NV_042_NOP 0x00500100
12579 #define NV_042_NOP_PARAMETER 0xFFFFFFFF
12580 
12581 /* NV-Register NV_UBLIT_NOTIFY */
12582 #define NV_UBLIT_NOTIFY 0x00500104
12583 #define NV_UBLIT_NOTIFY_STYLE 0xFFFFFFFF
12584 #define NV_UBLIT_NOTIFY_STYLE_WRITE_ONLY 0x00000000
12585 #define NV_UBLIT_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001
12586 
12587 /* NV-Register NV_UBLIT_SET_NOTIFY */
12588 #define NV_UBLIT_SET_NOTIFY 0x00500104
12589 /* Alias NV_UBLIT_NOTIFY */
12590 /* Alias NV_UBLIT_NOTIFY */
12591 #define NV_UBLIT_SET_NOTIFY_PARAMETER 0xFFFFFFFF
12592 #define NV_UBLIT_SET_NOTIFY_PARAMETER_WRITE 0x00000000
12593 
12594 /* NV-Register NV_UBLIT_SET_PATCH */
12595 #define NV_UBLIT_SET_PATCH 0x0050010C
12596 #define NV_UBLIT_SET_PATCH_PARAMETER 0xFFFFFFFF
12597 #define NV_UBLIT_SET_PATCH_PARAMETER_INVALIDATE 0x00000000
12598 #define NV_UBLIT_SET_PATCH_PARAMETER_VALIDATE 0x00000001
12599 
12600 /* NV-Register NV_UBLIT_SET_CONTEXT_DMA_NOTIFY */
12601 #define NV_UBLIT_SET_CONTEXT_DMA_NOTIFY 0x00500180
12602 #define NV_UBLIT_SET_CONTEXT_DMA_NOTIFY_PARAMETER 0xFFFFFFFF
12603 
12604 /* NV-Register NV_UBLIT_SET_IMAGE_OUTPUT */
12605 #define NV_UBLIT_SET_IMAGE_OUTPUT 0x00500200
12606 #define NV_UBLIT_SET_IMAGE_OUTPUT_PARAMETER 0xFFFFFFFF
12607 
12608 /* NV-Register NV_UBLIT_SET_IMAGE_INPUT */
12609 #define NV_UBLIT_SET_IMAGE_INPUT 0x00500204
12610 #define NV_UBLIT_SET_IMAGE_INPUT_PARAMETER 0xFFFFFFFF
12611 
12612 /* NV-Register NV_UBLIT_POINT_IN */
12613 #define NV_UBLIT_POINT_IN 0x00500300
12614 #define NV_UBLIT_POINT_IN_X 0x0000FFFF
12615 #define NV_UBLIT_POINT_IN_Y 0xFFFF0000
12616 
12617 /* NV-Register NV_UBLIT_POINT_OUT */
12618 #define NV_UBLIT_POINT_OUT 0x00500304
12619 #define NV_UBLIT_POINT_OUT_X 0x0000FFFF
12620 #define NV_UBLIT_POINT_OUT_Y 0xFFFF0000
12621 
12622 /* NV-Register NV_UBLIT_SIZE */
12623 #define NV_UBLIT_SIZE 0x00500308
12624 #define NV_UBLIT_SIZE_WIDTH 0x0000FFFF
12625 #define NV_UBLIT_SIZE_HEIGHT 0xFFFF0000
12626 
12627 /* NV-Device NV_UIMAGE */
12628 #define NV_UIMAGE 0x00510000 /* size: 0x00001FFF */
12629 #define NV1_IMAGE_FROM_CPU 0x00210000
12630 
12631 /* NV-Register NV_UIMAGE_CTX_SWITCH */
12632 #define NV_UIMAGE_CTX_SWITCH 0x00510000
12633 #define NV_UIMAGE_CTX_SWITCH_INSTANCE 0x0000FFFF
12634 #define NV_UIMAGE_CTX_SWITCH_CHID 0x007F0000
12635 #define NV_UIMAGE_CTX_SWITCH_VOLATILE 0x80000000
12636 #define NV_UIMAGE_CTX_SWITCH_VOLATILE_IGNORE 0x7FFFFFFF
12637 #define NV_UIMAGE_CTX_SWITCH_VOLATILE_RESET 0x80000000
12638 
12639 /* NV-Register NV_UIMAGE_NOTIFY */
12640 #define NV_UIMAGE_NOTIFY 0x00510104
12641 #define NV_UIMAGE_NOTIFY_STYLE 0xFFFFFFFF
12642 #define NV_UIMAGE_NOTIFY_STYLE_WRITE_ONLY 0x00000000
12643 #define NV_UIMAGE_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001
12644 
12645 /* NV-Register NV_UIMAGE_SET_NOTIFY */
12646 #define NV_UIMAGE_SET_NOTIFY 0x00510104
12647 /* Alias NV_UIMAGE_NOTIFY */
12648 /* Alias NV_UIMAGE_NOTIFY */
12649 #define NV_UIMAGE_SET_NOTIFY_PARAMETER 0xFFFFFFFF
12650 #define NV_UIMAGE_SET_NOTIFY_PARAMETER_WRITE 0x00000000
12651 
12652 /* NV-Register NV_UIMAGE_SET_PATCH */
12653 #define NV_UIMAGE_SET_PATCH 0x0051010C
12654 #define NV_UIMAGE_SET_PATCH_PARAMETER 0xFFFFFFFF
12655 #define NV_UIMAGE_SET_PATCH_PARAMETER_INVALIDATE 0x00000000
12656 #define NV_UIMAGE_SET_PATCH_PARAMETER_VALIDATE 0x00000001
12657 
12658 /* NV-Register NV_UIMAGE_SET_CONTEXT_DMA_NOTIFY */
12659 #define NV_UIMAGE_SET_CONTEXT_DMA_NOTIFY 0x00510180
12660 #define NV_UIMAGE_SET_CONTEXT_DMA_NOTIFY_PARAMETER 0xFFFFFFFF
12661 
12662 /* NV-Register NV_UIMAGE_SET_IMAGE_OUTPUT */
12663 #define NV_UIMAGE_SET_IMAGE_OUTPUT 0x00510200
12664 #define NV_UIMAGE_SET_IMAGE_OUTPUT_PARAMETER 0xFFFFFFFF
12665 
12666 /* NV-Register NV_UIMAGE_SET_COLOR_FORMAT */
12667 #define NV_UIMAGE_SET_COLOR_FORMAT 0x00510300
12668 #define NV_UIMAGE_SET_COLOR_FORMAT_LE 0xFFFFFFFF
12669 #define NV_UIMAGE_SET_COLOR_FORMAT_LE_Y8 0x00000001
12670 #define NV_UIMAGE_SET_COLOR_FORMAT_LE_A1R5G5B5 0x00000002
12671 #define NV_UIMAGE_SET_COLOR_FORMAT_LE_X1R5G5B5 0x00000003
12672 #define NV_UIMAGE_SET_COLOR_FORMAT_LE_A8R8G8B8 0x00000004
12673 #define NV_UIMAGE_SET_COLOR_FORMAT_LE_X8R8G8B8 0x00000005
12674 
12675 /* NV-Register NV_UIMAGE_POINT */
12676 #define NV_UIMAGE_POINT 0x00510304
12677 #define NV_UIMAGE_POINT_X 0x0000FFFF
12678 #define NV_UIMAGE_POINT_Y 0xFFFF0000
12679 
12680 /* NV-Register NV_UIMAGE_SIZE */
12681 #define NV_UIMAGE_SIZE 0x00510308
12682 #define NV_UIMAGE_SIZE_WIDTH 0x0000FFFF
12683 #define NV_UIMAGE_SIZE_HEIGHT 0xFFFF0000
12684 
12685 /* NV-Register NV_UIMAGE_SIZE_IN */
12686 #define NV_UIMAGE_SIZE_IN 0x0051030C
12687 #define NV_UIMAGE_SIZE_IN_WIDTH 0x0000FFFF
12688 #define NV_UIMAGE_SIZE_IN_HEIGHT 0xFFFF0000
12689 
12690 /* NV-Array NV_UIMAGE_COLOR (4 byte access) */
12691 #define NV_UIMAGE_COLOR 0x00510400
12692 /* NV-Array size NV_UIMAGE_COLOR__SIZE_1 [0..31] */
12693 #define NV_UIMAGE_COLOR__SIZE_1 0x00000020
12694 #define NV_UIMAGE_COLOR_VALUE 0xFFFFFFFF
12695 
12696 /* NV-Device NV_UINMEM */
12697 #define NV_UINMEM 0x005C0000 /* size: 0x00001FFF */
12698 #define NV_IMAGE_IN_MEMORY 0x0000003E
12699 #define NV3_SURFACE_0 0x00000058
12700 #define NV3_SURFACE_1 0x00000059
12701 #define NV3_SURFACE_2 0x0000005A
12702 #define NV3_SURFACE_3 0x0000005B
12703 
12704 /* NV-Register NV_UINMEM_CTX_SWITCH */
12705 #define NV_UINMEM_CTX_SWITCH 0x005C0000
12706 #define NV_UINMEM_CTX_SWITCH_INSTANCE 0x0000FFFF
12707 #define NV_UINMEM_CTX_SWITCH_CHID 0x007F0000
12708 #define NV_UINMEM_CTX_SWITCH_VOLATILE 0x80000000
12709 #define NV_UINMEM_CTX_SWITCH_VOLATILE_IGNORE 0x7FFFFFFF
12710 #define NV_UINMEM_CTX_SWITCH_VOLATILE_RESET 0x80000000
12711 
12712 /* NV-Register NV_UINMEM_NOP */
12713 #define NV_UINMEM_NOP 0x005C0100
12714 #define NV_UINMEM_NOP_PARAMETER 0xFFFFFFFF
12715 
12716 /* NV-Register NV_UINMEM_NOTIFY */
12717 #define NV_UINMEM_NOTIFY 0x005C0104
12718 #define NV_UINMEM_NOTIFY_STYLE 0xFFFFFFFF
12719 #define NV_UINMEM_NOTIFY_STYLE_WRITE_ONLY 0x00000000
12720 #define NV_UINMEM_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001
12721 
12722 /* NV-Register NV_UINMEM_SET_NOTIFY */
12723 #define NV_UINMEM_SET_NOTIFY 0x005C0104
12724 /* Alias NV_UINMEM_NOTIFY */
12725 /* Alias NV_UINMEM_NOTIFY */
12726 #define NV_UINMEM_SET_NOTIFY_PARAMETER 0xFFFFFFFF
12727 #define NV_UINMEM_SET_NOTIFY_PARAMETER_WRITE 0x00000000
12728 
12729 /* NV-Register NV_UINMEM_SET_CONTEXT_DMA_NOTIFY */
12730 #define NV_UINMEM_SET_CONTEXT_DMA_NOTIFY 0x005C0180
12731 #define NV_UINMEM_SET_CONTEXT_DMA_NOTIFY_PARAMETER 0xFFFFFFFF
12732 
12733 /* NV-Register NV_UINMEM_SET_CONTEXT_DMA_IMAGE */
12734 #define NV_UINMEM_SET_CONTEXT_DMA_IMAGE 0x005C0184
12735 #define NV_UINMEM_SET_CONTEXT_DMA_IMAGE_PARAMETER 0xFFFFFFFF
12736 
12737 /* NV-Register NV_UINMEM_SET_IMAGE_OUTPUT */
12738 #define NV_UINMEM_SET_IMAGE_OUTPUT 0x005C0200
12739 #define NV_UINMEM_SET_IMAGE_OUTPUT_PARAMETER 0xFFFFFFFF
12740 
12741 /* NV-Array NV_UINMEM_SET_IMAGE_INPUT (4 byte access) */
12742 #define NV_UINMEM_SET_IMAGE_INPUT 0x005C0204
12743 /* NV-Array size NV_UINMEM_SET_IMAGE_INPUT__SIZE_1 [0..62] */
12744 #define NV_UINMEM_SET_IMAGE_INPUT__SIZE_1 0x0000003F
12745 #define NV_UINMEM_SET_IMAGE_INPUT_PARAMETER 0xFFFFFFFF
12746 
12747 /* NV-Register NV_UINMEM_FORMAT */
12748 #define NV_UINMEM_FORMAT 0x005C0300
12749 #define NV_UINMEM_FORMAT_VALUE 0xFFFFFFFF
12750 #define NV_UINMEM_FORMAT_VALUE_LE_Y8_P4 0x01010000
12751 #define NV_UINMEM_FORMAT_VALUE_LE_Y16_P2 0x01010001
12752 #define NV_UINMEM_FORMAT_VALUE_LE_X1R5G5B5_P2 0x01000000
12753 #define NV_UINMEM_FORMAT_VALUE_LE_X8R8G8B8 0x00000001
12754 
12755 /* NV-Register NV_UINMEM_PITCH */
12756 #define NV_UINMEM_PITCH 0x005C0308
12757 #define NV_UINMEM_PITCH_VALUE 0x0000FFFF
12758 
12759 /* NV-Register NV_UINMEM_OFFSET */
12760 #define NV_UINMEM_OFFSET 0x005C030C
12761 #define NV_UINMEM_OFFSET_LINADRS 0x007FFFFF
12762 #define NV_UINMEM_OFFSET_LINADRS_0 0x00000000
12763 
12764 /* NV-Device NV_UIMAGEROP */
12765 #define NV_UIMAGEROP 0x005A0000 /* size: 0x00001FFF */
12766 #define NV_IMAGE_ROP_AND 0x00000013
12767 
12768 /* NV-Register NV_UIMAGEROP_CTX_SWITCH */
12769 #define NV_UIMAGEROP_CTX_SWITCH 0x005A0000
12770 #define NV_UIMAGEROP_CTX_SWITCH_INSTANCE 0x0000FFFF
12771 #define NV_UIMAGEROP_CTX_SWITCH_CHID 0x007F0000
12772 #define NV_UIMAGEROP_CTX_SWITCH_VOLATILE 0x80000000
12773 #define NV_UIMAGEROP_CTX_SWITCH_VOLATILE_IGNORE 0x7FFFFFFF
12774 #define NV_UIMAGEROP_CTX_SWITCH_VOLATILE_RESET 0x80000000
12775 
12776 /* NV-Register NV_UIMAGEROP_NOTIFY */
12777 #define NV_UIMAGEROP_NOTIFY 0x005A0104
12778 #define NV_UIMAGEROP_NOTIFY_STYLE 0xFFFFFFFF
12779 #define NV_UIMAGEROP_NOTIFY_STYLE_WRITE_ONLY 0x00000000
12780 #define NV_UIMAGEROP_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001
12781 
12782 /* NV-Register NV_UIMAGEROP_SET_CONTEXT_DMA_NOTIFY */
12783 #define NV_UIMAGEROP_SET_CONTEXT_DMA_NOTIFY 0x005A0180
12784 #define NV_UIMAGEROP_SET_CONTEXT_DMA_NOTIFY_PARAMETER 0xFFFFFFFF
12785 
12786 /* NV-Register NV_UIMAGEROP_SET_IMAGE_OUTPUT */
12787 #define NV_UIMAGEROP_SET_IMAGE_OUTPUT 0x005A0200
12788 #define NV_UIMAGEROP_SET_IMAGE_OUTPUT_PARAMETER 0xFFFFFFFF
12789 
12790 /* NV-Register NV_UIMAGEROP_SET_ROP_INPUT */
12791 #define NV_UIMAGEROP_SET_ROP_INPUT 0x005A0204
12792 #define NV_UIMAGEROP_SET_ROP_INPUT_PARAMETER 0xFFFFFFFF
12793 
12794 /* NV-Array NV_UIMAGEROP_SET_IMAGE_INPUT (4 byte access) */
12795 #define NV_UIMAGEROP_SET_IMAGE_INPUT 0x005A0208
12796 /* NV-Array size NV_UIMAGEROP_SET_IMAGE_INPUT__SIZE_1 [0..1] */
12797 #define NV_UIMAGEROP_SET_IMAGE_INPUT__SIZE_1 0x00000002
12798 #define NV_UIMAGEROP_SET_IMAGE_INPUT_PARAMETER 0xFFFFFFFF
12799 
12800 /* NV-Device NV_UCHROMA */
12801 #define NV_UCHROMA 0x00430000 /* size: 0x00001FFF */
12802 #define NV1_IMAGE_SOLID 0x00000017
12803 
12804 /* NV-Register NV_UCHROMA_CTX_SWITCH */
12805 #define NV_UCHROMA_CTX_SWITCH 0x00430000
12806 #define NV_UCHROMA_CTX_SWITCH_INSTANCE 0x0000FFFF
12807 #define NV_UCHROMA_CTX_SWITCH_CHID 0x007F0000
12808 #define NV_UCHROMA_CTX_SWITCH_VOLATILE 0x80000000
12809 #define NV_UCHROMA_CTX_SWITCH_VOLATILE_IGNORE 0x7FFFFFFF
12810 #define NV_UCHROMA_CTX_SWITCH_VOLATILE_RESET 0x80000000
12811 
12812 /* NV-Register NV_UCHROMA_NOTIFY */
12813 #define NV_UCHROMA_NOTIFY 0x00430104
12814 #define NV_UCHROMA_NOTIFY_STYLE 0xFFFFFFFF
12815 #define NV_UCHROMA_NOTIFY_STYLE_WRITE_ONLY 0x00000000
12816 #define NV_UCHROMA_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001
12817 
12818 /* NV-Register NV_UCHROMA_SET_NOTIFY */
12819 #define NV_UCHROMA_SET_NOTIFY 0x00430104
12820 /* Alias NV_UCHROMA_NOTIFY */
12821 /* Alias NV_UCHROMA_NOTIFY */
12822 #define NV_UCHROMA_SET_NOTIFY_PARAMETER 0xFFFFFFFF
12823 #define NV_UCHROMA_SET_NOTIFY_PARAMETER_WRITE 0x00000000
12824 
12825 /* NV-Register NV_UCHROMA_SET_CONTEXT_DMA_NOTIFY */
12826 #define NV_UCHROMA_SET_CONTEXT_DMA_NOTIFY 0x00430180
12827 #define NV_UCHROMA_SET_CONTEXT_DMA_NOTIFY_PARAMETER 0xFFFFFFFF
12828 
12829 /* NV-Register NV_UCHROMA_SET_IMAGE_OUTPUT */
12830 #define NV_UCHROMA_SET_IMAGE_OUTPUT 0x00430200
12831 #define NV_UCHROMA_SET_IMAGE_OUTPUT_PARAMETER 0xFFFFFFFF
12832 
12833 /* NV-Register NV_UCHROMA_SET_COLOR_FORMAT */
12834 #define NV_UCHROMA_SET_COLOR_FORMAT 0x00430300
12835 #define NV_UCHROMA_SET_COLOR_FORMAT_LE 0xFFFFFFFF
12836 #define NV_UCHROMA_SET_COLOR_FORMAT_LE_X16A8Y8 0x00000001
12837 #define NV_UCHROMA_SET_COLOR_FORMAT_LE_X24Y8 0x00000002
12838 #define NV_UCHROMA_SET_COLOR_FORMAT_LE_X16A1R5G5B5 0x00000003
12839 #define NV_UCHROMA_SET_COLOR_FORMAT_LE_X17R5G5B5 0x00000004
12840 #define NV_UCHROMA_SET_COLOR_FORMAT_LE_A8R8G8B8 0x00000005
12841 #define NV_UCHROMA_SET_COLOR_FORMAT_LE_X8R8G8B8 0x00000006
12842 #define NV_UCHROMA_SET_COLOR_FORMAT_LE_A16Y16 0x00000007
12843 #define NV_UCHROMA_SET_COLOR_FORMAT_LE_X16Y16 0x00000008
12844 
12845 /* NV-Register NV_UCHROMA_SET_COLOR */
12846 #define NV_UCHROMA_SET_COLOR 0x00430304
12847 #define NV_UCHROMA_SET_COLOR_VALUE 0xFFFFFFFF
12848 
12849 /* NV-Device NV_UIMAGESTENCIL */
12850 #define NV_UIMAGESTENCIL 0x005D0000 /* size: 0x00001FFF */
12851 #define NV_IMAGE_STENCIL 0x00000010
12852 
12853 /* NV-Register NV_UIMAGESTENCIL_CTX_SWITCH */
12854 #define NV_UIMAGESTENCIL_CTX_SWITCH 0x005D0000
12855 #define NV_UIMAGESTENCIL_CTX_SWITCH_INSTANCE 0x0000FFFF
12856 #define NV_UIMAGESTENCIL_CTX_SWITCH_CHID 0x007F0000
12857 #define NV_UIMAGESTENCIL_CTX_SWITCH_VOLATILE 0x80000000
12858 #define NV_UIMAGESTENCIL_CTX_SWITCH_VOLATILE_IGNORE 0x7FFFFFFF
12859 #define NV_UIMAGESTENCIL_CTX_SWITCH_VOLATILE_RESET 0x80000000
12860 
12861 /* NV-Register NV_UIMAGESTENCIL_NOTIFY */
12862 #define NV_UIMAGESTENCIL_NOTIFY 0x005D0104
12863 #define NV_UIMAGESTENCIL_NOTIFY_STYLE 0xFFFFFFFF
12864 #define NV_UIMAGESTENCIL_NOTIFY_STYLE_WRITE_ONLY 0x00000000
12865 #define NV_UIMAGESTENCIL_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001
12866 
12867 /* NV-Register NV_UIMAGESTENCIL_SET_CONTEXT_DMA_NOTIFY */
12868 #define NV_UIMAGESTENCIL_SET_CONTEXT_DMA_NOTIFY 0x005D0180
12869 #define NV_UIMAGESTENCIL_SET_CONTEXT_DMA_NOTIFY_PARAMETER 0xFFFFFFFF
12870 
12871 /* NV-Register NV_UIMAGESTENCIL_SET_IMAGE_OUTPUT */
12872 #define NV_UIMAGESTENCIL_SET_IMAGE_OUTPUT 0x005D0200
12873 #define NV_UIMAGESTENCIL_SET_IMAGE_OUTPUT_PARAMETER 0xFFFFFFFF
12874 
12875 /* NV-Array NV_UIMAGESTENCIL_SET_IMAGE_INPUT (4 byte access) */
12876 #define NV_UIMAGESTENCIL_SET_IMAGE_INPUT 0x005D0204
12877 /* NV-Array size NV_UIMAGESTENCIL_SET_IMAGE_INPUT__SIZE_1 [0..1] */
12878 #define NV_UIMAGESTENCIL_SET_IMAGE_INPUT__SIZE_1 0x00000002
12879 #define NV_UIMAGESTENCIL_SET_IMAGE_INPUT_PARAMETER 0xFFFFFFFF
12880 
12881 /* NV-Device NV_UTOMEM */
12882 #define NV_UTOMEM 0x00540000 /* size: 0x00001FFF */
12883 
12884 /* NV-Register NV_UTOMEM_CTX_SWITCH */
12885 #define NV_UTOMEM_CTX_SWITCH 0x00540000
12886 #define NV_UTOMEM_CTX_SWITCH_INSTANCE 0x0000FFFF
12887 #define NV_UTOMEM_CTX_SWITCH_CHID 0x007F0000
12888 #define NV_UTOMEM_CTX_SWITCH_VOLATILE 0x80000000
12889 #define NV_UTOMEM_CTX_SWITCH_VOLATILE_IGNORE 0x7FFFFFFF
12890 #define NV_UTOMEM_CTX_SWITCH_VOLATILE_RESET 0x80000000
12891 
12892 /* NV-Register NV_UTOMEM_SET_NOTIFY */
12893 #define NV_UTOMEM_SET_NOTIFY 0x00540104
12894 #define NV_UTOMEM_SET_NOTIFY_PARAMETER 0xFFFFFFFF
12895 #define NV_UTOMEM_SET_NOTIFY_PARAMETER_WRITE 0x00000000
12896 
12897 /* NV-Register NV_UTOMEM_POINT */
12898 #define NV_UTOMEM_POINT 0x00540308
12899 #define NV_UTOMEM_POINT_X 0x0000FFFF
12900 #define NV_UTOMEM_POINT_Y 0xFFFF0000
12901 
12902 /* NV-Register NV_UTOMEM_SIZE */
12903 #define NV_UTOMEM_SIZE 0x0054030C
12904 #define NV_UTOMEM_SIZE_WIDTH 0x0000FFFF
12905 #define NV_UTOMEM_SIZE_HEIGHT 0xFFFF0000
12906 
12907 /* NV-Register NV_UTOMEM_IMAGE_PITCH */
12908 #define NV_UTOMEM_IMAGE_PITCH 0x00540310
12909 #define NV_UTOMEM_IMAGE_PITCH_VALUE 0xFFFFFFFF
12910 
12911 /* NV-Register NV_UTOMEM_IMAGE_START */
12912 #define NV_UTOMEM_IMAGE_START 0x00540314
12913 #define NV_UTOMEM_IMAGE_START_OFFSET 0xFFFFFFFF
12914 
12915 /* NV-Device NV_ULIN */
12916 #define NV_ULIN 0x004A0000 /* size: 0x00001FFF */
12917 #define NV1_RENDER_SOLID_LIN 0x0000001C
12918 
12919 /* NV-Register NV_ULIN_CTX_SWITCH */
12920 #define NV_ULIN_CTX_SWITCH 0x004A0000
12921 #define NV_ULIN_CTX_SWITCH_INSTANCE 0x0000FFFF
12922 #define NV_ULIN_CTX_SWITCH_CHID 0x007F0000
12923 #define NV_ULIN_CTX_SWITCH_VOLATILE 0x80000000
12924 #define NV_ULIN_CTX_SWITCH_VOLATILE_IGNORE 0x7FFFFFFF
12925 #define NV_ULIN_CTX_SWITCH_VOLATILE_RESET 0x80000000
12926 
12927 /* NV-Register NV_ULIN_NOTIFY */
12928 #define NV_ULIN_NOTIFY 0x004A0104
12929 #define NV_ULIN_NOTIFY_STYLE 0xFFFFFFFF
12930 #define NV_ULIN_NOTIFY_STYLE_WRITE_ONLY 0x00000000
12931 #define NV_ULIN_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001
12932 
12933 /* NV-Register NV_ULIN_SET_NOTIFY */
12934 #define NV_ULIN_SET_NOTIFY 0x004A0104
12935 /* Alias NV_ULIN_NOTIFY */
12936 /* Alias NV_ULIN_NOTIFY */
12937 #define NV_ULIN_SET_NOTIFY_PARAMETER 0xFFFFFFFF
12938 #define NV_ULIN_SET_NOTIFY_PARAMETER_WRITE 0x00000000
12939 
12940 /* NV-Register NV_ULIN_SET_PATCH */
12941 #define NV_ULIN_SET_PATCH 0x004A010C
12942 #define NV_ULIN_SET_PATCH_PARAMETER 0xFFFFFFFF
12943 #define NV_ULIN_SET_PATCH_PARAMETER_INVALIDATE 0x00000000
12944 #define NV_ULIN_SET_PATCH_PARAMETER_VALIDATE 0x00000001
12945 
12946 /* NV-Register NV_ULIN_SET_CONTEXT_DMA_NOTIFY */
12947 #define NV_ULIN_SET_CONTEXT_DMA_NOTIFY 0x004A0180
12948 #define NV_ULIN_SET_CONTEXT_DMA_NOTIFY_PARAMETER 0xFFFFFFFF
12949 
12950 /* NV-Register NV_ULIN_SET_IMAGE_OUTPUT */
12951 #define NV_ULIN_SET_IMAGE_OUTPUT 0x004A0200
12952 #define NV_ULIN_SET_IMAGE_OUTPUT_PARAMETER 0xFFFFFFFF
12953 
12954 /* NV-Register NV_ULIN_SET_COLOR_FORMAT */
12955 #define NV_ULIN_SET_COLOR_FORMAT 0x004A0300
12956 #define NV_ULIN_SET_COLOR_FORMAT_LE 0xFFFFFFFF
12957 #define NV_ULIN_SET_COLOR_FORMAT_LE_X16A8Y8 0x00000001
12958 #define NV_ULIN_SET_COLOR_FORMAT_LE_X24Y8 0x00000002
12959 #define NV_ULIN_SET_COLOR_FORMAT_LE_X16A1R5G5B5 0x00000003
12960 #define NV_ULIN_SET_COLOR_FORMAT_LE_X17R5G5B5 0x00000004
12961 #define NV_ULIN_SET_COLOR_FORMAT_LE_A8R8G8B8 0x00000005
12962 #define NV_ULIN_SET_COLOR_FORMAT_LE_X8R8G8B8 0x00000006
12963 #define NV_ULIN_SET_COLOR_FORMAT_LE_A16Y16 0x00000007
12964 #define NV_ULIN_SET_COLOR_FORMAT_LE_X16Y16 0x00000008
12965 
12966 /* NV-Register NV_ULIN_COLOR */
12967 #define NV_ULIN_COLOR 0x004A0304
12968 #define NV_ULIN_COLOR_VALUE 0xFFFFFFFF
12969 
12970 /* NV-Array NV_ULIN_LIN_0 (8 byte access) */
12971 #define NV_ULIN_LIN_0 0x004A0400
12972 /* NV-Array size NV_ULIN_LIN_0__SIZE_1 [0..15] */
12973 #define NV_ULIN_LIN_0__SIZE_1 0x00000010
12974 #define NV_ULIN_LIN_0_X 0x0000FFFF
12975 #define NV_ULIN_LIN_0_Y 0xFFFF0000
12976 
12977 /* NV-Array NV_ULIN_LIN_1 (8 byte access) */
12978 #define NV_ULIN_LIN_1 0x004A0404
12979 /* NV-Array size NV_ULIN_LIN_1__SIZE_1 [0..15] */
12980 #define NV_ULIN_LIN_1__SIZE_1 0x00000010
12981 #define NV_ULIN_LIN_1_X 0x0000FFFF
12982 #define NV_ULIN_LIN_1_Y 0xFFFF0000
12983 
12984 /* NV-Array NV_ULIN_LIN32_0 (16 byte access) */
12985 #define NV_ULIN_LIN32_0 0x004A0480
12986 /* NV-Array size NV_ULIN_LIN32_0__SIZE_1 [0..7] */
12987 #define NV_ULIN_LIN32_0__SIZE_1 0x00000008
12988 #define NV_ULIN_LIN32_0_X 0xFFFFFFFF
12989 
12990 /* NV-Array NV_ULIN_LIN32_1 (16 byte access) */
12991 #define NV_ULIN_LIN32_1 0x004A0484
12992 /* NV-Array size NV_ULIN_LIN32_1__SIZE_1 [0..7] */
12993 #define NV_ULIN_LIN32_1__SIZE_1 0x00000008
12994 #define NV_ULIN_LIN32_1_Y 0xFFFFFFFF
12995 
12996 /* NV-Array NV_ULIN_LIN32_2 (16 byte access) */
12997 #define NV_ULIN_LIN32_2 0x004A0488
12998 /* NV-Array size NV_ULIN_LIN32_2__SIZE_1 [0..7] */
12999 #define NV_ULIN_LIN32_2__SIZE_1 0x00000008
13000 #define NV_ULIN_LIN32_2_X 0xFFFFFFFF
13001 
13002 /* NV-Array NV_ULIN_LIN32_3 (16 byte access) */
13003 #define NV_ULIN_LIN32_3 0x004A048C
13004 /* NV-Array size NV_ULIN_LIN32_3__SIZE_1 [0..7] */
13005 #define NV_ULIN_LIN32_3__SIZE_1 0x00000008
13006 #define NV_ULIN_LIN32_3_Y 0xFFFFFFFF
13007 
13008 /* NV-Array NV_ULIN_POLYLIN (4 byte access) */
13009 #define NV_ULIN_POLYLIN 0x004A0500
13010 /* NV-Array size NV_ULIN_POLYLIN__SIZE_1 [0..31] */
13011 #define NV_ULIN_POLYLIN__SIZE_1 0x00000020
13012 #define NV_ULIN_POLYLIN_X 0x0000FFFF
13013 #define NV_ULIN_POLYLIN_Y 0xFFFF0000
13014 
13015 /* NV-Array NV_ULIN_POLYLIN32_0 (8 byte access) */
13016 #define NV_ULIN_POLYLIN32_0 0x004A0580
13017 /* NV-Array size NV_ULIN_POLYLIN32_0__SIZE_1 [0..15] */
13018 #define NV_ULIN_POLYLIN32_0__SIZE_1 0x00000010
13019 #define NV_ULIN_POLYLIN32_0_X 0xFFFFFFFF
13020 
13021 /* NV-Array NV_ULIN_POLYLIN32_1 (8 byte access) */
13022 #define NV_ULIN_POLYLIN32_1 0x004A0584
13023 /* NV-Array size NV_ULIN_POLYLIN32_1__SIZE_1 [0..15] */
13024 #define NV_ULIN_POLYLIN32_1__SIZE_1 0x00000010
13025 #define NV_ULIN_POLYLIN32_1_Y 0xFFFFFFFF
13026 
13027 /* NV-Array NV_ULIN_CPOLYLIN_0 (8 byte access) */
13028 #define NV_ULIN_CPOLYLIN_0 0x004A0600
13029 /* NV-Array size NV_ULIN_CPOLYLIN_0__SIZE_1 [0..15] */
13030 #define NV_ULIN_CPOLYLIN_0__SIZE_1 0x00000010
13031 #define NV_ULIN_CPOLYLIN_0_COLOR 0xFFFFFFFF
13032 
13033 /* NV-Array NV_ULIN_CPOLYLIN_1 (8 byte access) */
13034 #define NV_ULIN_CPOLYLIN_1 0x004A0604
13035 /* NV-Array size NV_ULIN_CPOLYLIN_1__SIZE_1 [0..15] */
13036 #define NV_ULIN_CPOLYLIN_1__SIZE_1 0x00000010
13037 #define NV_ULIN_CPOLYLIN_1_X 0x0000FFFF
13038 #define NV_ULIN_CPOLYLIN_1_Y 0xFFFF0000
13039 
13040 /* NV-Device NV_UMEMFMT */
13041 #define NV_UMEMFMT 0x004D0000 /* size: 0x00001FFF */
13042 #define NV_MEMORY_TO_MEMORY_FORMAT 0x00390000
13043 
13044 /* NV-Register NV_UMEMFMT_CTX_SWITCH */
13045 #define NV_UMEMFMT_CTX_SWITCH 0x004D0000
13046 
13047 /* NV-Register NV_UMEMFMT_NOP */
13048 #define NV_UMEMFMT_NOP 0x004D0100
13049 #define NV_UMEMFMT_NOP_PARAMETER 0xFFFFFFFF
13050 
13051 /* NV-Register NV_UMEMFMT_NOTIFY */
13052 #define NV_UMEMFMT_NOTIFY 0x004D0104
13053 #define NV_UMEMFMT_NOTIFY_STYLE 0xFFFFFFFF
13054 #define NV_UMEMFMT_NOTIFY_STYLE_WRITE_ONLY 0x00000000
13055 #define NV_UMEMFMT_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001
13056 
13057 /* NV-Register NV_UMEMFMT_SET_NOTIFY */
13058 #define NV_UMEMFMT_SET_NOTIFY 0x004D0104
13059 /* Alias NV_UMEMFMT_NOTIFY */
13060 /* Alias NV_UMEMFMT_NOTIFY */
13061 #define NV_UMEMFMT_SET_NOTIFY_PARAMETER 0xFFFFFFFF
13062 #define NV_UMEMFMT_SET_NOTIFY_PARAMETER_WRITE 0x00000000
13063 
13064 /* NV-Register NV_UMEMFMT_SET_CONTEXT_DMA_NOTIFY */
13065 #define NV_UMEMFMT_SET_CONTEXT_DMA_NOTIFY 0x004D0180
13066 #define NV_UMEMFMT_SET_CONTEXT_DMA_NOTIFY_INSTANCE 0x0000FFFF
13067 
13068 /* NV-Register NV_UMEMFMT_SET_CONTEXT_DMA_BUFFER_IN */
13069 #define NV_UMEMFMT_SET_CONTEXT_DMA_BUFFER_IN 0x004D0184
13070 #define NV_UMEMFMT_SET_CONTEXT_DMA_BUFFER_IN_INSTANCE 0x0000FFFF
13071 
13072 /* NV-Register NV_UMEMFMT_SET_CONTEXT_DMA_BUFFER_OUT */
13073 #define NV_UMEMFMT_SET_CONTEXT_DMA_BUFFER_OUT 0x004D0188
13074 #define NV_UMEMFMT_SET_CONTEXT_DMA_BUFFER_OUT_INSTANCE 0x0000FFFF
13075 
13076 /* NV-Register NV_UMEMFMT_OFFSET_IN */
13077 #define NV_UMEMFMT_OFFSET_IN 0x004D030C
13078 #define NV_UMEMFMT_OFFSET_IN_VALUE 0xFFFFFFFF
13079 
13080 /* NV-Register NV_UMEMFMT_OFFSET_OUT */
13081 #define NV_UMEMFMT_OFFSET_OUT 0x004D0310
13082 #define NV_UMEMFMT_OFFSET_OUT_VALUE 0xFFFFFFFF
13083 
13084 /* NV-Register NV_UMEMFMT_PITCH_IN */
13085 #define NV_UMEMFMT_PITCH_IN 0x004D0314
13086 #define NV_UMEMFMT_PITCH_IN_VALUE 0xFFFFFFFF
13087 
13088 /* NV-Register NV_UMEMFMT_PITCH_OUT */
13089 #define NV_UMEMFMT_PITCH_OUT 0x004D0318
13090 #define NV_UMEMFMT_PITCH_OUT_VALUE 0xFFFFFFFF
13091 
13092 /* NV-Register NV_UMEMFMT_LINE_LENGTH_IN */
13093 #define NV_UMEMFMT_LINE_LENGTH_IN 0x004D031C
13094 #define NV_UMEMFMT_LINE_LENGTH_IN_VALUE 0xFFFFFFFF
13095 
13096 /* NV-Register NV_UMEMFMT_LINE_COUNT */
13097 #define NV_UMEMFMT_LINE_COUNT 0x004D0320
13098 #define NV_UMEMFMT_LINE_COUNT_VALUE 0xFFFFFFFF
13099 
13100 /* NV-Register NV_UMEMFMT_FORMAT */
13101 #define NV_UMEMFMT_FORMAT 0x004D0324
13102 #define NV_UMEMFMT_FORMAT_INPUT_INC 0x00000007
13103 #define NV_UMEMFMT_FORMAT_INPUT_INC_1 0x00000001
13104 #define NV_UMEMFMT_FORMAT_INPUT_INC_2 0x00000002
13105 #define NV_UMEMFMT_FORMAT_INPUT_INC_4 0x00000004
13106 #define NV_UMEMFMT_FORMAT_OUTPUT_INC 0x00000700
13107 #define NV_UMEMFMT_FORMAT_OUTPUT_INC_1 0x00000100
13108 #define NV_UMEMFMT_FORMAT_OUTPUT_INC_2 0x00000200
13109 #define NV_UMEMFMT_FORMAT_OUTPUT_INC_4 0x00000400
13110 
13111 /* NV-Register NV_UMEMFMT_BUF_NOTIFY */
13112 #define NV_UMEMFMT_BUF_NOTIFY 0x004D0328
13113 #define NV_UMEMFMT_BUF_NOTIFY_VALUE 0xFFFFFFFF
13114 #define NV_NULL_CLASS 0x00000030
13115 #define NV_NULL_OBJECT 0x00000000
13116 
13117 /* NV-Device NV_093 */
13118 #define NV_093 0x00580000 /* size: 0x00001FFF */
13119 #define NV10_CONTEXT_SURFACES_ARGB_ZS 0x00000093
13120 
13121 /* NV-Register NV_093_NV10_CONTEXT_SURFACES_ARGB_ZS */
13122 #define NV_093_NV10_CONTEXT_SURFACES_ARGB_ZS 0x00580000
13123 
13124 /* NV-Register NV_093_NOP */
13125 #define NV_093_NOP 0x00580100
13126 #define NV_093_NOP_PARAMETER 0xFFFFFFFF
13127 
13128 /* NV-Register NV_093_NOTIFY */
13129 #define NV_093_NOTIFY 0x00580104
13130 #define NV_093_NOTIFY_STYLE 0xFFFFFFFF
13131 #define NV_093_NOTIFY_STYLE_WRITE_ONLY 0x00000000
13132 #define NV_093_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001
13133 
13134 /* NV-Register NV_093_SET_CONTEXT_DMA_NOTIFY */
13135 #define NV_093_SET_CONTEXT_DMA_NOTIFY 0x00580180
13136 #define NV_093_SET_CONTEXT_DMA_NOTIFY_PARAMETER 0xFFFFFFFF
13137 
13138 /* NV-Register NV_093_SET_CONTEXT_DMA_COLOR */
13139 #define NV_093_SET_CONTEXT_DMA_COLOR 0x00580184
13140 #define NV_093_SET_CONTEXT_DMA_COLOR_PARAMETER 0xFFFFFFFF
13141 
13142 /* NV-Register NV_093_SET_CONTEXT_DMA_ZETA */
13143 #define NV_093_SET_CONTEXT_DMA_ZETA 0x00580188
13144 #define NV_093_SET_CONTEXT_DMA_ZETA_PARAMETER 0xFFFFFFFF
13145 
13146 /* NV-Register NV_093_SET_CLIP_HORIZONTAL */
13147 #define NV_093_SET_CLIP_HORIZONTAL 0x005802F8
13148 #define NV_093_SET_CLIP_HORIZONTAL_X 0x0000FFFF
13149 #define NV_093_SET_CLIP_HORIZONTAL_WIDTH 0xFFFF0000
13150 
13151 /* NV-Register NV_093_SET_CLIP_VERTICAL */
13152 #define NV_093_SET_CLIP_VERTICAL 0x005802FC
13153 #define NV_093_SET_CLIP_VERTICAL_Y 0x0000FFFF
13154 #define NV_093_SET_CLIP_VERTICAL_HEIGHT 0xFFFF0000
13155 
13156 /* NV-Register NV_093_SET_FORMAT */
13157 #define NV_093_SET_FORMAT 0x00580300
13158 #define NV_093_SET_FORMAT_COLOR 0x000000FF
13159 #define NV_093_SET_FORMAT_COLOR_LE_X1R5G5B5_Z1R5G5B5 0x00000001
13160 #define NV_093_SET_FORMAT_COLOR_LE_X1R5G5B5_O1R5G5B5 0x00000002
13161 #define NV_093_SET_FORMAT_COLOR_LE_R5G6B5 0x00000003
13162 #define NV_093_SET_FORMAT_COLOR_LE_X8R8G8B8_Z8R8G8B8 0x00000004
13163 #define NV_093_SET_FORMAT_COLOR_LE_X8R8G8B8_O8R8G8B8 0x00000005
13164 #define NV_093_SET_FORMAT_COLOR_LE_X1A7R8G8B8_Z1A7R8G8B8 0x00000006
13165 #define NV_093_SET_FORMAT_COLOR_LE_X1A7R8G8B8_O1A7R8G8B8 0x00000007
13166 #define NV_093_SET_FORMAT_COLOR_LE_A8R8G8B8 0x00000008
13167 #define NV_093_SET_FORMAT_TYPE 0x0000FF00
13168 #define NV_093_SET_FORMAT_TYPE_PITCH 0x00000100
13169 #define NV_093_SET_FORMAT_TYPE_SWIZZLE 0x00000200
13170 #define NV_093_SET_FORMAT_WIDTH 0x00FF0000
13171 #define NV_093_SET_FORMAT_HEIGHT 0xFF000000
13172 
13173 /* NV-Register NV_093_SET_CLIP_SIZE */
13174 #define NV_093_SET_CLIP_SIZE 0x00580304
13175 #define NV_093_SET_CLIP_SIZE_WIDTH 0x0000FFFF
13176 #define NV_093_SET_CLIP_SIZE_HEIGHT 0xFFFF0000
13177 
13178 /* NV-Register NV_093_SET_PITCH */
13179 #define NV_093_SET_PITCH 0x00580308
13180 #define NV_093_SET_PITCH_COLOR 0x0000FFFF
13181 #define NV_093_SET_PITCH_ZETA 0xFFFF0000
13182 
13183 /* NV-Register NV_093_SET_OFFSET_COLOR */
13184 #define NV_093_SET_OFFSET_COLOR 0x0058030C
13185 #define NV_093_SET_OFFSET_COLOR_VALUE 0xFFFFFFFF
13186 
13187 /* NV-Register NV_093_SET_OFFSET_ZETA */
13188 #define NV_093_SET_OFFSET_ZETA 0x00580310
13189 #define NV_093_SET_OFFSET_ZETA_VALUE 0xFFFFFFFF
13190 
13191 /* NV-Device NV_088 */
13192 #define NV_088 0x006F0000 /* size: 0x00001FFF */
13193 #define NV10_DVD_SUBPICTURE 0x00000088
13194 
13195 /* NV-Register NV_088_NV4_DVD_SUBPICTURE */
13196 #define NV_088_NV4_DVD_SUBPICTURE 0x006F0000
13197 
13198 /* NV-Register NV_088_NOP */
13199 #define NV_088_NOP 0x006F0100
13200 #define NV_088_NOP_PARAMETER 0xFFFFFFFF
13201 
13202 /* NV-Register NV_088_NOTIFY */
13203 #define NV_088_NOTIFY 0x006F0104
13204 #define NV_088_NOTIFY_STYLE 0xFFFFFFFF
13205 #define NV_088_NOTIFY_STYLE_WRITE_ONLY 0x00000000
13206 #define NV_088_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001
13207 /* Alias NV_088_SET_NOTIFY */
13208 /* Alias NV_088_SET_NOTIFY */
13209 #define NV_088_SET_NOTIFY_PARAMETER 0xFFFFFFFF
13210 #define NV_088_SET_NOTIFY_PARAMETER_WRITE 0x00000000
13211 
13212 /* NV-Register NV_088_WAIT_FOR_IDLE */
13213 #define NV_088_WAIT_FOR_IDLE 0x006F0108
13214 #define NV_088_WAIT_FOR_IDLE_PARAMETER 0xFFFFFFFF
13215 
13216 /* NV-Register NV_088_SET_CONTEXT_DMA_NOTIFY */
13217 #define NV_088_SET_CONTEXT_DMA_NOTIFY 0x006F0180
13218 #define NV_088_SET_CONTEXT_DMA_NOTIFY_PARAMETER 0xFFFFFFFF
13219 
13220 /* NV-Register NV_088_SET_CONTEXT_DMA_OVERLAY */
13221 #define NV_088_SET_CONTEXT_DMA_OVERLAY 0x006F0184
13222 #define NV_088_SET_CONTEXT_DMA_OVERLAY_PARAMETER 0xFFFFFFFF
13223 
13224 /* NV-Register NV_088_SET_CONTEXT_DMA_IMAGEIN */
13225 #define NV_088_SET_CONTEXT_DMA_IMAGEIN 0x006F0188
13226 #define NV_088_SET_CONTEXT_DMA_IMAGEIN_PARAMETER 0xFFFFFFFF
13227 
13228 /* NV-Register NV_088_SET_CONTEXT_DMA_IMAGEOUT */
13229 #define NV_088_SET_CONTEXT_DMA_IMAGEOUT 0x006F018C
13230 #define NV_088_SET_CONTEXT_DMA_IMAGEOUT_PARAMETER 0xFFFFFFFF
13231 
13232 /* NV-Register NV_088_IMAGEOUT_POINT */
13233 #define NV_088_IMAGEOUT_POINT 0x006F0300
13234 #define NV_088_IMAGEOUT_POINT_X 0x0000FFFF
13235 #define NV_088_IMAGEOUT_POINT_Y 0xFFFF0000
13236 
13237 /* NV-Register NV_088_IMAGEOUT_SIZE */
13238 #define NV_088_IMAGEOUT_SIZE 0x006F0304
13239 #define NV_088_IMAGEOUT_SIZE_WIDTH 0x0000FFFF
13240 #define NV_088_IMAGEOUT_SIZE_HEIGHT 0xFFFF0000
13241 
13242 /* NV-Register NV_088_IMAGEOUT_FMT */
13243 #define NV_088_IMAGEOUT_FMT 0x006F0308
13244 #define NV_088_IMAGEOUT_FMT_PITCH 0x0000FFFF
13245 #define NV_088_IMAGEOUT_FMT_COLOR 0xFFFF0000
13246 #define NV_088_IMAGEOUT_FMT_COLOR_INVALID 0x00000000
13247 #define NV_088_IMAGEOUT_FMT_COLOR_LE_V8YB8U8YA8 0x00010000
13248 #define NV_088_IMAGEOUT_FMT_COLOR_LE_YB8V8YA8U8 0x00020000
13249 
13250 /* NV-Register NV_088_IMAGEOUT_OFFSET */
13251 #define NV_088_IMAGEOUT_OFFSET 0x006F030C
13252 #define NV_088_IMAGEOUT_OFFSET_VALUE 0xFFFFFFFF
13253 
13254 /* NV-Register NV_088_IMAGEIN_DELTA_DU_DX */
13255 #define NV_088_IMAGEIN_DELTA_DU_DX 0x006F0310
13256 #define NV_088_IMAGEIN_DELTA_DU_DX_R_FRACTION 0x000FFFFF
13257 #define NV_088_IMAGEIN_DELTA_DU_DX_R_INT 0xFFF00000
13258 #define NV_088_IMAGEIN_DELTA_DU_DX_R 0xFFFFFFFF
13259 
13260 /* NV-Register NV_088_IMAGEIN_DELTA_DV_DY */
13261 #define NV_088_IMAGEIN_DELTA_DV_DY 0x006F0314
13262 #define NV_088_IMAGEIN_DELTA_DV_DY_R_FRACTION 0x000FFFFF
13263 #define NV_088_IMAGEIN_DELTA_DV_DY_R_INT 0xFFF00000
13264 #define NV_088_IMAGEIN_DELTA_DV_DY_R 0xFFFFFFFF
13265 
13266 /* NV-Register NV_088_IMAGEIN_SIZE */
13267 #define NV_088_IMAGEIN_SIZE 0x006F0318
13268 #define NV_088_IMAGEIN_SIZE_WIDTH 0x0000FFFF
13269 #define NV_088_IMAGEIN_SIZE_HEIGHT 0xFFFF0000
13270 
13271 /* NV-Register NV_088_IMAGEIN_FMT */
13272 #define NV_088_IMAGEIN_FMT 0x006F031C
13273 #define NV_088_IMAGEIN_FMT_PITCH 0x0000FFFF
13274 #define NV_088_IMAGEIN_FMT_COLOR 0xFFFF0000
13275 #define NV_088_IMAGEIN_FMT_COLOR_INVALID 0x00000000
13276 #define NV_088_IMAGEIN_FMT_COLOR_LE_V8YB8U8YA8 0x00010000
13277 #define NV_088_IMAGEIN_FMT_COLOR_LE_YB8V8YA8U8 0x00020000
13278 
13279 /* NV-Register NV_088_IMAGEIN_OFFSET */
13280 #define NV_088_IMAGEIN_OFFSET 0x006F0320
13281 #define NV_088_IMAGEIN_OFFSET_VALUE 0xFFFFFFFF
13282 
13283 /* NV-Register NV_088_IMAGEIN_POINT */
13284 #define NV_088_IMAGEIN_POINT 0x006F0324
13285 #define NV_088_IMAGEIN_POINT_U_FRACTION 0x0000000F
13286 #define NV_088_IMAGEIN_POINT_U_INT 0x0000FFF0
13287 #define NV_088_IMAGEIN_POINT_U_VALUE 0x0000FFFF
13288 #define NV_088_IMAGEIN_POINT_V_FRACTION 0x000F0000
13289 #define NV_088_IMAGEIN_POINT_V_INT 0xFFF00000
13290 #define NV_088_IMAGEIN_POINT_V_VALUE 0xFFFFFFFF
13291 
13292 /* NV-Register NV_088_OVERLAY_DELTA_DU_DX */
13293 #define NV_088_OVERLAY_DELTA_DU_DX 0x006F0328
13294 #define NV_088_OVERLAY_DELTA_DU_DX_R_FRACTION 0x000FFFFF
13295 #define NV_088_OVERLAY_DELTA_DU_DX_R_INT 0xFFF00000
13296 #define NV_088_OVERLAY_DELTA_DU_DX_R 0xFFFFFFFF
13297 
13298 /* NV-Register NV_088_OVERLAY_DELTA_DV_DY */
13299 #define NV_088_OVERLAY_DELTA_DV_DY 0x006F032C
13300 #define NV_088_OVERLAY_DELTA_DV_DY_R_FRACTION 0x000FFFFF
13301 #define NV_088_OVERLAY_DELTA_DV_DY_R_INT 0xFFF00000
13302 #define NV_088_OVERLAY_DELTA_DV_DY_R 0xFFFFFFFF
13303 
13304 /* NV-Register NV_088_OVERLAY_SIZE */
13305 #define NV_088_OVERLAY_SIZE 0x006F0330
13306 #define NV_088_OVERLAY_SIZE_WIDTH 0x0000FFFF
13307 #define NV_088_OVERLAY_SIZE_HEIGHT 0xFFFF0000
13308 
13309 /* NV-Register NV_088_OVERLAY_FMT */
13310 #define NV_088_OVERLAY_FMT 0x006F0334
13311 #define NV_088_OVERLAY_FMT_PITCH 0x0000FFFF
13312 #define NV_088_OVERLAY_FMT_COLOR 0xFFFF0000
13313 #define NV_088_OVERLAY_FMT_COLOR_INVALID 0x00000000
13314 #define NV_088_OVERLAY_FMT_COLOR_LE_A8V8U8Y8 0x00010000
13315 #define NV_088_OVERLAY_FMT_COLOR_LE_A4V6YB6A4U6YA6 0x00020000
13316 #define NV_088_OVERLAY_FMT_COLOR_LE_TRANSPARENT 0x00030000
13317 
13318 /* NV-Register NV_088_OVERLAY_OFFSET */
13319 #define NV_088_OVERLAY_OFFSET 0x006F0338
13320 #define NV_088_OVERLAY_OFFSET_VALUE 0xFFFFFFFF
13321 
13322 /* NV-Register NV_088_OVERLAY_POINT */
13323 #define NV_088_OVERLAY_POINT 0x006F033C
13324 #define NV_088_OVERLAY_POINT_U_FRACTION 0x0000000F
13325 #define NV_088_OVERLAY_POINT_U_INT 0x0000FFF0
13326 #define NV_088_OVERLAY_POINT_U_VALUE 0x0000FFFF
13327 #define NV_088_OVERLAY_POINT_V_FRACTION 0x000F0000
13328 #define NV_088_OVERLAY_POINT_V_INT 0xFFF00000
13329 #define NV_088_OVERLAY_POINT_V_VALUE 0xFFFFFFFF
13330 
13331 /* NV-Device NV_094 */
13332 #define NV_094 0x00590000 /* size: 0x00001FFF */
13333 #define NV10_DX5_TEXTURE_TRIANGLE 0x00000094
13334 
13335 /* NV-Register NV_094_NV10_DX5_TEXTURE_TRIANGLE */
13336 #define NV_094_NV10_DX5_TEXTURE_TRIANGLE 0x00590000
13337 #define NV_094_NV10_DX5_TEXTURE_TRIANGLE_HANDLE 0xFFFFFFFF
13338 
13339 /* NV-Register NV_094_NOP */
13340 #define NV_094_NOP 0x00590100
13341 #define NV_094_NOP_PARAMETER 0xFFFFFFFF
13342 
13343 /* NV-Register NV_094_NOTIFY */
13344 #define NV_094_NOTIFY 0x00590104
13345 #define NV_094_NOTIFY_STYLE 0xFFFFFFFF
13346 #define NV_094_NOTIFY_STYLE_WRITE_ONLY 0x00000000
13347 #define NV_094_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001
13348 /* Alias NV_094_SET NOTIFY */
13349 #define NV_094_SET_NOTIFY_PARAMETER 0xFFFFFFFF
13350 #define NV_094_SET_NOTIFY_PARAMETER_WRITE 0x00000000
13351 
13352 /* NV-Register NV_094_SET_CONTEXT_DMA_NOTIFY */
13353 #define NV_094_SET_CONTEXT_DMA_NOTIFY 0x00590180
13354 #define NV_094_SET_CONTEXT_DMA_NOTIFY_PARAMETER 0xFFFFFFFF
13355 
13356 /* NV-Register NV_094_SET_CONTEXT_DMA_A */
13357 #define NV_094_SET_CONTEXT_DMA_A 0x00590184
13358 #define NV_094_SET_CONTEXT_DMA_A_PARAMETER 0xFFFFFFFF
13359 
13360 /* NV-Register NV_094_SET_CONTEXT_DMA_B */
13361 #define NV_094_SET_CONTEXT_DMA_B 0x00590188
13362 #define NV_094_SET_CONTEXT_DMA_B_PARAMETER 0xFFFFFFFF
13363 
13364 /* NV-Register NV_094_SET_CONTEXT_SURFACES */
13365 #define NV_094_SET_CONTEXT_SURFACES 0x0059018C
13366 #define NV_094_SET_CONTEXT_SURFACES_PARAMETER 0xFFFFFFFF
13367 
13368 /* NV-Register NV_094_COLORKEY */
13369 #define NV_094_COLORKEY 0x00590300
13370 #define NV_094_COLORKEY_VALUE 0xFFFFFFFF
13371 
13372 /* NV-Register NV_094_OFFSET */
13373 #define NV_094_OFFSET 0x00590304
13374 #define NV_094_OFFSET_VALUE 0xFFFFFFFF
13375 
13376 /* NV-Register NV_094_FORMAT */
13377 #define NV_094_FORMAT 0x00590308
13378 #define NV_094_FORMAT_CONTEXT_DMA 0x00000003
13379 #define NV_094_FORMAT_CONTEXT_DMA_A 0x00000001
13380 #define NV_094_FORMAT_CONTEXT_DMA_B 0x00000002
13381 #define NV_094_FORMAT_COLORKEYENABLE 0x0000000C
13382 #define NV_094_FORMAT_COLORKEYENABLE_FALSE 0x00000000
13383 #define NV_094_FORMAT_COLORKEYENABLE_TRUE 0x00000004
13384 #define NV_094_FORMAT_ORIGIN_ZOH 0x00000030
13385 #define NV_094_FORMAT_ORIGIN_ZOH_CENTER 0x00000010
13386 #define NV_094_FORMAT_ORIGIN_ZOH_CORNER 0x00000020
13387 #define NV_094_FORMAT_ORIGIN_FOH 0x000000C0
13388 #define NV_094_FORMAT_ORIGIN_FOH_CENTER 0x00000040
13389 #define NV_094_FORMAT_ORIGIN_FOH_CORNER 0x00000080
13390 #define NV_094_FORMAT_COLOR 0x00000F00
13391 #define NV_094_FORMAT_COLOR_LE_Y8 0x00000100
13392 #define NV_094_FORMAT_COLOR_LE_A1R5G5B5 0x00000200
13393 #define NV_094_FORMAT_COLOR_LE_X1R5G5B5 0x00000300
13394 #define NV_094_FORMAT_COLOR_LE_A4R4G4B4 0x00000400
13395 #define NV_094_FORMAT_COLOR_LE_R5G6B5 0x00000500
13396 #define NV_094_FORMAT_COLOR_LE_A8R8G8B8 0x00000600
13397 #define NV_094_FORMAT_COLOR_LE_X8R8G8B8 0x00000700
13398 #define NV_094_FORMAT_MIPMAP_LEVELS 0x0000F000
13399 #define NV_094_FORMAT_BASE_SIZE_U 0x000F0000
13400 #define NV_094_FORMAT_BASE_SIZE_U_1X1 0x00000000
13401 #define NV_094_FORMAT_BASE_SIZE_U_2X2 0x00010000
13402 #define NV_094_FORMAT_BASE_SIZE_U_4X4 0x00020000
13403 #define NV_094_FORMAT_BASE_SIZE_U_8X8 0x00030000
13404 #define NV_094_FORMAT_BASE_SIZE_U_16X16 0x00040000
13405 #define NV_094_FORMAT_BASE_SIZE_U_32X32 0x00050000
13406 #define NV_094_FORMAT_BASE_SIZE_U_64X64 0x00060000
13407 #define NV_094_FORMAT_BASE_SIZE_U_128X128 0x00070000
13408 #define NV_094_FORMAT_BASE_SIZE_U_256X256 0x00080000
13409 #define NV_094_FORMAT_BASE_SIZE_U_512X512 0x00090000
13410 #define NV_094_FORMAT_BASE_SIZE_U_1024X1024 0x000A0000
13411 #define NV_094_FORMAT_BASE_SIZE_U_2048X2048 0x000B0000
13412 #define NV_094_FORMAT_BASE_SIZE_V 0x00F00000
13413 #define NV_094_FORMAT_BASE_SIZE_V_1X1 0x00000000
13414 #define NV_094_FORMAT_BASE_SIZE_V_2X2 0x00100000
13415 #define NV_094_FORMAT_BASE_SIZE_V_4X4 0x00200000
13416 #define NV_094_FORMAT_BASE_SIZE_V_8X8 0x00300000
13417 #define NV_094_FORMAT_BASE_SIZE_V_16X16 0x00400000
13418 #define NV_094_FORMAT_BASE_SIZE_V_32X32 0x00500000
13419 #define NV_094_FORMAT_BASE_SIZE_V_64X64 0x00600000
13420 #define NV_094_FORMAT_BASE_SIZE_V_128X128 0x00700000
13421 #define NV_094_FORMAT_BASE_SIZE_V_256X256 0x00800000
13422 #define NV_094_FORMAT_BASE_SIZE_V_512X512 0x00900000
13423 #define NV_094_FORMAT_BASE_SIZE_V_1024X1024 0x00A00000
13424 #define NV_094_FORMAT_BASE_SIZE_V_2048X2048 0x00B00000
13425 #define NV_094_FORMAT_TEXTUREADDRESSU 0x07000000
13426 #define NV_094_FORMAT_TEXTUREADDRESSU_WRAP 0x01000000
13427 #define NV_094_FORMAT_TEXTUREADDRESSU_MIRROR 0x02000000
13428 #define NV_094_FORMAT_TEXTUREADDRESSU_CLAMP 0x03000000
13429 #define NV_094_FORMAT_TEXTUREADDRESSU_BORDER 0x04000000
13430 #define NV_094_FORMAT_WRAPU 0x08000000
13431 #define NV_094_FORMAT_WRAPU_FALSE 0xF7FFFFFF
13432 #define NV_094_FORMAT_WRAPU_TRUE 0x08000000
13433 #define NV_094_FORMAT_TEXTUREADDRESSV 0x70000000
13434 #define NV_094_FORMAT_TEXTUREADDRESSV_WRAP 0x10000000
13435 #define NV_094_FORMAT_TEXTUREADDRESSV_MIRROR 0x20000000
13436 #define NV_094_FORMAT_TEXTUREADDRESSV_CLAMP 0x30000000
13437 #define NV_094_FORMAT_TEXTUREADDRESSV_BORDER 0x40000000
13438 #define NV_094_FORMAT_WRAPV 0x80000000
13439 #define NV_094_FORMAT_WRAPV_FALSE 0x7FFFFFFF
13440 #define NV_094_FORMAT_WRAPV_TRUE 0x80000000
13441 
13442 /* NV-Register NV_094_FILTER */
13443 #define NV_094_FILTER 0x0059030C
13444 #define NV_094_FILTER_KERNEL_SIZE_X 0x000000FF
13445 #define NV_094_FILTER_KERNEL_SIZE_Y 0x00007F00
13446 #define NV_094_FILTER_MIPMAP_DITHER_ENABLE 0x00008000
13447 #define NV_094_FILTER_MIPMAP_DITHER_ENABLE_FALSE 0xFFFF7FFF
13448 #define NV_094_FILTER_MIPMAP_DITHER_ENABLE_TRUE 0x00008000
13449 #define NV_094_FILTER_MIPMAPLODBIAS 0x00FF0000
13450 #define NV_094_FILTER_TEXTUREMIN 0x07000000
13451 #define NV_094_FILTER_TEXTUREMIN_NEAREST 0x01000000
13452 #define NV_094_FILTER_TEXTUREMIN_LINEAR 0x02000000
13453 #define NV_094_FILTER_TEXTUREMIN_MIPNEAREST 0x03000000
13454 #define NV_094_FILTER_TEXTUREMIN_MIPLINEAR 0x04000000
13455 #define NV_094_FILTER_TEXTUREMIN_LINEARMIPNEAREST 0x05000000
13456 #define NV_094_FILTER_TEXTUREMIN_LINEARMIPLINEAR 0x06000000
13457 #define NV_094_FILTER_ANISOTROPIC_MIN_ENABLE 0x08000000
13458 #define NV_094_FILTER_ANISOTROPIC_MIN_ENABLE_FALSE 0xF7FFFFFF
13459 #define NV_094_FILTER_ANISOTROPIC_MIN_ENABLE_TRUE 0x08000000
13460 #define NV_094_FILTER_TEXTUREMAG 0x70000000
13461 #define NV_094_FILTER_TEXTUREMAG_NEAREST 0x10000000
13462 #define NV_094_FILTER_TEXTUREMAG_LINEAR 0x20000000
13463 #define NV_094_FILTER_TEXTUREMAG_MIPNEAREST 0x30000000
13464 #define NV_094_FILTER_TEXTUREMAG_MIPLINEAR 0x40000000
13465 #define NV_094_FILTER_TEXTUREMAG_LINEARMIPNEAREST 0x50000000
13466 #define NV_094_FILTER_TEXTUREMAG_LINEARMIPLINEAR 0x60000000
13467 #define NV_094_FILTER_ANISOTROPIC_MAG_ENABLE 0x80000000
13468 #define NV_094_FILTER_ANISOTROPIC_MAG_ENABLE_FALSE 0x7FFFFFFF
13469 #define NV_094_FILTER_ANISOTROPIC_MAG_ENABLE_TRUE 0x80000000
13470 
13471 /* NV-Register NV_094_BLEND */
13472 #define NV_094_BLEND 0x00590310
13473 #define NV_094_BLEND_TEXTUREMAPBLEND 0x0000000F
13474 #define NV_094_BLEND_TEXTUREMAPBLEND_DECAL 0x00000001
13475 #define NV_094_BLEND_TEXTUREMAPBLEND_MODULATE 0x00000002
13476 #define NV_094_BLEND_TEXTUREMAPBLEND_DECALALPHA 0x00000003
13477 #define NV_094_BLEND_TEXTUREMAPBLEND_MODULATEALPHA 0x00000004
13478 #define NV_094_BLEND_TEXTUREMAPBLEND_DECALMASK 0x00000005
13479 #define NV_094_BLEND_TEXTUREMAPBLEND_MODULATEMASK 0x00000006
13480 #define NV_094_BLEND_TEXTUREMAPBLEND_COPY 0x00000007
13481 #define NV_094_BLEND_TEXTUREMAPBLEND_ADD 0x00000008
13482 #define NV_094_BLEND_OPERATION 0x00000030
13483 #define NV_094_BLEND_OPERATION_MUX_TALPHALSB 0x00000010
13484 #define NV_094_BLEND_OPERATION_MUX_TALPHAMSB 0x00000020
13485 #define NV_094_BLEND_SHADEMODE 0x000000C0
13486 #define NV_094_BLEND_SHADEMODE_FLAT 0x00000040
13487 #define NV_094_BLEND_SHADEMODE_GOURAUD 0x00000080
13488 #define NV_094_BLEND_SHADEMODE_PHONG 0x000000C0
13489 #define NV_094_BLEND_TEXTUREPERSPECTIVE 0x00000F00
13490 #define NV_094_BLEND_TEXTUREPERSPECTIVE_FALSE 0x00000000
13491 #define NV_094_BLEND_TEXTUREPERSPECTIVE_TRUE 0x00000100
13492 #define NV_094_BLEND_SPECULARENABLE 0x0000F000
13493 #define NV_094_BLEND_SPECULARENABLE_FALSE 0x00000000
13494 #define NV_094_BLEND_SPECULARENABLE_TRUE 0x00001000
13495 #define NV_094_BLEND_FOGENABLE 0x000F0000
13496 #define NV_094_BLEND_FOGENABLE_FALSE 0x00000000
13497 #define NV_094_BLEND_FOGENABLE_TRUE 0x00010000
13498 #define NV_094_BLEND_ALPHABLENDENABLE 0x00F00000
13499 #define NV_094_BLEND_ALPHABLENDENABLE_FALSE 0x00000000
13500 #define NV_094_BLEND_ALPHABLENDENABLE_TRUE 0x00100000
13501 #define NV_094_BLEND_SRCBLEND 0x0F000000
13502 #define NV_094_BLEND_SRCBLEND_ZERO 0x01000000
13503 #define NV_094_BLEND_SRCBLEND_ONE 0x02000000
13504 #define NV_094_BLEND_SRCBLEND_SRCCOLOR 0x03000000
13505 #define NV_094_BLEND_SRCBLEND_INVSRCCOLOR 0x04000000
13506 #define NV_094_BLEND_SRCBLEND_SRCALPHA 0x05000000
13507 #define NV_094_BLEND_SRCBLEND_INVSRCALPHA 0x06000000
13508 #define NV_094_BLEND_SRCBLEND_DESTALPHA 0x07000000
13509 #define NV_094_BLEND_SRCBLEND_INVDESTALPHA 0x08000000
13510 #define NV_094_BLEND_SRCBLEND_DESTCOLOR 0x09000000
13511 #define NV_094_BLEND_SRCBLEND_INVDESTCOLOR 0x0A000000
13512 #define NV_094_BLEND_SRCBLEND_SRCALPHASAT 0x0B000000
13513 #define NV_094_BLEND_DESTBLEND 0xF0000000
13514 #define NV_094_BLEND_DESTBLEND_ZERO 0x10000000
13515 #define NV_094_BLEND_DESTBLEND_ONE 0x20000000
13516 #define NV_094_BLEND_DESTBLEND_SRCCOLOR 0x30000000
13517 #define NV_094_BLEND_DESTBLEND_INVSRCCOLOR 0x40000000
13518 #define NV_094_BLEND_DESTBLEND_SRCALPHA 0x50000000
13519 #define NV_094_BLEND_DESTBLEND_INVSRCALPHA 0x60000000
13520 #define NV_094_BLEND_DESTBLEND_DESTALPHA 0x70000000
13521 #define NV_094_BLEND_DESTBLEND_INVDESTALPHA 0x80000000
13522 #define NV_094_BLEND_DESTBLEND_DESTCOLOR 0x90000000
13523 #define NV_094_BLEND_DESTBLEND_INVDESTCOLOR 0xA0000000
13524 #define NV_094_BLEND_DESTBLEND_SRCALPHASAT 0xB0000000
13525 
13526 /* NV-Register NV_094_CONTROL */
13527 #define NV_094_CONTROL 0x00590314
13528 #define NV_094_CONTROL_ALPHAREF 0x000000FF
13529 #define NV_094_CONTROL_ALPHAFUNC 0x00000F00
13530 #define NV_094_CONTROL_ALPHAFUNC_NEVER 0x00000100
13531 #define NV_094_CONTROL_ALPHAFUNC_LESS 0x00000200
13532 #define NV_094_CONTROL_ALPHAFUNC_EQUAL 0x00000300
13533 #define NV_094_CONTROL_ALPHAFUNC_LESSEQUAL 0x00000400
13534 #define NV_094_CONTROL_ALPHAFUNC_GREATER 0x00000500
13535 #define NV_094_CONTROL_ALPHAFUNC_NOTEQUAL 0x00000600
13536 #define NV_094_CONTROL_ALPHAFUNC_GREATEREQUAL 0x00000700
13537 #define NV_094_CONTROL_ALPHAFUNC_ALWAYS 0x00000800
13538 #define NV_094_CONTROL_ALPHATESTENABLE 0x00001000
13539 #define NV_094_CONTROL_ALPHATESTENABLE_FALSE 0xFFFFEFFF
13540 #define NV_094_CONTROL_ALPHATESTENABLE_TRUE 0x00001000
13541 #define NV_094_CONTROL_ORIGIN 0x00002000
13542 #define NV_094_CONTROL_ORIGIN_CENTER 0xFFFFDFFF
13543 #define NV_094_CONTROL_ORIGIN_CORNER 0x00002000
13544 #define NV_094_CONTROL_ZENABLE 0x0000C000
13545 #define NV_094_CONTROL_ZENABLE_FALSE 0x00000000
13546 #define NV_094_CONTROL_ZENABLE_TRUE 0x00004000
13547 #define NV_094_CONTROL_ZFUNC 0x000F0000
13548 #define NV_094_CONTROL_ZFUNC_NEVER 0x00010000
13549 #define NV_094_CONTROL_ZFUNC_LESS 0x00020000
13550 #define NV_094_CONTROL_ZFUNC_EQUAL 0x00030000
13551 #define NV_094_CONTROL_ZFUNC_LESSEQUAL 0x00040000
13552 #define NV_094_CONTROL_ZFUNC_GREATER 0x00050000
13553 #define NV_094_CONTROL_ZFUNC_NOTEQUAL 0x00060000
13554 #define NV_094_CONTROL_ZFUNC_GREATEREQUAL 0x00070000
13555 #define NV_094_CONTROL_ZFUNC_ALWAYS 0x00080000
13556 #define NV_094_CONTROL_CULLMODE 0x00300000
13557 #define NV_094_CONTROL_CULLMODE_NONE 0x00100000
13558 #define NV_094_CONTROL_CULLMODE_CW 0x00200000
13559 #define NV_094_CONTROL_CULLMODE_CCW 0x00300000
13560 #define NV_094_CONTROL_DITHERENABLE 0x00400000
13561 #define NV_094_CONTROL_DITHERENABLE_FALSE 0xFFBFFFFF
13562 #define NV_094_CONTROL_DITHERENABLE_TRUE 0x00400000
13563 #define NV_094_CONTROL_Z_PERSPECTIVE_ENABLE 0x00800000
13564 #define NV_094_CONTROL_Z_PERSPECTIVE_ENABLE_FALSE 0xFF7FFFFF
13565 #define NV_094_CONTROL_Z_PERSPECTIVE_ENABLE_TRUE 0x00800000
13566 #define NV_094_CONTROL_ZWRITEENABLE 0x3F000000
13567 #define NV_094_CONTROL_ZWRITEENABLE_FALSE 0x00000000
13568 #define NV_094_CONTROL_ZWRITEENABLE_TRUE 0x01000000
13569 #define NV_094_CONTROL_Z_FORMAT 0xC0000000
13570 #define NV_094_CONTROL_Z_FORMAT_FIXED 0x40000000
13571 #define NV_094_CONTROL_Z_FORMAT_FLOAT 0x80000000
13572 
13573 /* NV-Register NV_094_FOGCOLOR */
13574 #define NV_094_FOGCOLOR 0x00590318
13575 #define NV_094_FOGCOLOR_VALUE 0xFFFFFFFF
13576 
13577 /* NV-Array NV_094_TLVERTEX_SX (32 byte access) */
13578 #define NV_094_TLVERTEX_SX 0x00590400
13579 /* NV-Array size NV_094_TLVERTEX_SX__SIZE_1 [0..15] */
13580 #define NV_094_TLVERTEX_SX__SIZE_1 0x00000010
13581 #define NV_094_TLVERTEX_SX_VALUE 0xFFFFFFFF
13582 
13583 /* NV-Array NV_094_TLVERTEX_SY (32 byte access) */
13584 #define NV_094_TLVERTEX_SY 0x00590404
13585 /* NV-Array size NV_094_TLVERTEX_SY__SIZE_1 [0..15] */
13586 #define NV_094_TLVERTEX_SY__SIZE_1 0x00000010
13587 #define NV_094_TLVERTEX_SY_VALUE 0xFFFFFFFF
13588 
13589 /* NV-Array NV_094_TLVERTEX_SZ (32 byte access) */
13590 #define NV_094_TLVERTEX_SZ 0x00590408
13591 /* NV-Array size NV_094_TLVERTEX_SZ__SIZE_1 [0..15] */
13592 #define NV_094_TLVERTEX_SZ__SIZE_1 0x00000010
13593 #define NV_094_TLVERTEX_SZ_VALUE 0xFFFFFFFF
13594 
13595 /* NV-Array NV_094_TLVERTEX_RHW (32 byte access) */
13596 #define NV_094_TLVERTEX_RHW 0x0059040C
13597 /* NV-Array size NV_094_TLVERTEX_RHW__SIZE_1 [0..15] */
13598 #define NV_094_TLVERTEX_RHW__SIZE_1 0x00000010
13599 #define NV_094_TLVERTEX_RHW_VALUE 0xFFFFFFFF
13600 
13601 /* NV-Array NV_094_TLVERTEX_COLOR (32 byte access) */
13602 #define NV_094_TLVERTEX_COLOR 0x00590410
13603 /* NV-Array size NV_094_TLVERTEX_COLOR__SIZE_1 [0..15] */
13604 #define NV_094_TLVERTEX_COLOR__SIZE_1 0x00000010
13605 #define NV_094_TLVERTEX_COLOR_VALUE 0xFFFFFFFF
13606 #define NV_094_TLVERTEX_COLOR_BLUE 0x000000FF
13607 #define NV_094_TLVERTEX_COLOR_GREEN 0x0000FF00
13608 #define NV_094_TLVERTEX_COLOR_RED 0x00FF0000
13609 #define NV_094_TLVERTEX_COLOR_ALPHA 0xFF000000
13610 
13611 /* NV-Array NV_094_TLVERTEX_SPECULAR (32 byte access) */
13612 #define NV_094_TLVERTEX_SPECULAR 0x00590414
13613 /* NV-Array size NV_094_TLVERTEX_SPECULAR__SIZE_1 [0..15] */
13614 #define NV_094_TLVERTEX_SPECULAR__SIZE_1 0x00000010
13615 #define NV_094_TLVERTEX_SPECULAR_VALUE 0xFFFFFFFF
13616 #define NV_094_TLVERTEX_SPECULAR_BLUE 0x000000FF
13617 #define NV_094_TLVERTEX_SPECULAR_GREEN 0x0000FF00
13618 #define NV_094_TLVERTEX_SPECULAR_RED 0x00FF0000
13619 #define NV_094_TLVERTEX_SPECULAR_FOG 0xFF000000
13620 
13621 /* NV-Array NV_094_TLVERTEX_TU (32 byte access) */
13622 #define NV_094_TLVERTEX_TU 0x00590418
13623 /* NV-Array size NV_094_TLVERTEX_TU__SIZE_1 [0..15] */
13624 #define NV_094_TLVERTEX_TU__SIZE_1 0x00000010
13625 #define NV_094_TLVERTEX_TU_VALUE 0xFFFFFFFF
13626 
13627 /* NV-Array NV_094_TLVERTEX_TV (32 byte access) */
13628 #define NV_094_TLVERTEX_TV 0x0059041C
13629 /* NV-Array size NV_094_TLVERTEX_TV__SIZE_1 [0..15] */
13630 #define NV_094_TLVERTEX_TV__SIZE_1 0x00000010
13631 #define NV_094_TLVERTEX_TV_VALUE 0xFFFFFFFF
13632 
13633 /* NV-Array NV_094_TLVERTEX_DRAWPRIMITIVE (4 byte access) */
13634 #define NV_094_TLVERTEX_DRAWPRIMITIVE 0x00590600
13635 /* NV-Array size NV_094_TLVERTEX_DRAWPRIMITIVE__SIZE_1 [0..63] */
13636 #define NV_094_TLVERTEX_DRAWPRIMITIVE__SIZE_1 0x00000040
13637 #define NV_094_TLVERTEX_DRAWPRIMITIVE_I0 0x0000000F
13638 #define NV_094_TLVERTEX_DRAWPRIMITIVE_I1 0x000000F0
13639 #define NV_094_TLVERTEX_DRAWPRIMITIVE_I2 0x00000F00
13640 #define NV_094_TLVERTEX_DRAWPRIMITIVE_I3 0x0000F000
13641 #define NV_094_TLVERTEX_DRAWPRIMITIVE_I4 0x000F0000
13642 #define NV_094_TLVERTEX_DRAWPRIMITIVE_I5 0xFFF00000
13643 
13644 /* NV-Device NV_095 */
13645 #define NV_095 0x005A0000 /* size: 0x00001FFF */
13646 #define NV10_DX6_MULTI_TEXTURE_TRIANGLE 0x09500000
13647 
13648 /* NV-Register NV_095_NV10_DX6_MULTI_TEXTURE_TRIANGLE */
13649 #define NV_095_NV10_DX6_MULTI_TEXTURE_TRIANGLE 0x005A0000
13650 #define NV_095_NV10_DX6_MULTI_TEXTURE_TRIANGLE_HANDLE 0xFFFFFFFF
13651 
13652 /* NV-Register NV_095_NOP */
13653 #define NV_095_NOP 0x005A0100
13654 #define NV_095_NOP_PARAMETER 0xFFFFFFFF
13655 
13656 /* NV-Register NV_095_NOTIFY */
13657 #define NV_095_NOTIFY 0x005A0104
13658 #define NV_095_NOTIFY_STYLE 0xFFFFFFFF
13659 #define NV_095_NOTIFY_STYLE_WRITE_ONLY 0x00000000
13660 #define NV_095_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001
13661 
13662 /* NV-Register NV_095_SET_CONTEXT_DMA_NOTIFY */
13663 #define NV_095_SET_CONTEXT_DMA_NOTIFY 0x005A0180
13664 #define NV_095_SET_CONTEXT_DMA_NOTIFY_PARAMETER 0xFFFFFFFF
13665 
13666 /* NV-Register NV_095_SET_CONTEXT_DMA_A */
13667 #define NV_095_SET_CONTEXT_DMA_A 0x005A0184
13668 #define NV_095_SET_CONTEXT_DMA_A_PARAMETER 0xFFFFFFFF
13669 
13670 /* NV-Register NV_095_SET_CONTEXT_DMA_B */
13671 #define NV_095_SET_CONTEXT_DMA_B 0x005A0188
13672 #define NV_095_SET_CONTEXT_DMA_B_PARAMETER 0xFFFFFFFF
13673 
13674 /* NV-Register NV_095_SET_CONTEXT_SURFACES */
13675 #define NV_095_SET_CONTEXT_SURFACES 0x005A018C
13676 #define NV_095_SET_CONTEXT_SURFACES_PARAMETER 0xFFFFFFFF
13677 
13678 /* NV-Array NV_095_OFFSET (4 byte access) */
13679 #define NV_095_OFFSET 0x005A0308
13680 /* NV-Array size NV_095_OFFSET__SIZE_1 [0..1] */
13681 #define NV_095_OFFSET__SIZE_1 0x00000002
13682 #define NV_095_OFFSET_VALUE 0xFFFFFFFF
13683 
13684 /* NV-Array NV_095_FORMAT (4 byte access) */
13685 #define NV_095_FORMAT 0x005A0310
13686 /* NV-Array size NV_095_FORMAT__SIZE_1 [0..1] */
13687 #define NV_095_FORMAT__SIZE_1 0x00000002
13688 #define NV_095_FORMAT_CONTEXT_DMA 0x0000000F
13689 #define NV_095_FORMAT_CONTEXT_DMA_A 0x00000001
13690 #define NV_095_FORMAT_CONTEXT_DMA_B 0x00000002
13691 #define NV_095_FORMAT_ORIGIN_ZOH 0x00000030
13692 #define NV_095_FORMAT_ORIGIN_ZOH_CENTER 0x00000010
13693 #define NV_095_FORMAT_ORIGIN_ZOH_CORNER 0x00000020
13694 #define NV_095_FORMAT_ORIGIN_FOH 0x000000C0
13695 #define NV_095_FORMAT_ORIGIN_FOH_CENTER 0x00000040
13696 #define NV_095_FORMAT_ORIGIN_FOH_CORNER 0x00000080
13697 #define NV_095_FORMAT_COLOR 0x00000F00
13698 #define NV_095_FORMAT_COLOR_LE_AY8 0x00000100
13699 #define NV_095_FORMAT_COLOR_LE_A1R5G5B5 0x00000200
13700 #define NV_095_FORMAT_COLOR_LE_X1R5G5B5 0x00000300
13701 #define NV_095_FORMAT_COLOR_LE_A4R4G4G4 0x00000400
13702 #define NV_095_FORMAT_COLOR_LE_R5G6B5 0x00000500
13703 #define NV_095_FORMAT_COLOR_LE_A8R8G8B8 0x00000600
13704 #define NV_095_FORMAT_COLOR_LE_X8R8G8B8 0x00000700
13705 #define NV_095_FORMAT_MIPMAP_LEVELS 0x0000F000
13706 #define NV_095_FORMAT_MIPMAP_LEVELS_1 0x00001000
13707 #define NV_095_FORMAT_MIPMAP_LEVELS_2 0x00002000
13708 #define NV_095_FORMAT_MIPMAP_LEVELS_3 0x00003000
13709 #define NV_095_FORMAT_MIPMAP_LEVELS_4 0x00004000
13710 #define NV_095_FORMAT_MIPMAP_LEVELS_5 0x00005000
13711 #define NV_095_FORMAT_MIPMAP_LEVELS_6 0x00006000
13712 #define NV_095_FORMAT_MIPMAP_LEVELS_7 0x00007000
13713 #define NV_095_FORMAT_MIPMAP_LEVELS_8 0x00008000
13714 #define NV_095_FORMAT_MIPMAP_LEVELS_9 0x00009000
13715 #define NV_095_FORMAT_MIPMAP_LEVELS_10 0x0000A000
13716 #define NV_095_FORMAT_MIPMAP_LEVELS_11 0x0000B000
13717 #define NV_095_FORMAT_MIPMAP_LEVELS_12 0x0000C000
13718 #define NV_095_FORMAT_MIPMAP_LEVELS_13 0x0000D000
13719 #define NV_095_FORMAT_MIPMAP_LEVELS_14 0x0000E000
13720 #define NV_095_FORMAT_MIPMAP_LEVELS_15 0x0000F000
13721 #define NV_095_FORMAT_BASE_SIZE_U 0x000F0000
13722 #define NV_095_FORMAT_BASE_SIZE_U_1X1 0x00000000
13723 #define NV_095_FORMAT_BASE_SIZE_U_2X2 0x00010000
13724 #define NV_095_FORMAT_BASE_SIZE_U_4X4 0x00020000
13725 #define NV_095_FORMAT_BASE_SIZE_U_8X8 0x00030000
13726 #define NV_095_FORMAT_BASE_SIZE_U_16X16 0x00040000
13727 #define NV_095_FORMAT_BASE_SIZE_U_32X32 0x00050000
13728 #define NV_095_FORMAT_BASE_SIZE_U_64X64 0x00060000
13729 #define NV_095_FORMAT_BASE_SIZE_U_128X128 0x00070000
13730 #define NV_095_FORMAT_BASE_SIZE_U_256X256 0x00080000
13731 #define NV_095_FORMAT_BASE_SIZE_U_512X512 0x00090000
13732 #define NV_095_FORMAT_BASE_SIZE_U_1024X1024 0x000A0000
13733 #define NV_095_FORMAT_BASE_SIZE_U_2048X2048 0x000B0000
13734 #define NV_095_FORMAT_BASE_SIZE_V 0x00F00000
13735 #define NV_095_FORMAT_BASE_SIZE_V_1X1 0x00000000
13736 #define NV_095_FORMAT_BASE_SIZE_V_2X2 0x00100000
13737 #define NV_095_FORMAT_BASE_SIZE_V_4X4 0x00200000
13738 #define NV_095_FORMAT_BASE_SIZE_V_8X8 0x00300000
13739 #define NV_095_FORMAT_BASE_SIZE_V_16X16 0x00400000
13740 #define NV_095_FORMAT_BASE_SIZE_V_32X32 0x00500000
13741 #define NV_095_FORMAT_BASE_SIZE_V_64X64 0x00600000
13742 #define NV_095_FORMAT_BASE_SIZE_V_128X128 0x00700000
13743 #define NV_095_FORMAT_BASE_SIZE_V_256X256 0x00800000
13744 #define NV_095_FORMAT_BASE_SIZE_V_512X512 0x00900000
13745 #define NV_095_FORMAT_BASE_SIZE_V_1024X1024 0x00A00000
13746 #define NV_095_FORMAT_BASE_SIZE_V_2048X2048 0x00B00000
13747 #define NV_095_FORMAT_TEXTUREADDRESSU 0x07000000
13748 #define NV_095_FORMAT_TEXTUREADDRESSU_WRAP 0x01000000
13749 #define NV_095_FORMAT_TEXTUREADDRESSU_MIRROR 0x02000000
13750 #define NV_095_FORMAT_TEXTUREADDRESSU_CLAMP 0x03000000
13751 #define NV_095_FORMAT_TEXTUREADDRESSU_BORDER 0x04000000
13752 #define NV_095_FORMAT_WRAPU 0x08000000
13753 #define NV_095_FORMAT_WRAPU_FALSE 0xF7FFFFFF
13754 #define NV_095_FORMAT_WRAPU_TRUE 0x08000000
13755 #define NV_095_FORMAT_TEXTUREADDRESSV 0x70000000
13756 #define NV_095_FORMAT_TEXTUREADDRESSV_WRAP 0x10000000
13757 #define NV_095_FORMAT_TEXTUREADDRESSV_MIRROR 0x20000000
13758 #define NV_095_FORMAT_TEXTUREADDRESSV_CLAMP 0x30000000
13759 #define NV_095_FORMAT_TEXTUREADDRESSV_BORDER 0x40000000
13760 #define NV_095_FORMAT_WRAPV 0x80000000
13761 #define NV_095_FORMAT_WRAPV_FALSE 0x7FFFFFFF
13762 #define NV_095_FORMAT_WRAPV_TRUE 0x80000000
13763 
13764 /* NV-Array NV_095_FILTER (4 byte access) */
13765 #define NV_095_FILTER 0x005A0318
13766 /* NV-Array size NV_095_FILTER__SIZE_1 [0..1] */
13767 #define NV_095_FILTER__SIZE_1 0x00000002
13768 #define NV_095_FILTER_KERNEL_SIZE_X 0x000000FF
13769 #define NV_095_FILTER_KERNEL_SIZE_Y 0x00007F00
13770 #define NV_095_FILTER_MIPMAP_DITHER_ENABLE 0x00008000
13771 #define NV_095_FILTER_MIPMAP_DITHER_ENABLE_FALSE 0xFFFF7FFF
13772 #define NV_095_FILTER_MIPMAP_DITHER_ENABLE_TRUE 0x00008000
13773 #define NV_095_FILTER_MIPMAPLODBIAS 0x00FF0000
13774 #define NV_095_FILTER_TEXTUREMIN 0x07000000
13775 #define NV_095_FILTER_TEXTUREMIN_NEAREST 0x01000000
13776 #define NV_095_FILTER_TEXTUREMIN_LINEAR 0x02000000
13777 #define NV_095_FILTER_TEXTUREMIN_MIPNEAREST 0x03000000
13778 #define NV_095_FILTER_TEXTUREMIN_MIPLINEAR 0x04000000
13779 #define NV_095_FILTER_TEXTUREMIN_LINEARMIPNEAREST 0x05000000
13780 #define NV_095_FILTER_TEXTUREMIN_LINEARMIPLINEAR 0x06000000
13781 #define NV_095_FILTER_ANISOTROPIC_MIN_ENABLE 0x08000000
13782 #define NV_095_FILTER_ANISOTROPIC_MIN_ENABLE_FALSE 0xF7FFFFFF
13783 #define NV_095_FILTER_ANISOTROPIC_MIN_ENABLE_TRUE 0x08000000
13784 #define NV_095_FILTER_TEXTUREMAG 0x70000000
13785 #define NV_095_FILTER_TEXTUREMAG_NEAREST 0x10000000
13786 #define NV_095_FILTER_TEXTUREMAG_LINEAR 0x20000000
13787 #define NV_095_FILTER_TEXTUREMAG_MIPNEAREST 0x30000000
13788 #define NV_095_FILTER_TEXTUREMAG_MIPLINEAR 0x40000000
13789 #define NV_095_FILTER_TEXTUREMAG_LINEARMIPNEAREST 0x50000000
13790 #define NV_095_FILTER_TEXTUREMAG_LINEARMIPLINEAR 0x60000000
13791 #define NV_095_FILTER_ANISOTROPIC_MAG_ENABLE 0x80000000
13792 #define NV_095_FILTER_ANISOTROPIC_MAG_ENABLE_FALSE 0x7FFFFFFF
13793 #define NV_095_FILTER_ANISOTROPIC_MAG_ENABLE_TRUE 0x80000000
13794 
13795 /* NV-Register NV_095_COMBINE_0_ALPHA */
13796 #define NV_095_COMBINE_0_ALPHA 0x005A0320
13797 #define NV_095_COMBINE_0_ALPHA_INVERSE_0 0x00000001
13798 #define NV_095_COMBINE_0_ALPHA_INVERSE_0_NORMAL 0xFFFFFFFE
13799 #define NV_095_COMBINE_0_ALPHA_INVERSE_0_INVERSE 0x00000001
13800 #define NV_095_COMBINE_0_ALPHA_ALPHA_0 0x00000002
13801 #define NV_095_COMBINE_0_ALPHA_ARGUMENT_0 0x000000FC
13802 #define NV_095_COMBINE_0_ALPHA_ARGUMENT_0_ZERO 0x00000004
13803 #define NV_095_COMBINE_0_ALPHA_ARGUMENT_0_FACTOR 0x00000008
13804 #define NV_095_COMBINE_0_ALPHA_ARGUMENT_0_DIFFUSE 0x0000000C
13805 #define NV_095_COMBINE_0_ALPHA_ARGUMENT_0_INPUT 0x00000010
13806 #define NV_095_COMBINE_0_ALPHA_ARGUMENT_0_TEXTURE0 0x00000014
13807 #define NV_095_COMBINE_0_ALPHA_ARGUMENT_0_TEXTURE1 0x00000018
13808 #define NV_095_COMBINE_0_ALPHA_INVERSE_1 0x00000100
13809 #define NV_095_COMBINE_0_ALPHA_INVERSE_1_NORMAL 0xFFFFFEFF
13810 #define NV_095_COMBINE_0_ALPHA_INVERSE_1_INVERSE 0x00000100
13811 #define NV_095_COMBINE_0_ALPHA_ALPHA_1 0x00000200
13812 #define NV_095_COMBINE_0_ALPHA_ARGUMENT_1 0x0000FC00
13813 #define NV_095_COMBINE_0_ALPHA_ARGUMENT_1_ZERO 0x00000400
13814 #define NV_095_COMBINE_0_ALPHA_ARGUMENT_1_FACTOR 0x00000800
13815 #define NV_095_COMBINE_0_ALPHA_ARGUMENT_1_DIFFUSE 0x00000C00
13816 #define NV_095_COMBINE_0_ALPHA_ARGUMENT_1_INPUT 0x00001000
13817 #define NV_095_COMBINE_0_ALPHA_ARGUMENT_1_TEXTURE0 0x00001400
13818 #define NV_095_COMBINE_0_ALPHA_ARGUMENT_1_TEXTURE1 0x00001800
13819 #define NV_095_COMBINE_0_ALPHA_INVERSE_2 0x00010000
13820 #define NV_095_COMBINE_0_ALPHA_INVERSE_2_NORMAL 0xFFFEFFFF
13821 #define NV_095_COMBINE_0_ALPHA_INVERSE_2_INVERSE 0x00010000
13822 #define NV_095_COMBINE_0_ALPHA_ALPHA_2 0x00020000
13823 #define NV_095_COMBINE_0_ALPHA_ARGUMENT_2 0x00FC0000
13824 #define NV_095_COMBINE_0_ALPHA_ARGUMENT_2_ZERO 0x00040000
13825 #define NV_095_COMBINE_0_ALPHA_ARGUMENT_2_FACTOR 0x00080000
13826 #define NV_095_COMBINE_0_ALPHA_ARGUMENT_2_DIFFUSE 0x000C0000
13827 #define NV_095_COMBINE_0_ALPHA_ARGUMENT_2_INPUT 0x00100000
13828 #define NV_095_COMBINE_0_ALPHA_ARGUMENT_2_TEXTURE0 0x00140000
13829 #define NV_095_COMBINE_0_ALPHA_ARGUMENT_2_TEXTURE1 0x00180000
13830 #define NV_095_COMBINE_0_ALPHA_INVERSE_3 0x01000000
13831 #define NV_095_COMBINE_0_ALPHA_INVERSE_3_NORMAL 0xFEFFFFFF
13832 #define NV_095_COMBINE_0_ALPHA_INVERSE_3_INVERSE 0x01000000
13833 #define NV_095_COMBINE_0_ALPHA_ALPHA_3 0x02000000
13834 #define NV_095_COMBINE_0_ALPHA_ARGUMENT_3 0x1C000000
13835 #define NV_095_COMBINE_0_ALPHA_ARGUMENT_3_ZERO 0x04000000
13836 #define NV_095_COMBINE_0_ALPHA_ARGUMENT_3_FACTOR 0x08000000
13837 #define NV_095_COMBINE_0_ALPHA_ARGUMENT_3_DIFFUSE 0x0C000000
13838 #define NV_095_COMBINE_0_ALPHA_ARGUMENT_3_INPUT 0x10000000
13839 #define NV_095_COMBINE_0_ALPHA_ARGUMENT_3_TEXTURE0 0x14000000
13840 #define NV_095_COMBINE_0_ALPHA_ARGUMENT_3_TEXTURE1 0x18000000
13841 #define NV_095_COMBINE_0_ALPHA_OPERATION 0xE0000000
13842 #define NV_095_COMBINE_0_ALPHA_OPERATION_ADD 0x20000000
13843 #define NV_095_COMBINE_0_ALPHA_OPERATION_ADD2 0x40000000
13844 #define NV_095_COMBINE_0_ALPHA_OPERATION_ADD4 0x60000000
13845 #define NV_095_COMBINE_0_ALPHA_OPERATION_ADDSIGNED 0x80000000
13846 #define NV_095_COMBINE_0_ALPHA_OPERATION_MUX 0xA0000000
13847 #define NV_095_COMBINE_0_ALPHA_OPERATION_ADDCOMPLEMENT 0xC0000000
13848 #define NV_095_COMBINE_0_ALPHA_OPERATION_ADDSIGNED2 0xE0000000
13849 
13850 /* NV-Register NV_095_COMBINE_0_COLOR */
13851 #define NV_095_COMBINE_0_COLOR 0x005A0324
13852 #define NV_095_COMBINE_0_COLOR_INVERSE_0 0x00000001
13853 #define NV_095_COMBINE_0_COLOR_INVERSE_0_NORMAL 0xFFFFFFFE
13854 #define NV_095_COMBINE_0_COLOR_INVERSE_0_INVERSE 0x00000001
13855 #define NV_095_COMBINE_0_COLOR_ALPHA_0 0x00000002
13856 #define NV_095_COMBINE_0_COLOR_ALPHA_0_COLOR 0xFFFFFFFD
13857 #define NV_095_COMBINE_0_COLOR_ALPHA_0_ALPHA 0x00000002
13858 #define NV_095_COMBINE_0_COLOR_ARGUMENT_0 0x000000FC
13859 #define NV_095_COMBINE_0_COLOR_ARGUMENT_0_ZERO 0x00000004
13860 #define NV_095_COMBINE_0_COLOR_ARGUMENT_0_FACTOR 0x00000008
13861 #define NV_095_COMBINE_0_COLOR_ARGUMENT_0_DIFFUSE 0x0000000C
13862 #define NV_095_COMBINE_0_COLOR_ARGUMENT_0_INPUT 0x00000010
13863 #define NV_095_COMBINE_0_COLOR_ARGUMENT_0_TEXTURE0 0x00000014
13864 #define NV_095_COMBINE_0_COLOR_ARGUMENT_0_TEXTURE1 0x00000018
13865 #define NV_095_COMBINE_0_COLOR_INVERSE_1 0x00000100
13866 #define NV_095_COMBINE_0_COLOR_INVERSE_1_NORMAL 0xFFFFFEFF
13867 #define NV_095_COMBINE_0_COLOR_INVERSE_1_INVERSE 0x00000100
13868 #define NV_095_COMBINE_0_COLOR_ALPHA_1 0x00000200
13869 #define NV_095_COMBINE_0_COLOR_ALPHA_1_COLOR 0xFFFFFDFF
13870 #define NV_095_COMBINE_0_COLOR_ALPHA_1_ALPHA 0x00000200
13871 #define NV_095_COMBINE_0_COLOR_ARGUMENT_1 0x0000FC00
13872 #define NV_095_COMBINE_0_COLOR_ARGUMENT_1_ZERO 0x00000400
13873 #define NV_095_COMBINE_0_COLOR_ARGUMENT_1_FACTOR 0x00000800
13874 #define NV_095_COMBINE_0_COLOR_ARGUMENT_1_DIFFUSE 0x00000C00
13875 #define NV_095_COMBINE_0_COLOR_ARGUMENT_1_INPUT 0x00001000
13876 #define NV_095_COMBINE_0_COLOR_ARGUMENT_1_TEXTURE0 0x00001400
13877 #define NV_095_COMBINE_0_COLOR_ARGUMENT_1_TEXTURE1 0x00001800
13878 #define NV_095_COMBINE_0_COLOR_INVERSE_2 0x00010000
13879 #define NV_095_COMBINE_0_COLOR_INVERSE_2_NORMAL 0xFFFEFFFF
13880 #define NV_095_COMBINE_0_COLOR_INVERSE_2_INVERSE 0x00010000
13881 #define NV_095_COMBINE_0_COLOR_ALPHA_2 0x00020000
13882 #define NV_095_COMBINE_0_COLOR_ALPHA_2_COLOR 0xFFFDFFFF
13883 #define NV_095_COMBINE_0_COLOR_ALPHA_2_ALPHA 0x00020000
13884 #define NV_095_COMBINE_0_COLOR_ARGUMENT_2 0x00FC0000
13885 #define NV_095_COMBINE_0_COLOR_ARGUMENT_2_ZERO 0x00040000
13886 #define NV_095_COMBINE_0_COLOR_ARGUMENT_2_FACTOR 0x00080000
13887 #define NV_095_COMBINE_0_COLOR_ARGUMENT_2_DIFFUSE 0x000C0000
13888 #define NV_095_COMBINE_0_COLOR_ARGUMENT_2_INPUT 0x00100000
13889 #define NV_095_COMBINE_0_COLOR_ARGUMENT_2_TEXTURE0 0x00140000
13890 #define NV_095_COMBINE_0_COLOR_ARGUMENT_2_TEXTURE1 0x00180000
13891 #define NV_095_COMBINE_0_COLOR_INVERSE_3 0x01000000
13892 #define NV_095_COMBINE_0_COLOR_INVERSE_3_NORMAL 0xFEFFFFFF
13893 #define NV_095_COMBINE_0_COLOR_INVERSE_3_INVERSE 0x01000000
13894 #define NV_095_COMBINE_0_COLOR_ALPHA_3 0x02000000
13895 #define NV_095_COMBINE_0_COLOR_ALPHA_3_COLOR 0xFDFFFFFF
13896 #define NV_095_COMBINE_0_COLOR_ALPHA_3_ALPHA 0x02000000
13897 #define NV_095_COMBINE_0_COLOR_ARGUMENT_3 0x1C000000
13898 #define NV_095_COMBINE_0_COLOR_ARGUMENT_3_ZERO 0x04000000
13899 #define NV_095_COMBINE_0_COLOR_ARGUMENT_3_FACTOR 0x08000000
13900 #define NV_095_COMBINE_0_COLOR_ARGUMENT_3_DIFFUSE 0x0C000000
13901 #define NV_095_COMBINE_0_COLOR_ARGUMENT_3_INPUT 0x10000000
13902 #define NV_095_COMBINE_0_COLOR_ARGUMENT_3_TEXTURE0 0x14000000
13903 #define NV_095_COMBINE_0_COLOR_ARGUMENT_3_TEXTURE1 0x18000000
13904 #define NV_095_COMBINE_0_COLOR_OPERATION 0xE0000000
13905 #define NV_095_COMBINE_0_COLOR_OPERATION_ADD 0x20000000
13906 #define NV_095_COMBINE_0_COLOR_OPERATION_ADD2 0x40000000
13907 #define NV_095_COMBINE_0_COLOR_OPERATION_ADD4 0x60000000
13908 #define NV_095_COMBINE_0_COLOR_OPERATION_ADDSIGNED 0x80000000
13909 #define NV_095_COMBINE_0_COLOR_OPERATION_MUX 0xA0000000
13910 #define NV_095_COMBINE_0_COLOR_OPERATION_ADDCOMPLEMENT 0xC0000000
13911 #define NV_095_COMBINE_0_COLOR_OPERATION_ADDSIGNED2 0xE0000000
13912 
13913 /* NV-Register NV_095_COMBINE_1_ALPHA */
13914 #define NV_095_COMBINE_1_ALPHA 0x005A032C
13915 #define NV_095_COMBINE_1_ALPHA_INVERSE_0 0x00000001
13916 #define NV_095_COMBINE_1_ALPHA_INVERSE_0_NORMAL 0xFFFFFFFE
13917 #define NV_095_COMBINE_1_ALPHA_INVERSE_0_INVERSE 0x00000001
13918 #define NV_095_COMBINE_1_ALPHA_ALPHA_0 0x00000002
13919 #define NV_095_COMBINE_1_ALPHA_ARGUMENT_0 0x000000FC
13920 #define NV_095_COMBINE_1_ALPHA_ARGUMENT_0_ZERO 0x00000004
13921 #define NV_095_COMBINE_1_ALPHA_ARGUMENT_0_FACTOR 0x00000008
13922 #define NV_095_COMBINE_1_ALPHA_ARGUMENT_0_DIFFUSE 0x0000000C
13923 #define NV_095_COMBINE_1_ALPHA_ARGUMENT_0_INPUT 0x00000010
13924 #define NV_095_COMBINE_1_ALPHA_ARGUMENT_0_TEXTURE0 0x00000014
13925 #define NV_095_COMBINE_1_ALPHA_ARGUMENT_0_TEXTURE1 0x00000018
13926 #define NV_095_COMBINE_1_ALPHA_INVERSE_1 0x00000100
13927 #define NV_095_COMBINE_1_ALPHA_INVERSE_1_NORMAL 0xFFFFFEFF
13928 #define NV_095_COMBINE_1_ALPHA_INVERSE_1_INVERSE 0x00000100
13929 #define NV_095_COMBINE_1_ALPHA_ALPHA_1 0x00000200
13930 #define NV_095_COMBINE_1_ALPHA_ARGUMENT_1 0x0000FC00
13931 #define NV_095_COMBINE_1_ALPHA_ARGUMENT_1_ZERO 0x00000400
13932 #define NV_095_COMBINE_1_ALPHA_ARGUMENT_1_FACTOR 0x00000800
13933 #define NV_095_COMBINE_1_ALPHA_ARGUMENT_1_DIFFUSE 0x00000C00
13934 #define NV_095_COMBINE_1_ALPHA_ARGUMENT_1_INPUT 0x00001000
13935 #define NV_095_COMBINE_1_ALPHA_ARGUMENT_1_TEXTURE0 0x00001400
13936 #define NV_095_COMBINE_1_ALPHA_ARGUMENT_1_TEXTURE1 0x00001800
13937 #define NV_095_COMBINE_1_ALPHA_INVERSE_2 0x00010000
13938 #define NV_095_COMBINE_1_ALPHA_INVERSE_2_NORMAL 0xFFFEFFFF
13939 #define NV_095_COMBINE_1_ALPHA_INVERSE_2_INVERSE 0x00010000
13940 #define NV_095_COMBINE_1_ALPHA_ALPHA_2 0x00020000
13941 #define NV_095_COMBINE_1_ALPHA_ARGUMENT_2 0x00FC0000
13942 #define NV_095_COMBINE_1_ALPHA_ARGUMENT_2_ZERO 0x00040000
13943 #define NV_095_COMBINE_1_ALPHA_ARGUMENT_2_FACTOR 0x00080000
13944 #define NV_095_COMBINE_1_ALPHA_ARGUMENT_2_DIFFUSE 0x000C0000
13945 #define NV_095_COMBINE_1_ALPHA_ARGUMENT_2_INPUT 0x00100000
13946 #define NV_095_COMBINE_1_ALPHA_ARGUMENT_2_TEXTURE0 0x00140000
13947 #define NV_095_COMBINE_1_ALPHA_ARGUMENT_2_TEXTURE1 0x00180000
13948 #define NV_095_COMBINE_1_ALPHA_INVERSE_3 0x01000000
13949 #define NV_095_COMBINE_1_ALPHA_INVERSE_3_NORMAL 0xFEFFFFFF
13950 #define NV_095_COMBINE_1_ALPHA_INVERSE_3_INVERSE 0x01000000
13951 #define NV_095_COMBINE_1_ALPHA_ALPHA_3 0x02000000
13952 #define NV_095_COMBINE_1_ALPHA_ARGUMENT_3 0x1C000000
13953 #define NV_095_COMBINE_1_ALPHA_ARGUMENT_3_ZERO 0x04000000
13954 #define NV_095_COMBINE_1_ALPHA_ARGUMENT_3_FACTOR 0x08000000
13955 #define NV_095_COMBINE_1_ALPHA_ARGUMENT_3_DIFFUSE 0x0C000000
13956 #define NV_095_COMBINE_1_ALPHA_ARGUMENT_3_INPUT 0x10000000
13957 #define NV_095_COMBINE_1_ALPHA_ARGUMENT_3_TEXTURE0 0x14000000
13958 #define NV_095_COMBINE_1_ALPHA_ARGUMENT_3_TEXTURE1 0x18000000
13959 #define NV_095_COMBINE_1_ALPHA_OPERATION 0xE0000000
13960 #define NV_095_COMBINE_1_ALPHA_OPERATION_ADD 0x20000000
13961 #define NV_095_COMBINE_1_ALPHA_OPERATION_ADD2 0x40000000
13962 #define NV_095_COMBINE_1_ALPHA_OPERATION_ADD4 0x60000000
13963 #define NV_095_COMBINE_1_ALPHA_OPERATION_ADDSIGNED 0x80000000
13964 #define NV_095_COMBINE_1_ALPHA_OPERATION_MUX 0xA0000000
13965 #define NV_095_COMBINE_1_ALPHA_OPERATION_ADDCOMPLEMENT 0xC0000000
13966 #define NV_095_COMBINE_1_ALPHA_OPERATION_ADDSIGNED2 0xE0000000
13967 
13968 /* NV-Register NV_095_COMBINE_1_COLOR */
13969 #define NV_095_COMBINE_1_COLOR 0x005A0330
13970 #define NV_095_COMBINE_1_COLOR_INVERSE_0 0x00000001
13971 #define NV_095_COMBINE_1_COLOR_INVERSE_0_NORMAL 0xFFFFFFFE
13972 #define NV_095_COMBINE_1_COLOR_INVERSE_0_INVERSE 0x00000001
13973 #define NV_095_COMBINE_1_COLOR_ALPHA_0 0x00000002
13974 #define NV_095_COMBINE_1_COLOR_ALPHA_0_COLOR 0xFFFFFFFD
13975 #define NV_095_COMBINE_1_COLOR_ALPHA_0_ALPHA 0x00000002
13976 #define NV_095_COMBINE_1_COLOR_ARGUMENT_0 0x000000FC
13977 #define NV_095_COMBINE_1_COLOR_ARGUMENT_0_ZERO 0x00000004
13978 #define NV_095_COMBINE_1_COLOR_ARGUMENT_0_FACTOR 0x00000008
13979 #define NV_095_COMBINE_1_COLOR_ARGUMENT_0_DIFFUSE 0x0000000C
13980 #define NV_095_COMBINE_1_COLOR_ARGUMENT_0_INPUT 0x00000010
13981 #define NV_095_COMBINE_1_COLOR_ARGUMENT_0_TEXTURE0 0x00000014
13982 #define NV_095_COMBINE_1_COLOR_ARGUMENT_0_TEXTURE1 0x00000018
13983 #define NV_095_COMBINE_1_COLOR_INVERSE_1 0x00000100
13984 #define NV_095_COMBINE_1_COLOR_INVERSE_1_NORMAL 0xFFFFFEFF
13985 #define NV_095_COMBINE_1_COLOR_INVERSE_1_INVERSE 0x00000100
13986 #define NV_095_COMBINE_1_COLOR_ALPHA_1 0x00000200
13987 #define NV_095_COMBINE_1_COLOR_ALPHA_1_COLOR 0xFFFFFDFF
13988 #define NV_095_COMBINE_1_COLOR_ALPHA_1_ALPHA 0x00000200
13989 #define NV_095_COMBINE_1_COLOR_ARGUMENT_1 0x0000FC00
13990 #define NV_095_COMBINE_1_COLOR_ARGUMENT_1_ZERO 0x00000400
13991 #define NV_095_COMBINE_1_COLOR_ARGUMENT_1_FACTOR 0x00000800
13992 #define NV_095_COMBINE_1_COLOR_ARGUMENT_1_DIFFUSE 0x00000C00
13993 #define NV_095_COMBINE_1_COLOR_ARGUMENT_1_INPUT 0x00001000
13994 #define NV_095_COMBINE_1_COLOR_ARGUMENT_1_TEXTURE0 0x00001400
13995 #define NV_095_COMBINE_1_COLOR_ARGUMENT_1_TEXTURE1 0x00001800
13996 #define NV_095_COMBINE_1_COLOR_INVERSE_2 0x00010000
13997 #define NV_095_COMBINE_1_COLOR_INVERSE_2_NORMAL 0xFFFEFFFF
13998 #define NV_095_COMBINE_1_COLOR_INVERSE_2_INVERSE 0x00010000
13999 #define NV_095_COMBINE_1_COLOR_ALPHA_2 0x00020000
14000 #define NV_095_COMBINE_1_COLOR_ALPHA_2_COLOR 0xFFFDFFFF
14001 #define NV_095_COMBINE_1_COLOR_ALPHA_2_ALPHA 0x00020000
14002 #define NV_095_COMBINE_1_COLOR_ARGUMENT_2 0x00FC0000
14003 #define NV_095_COMBINE_1_COLOR_ARGUMENT_2_ZERO 0x00040000
14004 #define NV_095_COMBINE_1_COLOR_ARGUMENT_2_FACTOR 0x00080000
14005 #define NV_095_COMBINE_1_COLOR_ARGUMENT_2_DIFFUSE 0x000C0000
14006 #define NV_095_COMBINE_1_COLOR_ARGUMENT_2_INPUT 0x00100000
14007 #define NV_095_COMBINE_1_COLOR_ARGUMENT_2_TEXTURE0 0x00140000
14008 #define NV_095_COMBINE_1_COLOR_ARGUMENT_2_TEXTURE1 0x00180000
14009 #define NV_095_COMBINE_1_COLOR_INVERSE_3 0x01000000
14010 #define NV_095_COMBINE_1_COLOR_INVERSE_3_NORMAL 0xFEFFFFFF
14011 #define NV_095_COMBINE_1_COLOR_INVERSE_3_INVERSE 0x01000000
14012 #define NV_095_COMBINE_1_COLOR_ALPHA_3 0x02000000
14013 #define NV_095_COMBINE_1_COLOR_ALPHA_3_COLOR 0xFDFFFFFF
14014 #define NV_095_COMBINE_1_COLOR_ALPHA_3_ALPHA 0x02000000
14015 #define NV_095_COMBINE_1_COLOR_ARGUMENT_3 0x1C000000
14016 #define NV_095_COMBINE_1_COLOR_ARGUMENT_3_ZERO 0x04000000
14017 #define NV_095_COMBINE_1_COLOR_ARGUMENT_3_FACTOR 0x08000000
14018 #define NV_095_COMBINE_1_COLOR_ARGUMENT_3_DIFFUSE 0x0C000000
14019 #define NV_095_COMBINE_1_COLOR_ARGUMENT_3_INPUT 0x10000000
14020 #define NV_095_COMBINE_1_COLOR_ARGUMENT_3_TEXTURE0 0x14000000
14021 #define NV_095_COMBINE_1_COLOR_ARGUMENT_3_TEXTURE1 0x18000000
14022 #define NV_095_COMBINE_1_COLOR_OPERATION 0xE0000000
14023 #define NV_095_COMBINE_1_COLOR_OPERATION_ADD 0x20000000
14024 #define NV_095_COMBINE_1_COLOR_OPERATION_ADD2 0x40000000
14025 #define NV_095_COMBINE_1_COLOR_OPERATION_ADD4 0x60000000
14026 #define NV_095_COMBINE_1_COLOR_OPERATION_ADDSIGNED 0x80000000
14027 #define NV_095_COMBINE_1_COLOR_OPERATION_MUX 0xA0000000
14028 #define NV_095_COMBINE_1_COLOR_OPERATION_ADDCOMPLEMENT 0xC0000000
14029 #define NV_095_COMBINE_1_COLOR_OPERATION_ADDSIGNED2 0xE0000000
14030 
14031 /* NV-Register NV_095_COMBINE_FACTOR */
14032 #define NV_095_COMBINE_FACTOR 0x005A0334
14033 #define NV_095_COMBINE_FACTOR_BLUE 0x000000FF
14034 #define NV_095_COMBINE_FACTOR_GREEN 0x0000FF00
14035 #define NV_095_COMBINE_FACTOR_RED 0x00FF0000
14036 #define NV_095_COMBINE_FACTOR_ALPHA 0xFF000000
14037 
14038 /* NV-Register NV_095_BLEND */
14039 #define NV_095_BLEND 0x005A0338
14040 #define NV_095_BLEND_MASK_BIT 0x0000003F
14041 #define NV_095_BLEND_MASK_BIT_LSB 0x00000010
14042 #define NV_095_BLEND_MASK_BIT_MSB 0x00000020
14043 #define NV_095_BLEND_SHADEMODE 0x000000C0
14044 #define NV_095_BLEND_SHADEMODE_FLAT 0x00000040
14045 #define NV_095_BLEND_SHADEMODE_GOURAUD 0x00000080
14046 #define NV_095_BLEND_SHADEMODE_PHONG 0x000000C0
14047 #define NV_095_BLEND_TEXTUREPERSPECTIVE 0x00000F00
14048 #define NV_095_BLEND_TEXTUREPERSPECTIVE_FALSE 0x00000000
14049 #define NV_095_BLEND_TEXTUREPERSPECTIVE_TRUE 0x00000100
14050 #define NV_095_BLEND_SPECULARENABLE 0x0000F000
14051 #define NV_095_BLEND_SPECULARENABLE_FALSE 0x00000000
14052 #define NV_095_BLEND_SPECULARENABLE_TRUE 0x00001000
14053 #define NV_095_BLEND_FOGENABLE 0x000F0000
14054 #define NV_095_BLEND_FOGENABLE_FALSE 0x00000000
14055 #define NV_095_BLEND_FOGENABLE_TRUE 0x00010000
14056 #define NV_095_BLEND_ALPHABLENDENABLE 0x00F00000
14057 #define NV_095_BLEND_ALPHABLENDENABLE_FALSE 0x00000000
14058 #define NV_095_BLEND_ALPHABLENDENABLE_TRUE 0x00100000
14059 #define NV_095_BLEND_SRCBLEND 0x0F000000
14060 #define NV_095_BLEND_SRCBLEND_ZERO 0x01000000
14061 #define NV_095_BLEND_SRCBLEND_ONE 0x02000000
14062 #define NV_095_BLEND_SRCBLEND_SRCCOLOR 0x03000000
14063 #define NV_095_BLEND_SRCBLEND_INVSRCCOLOR 0x04000000
14064 #define NV_095_BLEND_SRCBLEND_SRCALPHA 0x05000000
14065 #define NV_095_BLEND_SRCBLEND_INVSRCALPHA 0x06000000
14066 #define NV_095_BLEND_SRCBLEND_DESTALPHA 0x07000000
14067 #define NV_095_BLEND_SRCBLEND_INVDESTALPHA 0x08000000
14068 #define NV_095_BLEND_SRCBLEND_DESTCOLOR 0x09000000
14069 #define NV_095_BLEND_SRCBLEND_INVDESTCOLOR 0x0A000000
14070 #define NV_095_BLEND_SRCBLEND_SRCALPHASAT 0x0B000000
14071 #define NV_095_BLEND_DESTBLEND 0xF0000000
14072 #define NV_095_BLEND_DESTBLEND_ZERO 0x10000000
14073 #define NV_095_BLEND_DESTBLEND_ONE 0x20000000
14074 #define NV_095_BLEND_DESTBLEND_SRCCOLOR 0x30000000
14075 #define NV_095_BLEND_DESTBLEND_INVSRCCOLOR 0x40000000
14076 #define NV_095_BLEND_DESTBLEND_SRCALPHA 0x50000000
14077 #define NV_095_BLEND_DESTBLEND_INVSRCALPHA 0x60000000
14078 #define NV_095_BLEND_DESTBLEND_DESTALPHA 0x70000000
14079 #define NV_095_BLEND_DESTBLEND_INVDESTALPHA 0x80000000
14080 #define NV_095_BLEND_DESTBLEND_DESTCOLOR 0x90000000
14081 #define NV_095_BLEND_DESTBLEND_INVDESTCOLOR 0xA0000000
14082 #define NV_095_BLEND_DESTBLEND_SRCALPHASAT 0xB0000000
14083 
14084 /* NV-Register NV_095_CONTROL0 */
14085 #define NV_095_CONTROL0 0x005A033C
14086 #define NV_095_CONTROL0_ALPHAREF 0x000000FF
14087 #define NV_095_CONTROL0_ALPHAFUNC 0x00000F00
14088 #define NV_095_CONTROL0_ALPHAFUNC_NEVER 0x00000100
14089 #define NV_095_CONTROL0_ALPHAFUNC_LESS 0x00000200
14090 #define NV_095_CONTROL0_ALPHAFUNC_EQUAL 0x00000300
14091 #define NV_095_CONTROL0_ALPHAFUNC_LESSEQUAL 0x00000400
14092 #define NV_095_CONTROL0_ALPHAFUNC_GREATER 0x00000500
14093 #define NV_095_CONTROL0_ALPHAFUNC_NOTEQUAL 0x00000600
14094 #define NV_095_CONTROL0_ALPHAFUNC_GREATEREQUAL 0x00000700
14095 #define NV_095_CONTROL0_ALPHAFUNC_ALWAYS 0x00000800
14096 #define NV_095_CONTROL0_ALPHATESTENABLE 0x00001000
14097 #define NV_095_CONTROL0_ALPHATESTENABLE_FALSE 0xFFFFEFFF
14098 #define NV_095_CONTROL0_ALPHATESTENABLE_TRUE 0x00001000
14099 #define NV_095_CONTROL0_ORIGIN 0x00002000
14100 #define NV_095_CONTROL0_ORIGIN_CENTER 0xFFFFDFFF
14101 #define NV_095_CONTROL0_ORIGIN_CORNER 0x00002000
14102 #define NV_095_CONTROL0_ZENABLE 0x0000C000
14103 #define NV_095_CONTROL0_ZENABLE_FALSE 0x00000000
14104 #define NV_095_CONTROL0_ZENABLE_TRUE 0x00004000
14105 #define NV_095_CONTROL0_ZFUNC 0x000F0000
14106 #define NV_095_CONTROL0_ZFUNC_NEVER 0x00010000
14107 #define NV_095_CONTROL0_ZFUNC_LESS 0x00020000
14108 #define NV_095_CONTROL0_ZFUNC_EQUAL 0x00030000
14109 #define NV_095_CONTROL0_ZFUNC_LESSEQUAL 0x00040000
14110 #define NV_095_CONTROL0_ZFUNC_GREATER 0x00050000
14111 #define NV_095_CONTROL0_ZFUNC_NOTEQUAL 0x00060000
14112 #define NV_095_CONTROL0_ZFUNC_GREATEREQUAL 0x00070000
14113 #define NV_095_CONTROL0_ZFUNC_ALWAYS 0x00080000
14114 #define NV_095_CONTROL0_CULLMODE 0x00300000
14115 #define NV_095_CONTROL0_CULLMODE_NONE 0x00100000
14116 #define NV_095_CONTROL0_CULLMODE_CW 0x00200000
14117 #define NV_095_CONTROL0_CULLMODE_CCW 0x00300000
14118 #define NV_095_CONTROL0_DITHERENABLE 0x00400000
14119 #define NV_095_CONTROL0_DITHERENABLE_FALSE 0xFFBFFFFF
14120 #define NV_095_CONTROL0_DITHERENABLE_TRUE 0x00400000
14121 #define NV_095_CONTROL0_Z_PERSPECTIVE_ENABLE 0x00800000
14122 #define NV_095_CONTROL0_Z_PERSPECTIVE_ENABLE_FALSE 0xFF7FFFFF
14123 #define NV_095_CONTROL0_Z_PERSPECTIVE_ENABLE_TRUE 0x00800000
14124 #define NV_095_CONTROL0_ZWRITEENABLE 0x01000000
14125 #define NV_095_CONTROL0_ZWRITEENABLE_FALSE 0xFEFFFFFF
14126 #define NV_095_CONTROL0_ZWRITEENABLE_TRUE 0x01000000
14127 #define NV_095_CONTROL0_STENCIL_WRITE_ENABLE 0x02000000
14128 #define NV_095_CONTROL0_STENCIL_WRITE_ENABLE_FALSE 0xFDFFFFFF
14129 #define NV_095_CONTROL0_STENCIL_WRITE_ENABLE_TRUE 0x02000000
14130 #define NV_095_CONTROL0_ALPHA_WRITE_ENABLE 0x04000000
14131 #define NV_095_CONTROL0_ALPHA_WRITE_ENABLE_FALSE 0xFBFFFFFF
14132 #define NV_095_CONTROL0_ALPHA_WRITE_ENABLE_TRUE 0x04000000
14133 #define NV_095_CONTROL0_RED_WRITE_ENABLE 0x08000000
14134 #define NV_095_CONTROL0_RED_WRITE_ENABLE_FALSE 0xF7FFFFFF
14135 #define NV_095_CONTROL0_RED_WRITE_ENABLE_TRUE 0x08000000
14136 #define NV_095_CONTROL0_GREEN_WRITE_ENABLE 0x10000000
14137 #define NV_095_CONTROL0_GREEN_WRITE_ENABLE_FALSE 0xEFFFFFFF
14138 #define NV_095_CONTROL0_GREEN_WRITE_ENABLE_TRUE 0x10000000
14139 #define NV_095_CONTROL0_BLUE_WRITE_ENABLE 0x20000000
14140 #define NV_095_CONTROL0_BLUE_WRITE_ENABLE_FALSE 0xDFFFFFFF
14141 #define NV_095_CONTROL0_BLUE_WRITE_ENABLE_TRUE 0x20000000
14142 #define NV_095_CONTROL0_Z_FORMAT 0xC0000000
14143 #define NV_095_CONTROL0_Z_FORMAT_FIXED 0x40000000
14144 #define NV_095_CONTROL0_Z_FORMAT_FLOAT 0x80000000
14145 
14146 /* NV-Register NV_095_CONTROL1 */
14147 #define NV_095_CONTROL1 0x005A0340
14148 #define NV_095_CONTROL1_STENCIL_TEST_ENABLE 0x0000000F
14149 #define NV_095_CONTROL1_STENCIL_TEST_ENABLE_FALSE 0x00000000
14150 #define NV_095_CONTROL1_STENCIL_TEST_ENABLE_TRUE 0x00000001
14151 #define NV_095_CONTROL1_STENCIL_FUNC 0x000000F0
14152 #define NV_095_CONTROL1_STENCIL_FUNC_NEVER 0x00000010
14153 #define NV_095_CONTROL1_STENCIL_FUNC_LESS 0x00000020
14154 #define NV_095_CONTROL1_STENCIL_FUNC_EQUAL 0x00000030
14155 #define NV_095_CONTROL1_STENCIL_FUNC_LESSEQUAL 0x00000040
14156 #define NV_095_CONTROL1_STENCIL_FUNC_GREATER 0x00000050
14157 #define NV_095_CONTROL1_STENCIL_FUNC_NOTEQUAL 0x00000060
14158 #define NV_095_CONTROL1_STENCIL_FUNC_GREATEREQUAL 0x00000070
14159 #define NV_095_CONTROL1_STENCIL_FUNC_ALWAYS 0x00000080
14160 #define NV_095_CONTROL1_STENCIL_REF 0x0000FF00
14161 #define NV_095_CONTROL1_STENCIL_MASK_READ 0x00FF0000
14162 #define NV_095_CONTROL1_STENCIL_MASK_WRITE 0xFF000000
14163 
14164 /* NV-Register NV_095_CONTROL2 */
14165 #define NV_095_CONTROL2 0x005A0344
14166 #define NV_095_CONTROL2_STENCIL_OP_FAIL 0x0000000F
14167 #define NV_095_CONTROL2_STENCIL_OP_FAIL_KEEP 0x00000001
14168 #define NV_095_CONTROL2_STENCIL_OP_FAIL_ZERO 0x00000002
14169 #define NV_095_CONTROL2_STENCIL_OP_FAIL_REPLACE 0x00000003
14170 #define NV_095_CONTROL2_STENCIL_OP_FAIL_INCRSAT 0x00000004
14171 #define NV_095_CONTROL2_STENCIL_OP_FAIL_DECRSAT 0x00000005
14172 #define NV_095_CONTROL2_STENCIL_OP_FAIL_INVERT 0x00000006
14173 #define NV_095_CONTROL2_STENCIL_OP_FAIL_INCR 0x00000007
14174 #define NV_095_CONTROL2_STENCIL_OP_FAIL_DECR 0x00000008
14175 #define NV_095_CONTROL2_STENCIL_OP_ZFAIL 0x000000F0
14176 #define NV_095_CONTROL2_STENCIL_OP_ZFAIL_KEEP 0x00000010
14177 #define NV_095_CONTROL2_STENCIL_OP_ZFAIL_ZERO 0x00000020
14178 #define NV_095_CONTROL2_STENCIL_OP_ZFAIL_REPLACE 0x00000030
14179 #define NV_095_CONTROL2_STENCIL_OP_ZFAIL_INCRSAT 0x00000040
14180 #define NV_095_CONTROL2_STENCIL_OP_ZFAIL_DECRSAT 0x00000050
14181 #define NV_095_CONTROL2_STENCIL_OP_ZFAIL_INVERT 0x00000060
14182 #define NV_095_CONTROL2_STENCIL_OP_ZFAIL_INCR 0x00000070
14183 #define NV_095_CONTROL2_STENCIL_OP_ZFAIL_DECR 0x00000080
14184 #define NV_095_CONTROL2_STENCIL_OP_ZPASS 0xFFFFFF00
14185 #define NV_095_CONTROL2_STENCIL_OP_ZPASS_KEEP 0x00000100
14186 #define NV_095_CONTROL2_STENCIL_OP_ZPASS_ZERO 0x00000200
14187 #define NV_095_CONTROL2_STENCIL_OP_ZPASS_REPLACE 0x00000300
14188 #define NV_095_CONTROL2_STENCIL_OP_ZPASS_INCRSAT 0x00000400
14189 #define NV_095_CONTROL2_STENCIL_OP_ZPASS_DECRSAT 0x00000500
14190 #define NV_095_CONTROL2_STENCIL_OP_ZPASS_INVERT 0x00000600
14191 #define NV_095_CONTROL2_STENCIL_OP_ZPASS_INCR 0x00000700
14192 #define NV_095_CONTROL2_STENCIL_OP_ZPASS_DECR 0x00000800
14193 
14194 /* NV-Register NV_095_FOGCOLOR */
14195 #define NV_095_FOGCOLOR 0x005A0348
14196 #define NV_095_FOGCOLOR_VALUE 0xFFFFFFFF
14197 
14198 /* NV-Array NV_095_TLMTVERTEX_SX (40 byte access) */
14199 #define NV_095_TLMTVERTEX_SX 0x005A0400
14200 /* NV-Array size NV_095_TLMTVERTEX_SX__SIZE_1 [0..7] */
14201 #define NV_095_TLMTVERTEX_SX__SIZE_1 0x00000008
14202 #define NV_095_TLMTVERTEX_SX_VALUE 0xFFFFFFFF
14203 
14204 /* NV-Array NV_095_TLMTVERTEX_SY (40 byte access) */
14205 #define NV_095_TLMTVERTEX_SY 0x005A0404
14206 /* NV-Array size NV_095_TLMTVERTEX_SY__SIZE_1 [0..7] */
14207 #define NV_095_TLMTVERTEX_SY__SIZE_1 0x00000008
14208 #define NV_095_TLMTVERTEX_SY_VALUE 0xFFFFFFFF
14209 
14210 /* NV-Array NV_095_TLMTVERTEX_SZ (40 byte access) */
14211 #define NV_095_TLMTVERTEX_SZ 0x005A0408
14212 /* NV-Array size NV_095_TLMTVERTEX_SZ__SIZE_1 [0..7] */
14213 #define NV_095_TLMTVERTEX_SZ__SIZE_1 0x00000008
14214 #define NV_095_TLMTVERTEX_SZ_VALUE 0xFFFFFFFF
14215 
14216 /* NV-Array NV_095_TLMTVERTEX_RHW (40 byte access) */
14217 #define NV_095_TLMTVERTEX_RHW 0x005A040C
14218 /* NV-Array size NV_095_TLMTVERTEX_RHW__SIZE_1 [0..7] */
14219 #define NV_095_TLMTVERTEX_RHW__SIZE_1 0x00000008
14220 #define NV_095_TLMTVERTEX_RHW_VALUE 0xFFFFFFFF
14221 
14222 /* NV-Array NV_095_TLMTVERTEX_COLOR (40 byte access) */
14223 #define NV_095_TLMTVERTEX_COLOR 0x005A0410
14224 /* NV-Array size NV_095_TLMTVERTEX_COLOR__SIZE_1 [0..7] */
14225 #define NV_095_TLMTVERTEX_COLOR__SIZE_1 0x00000008
14226 #define NV_095_TLMTVERTEX_COLOR_VALUE 0xFFFFFFFF
14227 #define NV_095_TLMTVERTEX_COLOR_BLUE 0x000000FF
14228 #define NV_095_TLMTVERTEX_COLOR_GREEN 0x0000FF00
14229 #define NV_095_TLMTVERTEX_COLOR_RED 0x00FF0000
14230 #define NV_095_TLMTVERTEX_COLOR_ALPHA 0xFF000000
14231 
14232 /* NV-Array NV_095_TLMTVERTEX_SPECULAR (40 byte access) */
14233 #define NV_095_TLMTVERTEX_SPECULAR 0x005A0414
14234 /* NV-Array size NV_095_TLMTVERTEX_SPECULAR__SIZE_1 [0..7] */
14235 #define NV_095_TLMTVERTEX_SPECULAR__SIZE_1 0x00000008
14236 #define NV_095_TLMTVERTEX_SPECULAR_VALUE 0xFFFFFFFF
14237 #define NV_095_TLMTVERTEX_SPECULAR_BLUE 0x000000FF
14238 #define NV_095_TLMTVERTEX_SPECULAR_GREEN 0x0000FF00
14239 #define NV_095_TLMTVERTEX_SPECULAR_RED 0x00FF0000
14240 #define NV_095_TLMTVERTEX_SPECULAR_FOG 0xFF000000
14241 
14242 /* NV-Array NV_095_TLMTVERTEX_TU0 (40 byte access) */
14243 #define NV_095_TLMTVERTEX_TU0 0x005A0418
14244 /* NV-Array size NV_095_TLMTVERTEX_TU0__SIZE_1 [0..7] */
14245 #define NV_095_TLMTVERTEX_TU0__SIZE_1 0x00000008
14246 #define NV_095_TLMTVERTEX_TU0_VALUE 0xFFFFFFFF
14247 
14248 /* NV-Array NV_095_TLMTVERTEX_TV0 (40 byte access) */
14249 #define NV_095_TLMTVERTEX_TV0 0x005A041C
14250 /* NV-Array size NV_095_TLMTVERTEX_TV0__SIZE_1 [0..7] */
14251 #define NV_095_TLMTVERTEX_TV0__SIZE_1 0x00000008
14252 #define NV_095_TLMTVERTEX_TV0_VALUE 0xFFFFFFFF
14253 
14254 /* NV-Array NV_095_TLMTVERTEX_TU1 (40 byte access) */
14255 #define NV_095_TLMTVERTEX_TU1 0x005A0420
14256 /* NV-Array size NV_095_TLMTVERTEX_TU1__SIZE_1 [0..7] */
14257 #define NV_095_TLMTVERTEX_TU1__SIZE_1 0x00000008
14258 #define NV_095_TLMTVERTEX_TU1_VALUE 0xFFFFFFFF
14259 
14260 /* NV-Array NV_095_TLMTVERTEX_TV1 (40 byte access) */
14261 #define NV_095_TLMTVERTEX_TV1 0x005A0424
14262 /* NV-Array size NV_095_TLMTVERTEX_TV1__SIZE_1 [0..7] */
14263 #define NV_095_TLMTVERTEX_TV1__SIZE_1 0x00000008
14264 #define NV_095_TLMTVERTEX_TV1_VALUE 0xFFFFFFFF
14265 
14266 /* NV-Array NV_095_TLMTVERTEX_DRAWPRIMITIVE (4 byte access) */
14267 #define NV_095_TLMTVERTEX_DRAWPRIMITIVE 0x005A0540
14268 /* NV-Array size NV_095_TLMTVERTEX_DRAWPRIMITIVE__SIZE_1 [0..47] */
14269 #define NV_095_TLMTVERTEX_DRAWPRIMITIVE__SIZE_1 0x00000030
14270 #define NV_095_TLMTVERTEX_DRAWPRIMITIVE_I0 0x0000000F
14271 #define NV_095_TLMTVERTEX_DRAWPRIMITIVE_I1 0x000000F0
14272 #define NV_095_TLMTVERTEX_DRAWPRIMITIVE_I2 0x00000F00
14273 #define NV_095_TLMTVERTEX_DRAWPRIMITIVE_I3 0x0000F000
14274 #define NV_095_TLMTVERTEX_DRAWPRIMITIVE_I4 0x000F0000
14275 #define NV_095_TLMTVERTEX_DRAWPRIMITIVE_I5 0xFFF00000
14276 
14277 /* NV-Device NV_08A */
14278 #define NV_08A 0x00540000 /* size: 0x00001FFF */
14279 #define NV10_IMAGE_FROM_CPU 0x08A00000
14280 
14281 /* NV-Register NV_08A_NV10_IMAGE_FROM_CPU */
14282 #define NV_08A_NV10_IMAGE_FROM_CPU 0x00540000
14283 #define NV_08A_NV10_IMAGE_FROM_CPU_HANDLE 0xFFFFFFFF
14284 
14285 /* NV-Register NV_08A_NOP */
14286 #define NV_08A_NOP 0x00540100
14287 #define NV_08A_NOP_PARAMETER 0xFFFFFFFF
14288 
14289 /* NV-Register NV_08A_NOTIFY */
14290 #define NV_08A_NOTIFY 0x00540104
14291 #define NV_08A_NOTIFY_STYLE 0xFFFFFFFF
14292 #define NV_08A_NOTIFY_STYLE_WRITE_ONLY 0x00000000
14293 #define NV_08A_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001
14294 
14295 /* NV-Register NV_08A_SET_NOTIFY */
14296 #define NV_08A_SET_NOTIFY 0x00540104
14297 /* Alias NV_08A_NOTIFY */
14298 /* Alias NV_08A_NOTIFY */
14299 #define NV_08A_SET_NOTIFY_PARAMETER 0xFFFFFFFF
14300 #define NV_08A_SET_NOTIFY_PARAMETER_WRITE 0x00000000
14301 
14302 /* NV-Register NV_08A_WAIT_FOR_IDLE */
14303 #define NV_08A_WAIT_FOR_IDLE 0x00540108
14304 #define NV_08A_WAIT_FOR_IDLE_PARAMETER 0xFFFFFFFF
14305 
14306 /* NV-Register NV_08A_SET_CONTEXT_DMA_NOTIFY */
14307 #define NV_08A_SET_CONTEXT_DMA_NOTIFY 0x00540180
14308 #define NV_08A_SET_CONTEXT_DMA_NOTIFY_PARAMETER 0xFFFFFFFF
14309 
14310 /* NV-Register NV_08A_SET_CONTEXT_COLOR_KEY */
14311 #define NV_08A_SET_CONTEXT_COLOR_KEY 0x00540184
14312 #define NV_08A_SET_CONTEXT_COLOR_KEY_PARAMETER 0xFFFFFFFF
14313 
14314 /* NV-Register NV_08A_SET_CONTEXT_CLIP_RECTANGLE */
14315 #define NV_08A_SET_CONTEXT_CLIP_RECTANGLE 0x00540188
14316 #define NV_08A_SET_CONTEXT_CLIP_RECTANGLE_PARAMETER 0xFFFFFFFF
14317 
14318 /* NV-Register NV_08A_SET_CONTEXT_PATTERN */
14319 #define NV_08A_SET_CONTEXT_PATTERN 0x0054018C
14320 #define NV_08A_SET_CONTEXT_PATTERN_PARAMETER 0xFFFFFFFF
14321 
14322 /* NV-Register NV_08A_SET_CONTEXT_ROP */
14323 #define NV_08A_SET_CONTEXT_ROP 0x00540190
14324 #define NV_08A_SET_CONTEXT_ROP_PARAMETER 0xFFFFFFFF
14325 
14326 /* NV-Register NV_08A_SET_CONTEXT_BETA1 */
14327 #define NV_08A_SET_CONTEXT_BETA1 0x00540194
14328 #define NV_08A_SET_CONTEXT_BETA1_PARAMETER 0xFFFFFFFF
14329 
14330 /* NV-Register NV_08A_SET_CONTEXT_BETA4 */
14331 #define NV_08A_SET_CONTEXT_BETA4 0x00540198
14332 #define NV_08A_SET_CONTEXT_BETA4_PARAMETER 0xFFFFFFFF
14333 
14334 /* NV-Register NV_08A_SET_CONTEXT_SURFACE */
14335 #define NV_08A_SET_CONTEXT_SURFACE 0x0054019C
14336 #define NV_08A_SET_CONTEXT_SURFACE_PARAMETER 0xFFFFFFFF
14337 
14338 /* NV-Register NV_08A_SET_COLOR_CONVERSION */
14339 #define NV_08A_SET_COLOR_CONVERSION 0x005402F8
14340 #define NV_08A_SET_COLOR_CONVERSION_TYPE 0xFFFFFFFF
14341 #define NV_08A_SET_COLOR_CONVERSION_TYPE_DITHER 0x00000000
14342 #define NV_08A_SET_COLOR_CONVERSION_TYPE_TRUNCATE 0x00000001
14343 #define NV_08A_SET_COLOR_CONVERSION_TYPE_SUBTR_TRUNCATE 0x00000002
14344 
14345 /* NV-Register NV_08A_SET_OPERATION */
14346 #define NV_08A_SET_OPERATION 0x005402FC
14347 #define NV_08A_SET_OPERATION_MODE 0xFFFFFFFF
14348 #define NV_08A_SET_OPERATION_MODE_SRCCOPY_AND 0x00000000
14349 #define NV_08A_SET_OPERATION_MODE_ROP_AND 0x00000001
14350 #define NV_08A_SET_OPERATION_MODE_BLEND_AND 0x00000002
14351 #define NV_08A_SET_OPERATION_MODE_SRCCOPY 0x00000003
14352 #define NV_08A_SET_OPERATION_MODE_SRCCOPY_PREMULT 0x00000004
14353 #define NV_08A_SET_OPERATION_MODE_BLEND_PREMULT 0x00000005
14354 
14355 /* NV-Register NV_08A_SET_COLOR_FORMAT */
14356 #define NV_08A_SET_COLOR_FORMAT 0x00540300
14357 #define NV_08A_SET_COLOR_FORMAT_LE 0xFFFFFFFF
14358 #define NV_08A_SET_COLOR_FORMAT_LE_R5G6B5 0x00000001
14359 #define NV_08A_SET_COLOR_FORMAT_LE_A1R5G5B5 0x00000002
14360 #define NV_08A_SET_COLOR_FORMAT_LE_X1R5G5B5 0x00000003
14361 #define NV_08A_SET_COLOR_FORMAT_LE_A8R8G8B8 0x00000004
14362 #define NV_08A_SET_COLOR_FORMAT_LE_X8R8G8B8 0x00000005
14363 
14364 /* NV-Register NV_08A_POINT */
14365 #define NV_08A_POINT 0x00540304
14366 #define NV_08A_POINT_X 0x0000FFFF
14367 #define NV_08A_POINT_Y 0xFFFF0000
14368 
14369 /* NV-Register NV_08A_SIZE_OUT */
14370 #define NV_08A_SIZE_OUT 0x00540308
14371 #define NV_08A_SIZE_OUT_WIDTH 0x0000FFFF
14372 #define NV_08A_SIZE_OUT_HEIGHT 0xFFFF0000
14373 
14374 /* NV-Register NV_08A_SIZE_IN */
14375 #define NV_08A_SIZE_IN 0x0054030C
14376 #define NV_08A_SIZE_IN_WIDTH 0x0000FFFF
14377 #define NV_08A_SIZE_IN_HEIGHT 0xFFFF0000
14378 
14379 /* NV-Array NV_08A_COLORA (8 byte access) */
14380 #define NV_08A_COLORA 0x00540400
14381 /* NV-Array size NV_08A_COLORA__SIZE_1 [0..895] */
14382 #define NV_08A_COLORA__SIZE_1 0x00000380
14383 #define NV_08A_COLOR_VALUE 0xFFFFFFFF
14384 
14385 /* NV-Array NV_08A_COLORB (8 byte access) */
14386 #define NV_08A_COLORB 0x00540404
14387 /* NV-Array size NV_08A_COLORB__SIZE_1 [0..895] */
14388 #define NV_08A_COLORB__SIZE_1 0x00000380
14389 #define NV_08A_COLORB_VALUE 0xFFFFFFFF
14390 
14391 /* NV-Device NV_089 */
14392 #define NV_089 0x006E0000 /* size: 0x00001FFF */
14393 #define NV10_SCALED_IMAGE_FROM_MEMORY 0x00000089
14394 
14395 /* NV-Register NV_089_NV10_SCALED_IMAGE_FROM_MEMORY */
14396 #define NV_089_NV10_SCALED_IMAGE_FROM_MEMORY 0x006E0000
14397 #define NV_089_NV10_SCALED_IMAGE_FROM_MEMORY_HANDLE 0xFFFFFFFF
14398 
14399 /* NV-Register NV_089_NOP */
14400 #define NV_089_NOP 0x006E0100
14401 #define NV_089_NOP_PARAMETER 0xFFFFFFFF
14402 
14403 /* NV-Register NV_089_PM_TRIGGER */
14404 #define NV_089_PM_TRIGGER 0x006E0140
14405 #define NV_089_PM_TRIGGER_PARAMETER 0xFFFFFFFF
14406 
14407 /* NV-Register NV_089_NOTIFY */
14408 #define NV_089_NOTIFY 0x006E0104
14409 #define NV_089_NOTIFY_STYLE 0xFFFFFFFF
14410 #define NV_089_NOTIFY_STYLE_WRITE_ONLY 0x00000000
14411 #define NV_089_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001
14412 
14413 /* NV-Register NV_089_SET_NOTIFY */
14414 #define NV_089_SET_NOTIFY 0x006E0104
14415 /* Alias NV_089_NOTIFY */
14416 /* Alias NV_089_NOTIFY */
14417 #define NV_089_SET_NOTIFY_PARAMETER 0xFFFFFFFF
14418 #define NV_089_SET_NOTIFY_PARAMETER_WRITE 0x00000000
14419 
14420 /* NV-Register NV_089_WAIT_FOR_IDLE */
14421 #define NV_089_WAIT_FOR_IDLE 0x006E0108
14422 #define NV_089_WAIT_FOR_IDLE_PARAMETER 0xFFFFFFFF
14423 
14424 /* NV-Register NV_089_SET_CONTEXT_DMA_NOTIFY */
14425 #define NV_089_SET_CONTEXT_DMA_NOTIFY 0x006E0180
14426 #define NV_089_SET_CONTEXT_DMA_NOTIFY_PARAMETER 0xFFFFFFFF
14427 
14428 /* NV-Register NV_089_SET_CONTEXT_DMA_IMAGE */
14429 #define NV_089_SET_CONTEXT_DMA_IMAGE 0x006E0184
14430 #define NV_089_SET_CONTEXT_DMA_IMAGE_PARAMETER 0xFFFFFFFF
14431 
14432 /* NV-Register NV_089_SET_CONTEXT_PATTERN */
14433 #define NV_089_SET_CONTEXT_PATTERN 0x006E0188
14434 #define NV_089_SET_CONTEXT_PATTERN_PARAMETER 0xFFFFFFFF
14435 
14436 /* NV-Register NV_089_SET_CONTEXT_ROP */
14437 #define NV_089_SET_CONTEXT_ROP 0x006E018C
14438 #define NV_089_SET_CONTEXT_ROP_PARAMETER 0xFFFFFFFF
14439 
14440 /* NV-Register NV_089_SET_CONTEXT_BETA1 */
14441 #define NV_089_SET_CONTEXT_BETA1 0x006E0190
14442 #define NV_089_SET_CONTEXT_BETA1_PARAMETER 0xFFFFFFFF
14443 
14444 /* NV-Register NV_089_SET_CONTEXT_BETA4 */
14445 #define NV_089_SET_CONTEXT_BETA4 0x006E0194
14446 #define NV_089_SET_CONTEXT_BETA4_PARAMETER 0xFFFFFFFF
14447 
14448 /* NV-Register NV_089_SET_CONTEXT_SURFACE */
14449 #define NV_089_SET_CONTEXT_SURFACE 0x006E0198
14450 #define NV_089_SET_CONTEXT_SURFACE_PARAMETER 0xFFFFFFFF
14451 
14452 /* NV-Register NV_089_SET_COLOR_CONVERSION */
14453 #define NV_089_SET_COLOR_CONVERSION 0x006E02FC
14454 #define NV_089_SET_COLOR_CONVERSION_TYPE 0xFFFFFFFF
14455 #define NV_089_SET_COLOR_CONVERSION_TYPE_DITHER 0x00000000
14456 #define NV_089_SET_COLOR_CONVERSION_TYPE_TRUNCATE 0x00000001
14457 #define NV_089_SET_COLOR_CONVERSION_TYPE_SUBTR_TRUNCATE 0x00000002
14458 
14459 /* NV-Register NV_089_SET_COLOR_FORMAT */
14460 #define NV_089_SET_COLOR_FORMAT 0x006E0300
14461 #define NV_089_SET_COLOR_FORMAT_LE 0xFFFFFFFF
14462 #define NV_089_SET_COLOR_FORMAT_LE_A1R5G5B5 0x00000001
14463 #define NV_089_SET_COLOR_FORMAT_LE_X1R5G5B5 0x00000002
14464 #define NV_089_SET_COLOR_FORMAT_LE_A8R8G8B8 0x00000003
14465 #define NV_089_SET_COLOR_FORMAT_LE_X8R8G8B8 0x00000004
14466 #define NV_089_SET_COLOR_FORMAT_LE_V8YB8U8YA8 0x00000005
14467 #define NV_089_SET_COLOR_FORMAT_LE_YB8V8YA8U8 0x00000006
14468 #define NV_089_SET_COLOR_FORMAT_LE_R5G6B5 0x00000007
14469 #define NV_089_SET_COLOR_FORMAT_LE_Y8 0x00000008
14470 #define NV_089_SET_COLOR_FORMAT_LE_AY8 0x00000009
14471 
14472 /* NV-Register NV_089_SET_OPERATION */
14473 #define NV_089_SET_OPERATION 0x006E0304
14474 #define NV_089_SET_OPERATION_MODE 0xFFFFFFFF
14475 #define NV_089_SET_OPERATION_MODE_SRCCOPY_AND 0x00000000
14476 #define NV_089_SET_OPERATION_MODE_ROP_AND 0x00000001
14477 #define NV_089_SET_OPERATION_MODE_BLEND_AND 0x00000002
14478 #define NV_089_SET_OPERATION_MODE_SRCCOPY 0x00000003
14479 #define NV_089_SET_OPERATION_MODE_SRCCOPY_PREMULT 0x00000004
14480 #define NV_089_SET_OPERATION_MODE_BLEND_PREMULT 0x00000005
14481 
14482 /* NV-Register NV_089_CLIP_0 */
14483 #define NV_089_CLIP_0 0x006E0308
14484 #define NV_089_CLIP_0_X 0x0000FFFF
14485 #define NV_089_CLIP_0_Y 0xFFFF0000
14486 
14487 /* NV-Register NV_089_CLIP_1 */
14488 #define NV_089_CLIP_1 0x006E030C
14489 #define NV_089_CLIP_1_WIDTH 0x0000FFFF
14490 #define NV_089_CLIP_1_HEIGHT 0xFFFF0000
14491 
14492 /* NV-Register NV_089_RECTANGLE_OUT_0 */
14493 #define NV_089_RECTANGLE_OUT_0 0x006E0310
14494 #define NV_089_RECTANGLE_OUT_0_X 0x0000FFFF
14495 #define NV_089_RECTANGLE_OUT_0_Y 0xFFFF0000
14496 
14497 /* NV-Register NV_089_RECTANGLE_OUT_1 */
14498 #define NV_089_RECTANGLE_OUT_1 0x006E0314
14499 #define NV_089_RECTANGLE_OUT_1_WIDTH 0x0000FFFF
14500 #define NV_089_RECTANGLE_OUT_1_HEIGHT 0xFFFF0000
14501 
14502 /* NV-Register NV_089_DELTA_DU_DX */
14503 #define NV_089_DELTA_DU_DX 0x006E0318
14504 #define NV_089_DELTA_DU_DX_R_FRACTION 0x000FFFFF
14505 #define NV_089_DELTA_DU_DX_R_INT 0xFFF00000
14506 #define NV_089_DELTA_DU_DX_R 0xFFFFFFFF
14507 
14508 /* NV-Register NV_089_DELTA_DV_DY */
14509 #define NV_089_DELTA_DV_DY 0x006E031C
14510 #define NV_089_DELTA_DV_DY_R_FRACTION 0x000FFFFF
14511 #define NV_089_DELTA_DV_DY_R_INT 0xFFF00000
14512 #define NV_089_DELTA_DV_DY_R 0xFFFFFFFF
14513 
14514 /* NV-Register NV_089_SIZE */
14515 #define NV_089_SIZE 0x006E0400
14516 #define NV_089_SIZE_WIDTH 0x0000FFFF
14517 #define NV_089_SIZE_HEIGHT 0xFFFF0000
14518 
14519 /* NV-Register NV_089_FORMAT */
14520 #define NV_089_FORMAT 0x006E0404
14521 #define NV_089_FORMAT_PITCH 0x0000FFFF
14522 #define NV_089_FORMAT_ORIGIN 0x00FF0000
14523 #define NV_089_FORMAT_ORIGIN_CENTER 0x00010000
14524 #define NV_089_FORMAT_ORIGIN_CORNER 0x00020000
14525 #define NV_089_FORMAT_INTERPOLATOR 0xFF000000
14526 #define NV_089_FORMAT_INTERPOLATOR_ZOH 0x00000000
14527 #define NV_089_FORMAT_INTERPOLATOR_FOH 0x01000000
14528 
14529 /* NV-Register NV_089_OFFSET */
14530 #define NV_089_OFFSET 0x006E0408
14531 #define NV_089_OFFSET_VALUE 0xFFFFFFFF
14532 
14533 /* NV-Register NV_089_POINT */
14534 #define NV_089_POINT 0x006E040C
14535 #define NV_089_POINT_V_FRACTION 0x00000FFF
14536 #define NV_089_POINT_V_INT 0x0000F000
14537 #define NV_089_POINT_V_VALUE 0x0000FFFF
14538 #define NV_089_POINT_U_FRACTION 0x000F0000
14539 #define NV_089_POINT_U_INT 0xFFF00000
14540 #define NV_089_POINT_U_VALUE 0xFFFFFFFF
14541 
14542 /* NV-Device NV_062 */
14543 #define NV_062 0x006D0000 /* size: 0x00001FFF */
14544 #define NV10_CONTEXT_SURFACES_2D 0x00000062
14545 
14546 /* NV-Register NV_062_NV10_CONTEXT_SURFACES_2D */
14547 #define NV_062_NV10_CONTEXT_SURFACES_2D 0x006D0000
14548 #define NV_062_NV10_CONTEXT_SURFACES_2D_HANDLE 0xFFFFFFFF
14549 
14550 /* NV-Register NV_062_NOP */
14551 #define NV_062_NOP 0x006D0100
14552 #define NV_062_NOP_PARAMETER 0xFFFFFFFF
14553 
14554 /* NV-Register NV_062_PM_TRIGGER */
14555 #define NV_062_PM_TRIGGER 0x006D0140
14556 #define NV_062_PM_TRIGGER_PARAMETER 0xFFFFFFFF
14557 
14558 /* NV-Register NV_062_NOTIFY */
14559 #define NV_062_NOTIFY 0x006D0104
14560 #define NV_062_NOTIFY_STYLE 0xFFFFFFFF
14561 #define NV_062_NOTIFY_STYLE_WRITE_ONLY 0x00000000
14562 #define NV_062_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001
14563 
14564 /* NV-Register NV_062_SET_NOTIFY */
14565 #define NV_062_SET_NOTIFY 0x006D0104
14566 #define NV_062_SET_NOTIFY_PARAMETER 0xFFFFFFFF
14567 #define NV_062_SET_NOTIFY_PARAMETER_WRITE 0x00000000
14568 
14569 /* NV-Register NV_062_WAIT_FOR_IDLE */
14570 #define NV_062_WAIT_FOR_IDLE 0x006D0108
14571 #define NV_062_WAIT_FOR_IDLE_PARAMETER 0xFFFFFFFF
14572 
14573 /* NV-Register NV_062_SET_CONTEXT_DMA_NOTIFY */
14574 #define NV_062_SET_CONTEXT_DMA_NOTIFY 0x006D0180
14575 #define NV_062_SET_CONTEXT_DMA_NOTIFY_PARAMETER 0xFFFFFFFF
14576 
14577 /* NV-Register NV_062_SET_CONTEXT_DMA_IMAGE_SOURCE */
14578 #define NV_062_SET_CONTEXT_DMA_IMAGE_SOURCE 0x006D0184
14579 #define NV_062_SET_CONTEXT_DMA_IMAGE_SOURCE_PARAMETER 0xFFFFFFFF
14580 
14581 /* NV-Register NV_062_SET_CONTEXT_DMA_IMAGE_DESTIN */
14582 #define NV_062_SET_CONTEXT_DMA_IMAGE_DESTIN 0x006D0188
14583 #define NV_062_SET_CONTEXT_DMA_IMAGE_DESTIN_PARAMETER 0xFFFFFFFF
14584 
14585 /* NV-Register NV_062_FMT */
14586 #define NV_062_FMT 0x006D0300
14587 #define NV_062_FMT_VALUE 0xFFFFFFFF
14588 #define NV_062_FMT_VALUE_LE_Y8 0x00000001
14589 #define NV_062_FMT_VALUE_LE_X1R5G5B5_Z1R5G5B5 0x00000002
14590 #define NV_062_FMT_VALUE_LE_X1R5G5B5_O1R5G5B5 0x00000003
14591 #define NV_062_FMT_VALUE_LE_R5G6B5 0x00000004
14592 #define NV_062_FMT_VALUE_LE_Y16 0x00000005
14593 #define NV_062_FMT_VALUE_LE_X8R8G8B8_Z8R8G8B8 0x00000006
14594 #define NV_062_FMT_VALUE_LE_X8R8G8B8_O8R8G8B8 0x00000007
14595 #define NV_062_FMT_VALUE_LE_X1A7R8G8B8_Z1A7R8G8B8 0x00000008
14596 #define NV_062_FMT_VALUE_LE_X1A7R8G8B8_O1A7R8G8B8 0x00000009
14597 #define NV_062_FMT_VALUE_LE_A8R8G8B8 0x0000000A
14598 #define NV_062_FMT_VALUE_LE_Y32 0x0000000B
14599 
14600 /* NV-Register NV_062_PITCH */
14601 #define NV_062_PITCH 0x006D0304
14602 #define NV_062_PITCH_SOURCE 0x0000FFFF
14603 #define NV_062_PITCH_DESTIN 0xFFFF0000
14604 
14605 /* NV-Register NV_062_OFFSET_SOURCE */
14606 #define NV_062_OFFSET_SOURCE 0x006D0308
14607 #define NV_062_OFFSET_SOURCE_LINADRS 0xFFFFFFFF
14608 #define NV_062_OFFSET_SOURCE_LINADRS_0 0x00000000
14609 
14610 /* NV-Register NV_062_OFFSET_DESTIN */
14611 #define NV_062_OFFSET_DESTIN 0x006D030C
14612 #define NV_062_OFFSET_DESTIN_LINADRS 0xFFFFFFFF
14613 #define NV_062_OFFSET_DESTIN_LINADRS_0 0x00000000
14614 
14615 /* NV-Device NV_07B */
14616 #define NV_07B 0x00530000 /* size: 0x00001FFF */
14617 #define NV10_TEXTURE_FROM_CPU 0x0000007B
14618 
14619 /* NV-Register NV_07B_NV10_TEXTURE_FROM_CPU */
14620 #define NV_07B_NV10_TEXTURE_FROM_CPU 0x00530000
14621 #define NV_07B_NV10_TEXTURE_FROM_CPU_HANDLE 0xFFFFFFFF
14622 
14623 /* NV-Register NV_07B_NOP */
14624 #define NV_07B_NOP 0x00530100
14625 #define NV_07B_NOP_PARAMETER 0xFFFFFFFF
14626 
14627 /* NV-Register NV_07B_PM_TRIGGER */
14628 #define NV_07B_PM_TRIGGER 0x00530140
14629 #define NV_07B_PM_TRIGGER_PARAMETER 0xFFFFFFFF
14630 
14631 /* NV-Register NV_07B_NOTIFY */
14632 #define NV_07B_NOTIFY 0x00530104
14633 #define NV_07B_NOTIFY_STYLE 0xFFFFFFFF
14634 #define NV_07B_NOTIFY_STYLE_WRITE_ONLY 0x00000000
14635 #define NV_07B_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001
14636 
14637 /* NV-Register NV_07B_SET_NOTIFY */
14638 #define NV_07B_SET_NOTIFY 0x00530104
14639 /* Alias NV_07B_NOTIFY */
14640 /* Alias NV_07B_NOTIFY */
14641 #define NV_07B_SET_NOTIFY_PARAMETER 0xFFFFFFFF
14642 #define NV_07B_SET_NOTIFY_PARAMETER_WRITE 0x00000000
14643 
14644 /* NV-Register NV_07B_WAIT_FOR_IDLE */
14645 #define NV_07B_WAIT_FOR_IDLE 0x00530108
14646 #define NV_07B_WAIT_FOR_IDLE_PARAMETER 0xFFFFFFFF
14647 
14648 /* NV-Register NV_07B_SET_CONTEXT_DMA_NOTIFY */
14649 #define NV_07B_SET_CONTEXT_DMA_NOTIFY 0x00530180
14650 #define NV_07B_SET_CONTEXT_DMA_NOTIFY_PARAMETER 0xFFFFFFFF
14651 
14652 /* NV-Register NV_07B_SET_CONTEXT_SURFACE */
14653 #define NV_07B_SET_CONTEXT_SURFACE 0x00530184
14654 #define NV_07B_SET_CONTEXT_SURFACE_PARAMETER 0xFFFFFFFF
14655 
14656 /* NV-Register NV_07B_SET_COLOR_FORMAT */
14657 #define NV_07B_SET_COLOR_FORMAT 0x00530300
14658 #define NV_07B_SET_COLOR_FORMAT_LE 0xFFFFFFFF
14659 #define NV_07B_SET_COLOR_FORMAT_LE_R5G6B5 0x00000001
14660 #define NV_07B_SET_COLOR_FORMAT_LE_A1R5G5B5 0x00000002
14661 #define NV_07B_SET_COLOR_FORMAT_LE_X1R5G5B5 0x00000003
14662 #define NV_07B_SET_COLOR_FORMAT_LE_A8R8G8B8 0x00000004
14663 #define NV_07B_SET_COLOR_FORMAT_LE_X8R8G8B8 0x00000005
14664 
14665 /* NV-Register NV_07B_POINT */
14666 #define NV_07B_POINT 0x00530304
14667 #define NV_07B_POINT_X 0x0000FFFF
14668 #define NV_07B_POINT_Y 0xFFFF0000
14669 
14670 /* NV-Register NV_07B_SIZE */
14671 #define NV_07B_SIZE 0x00530308
14672 #define NV_07B_SIZE_WIDTH 0x0000FFFF
14673 #define NV_07B_SIZE_HEIGHT 0xFFFF0000
14674 
14675 /* NV-Register NV_07B_CLIP_HORIZONTAL */
14676 #define NV_07B_CLIP_HORIZONTAL 0x0053030C
14677 #define NV_07B_CLIP_HORIZONTAL_X 0x0000FFFF
14678 #define NV_07B_CLIP_HORIZONTAL_WIDTH 0xFFFF0000
14679 
14680 /* NV-Register NV_07B_CLIP_VERTICAL */
14681 #define NV_07B_CLIP_VERTICAL 0x00530310
14682 #define NV_07B_CLIP_VERTICAL_Y 0x0000FFFF
14683 #define NV_07B_CLIP_VERTICAL_HEIGHT 0xFFFF0000
14684 
14685 /* NV-Array NV_07B_COLORA (8 byte access) */
14686 #define NV_07B_COLORA 0x00530400
14687 /* NV-Array size NV_07B_COLORA__SIZE_1 [0..895] */
14688 #define NV_07B_COLORA__SIZE_1 0x00000380
14689 #define NV_07B_COLOR_VALUE 0xFFFFFFFF
14690 
14691 /* NV-Array NV_07B_COLORB (8 byte access) */
14692 #define NV_07B_COLORB 0x00530404
14693 /* NV-Array size NV_07B_COLORB__SIZE_1 [0..895] */
14694 #define NV_07B_COLORB__SIZE_1 0x00000380
14695 #define NV_07B_COLORB_VALUE 0xFFFFFFFF
14696 
14697 /* NV-Device NV_09F */
14698 #define NV_09F 0x00500000 /* size: 0x00001FFF */
14699 #define NV12_IMAGE_BLIT 0x0000009F
14700 
14701 /* NV-Register NV_09F_NV12_IMAGE_BLIT */
14702 #define NV_09F_NV12_IMAGE_BLIT 0x00500000
14703 #define NV_09F_NV12_IMAGE_BLIT_HANDLE 0xFFFFFFFF
14704 
14705 /* NV-Register NV_09F_NOP */
14706 #define NV_09F_NOP 0x00500100
14707 #define NV_09F_NOP_PARAMETER 0xFFFFFFFF
14708 
14709 /* NV-Register NV_09F_NOTIFY */
14710 #define NV_09F_NOTIFY 0x00500104
14711 #define NV_09F_NOTIFY_STYLE 0xFFFFFFFF
14712 #define NV_09F_NOTIFY_STYLE_WRITE_ONLY 0x00000000
14713 #define NV_09F_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001
14714 
14715 /* NV-Register NV_09F_SET_NOTIFY */
14716 #define NV_09F_SET_NOTIFY 0x00500104
14717 /* Alias NV_09F_NOTIFY */
14718 /* Alias NV_09F_NOTIFY */
14719 #define NV_09F_SET_NOTIFY_PARAMETER 0xFFFFFFFF
14720 #define NV_09F_SET_NOTIFY_PARAMETER_WRITE 0x00000000
14721 
14722 /* NV-Register NV_09F_WAIT_FOR_IDLE */
14723 #define NV_09F_WAIT_FOR_IDLE 0x00500108
14724 #define NV_09F_WAIT_FOR_IDLE_PARAMETER 0xFFFFFFFF
14725 
14726 /* NV-Register NV_09F_WAIT_FOR_CRTC */
14727 #define NV_09F_WAIT_FOR_CRTC 0x0050010C
14728 #define NV_09F_WAIT_FOR_CRTC_PARAMETER 0xFFFFFFFF
14729 
14730 /* NV-Register NV_09F_SET_CONTEXT_DMA_NOTIFY */
14731 #define NV_09F_SET_CONTEXT_DMA_NOTIFY 0x00500180
14732 #define NV_09F_SET_CONTEXT_DMA_NOTIFY_PARAMETER 0xFFFFFFFF
14733 
14734 /* NV-Register NV_09F_SET_CONTEXT_COLOR_KEY */
14735 #define NV_09F_SET_CONTEXT_COLOR_KEY 0x00500184
14736 #define NV_09F_SET_CONTEXT_COLOR_KEY_PARAMETER 0xFFFFFFFF
14737 
14738 /* NV-Register NV_09F_SET_CONTEXT_CLIP_RECTANGLE */
14739 #define NV_09F_SET_CONTEXT_CLIP_RECTANGLE 0x00500188
14740 #define NV_09F_SET_CONTEXT_CLIP_RECTANGLE_PARAMETER 0xFFFFFFFF
14741 
14742 /* NV-Register NV_09F_SET_CONTEXT_PATTERN */
14743 #define NV_09F_SET_CONTEXT_PATTERN 0x0050018C
14744 #define NV_09F_SET_CONTEXT_PATTERN_PARAMETER 0xFFFFFFFF
14745 
14746 /* NV-Register NV_09F_SET_CONTEXT_ROP */
14747 #define NV_09F_SET_CONTEXT_ROP 0x00500190
14748 #define NV_09F_SET_CONTEXT_ROP_PARAMETER 0xFFFFFFFF
14749 
14750 /* NV-Register NV_09F_SET_CONTEXT_BETA1 */
14751 #define NV_09F_SET_CONTEXT_BETA1 0x00500194
14752 #define NV_09F_SET_CONTEXT_BETA1_PARAMETER 0xFFFFFFFF
14753 
14754 /* NV-Register NV_09F_SET_CONTEXT_BETA4 */
14755 #define NV_09F_SET_CONTEXT_BETA4 0x00500198
14756 #define NV_09F_SET_CONTEXT_BETA4_PARAMETER 0xFFFFFFFF
14757 
14758 /* NV-Register NV_09F_SET_CONTEXT_SURFACE */
14759 #define NV_09F_SET_CONTEXT_SURFACE 0x0050019C
14760 #define NV_09F_SET_CONTEXT_SURFACE_PARAMETER 0xFFFFFFFF
14761 
14762 /* NV-Register NV_09F_SET_OPERATION */
14763 #define NV_09F_SET_OPERATION 0x005002FC
14764 #define NV_09F_SET_OPERATION_MODE 0xFFFFFFFF
14765 #define NV_09F_SET_OPERATION_MODE_SRCCOPY_AND 0x00000000
14766 #define NV_09F_SET_OPERATION_MODE_ROP_AND 0x00000001
14767 #define NV_09F_SET_OPERATION_MODE_BLEND_AND 0x00000002
14768 #define NV_09F_SET_OPERATION_MODE_SRCCOPY 0x00000003
14769 #define NV_09F_SET_OPERATION_MODE_SRCCOPY_PREMULT 0x00000004
14770 #define NV_09F_SET_OPERATION_MODE_BLEND_PREMULT 0x00000005
14771 
14772 /* NV-Register NV_09F_POINT_IN */
14773 #define NV_09F_POINT_IN 0x00500300
14774 #define NV_09F_POINT_IN_X 0x0000FFFF
14775 #define NV_09F_POINT_IN_Y 0xFFFF0000
14776 
14777 /* NV-Register NV_09F_POINT_OUT */
14778 #define NV_09F_POINT_OUT 0x00500304
14779 #define NV_09F_POINT_OUT_X 0x0000FFFF
14780 #define NV_09F_POINT_OUT_Y 0xFFFF0000
14781 
14782 /* NV-Register NV_09F_SIZE */
14783 #define NV_09F_SIZE 0x00500308
14784 #define NV_09F_SIZE_WIDTH 0x0000FFFF
14785 #define NV_09F_SIZE_HEIGHT 0xFFFF0000
14786 
14787 /* NV-Device NV_064 */
14788 #define NV_064 0x00640000 /* size: 0x00001FFF */
14789 #define NV1_IMAGE_SRCCOPY_AND 0x00640000
14790 
14791 /* NV-Register NV_064_NV1_IMAGE_SRCCOPY_AND */
14792 #define NV_064_NV1_IMAGE_SRCCOPY_AND 0x00640000
14793 
14794 /* NV-Register NV_064_NOP */
14795 #define NV_064_NOP 0x00640100
14796 #define NV_064_NOP_PARAMETER 0xFFFFFFFF
14797 
14798 /* NV-Register NV_064_NOTIFY */
14799 #define NV_064_NOTIFY 0x00640104
14800 #define NV_064_NOTIFY_STYLE 0xFFFFFFFF
14801 #define NV_064_NOTIFY_STYLE_WRITE_ONLY 0x00000000
14802 #define NV_064_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001
14803 /* Alias NV_064_SET_NOTIFY */
14804 /* Alias NV_064_SET_NOTIFY */
14805 #define NV_064_SET_NOTIFY_PARAMETER 0xFFFFFFFF
14806 #define NV_064_SET_NOTIFY_PARAMETER_WRITE 0x00000000
14807 
14808 /* NV-Register NV_064_SET_CONTEXT_DMA_NOTIFY */
14809 #define NV_064_SET_CONTEXT_DMA_NOTIFY 0x00640180
14810 #define NV_064_SET_CONTEXT_DMA_NOTIFY_PARAMETER 0xFFFFFFFF
14811 
14812 /* NV-Register NV_064_SET_IMAGE_OUTPUT */
14813 #define NV_064_SET_IMAGE_OUTPUT 0x00640200
14814 #define NV_064_SET_IMAGE_OUTPUT_PARAMETER 0xFFFFFFFF
14815 
14816 /* NV-Register NV_064_SET_IMAGE_INPUT */
14817 #define NV_064_SET_IMAGE_INPUT 0x00640204
14818 #define NV_064_SET_IMAGE_INPUT_PARAMETER 0xFFFFFFFF
14819 
14820 /* NV-Device NV_01C */
14821 #define NV_01C 0x006A0000 /* size: 0x00001FFF */
14822 #define NV1_RENDER_SOLID_LIN 0x0000001C
14823 
14824 /* NV-Register NV_01C_CTX_SWITCH */
14825 #define NV_01C_CTX_SWITCH 0x006A0000
14826 #define NV_01C_CTX_SWITCH_INSTANCE 0x0000FFFF
14827 #define NV_01C_CTX_SWITCH_CHID 0x007F0000
14828 #define NV_01C_CTX_SWITCH_VOLATILE 0x80000000
14829 #define NV_01C_CTX_SWITCH_VOLATILE_IGNORE 0x7FFFFFFF
14830 #define NV_01C_CTX_SWITCH_VOLATILE_RESET 0x80000000
14831 
14832 /* NV-Register NV_01C_NOP */
14833 #define NV_01C_NOP 0x006A0100
14834 #define NV_01C_NOP_PARAMETER 0xFFFFFFFF
14835 
14836 /* NV-Register NV_01C_NOTIFY */
14837 #define NV_01C_NOTIFY 0x006A0104
14838 #define NV_01C_NOTIFY_STYLE 0xFFFFFFFF
14839 #define NV_01C_NOTIFY_STYLE_WRITE_ONLY 0x00000000
14840 #define NV_01C_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001
14841 
14842 /* NV-Register NV_01C_SET_NOTIFY */
14843 #define NV_01C_SET_NOTIFY 0x006A0104
14844 /* Alias NV_01C_NOTIFY */
14845 /* Alias NV_01C_NOTIFY */
14846 #define NV_01C_SET_NOTIFY_PARAMETER 0xFFFFFFFF
14847 #define NV_01C_SET_NOTIFY_PARAMETER_WRITE 0x00000000
14848 
14849 /* NV-Register NV_01C_SET_PATCH */
14850 #define NV_01C_SET_PATCH 0x006A010C
14851 #define NV_01C_SET_PATCH_PARAMETER 0xFFFFFFFF
14852 #define NV_01C_SET_PATCH_PARAMETER_INVALIDATE 0x00000000
14853 #define NV_01C_SET_PATCH_PARAMETER_VALIDATE 0x00000001
14854 
14855 /* NV-Register NV_01C_SET_CONTEXT_DMA_NOTIFY */
14856 #define NV_01C_SET_CONTEXT_DMA_NOTIFY 0x006A0180
14857 #define NV_01C_SET_CONTEXT_DMA_NOTIFY_PARAMETER 0xFFFFFFFF
14858 
14859 /* NV-Register NV_01C_SET_IMAGE_OUTPUT */
14860 #define NV_01C_SET_IMAGE_OUTPUT 0x006A0200
14861 #define NV_01C_SET_IMAGE_OUTPUT_PARAMETER 0xFFFFFFFF
14862 
14863 /* NV-Register NV_01C_SET_COLOR_FORMAT */
14864 #define NV_01C_SET_COLOR_FORMAT 0x006A0300
14865 #define NV_01C_SET_COLOR_FORMAT_LE 0xFFFFFFFF
14866 #define NV_01C_SET_COLOR_FORMAT_LE_X24Y8 0x00000001
14867 #define NV_01C_SET_COLOR_FORMAT_LE_X17R5G5B5 0x00000002
14868 #define NV_01C_SET_COLOR_FORMAT_LE_X8R8G8B8 0x00000003
14869 #define NV_01C_SET_COLOR_FORMAT_LE_X16Y16 0x00000004
14870 
14871 /* NV-Register NV_01C_COLOR */
14872 #define NV_01C_COLOR 0x006A0304
14873 #define NV_01C_COLOR_VALUE 0xFFFFFFFF
14874 
14875 /* NV-Array NV_01C_LIN_0 (8 byte access) */
14876 #define NV_01C_LIN_0 0x006A0400
14877 /* NV-Array size NV_01C_LIN_0__SIZE_1 [0..15] */
14878 #define NV_01C_LIN_0__SIZE_1 0x00000010
14879 #define NV_01C_LIN_0_X 0x0000FFFF
14880 #define NV_01C_LIN_0_Y 0xFFFF0000
14881 
14882 /* NV-Array NV_01C_LIN_1 (8 byte access) */
14883 #define NV_01C_LIN_1 0x006A0404
14884 /* NV-Array size NV_01C_LIN_1__SIZE_1 [0..15] */
14885 #define NV_01C_LIN_1__SIZE_1 0x00000010
14886 #define NV_01C_LIN_1_X 0x0000FFFF
14887 #define NV_01C_LIN_1_Y 0xFFFF0000
14888 
14889 /* NV-Array NV_01C_LIN32_0 (16 byte access) */
14890 #define NV_01C_LIN32_0 0x006A0480
14891 /* NV-Array size NV_01C_LIN32_0__SIZE_1 [0..7] */
14892 #define NV_01C_LIN32_0__SIZE_1 0x00000008
14893 #define NV_01C_LIN32_0_X 0xFFFFFFFF
14894 
14895 /* NV-Array NV_01C_LIN32_1 (16 byte access) */
14896 #define NV_01C_LIN32_1 0x006A0484
14897 /* NV-Array size NV_01C_LIN32_1__SIZE_1 [0..7] */
14898 #define NV_01C_LIN32_1__SIZE_1 0x00000008
14899 #define NV_01C_LIN32_1_Y 0xFFFFFFFF
14900 
14901 /* NV-Array NV_01C_LIN32_2 (16 byte access) */
14902 #define NV_01C_LIN32_2 0x006A0488
14903 /* NV-Array size NV_01C_LIN32_2__SIZE_1 [0..7] */
14904 #define NV_01C_LIN32_2__SIZE_1 0x00000008
14905 #define NV_01C_LIN32_2_X 0xFFFFFFFF
14906 
14907 /* NV-Array NV_01C_LIN32_3 (16 byte access) */
14908 #define NV_01C_LIN32_3 0x006A048C
14909 /* NV-Array size NV_01C_LIN32_3__SIZE_1 [0..7] */
14910 #define NV_01C_LIN32_3__SIZE_1 0x00000008
14911 #define NV_01C_LIN32_3_Y 0xFFFFFFFF
14912 
14913 /* NV-Array NV_01C_POLYLIN (4 byte access) */
14914 #define NV_01C_POLYLIN 0x006A0500
14915 /* NV-Array size NV_01C_POLYLIN__SIZE_1 [0..31] */
14916 #define NV_01C_POLYLIN__SIZE_1 0x00000020
14917 #define NV_01C_POLYLIN_X 0x0000FFFF
14918 #define NV_01C_POLYLIN_Y 0xFFFF0000
14919 
14920 /* NV-Array NV_01C_POLYLIN32_0 (8 byte access) */
14921 #define NV_01C_POLYLIN32_0 0x006A0580
14922 /* NV-Array size NV_01C_POLYLIN32_0__SIZE_1 [0..15] */
14923 #define NV_01C_POLYLIN32_0__SIZE_1 0x00000010
14924 #define NV_01C_POLYLIN32_0_X 0xFFFFFFFF
14925 
14926 /* NV-Array NV_01C_POLYLIN32_1 (8 byte access) */
14927 #define NV_01C_POLYLIN32_1 0x006A0584
14928 /* NV-Array size NV_01C_POLYLIN32_1__SIZE_1 [0..15] */
14929 #define NV_01C_POLYLIN32_1__SIZE_1 0x00000010
14930 #define NV_01C_POLYLIN32_1_Y 0xFFFFFFFF
14931 
14932 /* NV-Array NV_01C_CPOLYLIN_0 (8 byte access) */
14933 #define NV_01C_CPOLYLIN_0 0x006A0600
14934 /* NV-Array size NV_01C_CPOLYLIN_0__SIZE_1 [0..15] */
14935 #define NV_01C_CPOLYLIN_0__SIZE_1 0x00000010
14936 #define NV_01C_CPOLYLIN_0_COLOR 0xFFFFFFFF
14937 
14938 /* NV-Array NV_01C_CPOLYLIN_1 (8 byte access) */
14939 #define NV_01C_CPOLYLIN_1 0x006A0604
14940 /* NV-Array size NV_01C_CPOLYLIN_1__SIZE_1 [0..15] */
14941 #define NV_01C_CPOLYLIN_1__SIZE_1 0x00000010
14942 #define NV_01C_CPOLYLIN_1_X 0x0000FFFF
14943 #define NV_01C_CPOLYLIN_1_Y 0xFFFF0000
14944 
14945 /* NV-Device NV_04B */
14946 #define NV_04B 0x006B0000 /* size: 0x00001FFF */
14947 #define NV3_GDI_RECTANGLE_TEXT 0x004B0000
14948 
14949 /* NV-Register NV_04B_NV3_GDI_RECTANGLE_TEXT */
14950 #define NV_04B_NV3_GDI_RECTANGLE_TEXT 0x006B0000
14951 
14952 /* NV-Register NV_04B_NOP */
14953 #define NV_04B_NOP 0x006B0100
14954 #define NV_04B_NOP_PARAMETER 0xFFFFFFFF
14955 
14956 /* NV-Register NV_04B_NOTIFY */
14957 #define NV_04B_NOTIFY 0x006B0104
14958 #define NV_04B_NOTIFY_STYLE 0xFFFFFFFF
14959 #define NV_04B_NOTIFY_STYLE_WRITE_ONLY 0x00000000
14960 #define NV_04B_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001
14961 
14962 /* NV-Register NV_04B_SET_PATCH */
14963 #define NV_04B_SET_PATCH 0x006B010C
14964 #define NV_04B_SET_PATCH_PARAMETER 0xFFFFFFFF
14965 #define NV_04B_SET_PATCH_PARAMETER_INVALIDATE 0x00000000
14966 #define NV_04B_SET_PATCH_PARAMETER_VALIDATE 0x00000001
14967 
14968 /* NV-Register NV_04B_SET_CONTEXT_DMA_NOTIFY */
14969 #define NV_04B_SET_CONTEXT_DMA_NOTIFY 0x006B0180
14970 #define NV_04B_SET_CONTEXT_DMA_NOTIFY_PARAMETER 0xFFFFFFFF
14971 
14972 /* NV-Register NV_04B_SET_IMAGE_OUTPUT */
14973 #define NV_04B_SET_IMAGE_OUTPUT 0x006B0200
14974 #define NV_04B_SET_IMAGE_OUTPUT_PARAMETER 0xFFFFFFFF
14975 
14976 /* NV-Register NV_04B_SET_COLOR_FORMAT */
14977 #define NV_04B_SET_COLOR_FORMAT 0x006B0300
14978 #define NV_04B_SET_COLOR_FORMAT_LE 0xFFFFFFFF
14979 #define NV_04B_SET_COLOR_FORMAT_LE_X24Y8 0x00000001
14980 #define NV_04B_SET_COLOR_FORMAT_LE_X17R5G5B5 0x00000002
14981 #define NV_04B_SET_COLOR_FORMAT_LE_X8R8G8B8 0x00000003
14982 
14983 /* NV-Register NV_04B_SET_MONOCHROME_FORMAT */
14984 #define NV_04B_SET_MONOCHROME_FORMAT 0x006B0304
14985 #define NV_04B_SET_MONOCHROME_FORMAT_VALUE 0xFFFFFFFF
14986 #define NV_04B_SET_MONOCHROME_FORMAT_VALUE_CGA6_M1 0x00000001
14987 #define NV_04B_SET_MONOCHROME_FORMAT_VALUE_LE_M1 0x00000002
14988 
14989 /* NV-Register NV_04B_COLOR1_A */
14990 #define NV_04B_COLOR1_A 0x006B03FC
14991 #define NV_04B_COLOR1_A_VALUE 0xFFFFFFFF
14992 
14993 /* NV-Array NV_04B_UNCLIPPED_RECTANGLE_POINT (8 byte access) */
14994 #define NV_04B_UNCLIPPED_RECTANGLE_POINT 0x006B0400
14995 /* NV-Array size NV_04B_UNCLIPPED_RECTANGLE_POINT__SIZE_1 [0..63] */
14996 #define NV_04B_UNCLIPPED_RECTANGLE_POINT__SIZE_1 0x00000040
14997 #define NV_04B_UNCLIPPED_RECTANGLE_POINT_Y 0x0000FFFF
14998 #define NV_04B_UNCLIPPED_RECTANGLE_POINT_X 0xFFFF0000
14999 
15000 /* NV-Array NV_04B_UNCLIPPED_RECTANGLE_SIZE (8 byte access) */
15001 #define NV_04B_UNCLIPPED_RECTANGLE_SIZE 0x006B0404
15002 /* NV-Array size NV_04B_UNCLIPPED_RECTANGLE_SIZE__SIZE_1 [0..63] */
15003 #define NV_04B_UNCLIPPED_RECTANGLE_SIZE__SIZE_1 0x00000040
15004 #define NV_04B_UNCLIPPED_RECTANGLE_SIZE_HEIGHT 0x0000FFFF
15005 #define NV_04B_UNCLIPPED_RECTANGLE_SIZE_WIDTH 0xFFFF0000
15006 
15007 /* NV-Register NV_04B_CLIP_B_POINT0 */
15008 #define NV_04B_CLIP_B_POINT0 0x006B07F4
15009 #define NV_04B_CLIP_B_POINT0_LEFT 0x0000FFFF
15010 #define NV_04B_CLIP_B_POINT0_TOP 0xFFFF0000
15011 
15012 /* NV-Register NV_04B_CLIP_B_POINT1 */
15013 #define NV_04B_CLIP_B_POINT1 0x006B07F8
15014 #define NV_04B_CLIP_B_POINT1_RIGHT 0x0000FFFF
15015 #define NV_04B_CLIP_B_POINT1_BOTTOM 0xFFFF0000
15016 
15017 /* NV-Register NV_04B_COLOR1_B */
15018 #define NV_04B_COLOR1_B 0x006B07FC
15019 #define NV_04B_COLOR1_B_VALUE 0xFFFFFFFF
15020 
15021 /* NV-Array NV_04B_CLIPPED_RECTANGLE_POINT_0 (8 byte access) */
15022 #define NV_04B_CLIPPED_RECTANGLE_POINT_0 0x006B0800
15023 /* NV-Array size NV_04B_CLIPPED_RECTANGLE_POINT_0__SIZE_1 [0..63] */
15024 #define NV_04B_CLIPPED_RECTANGLE_POINT_0__SIZE_1 0x00000040
15025 #define NV_04B_CLIPPED_RECTANGLE_POINT_0_LEFT 0x0000FFFF
15026 #define NV_04B_CLIPPED_RECTANGLE_POINT_0_TOP 0xFFFF0000
15027 
15028 /* NV-Array NV_04B_CLIPPED_RECTANGLE_POINT_1 (8 byte access) */
15029 #define NV_04B_CLIPPED_RECTANGLE_POINT_1 0x006B0804
15030 /* NV-Array size NV_04B_CLIPPED_RECTANGLE_POINT_1__SIZE_1 [0..63] */
15031 #define NV_04B_CLIPPED_RECTANGLE_POINT_1__SIZE_1 0x00000040
15032 #define NV_04B_CLIPPED_RECTANGLE_POINT_1_RIGHT 0x0000FFFF
15033 #define NV_04B_CLIPPED_RECTANGLE_POINT_1_BOTTOM 0xFFFF0000
15034 
15035 /* NV-Register NV_04B_CLIP_C_POINT0 */
15036 #define NV_04B_CLIP_C_POINT0 0x006B0BEC
15037 #define NV_04B_CLIP_C_POINT0_LEFT 0x0000FFFF
15038 #define NV_04B_CLIP_C_POINT0_TOP 0xFFFF0000
15039 
15040 /* NV-Register NV_04B_CLIP_C_POINT1 */
15041 #define NV_04B_CLIP_C_POINT1 0x006B0BF0
15042 #define NV_04B_CLIP_C_POINT1_RIGHT 0x0000FFFF
15043 #define NV_04B_CLIP_C_POINT1_BOTTOM 0xFFFF0000
15044 
15045 /* NV-Register NV_04B_COLOR1_C */
15046 #define NV_04B_COLOR1_C 0x006B0BF4
15047 #define NV_04B_COLOR1_C_VALUE 0xFFFFFFFF
15048 
15049 /* NV-Register NV_04B_SIZE_C */
15050 #define NV_04B_SIZE_C 0x006B0BF8
15051 #define NV_04B_SIZE_C_WIDTH 0x0000FFFF
15052 #define NV_04B_SIZE_C_HEIGHT 0xFFFF0000
15053 
15054 /* NV-Register NV_04B_POINT_C */
15055 #define NV_04B_POINT_C 0x006B0BFC
15056 #define NV_04B_POINT_C_X 0x0000FFFF
15057 #define NV_04B_POINT_C_Y 0xFFFF0000
15058 
15059 /* NV-Array NV_04B_MONOCHROME_COLOR1_C (4 byte access) */
15060 #define NV_04B_MONOCHROME_COLOR1_C 0x006B0C00
15061 /* NV-Array size NV_04B_MONOCHROME_COLOR1_C__SIZE_1 [0..127] */
15062 #define NV_04B_MONOCHROME_COLOR1_C__SIZE_1 0x00000080
15063 #define NV_04B_MONOCHROME_COLOR1_C_BITMAP 0xFFFFFFFF
15064 
15065 /* NV-Register NV_04B_CLIP_D_POINT0 */
15066 #define NV_04B_CLIP_D_POINT0 0x006B0FE8
15067 #define NV_04B_CLIP_D_POINT0_LEFT 0x0000FFFF
15068 #define NV_04B_CLIP_D_POINT0_TOP 0xFFFF0000
15069 
15070 /* NV-Register NV_04B_CLIP_D_POINT1 */
15071 #define NV_04B_CLIP_D_POINT1 0x006B0FEC
15072 #define NV_04B_CLIP_D_POINT1_RIGHT 0x0000FFFF
15073 #define NV_04B_CLIP_D_POINT1_BOTTOM 0xFFFF0000
15074 
15075 /* NV-Register NV_04B_COLOR1_D */
15076 #define NV_04B_COLOR1_D 0x006B0FF0
15077 #define NV_04B_COLOR1_D_VALUE 0xFFFFFFFF
15078 
15079 /* NV-Register NV_04B_SIZE_IN_D */
15080 #define NV_04B_SIZE_IN_D 0x006B0FF4
15081 #define NV_04B_SIZE_IN_D_WIDTH 0x0000FFFF
15082 #define NV_04B_SIZE_IN_D_HEIGHT 0xFFFF0000
15083 
15084 /* NV-Register NV_04B_SIZE_OUT_D */
15085 #define NV_04B_SIZE_OUT_D 0x006B0FF8
15086 #define NV_04B_SIZE_OUT_D_WIDTH 0x0000FFFF
15087 #define NV_04B_SIZE_OUT_D_HEIGHT 0xFFFF0000
15088 
15089 /* NV-Register NV_04B_POINT_D */
15090 #define NV_04B_POINT_D 0x006B0FFC
15091 #define NV_04B_POINT_D_X 0x0000FFFF
15092 #define NV_04B_POINT_D_Y 0xFFFF0000
15093 
15094 /* NV-Array NV_04B_MONOCHROME_COLOR1_D (4 byte access) */
15095 #define NV_04B_MONOCHROME_COLOR1_D 0x006B1000
15096 /* NV-Array size NV_04B_MONOCHROME_COLOR1_D__SIZE_1 [0..127] */
15097 #define NV_04B_MONOCHROME_COLOR1_D__SIZE_1 0x00000080
15098 #define NV_04B_MONOCHROME_COLOR1_D_BITMAP 0xFFFFFFFF
15099 
15100 /* NV-Register NV_04B_CLIP_E_POINT0 */
15101 #define NV_04B_CLIP_E_POINT0 0x006B13E4
15102 #define NV_04B_CLIP_E_POINT0_LEFT 0x0000FFFF
15103 #define NV_04B_CLIP_E_POINT0_TOP 0xFFFF0000
15104 
15105 /* NV-Register NV_04B_CLIP_E_POINT1 */
15106 #define NV_04B_CLIP_E_POINT1 0x006B13E8
15107 #define NV_04B_CLIP_E_POINT1_RIGHT 0x0000FFFF
15108 #define NV_04B_CLIP_E_POINT1_BOTTOM 0xFFFF0000
15109 
15110 /* NV-Register NV_04B_COLOR0_E */
15111 #define NV_04B_COLOR0_E 0x006B13EC
15112 #define NV_04B_COLOR0_E_VALUE 0xFFFFFFFF
15113 
15114 /* NV-Register NV_04B_COLOR1_E */
15115 #define NV_04B_COLOR1_E 0x006B13F0
15116 #define NV_04B_COLOR1_E_VALUE 0xFFFFFFFF
15117 
15118 /* NV-Register NV_04B_SIZE_IN_E */
15119 #define NV_04B_SIZE_IN_E 0x006B13F4
15120 #define NV_04B_SIZE_IN_E_WIDTH 0x0000FFFF
15121 #define NV_04B_SIZE_IN_E_HEIGHT 0xFFFF0000
15122 
15123 /* NV-Register NV_04B_SIZE_OUT_E */
15124 #define NV_04B_SIZE_OUT_E 0x006B13F8
15125 #define NV_04B_SIZE_OUT_E_WIDTH 0x0000FFFF
15126 #define NV_04B_SIZE_OUT_E_HEIGHT 0xFFFF0000
15127 
15128 /* NV-Register NV_04B_POINT_E */
15129 #define NV_04B_POINT_E 0x006B13FC
15130 #define NV_04B_POINT_E_X 0x0000FFFF
15131 #define NV_04B_POINT_E_Y 0xFFFF0000
15132 
15133 /* NV-Array NV_04B_MONOCHROME_COLOR01_E (4 byte access) */
15134 #define NV_04B_MONOCHROME_COLOR01_E 0x006B1400
15135 /* NV-Array size NV_04B_MONOCHROME_COLOR01_E__SIZE_1 [0..127] */
15136 #define NV_04B_MONOCHROME_COLOR01_E__SIZE_1 0x00000080
15137 #define NV_04B_MONOCHROME_COLOR01_E_BITMAP 0xFFFFFFFF
15138 
15139 /* NV-Device NV_065 */
15140 #define NV_065 0x00650000 /* size: 0x00001FFF */
15141 #define NV3_IMAGE_SRCCOPY 0x00000065
15142 
15143 /* NV-Register NV_065_NV3_IMAGE_SRCCOPY */
15144 #define NV_065_NV3_IMAGE_SRCCOPY 0x00650000
15145 
15146 /* NV-Register NV_065_NOP */
15147 #define NV_065_NOP 0x00650100
15148 #define NV_065_NOP_PARAMETER 0xFFFFFFFF
15149 
15150 /* NV-Register NV_065_NOTIFY */
15151 #define NV_065_NOTIFY 0x00650104
15152 #define NV_065_NOTIFY_STYLE 0xFFFFFFFF
15153 #define NV_065_NOTIFY_STYLE_WRITE_ONLY 0x00000000
15154 #define NV_065_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001
15155 /* Alias NV_065_SET_NOTIFY */
15156 /* Alias NV_065_SET_NOTIFY */
15157 #define NV_065_SET_NOTIFY_PARAMETER 0xFFFFFFFF
15158 #define NV_065_SET_NOTIFY_PARAMETER_WRITE 0x00000000
15159 
15160 /* NV-Register NV_065_SET_CONTEXT_DMA_NOTIFY */
15161 #define NV_065_SET_CONTEXT_DMA_NOTIFY 0x00650180
15162 #define NV_065_SET_CONTEXT_DMA_NOTIFY_PARAMETER 0xFFFFFFFF
15163 
15164 /* NV-Register NV_065_SET_IMAGE_OUTPUT */
15165 #define NV_065_SET_IMAGE_OUTPUT 0x00650200
15166 #define NV_065_SET_IMAGE_OUTPUT_PARAMETER 0xFFFFFFFF
15167 
15168 /* NV-Register NV_065_SET_IMAGE_INPUT */
15169 #define NV_065_SET_IMAGE_INPUT 0x00650204
15170 #define NV_065_SET_IMAGE_INPUT_PARAMETER 0xFFFFFFFF
15171 
15172 /* NV-Device NV_UINMEM */
15173 #define NV_UINMEM 0x005C0000 /* size: 0x00001FFF */
15174 #define NV3_SURFACE_0 0x00000058
15175 #define NV3_SURFACE_1 0x00000059
15176 #define NV3_SURFACE_2 0x0000005A
15177 #define NV3_SURFACE_3 0x0000005B
15178 
15179 /* NV-Register NV_UINMEM_CTX_SWITCH */
15180 #define NV_UINMEM_CTX_SWITCH 0x005C0000
15181 #define NV_UINMEM_CTX_SWITCH_INSTANCE 0x0000FFFF
15182 #define NV_UINMEM_CTX_SWITCH_CHID 0x007F0000
15183 #define NV_UINMEM_CTX_SWITCH_VOLATILE 0x80000000
15184 #define NV_UINMEM_CTX_SWITCH_VOLATILE_IGNORE 0x7FFFFFFF
15185 #define NV_UINMEM_CTX_SWITCH_VOLATILE_RESET 0x80000000
15186 
15187 /* NV-Register NV_UINMEM_NOP */
15188 #define NV_UINMEM_NOP 0x005C0100
15189 #define NV_UINMEM_NOP_PARAMETER 0xFFFFFFFF
15190 
15191 /* NV-Register NV_UINMEM_NOTIFY */
15192 #define NV_UINMEM_NOTIFY 0x005C0104
15193 #define NV_UINMEM_NOTIFY_STYLE 0xFFFFFFFF
15194 #define NV_UINMEM_NOTIFY_STYLE_WRITE_ONLY 0x00000000
15195 #define NV_UINMEM_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001
15196 
15197 /* NV-Register NV_UINMEM_SET_NOTIFY */
15198 #define NV_UINMEM_SET_NOTIFY 0x005C0104
15199 /* Alias NV_UINMEM_NOTIFY */
15200 /* Alias NV_UINMEM_NOTIFY */
15201 #define NV_UINMEM_SET_NOTIFY_PARAMETER 0xFFFFFFFF
15202 #define NV_UINMEM_SET_NOTIFY_PARAMETER_WRITE 0x00000000
15203 
15204 /* NV-Register NV_UINMEM_SET_CONTEXT_DMA_NOTIFY */
15205 #define NV_UINMEM_SET_CONTEXT_DMA_NOTIFY 0x005C0180
15206 #define NV_UINMEM_SET_CONTEXT_DMA_NOTIFY_PARAMETER 0xFFFFFFFF
15207 
15208 /* NV-Register NV_UINMEM_SET_CONTEXT_DMA_IMAGE */
15209 #define NV_UINMEM_SET_CONTEXT_DMA_IMAGE 0x005C0184
15210 #define NV_UINMEM_SET_CONTEXT_DMA_IMAGE_PARAMETER 0xFFFFFFFF
15211 
15212 /* NV-Register NV_UINMEM_SET_IMAGE_OUTPUT */
15213 #define NV_UINMEM_SET_IMAGE_OUTPUT 0x005C0200
15214 #define NV_UINMEM_SET_IMAGE_OUTPUT_PARAMETER 0xFFFFFFFF
15215 
15216 /* NV-Array NV_UINMEM_SET_IMAGE_INPUT (4 byte access) */
15217 #define NV_UINMEM_SET_IMAGE_INPUT 0x005C0204
15218 /* NV-Array size NV_UINMEM_SET_IMAGE_INPUT__SIZE_1 [0..62] */
15219 #define NV_UINMEM_SET_IMAGE_INPUT__SIZE_1 0x0000003F
15220 #define NV_UINMEM_SET_IMAGE_INPUT_PARAMETER 0xFFFFFFFF
15221 
15222 /* NV-Register NV_UINMEM_FORMAT */
15223 #define NV_UINMEM_FORMAT 0x005C0300
15224 #define NV_UINMEM_FORMAT_VALUE 0xFFFFFFFF
15225 #define NV_UINMEM_FORMAT_VALUE_LE_Y8 0x01010000
15226 #define NV_UINMEM_FORMAT_VALUE_LE_Y16 0x01010001
15227 #define NV_UINMEM_FORMAT_VALUE_LE_X1R5G5B5_Z1R5G5B5 0x01000000
15228 #define NV_UINMEM_FORMAT_VALUE_LE_X8R8G8B8_Z8R8G8B8 0x00000001
15229 
15230 /* NV-Register NV_UINMEM_PITCH */
15231 #define NV_UINMEM_PITCH 0x005C0308
15232 #define NV_UINMEM_PITCH_VALUE 0x0000FFFF
15233 
15234 /* NV-Register NV_UINMEM_OFFSET */
15235 #define NV_UINMEM_OFFSET 0x005C030C
15236 #define NV_UINMEM_OFFSET_LINADRS 0x007FFFFF
15237 #define NV_UINMEM_OFFSET_LINADRS_0 0x00000000
15238 
15239 /* NV-Device NV_072 */
15240 #define NV_072 0x00620000 /* size: 0x00001FFF */
15241 #define NV4_BETA_SOLID 0x00000072
15242 
15243 /* NV-Register NV_072_CTX_SWITCH */
15244 #define NV_072_CTX_SWITCH 0x00620000
15245 #define NV_072_CTX_SWITCH_INSTANCE 0x0000FFFF
15246 #define NV_072_CTX_SWITCH_CHID 0x007F0000
15247 #define NV_072_CTX_SWITCH_VOLATILE 0x80000000
15248 #define NV_072_CTX_SWITCH_VOLATILE_IGNORE 0x7FFFFFFF
15249 #define NV_072_CTX_SWITCH_VOLATILE_RESET 0x80000000
15250 
15251 /* NV-Register NV_072_NOP */
15252 #define NV_072_NOP 0x00620100
15253 #define NV_072_NOP_PARAMETER 0xFFFFFFFF
15254 
15255 /* NV-Register NV_072_NOTIFY */
15256 #define NV_072_NOTIFY 0x00620104
15257 #define NV_072_NOTIFY_STYLE 0xFFFFFFFF
15258 #define NV_072_NOTIFY_STYLE_WRITE_ONLY 0x00000000
15259 #define NV_072_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001
15260 
15261 /* NV-Register NV_072_SET_NOTIFY */
15262 #define NV_072_SET_NOTIFY 0x00620104
15263 /* Alias NV_072_NOTIFY */
15264 /* Alias NV_072_NOTIFY */
15265 #define NV_072_SET_NOTIFY_PARAMETER 0xFFFFFFFF
15266 #define NV_072_SET_NOTIFY_PARAMETER_WRITE 0x00000000
15267 
15268 /* NV-Register NV_072_SET_CONTEXT_DMA_NOTIFY */
15269 #define NV_072_SET_CONTEXT_DMA_NOTIFY 0x00620180
15270 #define NV_072_SET_CONTEXT_DMA_NOTIFY_PARAMETER 0xFFFFFFFF
15271 
15272 /* NV-Register NV_072_SET_BETA_OUTPUT */
15273 #define NV_072_SET_BETA_OUTPUT 0x00620200
15274 #define NV_072_SET_BETA_OUTPUT_PARAMETER 0xFFFFFFFF
15275 
15276 /* NV-Register NV_072_SET_BETA_FACTOR */
15277 #define NV_072_SET_BETA_FACTOR 0x00620300
15278 #define NV_072_SET_BETA_FACTOR_BLUE 0x000000FF
15279 #define NV_072_SET_BETA_FACTOR_GREEN 0x0000FF00
15280 #define NV_072_SET_BETA_FACTOR_RED 0x00FF0000
15281 #define NV_072_SET_BETA_FACTOR_ALPHA 0xFF000000
15282 
15283 /* NV-Device NV_04A */
15284 #define NV_04A 0x004C0000 /* size: 0x00001FFF */
15285 #define NV4_GDI_RECTANGLE_TEXT 0x4A000000
15286 
15287 /* NV-Register NV_04A_NV4_GDI_RECTANGLE_TEXT */
15288 #define NV_04A_NV4_GDI_RECTANGLE_TEXT 0x004C0000
15289 
15290 /* NV-Register NV_04A_NOP */
15291 #define NV_04A_NOP 0x004C0100
15292 #define NV_04A_NOP_PARAMETER 0xFFFFFFFF
15293 
15294 /* NV-Register NV_04A_PM_TRIGGER */
15295 #define NV_04A_PM_TRIGGER 0x004C0140
15296 #define NV_04A_PM_TRIGGER_PARAMETER 0xFFFFFFFF
15297 
15298 /* NV-Register NV_04A_NOTIFY */
15299 #define NV_04A_NOTIFY 0x004C0104
15300 #define NV_04A_NOTIFY_STYLE 0xFFFFFFFF
15301 #define NV_04A_NOTIFY_STYLE_WRITE_ONLY 0x00000000
15302 #define NV_04A_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001
15303 
15304 /* NV-Register NV_04A_SET_PATCH */
15305 #define NV_04A_SET_PATCH 0x004C010C
15306 #define NV_04A_SET_PATCH_PARAMETER 0xFFFFFFFF
15307 #define NV_04A_SET_PATCH_PARAMETER_INVALIDATE 0x00000000
15308 #define NV_04A_SET_PATCH_PARAMETER_VALIDATE 0x00000001
15309 
15310 /* NV-Register NV_04A_SET_CONTEXT_DMA_NOTIFY */
15311 #define NV_04A_SET_CONTEXT_DMA_NOTIFY 0x004C0180
15312 #define NV_04A_SET_CONTEXT_DMA_NOTIFY_PARAMETER 0xFFFFFFFF
15313 
15314 /* NV-Register NV_04A_SET_CONTEXT_DMA_FONTS */
15315 #define NV_04A_SET_CONTEXT_DMA_FONTS 0x004C0184
15316 #define NV_04A_SET_CONTEXT_DMA_FONTS_PARAMETER 0xFFFFFFFF
15317 
15318 /* NV-Register NV_04A_SET_IMAGE_OUTPUT */
15319 #define NV_04A_SET_IMAGE_OUTPUT 0x004C0200
15320 #define NV_04A_SET_IMAGE_OUTPUT_PARAMETER 0xFFFFFFFF
15321 
15322 /* NV-Register NV_04A_SET_COLOR_FORMAT */
15323 #define NV_04A_SET_COLOR_FORMAT 0x004C0300
15324 #define NV_04A_SET_COLOR_FORMAT_LE 0xFFFFFFFF
15325 #define NV_04A_SET_COLOR_FORMAT_LE_X16R5G6B5 0x00000001
15326 #define NV_04A_SET_COLOR_FORMAT_LE_X17R5G5B5 0x00000002
15327 #define NV_04A_SET_COLOR_FORMAT_LE_X8R8G8B8 0x00000003
15328 
15329 /* NV-Register NV_04A_SET_MONOCHROME_FORMAT */
15330 #define NV_04A_SET_MONOCHROME_FORMAT 0x004C0304
15331 #define NV_04A_SET_MONOCHROME_FORMAT_VALUE 0xFFFFFFFF
15332 #define NV_04A_SET_MONOCHROME_FORMAT_VALUE_CGA6_M1 0x00000001
15333 #define NV_04A_SET_MONOCHROME_FORMAT_VALUE_LE_M1 0x00000002
15334 
15335 /* NV-Register NV_04A_COLOR1_A */
15336 #define NV_04A_COLOR1_A 0x004C03FC
15337 #define NV_04A_COLOR1_A_VALUE 0xFFFFFFFF
15338 
15339 /* NV-Array NV_04A_UNCLIPPED_RECTANGLE_POINT (8 byte access) */
15340 #define NV_04A_UNCLIPPED_RECTANGLE_POINT 0x004C0400
15341 /* NV-Array size NV_04A_UNCLIPPED_RECTANGLE_POINT__SIZE_1 [0..31] */
15342 #define NV_04A_UNCLIPPED_RECTANGLE_POINT__SIZE_1 0x00000020
15343 #define NV_04A_UNCLIPPED_RECTANGLE_POINT_Y 0x0000FFFF
15344 #define NV_04A_UNCLIPPED_RECTANGLE_POINT_X 0xFFFF0000
15345 
15346 /* NV-Array NV_04A_UNCLIPPED_RECTANGLE_SIZE (8 byte access) */
15347 #define NV_04A_UNCLIPPED_RECTANGLE_SIZE 0x004C0404
15348 /* NV-Array size NV_04A_UNCLIPPED_RECTANGLE_SIZE__SIZE_1 [0..31] */
15349 #define NV_04A_UNCLIPPED_RECTANGLE_SIZE__SIZE_1 0x00000020
15350 #define NV_04A_UNCLIPPED_RECTANGLE_SIZE_HEIGHT 0x0000FFFF
15351 #define NV_04A_UNCLIPPED_RECTANGLE_SIZE_WIDTH 0xFFFF0000
15352 
15353 /* NV-Register NV_04A_CLIP_B_POINT0 */
15354 #define NV_04A_CLIP_B_POINT0 0x004C05F4
15355 #define NV_04A_CLIP_B_POINT0_LEFT 0x0000FFFF
15356 #define NV_04A_CLIP_B_POINT0_TOP 0xFFFF0000
15357 
15358 /* NV-Register NV_04A_CLIP_B_POINT1 */
15359 #define NV_04A_CLIP_B_POINT1 0x004C05F8
15360 #define NV_04A_CLIP_B_POINT1_RIGHT 0x0000FFFF
15361 #define NV_04A_CLIP_B_POINT1_BOTTOM 0xFFFF0000
15362 
15363 /* NV-Register NV_04A_COLOR1_B */
15364 #define NV_04A_COLOR1_B 0x004C05FC
15365 #define NV_04A_COLOR1_B_VALUE 0xFFFFFFFF
15366 
15367 /* NV-Array NV_04A_CLIPPED_RECTANGLE_POINT_0 (8 byte access) */
15368 #define NV_04A_CLIPPED_RECTANGLE_POINT_0 0x004C0600
15369 /* NV-Array size NV_04A_CLIPPED_RECTANGLE_POINT_0__SIZE_1 [0..31] */
15370 #define NV_04A_CLIPPED_RECTANGLE_POINT_0__SIZE_1 0x00000020
15371 #define NV_04A_CLIPPED_RECTANGLE_POINT_0_LEFT 0x0000FFFF
15372 #define NV_04A_CLIPPED_RECTANGLE_POINT_0_TOP 0xFFFF0000
15373 
15374 /* NV-Array NV_04A_CLIPPED_RECTANGLE_POINT_1 (8 byte access) */
15375 #define NV_04A_CLIPPED_RECTANGLE_POINT_1 0x004C0604
15376 /* NV-Array size NV_04A_CLIPPED_RECTANGLE_POINT_1__SIZE_1 [0..31] */
15377 #define NV_04A_CLIPPED_RECTANGLE_POINT_1__SIZE_1 0x00000020
15378 #define NV_04A_CLIPPED_RECTANGLE_POINT_1_RIGHT 0x0000FFFF
15379 #define NV_04A_CLIPPED_RECTANGLE_POINT_1_BOTTOM 0xFFFF0000
15380 
15381 /* NV-Register NV_04A_CLIP_C_POINT0 */
15382 #define NV_04A_CLIP_C_POINT0 0x004C07EC
15383 #define NV_04A_CLIP_C_POINT0_LEFT 0x0000FFFF
15384 #define NV_04A_CLIP_C_POINT0_TOP 0xFFFF0000
15385 
15386 /* NV-Register NV_04A_CLIP_C_POINT1 */
15387 #define NV_04A_CLIP_C_POINT1 0x004C07F0
15388 #define NV_04A_CLIP_C_POINT1_RIGHT 0x0000FFFF
15389 #define NV_04A_CLIP_C_POINT1_BOTTOM 0xFFFF0000
15390 
15391 /* NV-Register NV_04A_COLOR1_C */
15392 #define NV_04A_COLOR1_C 0x004C07F4
15393 #define NV_04A_COLOR1_C_VALUE 0xFFFFFFFF
15394 
15395 /* NV-Register NV_04A_SIZE_C */
15396 #define NV_04A_SIZE_C 0x004C07F8
15397 #define NV_04A_SIZE_C_WIDTH 0x0000FFFF
15398 #define NV_04A_SIZE_C_HEIGHT 0xFFFF0000
15399 
15400 /* NV-Register NV_04A_POINT_C */
15401 #define NV_04A_POINT_C 0x004C07FC
15402 #define NV_04A_POINT_C_X 0x0000FFFF
15403 #define NV_04A_POINT_C_Y 0xFFFF0000
15404 
15405 /* NV-Array NV_04A_MONOCHROME_COLOR1_C (4 byte access) */
15406 #define NV_04A_MONOCHROME_COLOR1_C 0x004C0800
15407 /* NV-Array size NV_04A_MONOCHROME_COLOR1_C__SIZE_1 [0..127] */
15408 #define NV_04A_MONOCHROME_COLOR1_C__SIZE_1 0x00000080
15409 #define NV_04A_MONOCHROME_COLOR1_C_BITMAP 0xFFFFFFFF
15410 
15411 /* NV-Register NV_04A_CLIP_E_POINT0 */
15412 #define NV_04A_CLIP_E_POINT0 0x004C0BE4
15413 #define NV_04A_CLIP_E_POINT0_LEFT 0x0000FFFF
15414 #define NV_04A_CLIP_E_POINT0_TOP 0xFFFF0000
15415 
15416 /* NV-Register NV_04A_CLIP_E_POINT1 */
15417 #define NV_04A_CLIP_E_POINT1 0x004C0BE8
15418 #define NV_04A_CLIP_E_POINT1_RIGHT 0x0000FFFF
15419 #define NV_04A_CLIP_E_POINT1_BOTTOM 0xFFFF0000
15420 
15421 /* NV-Register NV_04A_COLOR0_E */
15422 #define NV_04A_COLOR0_E 0x004C0BEC
15423 #define NV_04A_COLOR0_E_VALUE 0xFFFFFFFF
15424 
15425 /* NV-Register NV_04A_COLOR1_E */
15426 #define NV_04A_COLOR1_E 0x004C0BF0
15427 #define NV_04A_COLOR1_E_VALUE 0xFFFFFFFF
15428 
15429 /* NV-Register NV_04A_SIZE_IN_E */
15430 #define NV_04A_SIZE_IN_E 0x004C0BF4
15431 #define NV_04A_SIZE_IN_E_WIDTH 0x0000FFFF
15432 #define NV_04A_SIZE_IN_E_HEIGHT 0xFFFF0000
15433 
15434 /* NV-Register NV_04A_SIZE_OUT_E */
15435 #define NV_04A_SIZE_OUT_E 0x004C0BF8
15436 #define NV_04A_SIZE_OUT_E_WIDTH 0x0000FFFF
15437 #define NV_04A_SIZE_OUT_E_HEIGHT 0xFFFF0000
15438 
15439 /* NV-Register NV_04A_POINT_E */
15440 #define NV_04A_POINT_E 0x004C0BFC
15441 #define NV_04A_POINT_E_X 0x0000FFFF
15442 #define NV_04A_POINT_E_Y 0xFFFF0000
15443 
15444 /* NV-Array NV_04A_MONOCHROME_COLOR01_E (4 byte access) */
15445 #define NV_04A_MONOCHROME_COLOR01_E 0x004C0C00
15446 /* NV-Array size NV_04A_MONOCHROME_COLOR01_E__SIZE_1 [0..127] */
15447 #define NV_04A_MONOCHROME_COLOR01_E__SIZE_1 0x00000080
15448 #define NV_04A_MONOCHROME_COLOR01_E_BITMAP 0xFFFFFFFF
15449 
15450 /* NV-Register NV_04A_FONT_F */
15451 #define NV_04A_FONT_F 0x004C0FF0
15452 #define NV_04A_FONT_F_OFFSET 0x0FFFFFFF
15453 #define NV_04A_FONT_F_PITCH 0xF0000000
15454 #define NV_04A_FONT_F_PITCH_8 0x30000000
15455 #define NV_04A_FONT_F_PITCH_16 0x40000000
15456 #define NV_04A_FONT_F_PITCH_32 0x50000000
15457 #define NV_04A_FONT_F_PITCH_64 0x60000000
15458 #define NV_04A_FONT_F_PITCH_128 0x70000000
15459 #define NV_04A_FONT_F_PITCH_256 0x80000000
15460 #define NV_04A_FONT_F_PITCH_512 0x90000000
15461 
15462 /* NV-Register NV_04A_CLIP_F_POINT0 */
15463 #define NV_04A_CLIP_F_POINT0 0x004C0FF4
15464 #define NV_04A_CLIP_F_POINT0_LEFT 0x0000FFFF
15465 #define NV_04A_CLIP_F_POINT0_TOP 0xFFFF0000
15466 
15467 /* NV-Register NV_04A_CLIP_F_POINT1 */
15468 #define NV_04A_CLIP_F_POINT1 0x004C0FF8
15469 #define NV_04A_CLIP_F_POINT1_RIGHT 0x0000FFFF
15470 #define NV_04A_CLIP_F_POINT1_BOTTOM 0xFFFF0000
15471 
15472 /* NV-Register NV_04A_COLOR1_F */
15473 #define NV_04A_COLOR1_F 0x004C0FFC
15474 #define NV_04A_COLOR1_F_VALUE 0xFFFFFFFF
15475 
15476 /* NV-Array NV_04A_CHARACTER_COLOR1_F (4 byte access) */
15477 #define NV_04A_CHARACTER_COLOR1_F 0x004C1000
15478 /* NV-Array size NV_04A_CHARACTER_COLOR1_F__SIZE_1 [0..255] */
15479 #define NV_04A_CHARACTER_COLOR1_F__SIZE_1 0x00000100
15480 #define NV_04A_CHARACTER_COLOR1_F_INDEX 0x000000FF
15481 #define NV_04A_CHARACTER_COLOR1_F_X 0x000FFF00
15482 #define NV_04A_CHARACTER_COLOR1_F_Y 0xFFF00000
15483 
15484 /* NV-Register NV_04A_FONT_G */
15485 #define NV_04A_FONT_G 0x004C17F0
15486 #define NV_04A_FONT_G_OFFSET 0x0FFFFFFF
15487 #define NV_04A_FONT_G_PITCH 0xF0000000
15488 #define NV_04A_FONT_G_PITCH_8 0x30000000
15489 #define NV_04A_FONT_G_PITCH_16 0x40000000
15490 #define NV_04A_FONT_G_PITCH_32 0x50000000
15491 #define NV_04A_FONT_G_PITCH_64 0x60000000
15492 #define NV_04A_FONT_G_PITCH_128 0x70000000
15493 #define NV_04A_FONT_G_PITCH_256 0x80000000
15494 #define NV_04A_FONT_G_PITCH_512 0x90000000
15495 
15496 /* NV-Register NV_04A_CLIP_G_POINT0 */
15497 #define NV_04A_CLIP_G_POINT0 0x004C17F4
15498 #define NV_04A_CLIP_G_POINT0_LEFT 0x0000FFFF
15499 #define NV_04A_CLIP_G_POINT0_TOP 0xFFFF0000
15500 
15501 /* NV-Register NV_04A_CLIP_G_POINT1 */
15502 #define NV_04A_CLIP_G_POINT1 0x004C17F8
15503 #define NV_04A_CLIP_G_POINT1_RIGHT 0x0000FFFF
15504 #define NV_04A_CLIP_G_POINT1_BOTTOM 0xFFFF0000
15505 
15506 /* NV-Register NV_04A_COLOR1_G */
15507 #define NV_04A_COLOR1_G 0x004C17FC
15508 #define NV_04A_COLOR1_G_VALUE 0xFFFFFFFF
15509 
15510 /* NV-Array NV_04A_CHARACTER_COLOR1_G_POINT (8 byte access) */
15511 #define NV_04A_CHARACTER_COLOR1_G_POINT 0x004C1800
15512 /* NV-Array size NV_04A_CHARACTER_COLOR1_G_POINT__SIZE_1 [0..255] */
15513 #define NV_04A_CHARACTER_COLOR1_G_POINT__SIZE_1 0x00000100
15514 #define NV_04A_CHARACTER_COLOR1_G_POINT_X 0x0000FFFF
15515 #define NV_04A_CHARACTER_COLOR1_G_POINT_Y 0xFFFF0000
15516 
15517 /* NV-Array NV_04A_CHARACTER_COLOR1_G_INDEX (8 byte access) */
15518 #define NV_04A_CHARACTER_COLOR1_G_INDEX 0x004C1804
15519 /* NV-Array size NV_04A_CHARACTER_COLOR1_G_INDEX__SIZE_1 [0..255] */
15520 #define NV_04A_CHARACTER_COLOR1_G_INDEX__SIZE_1 0x00000100
15521 #define NV_04A_CHARACTER_COLOR1_G_INDEX_VALUE 0xFFFFFFFF
15522 
15523 /* NV-Device NV_067 */
15524 #define NV_067 0x00670000 /* size: 0x00001FFF */
15525 #define NV4_IMAGE_BLEND_PREMULT 0x00000067
15526 
15527 /* NV-Register NV_067_NV4_IMAGE_BLEND_PREMULT */
15528 #define NV_067_NV4_IMAGE_BLEND_PREMULT 0x00660000
15529 
15530 /* NV-Register NV_067_NOP */
15531 #define NV_067_NOP 0x00670100
15532 #define NV_067_NOP_PARAMETER 0xFFFFFFFF
15533 
15534 /* NV-Register NV_067_NOTIFY */
15535 #define NV_067_NOTIFY 0x00670104
15536 #define NV_067_NOTIFY_STYLE 0xFFFFFFFF
15537 #define NV_067_NOTIFY_STYLE_WRITE_ONLY 0x00000000
15538 #define NV_067_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001
15539 /* Alias NV_067_SET_NOTIFY */
15540 /* Alias NV_067_SET_NOTIFY */
15541 #define NV_067_SET_NOTIFY_PARAMETER 0xFFFFFFFF
15542 #define NV_067_SET_NOTIFY_PARAMETER_WRITE 0x00000000
15543 
15544 /* NV-Register NV_067_SET_CONTEXT_DMA_NOTIFY */
15545 #define NV_067_SET_CONTEXT_DMA_NOTIFY 0x00670180
15546 #define NV_067_SET_CONTEXT_DMA_NOTIFY_PARAMETER 0xFFFFFFFF
15547 
15548 /* NV-Register NV_067_SET_IMAGE_OUTPUT */
15549 #define NV_067_SET_IMAGE_OUTPUT 0x00670200
15550 #define NV_067_SET_IMAGE_OUTPUT_PARAMETER 0xFFFFFFFF
15551 
15552 /* NV-Register NV_067_SET_BETA_INPUT */
15553 #define NV_067_SET_BETA_INPUT 0x00670204
15554 #define NV_067_SET_BETA_INPUT_PARAMETER 0xFFFFFFFF
15555 
15556 /* NV-Array NV_067_SET_IMAGE_INPUT (4 byte access) */
15557 #define NV_067_SET_IMAGE_INPUT 0x00670208
15558 /* NV-Array size NV_067_SET_IMAGE_INPUT__SIZE_1 [0..1] */
15559 #define NV_067_SET_IMAGE_INPUT__SIZE_1 0x00000002
15560 #define NV_067_SET_IMAGE_INPUT_PARAMETER 0xFFFFFFFF
15561 
15562 /* NV-Device NV_UBLIT */
15563 #define NV_UBLIT 0x00500000 /* size: 0x00001FFF */
15564 #define NV_IMAGE_BLIT 0x0000005F
15565 
15566 /* NV-Register NV_UBLIT_CTX_SWITCH */
15567 #define NV_UBLIT_CTX_SWITCH 0x00500000
15568 #define NV_UBLIT_CTX_SWITCH_INSTANCE 0x0000FFFF
15569 #define NV_UBLIT_CTX_SWITCH_CHID 0x007F0000
15570 #define NV_UBLIT_CTX_SWITCH_VOLATILE 0x80000000
15571 #define NV_UBLIT_CTX_SWITCH_VOLATILE_IGNORE 0x7FFFFFFF
15572 #define NV_UBLIT_CTX_SWITCH_VOLATILE_RESET 0x80000000
15573 
15574 /* NV-Register NV_UBLIT_NOP */
15575 #define NV_UBLIT_NOP 0x00500100
15576 #define NV_UBLIT_NOP_PARAMETER 0xFFFFFFFF
15577 
15578 /* NV-Register NV_UBLIT_NOTIFY */
15579 #define NV_UBLIT_NOTIFY 0x00500104
15580 #define NV_UBLIT_NOTIFY_STYLE 0xFFFFFFFF
15581 #define NV_UBLIT_NOTIFY_STYLE_WRITE_ONLY 0x00000000
15582 #define NV_UBLIT_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001
15583 
15584 /* NV-Register NV_UBLIT_SET_NOTIFY */
15585 #define NV_UBLIT_SET_NOTIFY 0x00500104
15586 /* Alias NV_UBLIT_NOTIFY */
15587 /* Alias NV_UBLIT_NOTIFY */
15588 #define NV_UBLIT_SET_NOTIFY_PARAMETER 0xFFFFFFFF
15589 #define NV_UBLIT_SET_NOTIFY_PARAMETER_WRITE 0x00000000
15590 
15591 /* NV-Register NV_UBLIT_SET_PATCH */
15592 #define NV_UBLIT_SET_PATCH 0x0050010C
15593 #define NV_UBLIT_SET_PATCH_PARAMETER 0xFFFFFFFF
15594 #define NV_UBLIT_SET_PATCH_PARAMETER_INVALIDATE 0x00000000
15595 #define NV_UBLIT_SET_PATCH_PARAMETER_VALIDATE 0x00000001
15596 
15597 /* NV-Register NV_UBLIT_SET_CONTEXT_DMA_NOTIFY */
15598 #define NV_UBLIT_SET_CONTEXT_DMA_NOTIFY 0x00500180
15599 #define NV_UBLIT_SET_CONTEXT_DMA_NOTIFY_PARAMETER 0xFFFFFFFF
15600 
15601 /* NV-Register NV_UBLIT_SET_IMAGE_OUTPUT */
15602 #define NV_UBLIT_SET_IMAGE_OUTPUT 0x00500200
15603 #define NV_UBLIT_SET_IMAGE_OUTPUT_PARAMETER 0xFFFFFFFF
15604 
15605 /* NV-Register NV_UBLIT_SET_IMAGE_INPUT */
15606 #define NV_UBLIT_SET_IMAGE_INPUT 0x00500204
15607 #define NV_UBLIT_SET_IMAGE_INPUT_PARAMETER 0xFFFFFFFF
15608 
15609 /* NV-Register NV_UBLIT_POINT_IN */
15610 #define NV_UBLIT_POINT_IN 0x00500300
15611 #define NV_UBLIT_POINT_IN_X 0x0000FFFF
15612 #define NV_UBLIT_POINT_IN_Y 0xFFFF0000
15613 
15614 /* NV-Register NV_UBLIT_POINT_OUT */
15615 #define NV_UBLIT_POINT_OUT 0x00500304
15616 #define NV_UBLIT_POINT_OUT_X 0x0000FFFF
15617 #define NV_UBLIT_POINT_OUT_Y 0xFFFF0000
15618 
15619 /* NV-Register NV_UBLIT_SIZE */
15620 #define NV_UBLIT_SIZE 0x00500308
15621 #define NV_UBLIT_SIZE_WIDTH 0x0000FFFF
15622 #define NV_UBLIT_SIZE_HEIGHT 0xFFFF0000
15623 
15624 /* NV-Device NV_UIMAGE */
15625 #define NV_UIMAGE 0x00510000 /* size: 0x00001FFF */
15626 #define NV_IMAGE_FROM_CPU 0x00610000
15627 
15628 /* NV-Register NV_UIMAGE_CTX_SWITCH */
15629 #define NV_UIMAGE_CTX_SWITCH 0x00510000
15630 #define NV_UIMAGE_CTX_SWITCH_INSTANCE 0x0000FFFF
15631 #define NV_UIMAGE_CTX_SWITCH_CHID 0x007F0000
15632 #define NV_UIMAGE_CTX_SWITCH_VOLATILE 0x80000000
15633 #define NV_UIMAGE_CTX_SWITCH_VOLATILE_IGNORE 0x7FFFFFFF
15634 #define NV_UIMAGE_CTX_SWITCH_VOLATILE_RESET 0x80000000
15635 
15636 /* NV-Register NV_UIMAGE_NOP */
15637 #define NV_UIMAGE_NOP 0x00510100
15638 #define NV_UIMAGE_NOP_PARAMETER 0xFFFFFFFF
15639 
15640 /* NV-Register NV_UIMAGE_NOTIFY */
15641 #define NV_UIMAGE_NOTIFY 0x00510104
15642 #define NV_UIMAGE_NOTIFY_STYLE 0xFFFFFFFF
15643 #define NV_UIMAGE_NOTIFY_STYLE_WRITE_ONLY 0x00000000
15644 #define NV_UIMAGE_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001
15645 
15646 /* NV-Register NV_UIMAGE_SET_NOTIFY */
15647 #define NV_UIMAGE_SET_NOTIFY 0x00510104
15648 /* Alias NV_UIMAGE_NOTIFY */
15649 /* Alias NV_UIMAGE_NOTIFY */
15650 #define NV_UIMAGE_SET_NOTIFY_PARAMETER 0xFFFFFFFF
15651 #define NV_UIMAGE_SET_NOTIFY_PARAMETER_WRITE 0x00000000
15652 
15653 /* NV-Register NV_UIMAGE_SET_PATCH */
15654 #define NV_UIMAGE_SET_PATCH 0x0051010C
15655 #define NV_UIMAGE_SET_PATCH_PARAMETER 0xFFFFFFFF
15656 #define NV_UIMAGE_SET_PATCH_PARAMETER_INVALIDATE 0x00000000
15657 #define NV_UIMAGE_SET_PATCH_PARAMETER_VALIDATE 0x00000001
15658 
15659 /* NV-Register NV_UIMAGE_SET_CONTEXT_DMA_NOTIFY */
15660 #define NV_UIMAGE_SET_CONTEXT_DMA_NOTIFY 0x00510180
15661 #define NV_UIMAGE_SET_CONTEXT_DMA_NOTIFY_PARAMETER 0xFFFFFFFF
15662 
15663 /* NV-Register NV_UIMAGE_SET_IMAGE_OUTPUT */
15664 #define NV_UIMAGE_SET_IMAGE_OUTPUT 0x00510200
15665 #define NV_UIMAGE_SET_IMAGE_OUTPUT_PARAMETER 0xFFFFFFFF
15666 
15667 /* NV-Register NV_UIMAGE_SET_COLOR_FORMAT */
15668 #define NV_UIMAGE_SET_COLOR_FORMAT 0x00510300
15669 #define NV_UIMAGE_SET_COLOR_FORMAT_LE 0xFFFFFFFF
15670 #define NV_UIMAGE_SET_COLOR_FORMAT_LE_R5G6B5 0x00000001
15671 #define NV_UIMAGE_SET_COLOR_FORMAT_LE_A1R5G5B5 0x00000002
15672 #define NV_UIMAGE_SET_COLOR_FORMAT_LE_X1R5G5B5 0x00000003
15673 #define NV_UIMAGE_SET_COLOR_FORMAT_LE_A8R8G8B8 0x00000004
15674 #define NV_UIMAGE_SET_COLOR_FORMAT_LE_X8R8G8B8 0x00000005
15675 
15676 /* NV-Register NV_UIMAGE_POINT */
15677 #define NV_UIMAGE_POINT 0x00510304
15678 #define NV_UIMAGE_POINT_X 0x0000FFFF
15679 #define NV_UIMAGE_POINT_Y 0xFFFF0000
15680 
15681 /* NV-Register NV_UIMAGE_SIZE */
15682 #define NV_UIMAGE_SIZE 0x00510308
15683 #define NV_UIMAGE_SIZE_WIDTH 0x0000FFFF
15684 #define NV_UIMAGE_SIZE_HEIGHT 0xFFFF0000
15685 
15686 /* NV-Register NV_UIMAGE_SIZE_IN */
15687 #define NV_UIMAGE_SIZE_IN 0x0051030C
15688 #define NV_UIMAGE_SIZE_IN_WIDTH 0x0000FFFF
15689 #define NV_UIMAGE_SIZE_IN_HEIGHT 0xFFFF0000
15690 
15691 /* NV-Array NV_UIMAGE_COLOR (4 byte access) */
15692 #define NV_UIMAGE_COLOR 0x00510400
15693 /* NV-Array size NV_UIMAGE_COLOR__SIZE_1 [0..31] */
15694 #define NV_UIMAGE_COLOR__SIZE_1 0x00000020
15695 #define NV_UIMAGE_COLOR_VALUE 0xFFFFFFFF
15696 
15697 /* NV-Device NV_044 */
15698 #define NV_044 0x00680000 /* size: 0x00001FFF */
15699 #define NV4_IMAGE_PATTERN 0x00000044
15700 
15701 /* NV-Register NV_044_CTX_SWITCH */
15702 #define NV_044_CTX_SWITCH 0x00680000
15703 
15704 /* NV-Register NV_044_NOP */
15705 #define NV_044_NOP 0x00680100
15706 #define NV_044_NOP_PARAMETER 0xFFFFFFFF
15707 
15708 /* NV-Register NV_044_NOTIFY */
15709 #define NV_044_NOTIFY 0x00680104
15710 #define NV_044_NOTIFY_STYLE 0xFFFFFFFF
15711 #define NV_044_NOTIFY_STYLE_WRITE_ONLY 0x00000000
15712 #define NV_044_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001
15713 /* Alias NV_044_SET_NOTIFY */
15714 /* Alias NV_044_SET_NOTIFY */
15715 #define NV_044_SET_NOTIFY_PARAMETER 0xFFFFFFFF
15716 #define NV_044_SET_NOTIFY_PARAMETER_WRITE 0x00000000
15717 
15718 /* NV-Register NV_044_SET_CONTEXT_DMA_NOTIFY */
15719 #define NV_044_SET_CONTEXT_DMA_NOTIFY 0x00680180
15720 #define NV_044_SET_CONTEXT_DMA_NOTIFY_PARAMETER 0xFFFFFFFF
15721 
15722 /* NV-Register NV_044_SET_IMAGE_OUTPUT */
15723 #define NV_044_SET_IMAGE_OUTPUT 0x00680200
15724 #define NV_044_SET_IMAGE_OUTPUT_PARAMETER 0xFFFFFFFF
15725 
15726 /* NV-Register NV_044_SET_COLOR_FORMAT */
15727 #define NV_044_SET_COLOR_FORMAT 0x00680300
15728 #define NV_044_SET_COLOR_FORMAT_LE 0xFFFFFFFF
15729 #define NV_044_SET_COLOR_FORMAT_LE_A16R5G6B5 0x00000001
15730 #define NV_044_SET_COLOR_FORMAT_LE_X16A1R5G5B5 0x00000002
15731 #define NV_044_SET_COLOR_FORMAT_LE_A8R8G8B8 0x00000003
15732 
15733 /* NV-Register NV_044_SET_MONOCHROME_FORMAT */
15734 #define NV_044_SET_MONOCHROME_FORMAT 0x00680304
15735 #define NV_044_SET_MONOCHROME_FORMAT_VALUE 0xFFFFFFFF
15736 #define NV_044_SET_MONOCHROME_FORMAT_VALUE_CGA6_M1 0x00000001
15737 #define NV_044_SET_MONOCHROME_FORMAT_VALUE_LE_M1 0x00000002
15738 
15739 /* NV-Register NV_044_SET_MONOCHROME_SHAPE */
15740 #define NV_044_SET_MONOCHROME_SHAPE 0x00680308
15741 #define NV_044_SET_MONOCHROME_SHAPE_VALUE 0xFFFFFFFF
15742 #define NV_044_SET_MONOCHROME_SHAPE_VALUE_8X_8Y 0x00000000
15743 #define NV_044_SET_MONOCHROME_SHAPE_VALUE_64X_1Y 0x00000001
15744 #define NV_044_SET_MONOCHROME_SHAPE_VALUE_1X_64Y 0x00000002
15745 
15746 /* NV-Register NV_044_SET_PATTERN_SELECT */
15747 #define NV_044_SET_PATTERN_SELECT 0x0068030C
15748 #define NV_044_SET_PATTERN_SELECT_VALUE 0xFFFFFFFF
15749 #define NV_044_SET_PATTERN_SELECT_VALUE_MONOCHROME 0x00000001
15750 #define NV_044_SET_PATTERN_SELECT_VALUE_COLOR 0x00000002
15751 
15752 /* NV-Register NV_044_SET_MONOCHROME_COLOR0 */
15753 #define NV_044_SET_MONOCHROME_COLOR0 0x00680310
15754 #define NV_044_SET_MONOCHROME_COLOR0_VALUE 0xFFFFFFFF
15755 
15756 /* NV-Register NV_044_SET_MONOCHROME_COLOR1 */
15757 #define NV_044_SET_MONOCHROME_COLOR1 0x00680314
15758 #define NV_044_SET_MONOCHROME_COLOR1_VALUE 0xFFFFFFFF
15759 
15760 /* NV-Register NV_044_SET_MONOCHROME_PATTERN0 */
15761 #define NV_044_SET_MONOCHROME_PATTERN0 0x00680318
15762 #define NV_044_SET_MONOCHROME_PATTERN0_BITMAP 0xFFFFFFFF
15763 
15764 /* NV-Register NV_044_SET_MONOCHROME_PATTERN1 */
15765 #define NV_044_SET_MONOCHROME_PATTERN1 0x0068031C
15766 #define NV_044_SET_MONOCHROME_PATTERN1_BITMAP 0xFFFFFFFF
15767 
15768 /* NV-Array NV_044_SET_PATTERN_Y8 (4 byte access) */
15769 #define NV_044_SET_PATTERN_Y8 0x00680400
15770 /* NV-Array size NV_044_SET_PATTERN_Y8__SIZE_1 [0..15] */
15771 #define NV_044_SET_PATTERN_Y8__SIZE_1 0x00000010
15772 #define NV_044_SET_PATTERN_Y8_Y0 0x000000FF
15773 #define NV_044_SET_PATTERN_Y8_Y1 0x0000FF00
15774 #define NV_044_SET_PATTERN_Y8_Y2 0x00FF0000
15775 #define NV_044_SET_PATTERN_Y8_Y3 0xFF000000
15776 
15777 /* NV-Array NV_044_SET_PATTERN_R5G6B5 (4 byte access) */
15778 #define NV_044_SET_PATTERN_R5G6B5 0x00680500
15779 /* NV-Array size NV_044_SET_PATTERN_R5G6B5__SIZE_1 [0..31] */
15780 #define NV_044_SET_PATTERN_R5G6B5__SIZE_1 0x00000020
15781 #define NV_044_SET_PATTERN_R5G6B5_BLUE0 0x0000001F
15782 #define NV_044_SET_PATTERN_R5G6B5_GREEN0 0x000007E0
15783 #define NV_044_SET_PATTERN_R5G6B5_RED0 0x0000F800
15784 #define NV_044_SET_PATTERN_R5G6B5_BLUE1 0x001F0000
15785 #define NV_044_SET_PATTERN_R5G6B5_GREEN1 0x07E00000
15786 #define NV_044_SET_PATTERN_R5G6B5_RED1 0xF8000000
15787 
15788 /* NV-Array NV_044_SET_PATTERN_X1R5G5B5 (4 byte access) */
15789 #define NV_044_SET_PATTERN_X1R5G5B5 0x00680600
15790 /* NV-Array size NV_044_SET_PATTERN_X1R5G5B5__SIZE_1 [0..31] */
15791 #define NV_044_SET_PATTERN_X1R5G5B5__SIZE_1 0x00000020
15792 #define NV_044_SET_PATTERN_X1R5G5B5_BLUE0 0x0000001F
15793 #define NV_044_SET_PATTERN_X1R5G5B5_GREEN0 0x000003E0
15794 #define NV_044_SET_PATTERN_X1R5G5B5_RED0 0x00007C00
15795 #define NV_044_SET_PATTERN_X1R5G5B5_IGNORE0 0x00008000
15796 #define NV_044_SET_PATTERN_X1R5G5B5_BLUE1 0x001F0000
15797 #define NV_044_SET_PATTERN_X1R5G5B5_GREEN1 0x03E00000
15798 #define NV_044_SET_PATTERN_X1R5G5B5_RED1 0x7C000000
15799 #define NV_044_SET_PATTERN_X1R5G5B5_IGNORE1 0x80000000
15800 
15801 /* NV-Array NV_044_SET_PATTERN_X8R8G8B8 (4 byte access) */
15802 #define NV_044_SET_PATTERN_X8R8G8B8 0x00680700
15803 /* NV-Array size NV_044_SET_PATTERN_X8R8G8B8__SIZE_1 [0..63] */
15804 #define NV_044_SET_PATTERN_X8R8G8B8__SIZE_1 0x00000040
15805 #define NV_044_SET_PATTERN_X8R8G8B8_BLUE 0x000000FF
15806 #define NV_044_SET_PATTERN_X8R8G8B8_GREEN 0x0000FF00
15807 #define NV_044_SET_PATTERN_X8R8G8B8_RED 0x00FF0000
15808 #define NV_044_SET_PATTERN_X8R8G8B8_IGNORE 0xFF000000
15809 
15810 /* NV-Device NV_UCHROMA */
15811 #define NV_UCHROMA 0x00430000 /* size: 0x00001FFF */
15812 #define NV_IMAGE_SOLID 0x57000000
15813 #define NV4_CONTEXT_COLOR_KEY 0x57000000
15814 
15815 /* NV-Register NV_UCHROMA_CTX_SWITCH */
15816 #define NV_UCHROMA_CTX_SWITCH 0x00430000
15817 #define NV_UCHROMA_CTX_SWITCH_INSTANCE 0x0000FFFF
15818 #define NV_UCHROMA_CTX_SWITCH_CHID 0x007F0000
15819 #define NV_UCHROMA_CTX_SWITCH_VOLATILE 0x80000000
15820 #define NV_UCHROMA_CTX_SWITCH_VOLATILE_IGNORE 0x7FFFFFFF
15821 #define NV_UCHROMA_CTX_SWITCH_VOLATILE_RESET 0x80000000
15822 
15823 /* NV-Register NV_UCHROMA_NOP */
15824 #define NV_UCHROMA_NOP 0x00430100
15825 #define NV_UCHROMA_NOP_PARAMETER 0xFFFFFFFF
15826 
15827 /* NV-Register NV_UCHROMA_NOTIFY */
15828 #define NV_UCHROMA_NOTIFY 0x00430104
15829 #define NV_UCHROMA_NOTIFY_STYLE 0xFFFFFFFF
15830 #define NV_UCHROMA_NOTIFY_STYLE_WRITE_ONLY 0x00000000
15831 #define NV_UCHROMA_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001
15832 
15833 /* NV-Register NV_UCHROMA_SET_NOTIFY */
15834 #define NV_UCHROMA_SET_NOTIFY 0x00430104
15835 /* Alias NV_UCHROMA_NOTIFY */
15836 /* Alias NV_UCHROMA_NOTIFY */
15837 #define NV_UCHROMA_SET_NOTIFY_PARAMETER 0xFFFFFFFF
15838 #define NV_UCHROMA_SET_NOTIFY_PARAMETER_WRITE 0x00000000
15839 
15840 /* NV-Register NV_UCHROMA_SET_CONTEXT_DMA_NOTIFY */
15841 #define NV_UCHROMA_SET_CONTEXT_DMA_NOTIFY 0x00430180
15842 #define NV_UCHROMA_SET_CONTEXT_DMA_NOTIFY_PARAMETER 0xFFFFFFFF
15843 
15844 /* NV-Register NV_UCHROMA_SET_IMAGE_OUTPUT */
15845 #define NV_UCHROMA_SET_IMAGE_OUTPUT 0x00430200
15846 #define NV_UCHROMA_SET_IMAGE_OUTPUT_PARAMETER 0xFFFFFFFF
15847 
15848 /* NV-Register NV_UCHROMA_SET_COLOR_FORMAT */
15849 #define NV_UCHROMA_SET_COLOR_FORMAT 0x00430300
15850 #define NV_UCHROMA_SET_COLOR_FORMAT_LE 0xFFFFFFFF
15851 #define NV_UCHROMA_SET_COLOR_FORMAT_LE_A16R5G6B5 0x00000001
15852 #ifndef NV_UCHROMA_SET_COLOR_FORMAT_LE_X16A1R5G5B5
15853 #define NV_UCHROMA_SET_COLOR_FORMAT_LE_X16A1R5G5B5 0x00000002
15854 #endif
15855 #ifndef NV_UCHROMA_SET_COLOR_FORMAT_LE_A8R8G8B8
15856 #define NV_UCHROMA_SET_COLOR_FORMAT_LE_A8R8G8B8 0x00000003
15857 #endif
15858 
15859 /* NV-Register NV_UCHROMA_SET_COLOR */
15860 #define NV_UCHROMA_SET_COLOR 0x00430304
15861 #define NV_UCHROMA_SET_COLOR_VALUE 0xFFFFFFFF
15862 
15863 /* NV-Device NV_066 */
15864 #define NV_066 0x00660000 /* size: 0x00001FFF */
15865 #define NV4_IMAGE_SRCCOPY_PREMULT 0x00000066
15866 
15867 /* NV-Register NV_066_NV4_IMAGE_SRCCOPY_PREMULT */
15868 #define NV_066_NV4_IMAGE_SRCCOPY_PREMULT 0x00660000
15869 
15870 /* NV-Register NV_066_NOP */
15871 #define NV_066_NOP 0x00660100
15872 #define NV_066_NOP_PARAMETER 0xFFFFFFFF
15873 
15874 /* NV-Register NV_066_NOTIFY */
15875 #define NV_066_NOTIFY 0x00660104
15876 #define NV_066_NOTIFY_STYLE 0xFFFFFFFF
15877 #define NV_066_NOTIFY_STYLE_WRITE_ONLY 0x00000000
15878 #define NV_066_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001
15879 /* Alias NV_066_SET_NOTIFY */
15880 /* Alias NV_066_SET_NOTIFY */
15881 #define NV_066_SET_NOTIFY_PARAMETER 0xFFFFFFFF
15882 #define NV_066_SET_NOTIFY_PARAMETER_WRITE 0x00000000
15883 
15884 /* NV-Register NV_066_SET_CONTEXT_DMA_NOTIFY */
15885 #define NV_066_SET_CONTEXT_DMA_NOTIFY 0x00660180
15886 #define NV_066_SET_CONTEXT_DMA_NOTIFY_PARAMETER 0xFFFFFFFF
15887 
15888 /* NV-Register NV_066_SET_IMAGE_OUTPUT */
15889 #define NV_066_SET_IMAGE_OUTPUT 0x00660200
15890 #define NV_066_SET_IMAGE_OUTPUT_PARAMETER 0xFFFFFFFF
15891 
15892 /* NV-Register NV_066_SET_BETA_INPUT */
15893 #define NV_066_SET_BETA_INPUT 0x00660204
15894 #define NV_066_SET_BETA_INPUT_PARAMETER 0xFFFFFFFF
15895 
15896 /* NV-Register NV_066_SET_IMAGE_INPUT */
15897 #define NV_066_SET_IMAGE_INPUT 0x00660208
15898 #define NV_066_SET_IMAGE_INPUT_PARAMETER 0xFFFFFFFF
15899 
15900 /* NV-Device NV_060 */
15901 #define NV_060 0x00690000 /* size: 0x00001FFF */
15902 #define NV4_INDEXED_IMAGE_FROM_CPU 0x00000060
15903 
15904 /* NV-Register NV_060_CTX_SWITCH */
15905 #define NV_060_CTX_SWITCH 0x00690000
15906 #define NV_060_CTX_SWITCH_INSTANCE 0x0000FFFF
15907 #define NV_060_CTX_SWITCH_CHID 0x007F0000
15908 #define NV_060_CTX_SWITCH_VOLATILE 0x80000000
15909 #define NV_060_CTX_SWITCH_VOLATILE_IGNORE 0x7FFFFFFF
15910 #define NV_060_CTX_SWITCH_VOLATILE_RESET 0x80000000
15911 
15912 /* NV-Register NV_060_NOP */
15913 #define NV_060_NOP 0x00690100
15914 #define NV_060_NOP_PARAMETER 0xFFFFFFFF
15915 
15916 /* NV-Register NV_060_NOTIFY */
15917 #define NV_060_NOTIFY 0x00690104
15918 #define NV_060_NOTIFY_STYLE 0xFFFFFFFF
15919 #define NV_060_NOTIFY_STYLE_WRITE_ONLY 0x00000000
15920 #define NV_060_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001
15921 
15922 /* NV-Register NV_060_SET_NOTIFY */
15923 #define NV_060_SET_NOTIFY 0x00690104
15924 /* Alias NV_060_NOTIFY */
15925 /* Alias NV_060_NOTIFY */
15926 #define NV_060_SET_NOTIFY_PARAMETER 0xFFFFFFFF
15927 #define NV_060_SET_NOTIFY_PARAMETER_WRITE 0x00000000
15928 
15929 /* NV-Register NV_060_SET_PATCH */
15930 #define NV_060_SET_PATCH 0x0069010C
15931 #define NV_060_SET_PATCH_PARAMETER 0xFFFFFFFF
15932 #define NV_060_SET_PATCH_PARAMETER_INVALIDATE 0x00000000
15933 #define NV_060_SET_PATCH_PARAMETER_VALIDATE 0x00000001
15934 
15935 /* NV-Register NV_060_SET_CONTEXT_DMA_NOTIFY */
15936 #define NV_060_SET_CONTEXT_DMA_NOTIFY 0x00690180
15937 #define NV_060_SET_CONTEXT_DMA_NOTIFY_PARAMETER 0xFFFFFFFF
15938 
15939 /* NV-Register NV_060_SET_CONTEXT_DMA_LUT */
15940 #define NV_060_SET_CONTEXT_DMA_LUT 0x00690184
15941 #define NV_060_SET_CONTEXT_DMA_LUT_PARAMETER 0xFFFFFFFF
15942 
15943 /* NV-Register NV_060_SET_IMAGE_OUTPUT */
15944 #define NV_060_SET_IMAGE_OUTPUT 0x00690200
15945 #define NV_060_SET_IMAGE_OUTPUT_PARAMETER 0xFFFFFFFF
15946 
15947 /* NV-Register NV_060_SET_COLOR_FORMAT */
15948 #define NV_060_SET_COLOR_FORMAT 0x006903E8
15949 #define NV_060_SET_COLOR_FORMAT_LE 0xFFFFFFFF
15950 #define NV_060_SET_COLOR_FORMAT_LE_R5G6B5 0x00000001
15951 #define NV_060_SET_COLOR_FORMAT_LE_A1R5G5B5 0x00000002
15952 #define NV_060_SET_COLOR_FORMAT_LE_X1R5G5B5 0x00000003
15953 #define NV_060_SET_COLOR_FORMAT_LE_A8R8G8B8 0x00000004
15954 #define NV_060_SET_COLOR_FORMAT_LE_X8R8G8B8 0x00000005
15955 
15956 /* NV-Register NV_060_INDEX_FORMAT */
15957 #define NV_060_INDEX_FORMAT 0x006903EC
15958 #define NV_060_INDEX_FORMAT_LE 0xFFFFFFFF
15959 #define NV_060_INDEX_FORMAT_LE_I8 0x00000000
15960 #define NV_060_INDEX_FORMAT_LE_I4 0x00000001
15961 
15962 /* NV-Register NV_060_LUT_OFFSET */
15963 #define NV_060_LUT_OFFSET 0x006903F0
15964 #define NV_060_LUT_OFFSET_ARGUMENT 0xFFFFFFFF
15965 
15966 /* NV-Register NV_060_POINT */
15967 #define NV_060_POINT 0x006903F4
15968 #define NV_060_POINT_X 0x0000FFFF
15969 #define NV_060_POINT_Y 0xFFFF0000
15970 
15971 /* NV-Register NV_060_SIZE_OUT */
15972 #define NV_060_SIZE_OUT 0x006903F8
15973 #define NV_060_SIZE_OUT_WIDTH 0x0000FFFF
15974 #define NV_060_SIZE_OUT_HEIGHT 0xFFFF0000
15975 
15976 /* NV-Register NV_060_SIZE_IN */
15977 #define NV_060_SIZE_IN 0x006903FC
15978 #define NV_060_SIZE_IN_WIDTH 0x0000FFFF
15979 #define NV_060_SIZE_IN_HEIGHT 0xFFFF0000
15980 
15981 /* NV-Array NV_060_COLOR (4 byte access) */
15982 #define NV_060_COLOR 0x00690400
15983 /* NV-Array size NV_060_COLOR__SIZE_1 [0..1791] */
15984 #define NV_060_COLOR__SIZE_1 0x00000700
15985 #define NV_060_COLOR_VALUE 0xFFFFFFFF
15986 
15987 /* NV-Device NV_ULIN */
15988 #define NV_ULIN 0x004A0000 /* size: 0x00001FFF */
15989 #define NV4_RENDER_SOLID_LIN 0x0000005C
15990 
15991 /* NV-Register NV_ULIN_CTX_SWITCH */
15992 #define NV_ULIN_CTX_SWITCH 0x004A0000
15993 #define NV_ULIN_CTX_SWITCH_INSTANCE 0x0000FFFF
15994 #define NV_ULIN_CTX_SWITCH_CHID 0x007F0000
15995 #define NV_ULIN_CTX_SWITCH_VOLATILE 0x80000000
15996 #define NV_ULIN_CTX_SWITCH_VOLATILE_IGNORE 0x7FFFFFFF
15997 #define NV_ULIN_CTX_SWITCH_VOLATILE_RESET 0x80000000
15998 
15999 /* NV-Register NV_ULIN_NOP */
16000 #define NV_ULIN_NOP 0x004A0100
16001 #define NV_ULIN_NOP_PARAMETER 0xFFFFFFFF
16002 
16003 /* NV-Register NV_ULIN_NOTIFY */
16004 #define NV_ULIN_NOTIFY 0x004A0104
16005 #define NV_ULIN_NOTIFY_STYLE 0xFFFFFFFF
16006 #define NV_ULIN_NOTIFY_STYLE_WRITE_ONLY 0x00000000
16007 #define NV_ULIN_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001
16008 
16009 /* NV-Register NV_ULIN_SET_NOTIFY */
16010 #define NV_ULIN_SET_NOTIFY 0x004A0104
16011 /* Alias NV_ULIN_NOTIFY */
16012 /* Alias NV_ULIN_NOTIFY */
16013 #define NV_ULIN_SET_NOTIFY_PARAMETER 0xFFFFFFFF
16014 #define NV_ULIN_SET_NOTIFY_PARAMETER_WRITE 0x00000000
16015 
16016 /* NV-Register NV_ULIN_SET_PATCH */
16017 #define NV_ULIN_SET_PATCH 0x004A010C
16018 #define NV_ULIN_SET_PATCH_PARAMETER 0xFFFFFFFF
16019 #define NV_ULIN_SET_PATCH_PARAMETER_INVALIDATE 0x00000000
16020 #define NV_ULIN_SET_PATCH_PARAMETER_VALIDATE 0x00000001
16021 
16022 /* NV-Register NV_ULIN_SET_CONTEXT_DMA_NOTIFY */
16023 #define NV_ULIN_SET_CONTEXT_DMA_NOTIFY 0x004A0180
16024 #define NV_ULIN_SET_CONTEXT_DMA_NOTIFY_PARAMETER 0xFFFFFFFF
16025 
16026 /* NV-Register NV_ULIN_SET_IMAGE_OUTPUT */
16027 #define NV_ULIN_SET_IMAGE_OUTPUT 0x004A0200
16028 #define NV_ULIN_SET_IMAGE_OUTPUT_PARAMETER 0xFFFFFFFF
16029 
16030 /* NV-Register NV_ULIN_SET_COLOR_FORMAT */
16031 #define NV_ULIN_SET_COLOR_FORMAT 0x004A0300
16032 #define NV_ULIN_SET_COLOR_FORMAT_LE 0xFFFFFFFF
16033 #define NV_ULIN_SET_COLOR_FORMAT_LE_X16R5G6B5 0x00000001
16034 #ifndef NV_ULIN_SET_COLOR_FORMAT_LE_X17R5G5B5
16035 #define NV_ULIN_SET_COLOR_FORMAT_LE_X17R5G5B5 0x00000002
16036 #endif
16037 #ifndef NV_ULIN_SET_COLOR_FORMAT_LE_X8R8G8B8
16038 #define NV_ULIN_SET_COLOR_FORMAT_LE_X8R8G8B8 0x00000003
16039 #endif
16040 
16041 /* NV-Register NV_ULIN_COLOR */
16042 #define NV_ULIN_COLOR 0x004A0304
16043 #define NV_ULIN_COLOR_VALUE 0xFFFFFFFF
16044 
16045 /* NV-Array NV_ULIN_LIN_0 (8 byte access) */
16046 #define NV_ULIN_LIN_0 0x004A0400
16047 /* NV-Array size NV_ULIN_LIN_0__SIZE_1 [0..15] */
16048 #define NV_ULIN_LIN_0__SIZE_1 0x00000010
16049 #define NV_ULIN_LIN_0_X 0x0000FFFF
16050 #define NV_ULIN_LIN_0_Y 0xFFFF0000
16051 
16052 /* NV-Array NV_ULIN_LIN_1 (8 byte access) */
16053 #define NV_ULIN_LIN_1 0x004A0404
16054 /* NV-Array size NV_ULIN_LIN_1__SIZE_1 [0..15] */
16055 #define NV_ULIN_LIN_1__SIZE_1 0x00000010
16056 #define NV_ULIN_LIN_1_X 0x0000FFFF
16057 #define NV_ULIN_LIN_1_Y 0xFFFF0000
16058 
16059 /* NV-Array NV_ULIN_LIN32_0 (16 byte access) */
16060 #define NV_ULIN_LIN32_0 0x004A0480
16061 /* NV-Array size NV_ULIN_LIN32_0__SIZE_1 [0..7] */
16062 #define NV_ULIN_LIN32_0__SIZE_1 0x00000008
16063 #define NV_ULIN_LIN32_0_X 0xFFFFFFFF
16064 
16065 /* NV-Array NV_ULIN_LIN32_1 (16 byte access) */
16066 #define NV_ULIN_LIN32_1 0x004A0484
16067 /* NV-Array size NV_ULIN_LIN32_1__SIZE_1 [0..7] */
16068 #define NV_ULIN_LIN32_1__SIZE_1 0x00000008
16069 #define NV_ULIN_LIN32_1_Y 0xFFFFFFFF
16070 
16071 /* NV-Array NV_ULIN_LIN32_2 (16 byte access) */
16072 #define NV_ULIN_LIN32_2 0x004A0488
16073 /* NV-Array size NV_ULIN_LIN32_2__SIZE_1 [0..7] */
16074 #define NV_ULIN_LIN32_2__SIZE_1 0x00000008
16075 #define NV_ULIN_LIN32_2_X 0xFFFFFFFF
16076 
16077 /* NV-Array NV_ULIN_LIN32_3 (16 byte access) */
16078 #define NV_ULIN_LIN32_3 0x004A048C
16079 /* NV-Array size NV_ULIN_LIN32_3__SIZE_1 [0..7] */
16080 #define NV_ULIN_LIN32_3__SIZE_1 0x00000008
16081 #define NV_ULIN_LIN32_3_Y 0xFFFFFFFF
16082 
16083 /* NV-Array NV_ULIN_POLYLIN (4 byte access) */
16084 #define NV_ULIN_POLYLIN 0x004A0500
16085 /* NV-Array size NV_ULIN_POLYLIN__SIZE_1 [0..31] */
16086 #define NV_ULIN_POLYLIN__SIZE_1 0x00000020
16087 #define NV_ULIN_POLYLIN_X 0x0000FFFF
16088 #define NV_ULIN_POLYLIN_Y 0xFFFF0000
16089 
16090 /* NV-Array NV_ULIN_POLYLIN32_0 (8 byte access) */
16091 #define NV_ULIN_POLYLIN32_0 0x004A0580
16092 /* NV-Array size NV_ULIN_POLYLIN32_0__SIZE_1 [0..15] */
16093 #define NV_ULIN_POLYLIN32_0__SIZE_1 0x00000010
16094 #define NV_ULIN_POLYLIN32_0_X 0xFFFFFFFF
16095 
16096 /* NV-Array NV_ULIN_POLYLIN32_1 (8 byte access) */
16097 #define NV_ULIN_POLYLIN32_1 0x004A0584
16098 /* NV-Array size NV_ULIN_POLYLIN32_1__SIZE_1 [0..15] */
16099 #define NV_ULIN_POLYLIN32_1__SIZE_1 0x00000010
16100 #define NV_ULIN_POLYLIN32_1_Y 0xFFFFFFFF
16101 
16102 /* NV-Array NV_ULIN_CPOLYLIN_0 (8 byte access) */
16103 #define NV_ULIN_CPOLYLIN_0 0x004A0600
16104 /* NV-Array size NV_ULIN_CPOLYLIN_0__SIZE_1 [0..15] */
16105 #define NV_ULIN_CPOLYLIN_0__SIZE_1 0x00000010
16106 #define NV_ULIN_CPOLYLIN_0_COLOR 0xFFFFFFFF
16107 
16108 /* NV-Array NV_ULIN_CPOLYLIN_1 (8 byte access) */
16109 #define NV_ULIN_CPOLYLIN_1 0x004A0604
16110 /* NV-Array size NV_ULIN_CPOLYLIN_1__SIZE_1 [0..15] */
16111 #define NV_ULIN_CPOLYLIN_1__SIZE_1 0x00000010
16112 #define NV_ULIN_CPOLYLIN_1_X 0x0000FFFF
16113 #define NV_ULIN_CPOLYLIN_1_Y 0xFFFF0000
16114 
16115 /* NV-Device NV_URECT */
16116 #define NV_URECT 0x00470000 /* size: 0x00001FFF */
16117 #define NV_RENDER_SOLID_RECTANGLE 0x005E0000
16118 
16119 /* NV-Register NV_URECT_CTX_SWITCH */
16120 #define NV_URECT_CTX_SWITCH 0x00470000
16121 #define NV_URECT_CTX_SWITCH_INSTANCE 0x0000FFFF
16122 #define NV_URECT_CTX_SWITCH_CHID 0x007F0000
16123 #define NV_URECT_CTX_SWITCH_VOLATILE 0x80000000
16124 #define NV_URECT_CTX_SWITCH_VOLATILE_IGNORE 0x7FFFFFFF
16125 #define NV_URECT_CTX_SWITCH_VOLATILE_RESET 0x80000000
16126 
16127 /* NV-Register NV_URECT_NOP */
16128 #define NV_URECT_NOP 0x00470100
16129 #define NV_URECT_NOP_PARAMETER 0xFFFFFFFF
16130 
16131 /* NV-Register NV_URECT_NOTIFY */
16132 #define NV_URECT_NOTIFY 0x00470104
16133 #define NV_URECT_NOTIFY_STYLE 0xFFFFFFFF
16134 #define NV_URECT_NOTIFY_STYLE_WRITE_ONLY 0x00000000
16135 #define NV_URECT_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001
16136 
16137 /* NV-Register NV_URECT_SET_NOTIFY */
16138 #define NV_URECT_SET_NOTIFY 0x00470104
16139 /* Alias NV_URECT_NOTIFY */
16140 /* Alias NV_URECT_NOTIFY */
16141 #define NV_URECT_SET_NOTIFY_PARAMETER 0xFFFFFFFF
16142 #define NV_URECT_SET_NOTIFY_PARAMETER_WRITE 0x00000000
16143 
16144 /* NV-Register NV_URECT_SET_PATCH */
16145 #define NV_URECT_SET_PATCH 0x0047010C
16146 #define NV_URECT_SET_PATCH_PARAMETER 0xFFFFFFFF
16147 #define NV_URECT_SET_PATCH_PARAMETER_INVALIDATE 0x00000000
16148 #define NV_URECT_SET_PATCH_PARAMETER_VALIDATE 0x00000001
16149 
16150 /* NV-Register NV_URECT_SET_CONTEXT_DMA_NOTIFY */
16151 #define NV_URECT_SET_CONTEXT_DMA_NOTIFY 0x00470180
16152 #define NV_URECT_SET_CONTEXT_DMA_NOTIFY_PARAMETER 0xFFFFFFFF
16153 
16154 /* NV-Register NV_URECT_SET_IMAGE_OUTPUT */
16155 #define NV_URECT_SET_IMAGE_OUTPUT 0x00470200
16156 #define NV_URECT_SET_IMAGE_OUTPUT_PARAMETER 0xFFFFFFFF
16157 
16158 /* NV-Register NV_URECT_SET_COLOR_FORMAT */
16159 #define NV_URECT_SET_COLOR_FORMAT 0x00470300
16160 #define NV_URECT_SET_COLOR_FORMAT_LE 0xFFFFFFFF
16161 #define NV_URECT_SET_COLOR_FORMAT_LE_X16R5G6B5 0x00000001
16162 #define NV_URECT_SET_COLOR_FORMAT_LE_X17R5G5B5 0x00000002
16163 #define NV_URECT_SET_COLOR_FORMAT_LE_X8R8G8B8 0x00000003
16164 
16165 /* NV-Register NV_URECT_COLOR */
16166 #define NV_URECT_COLOR 0x00470304
16167 #define NV_URECT_COLOR_VALUE 0xFFFFFFFF
16168 
16169 /* NV-Array NV_URECT_RECTANGLE_0 (8 byte access) */
16170 #define NV_URECT_RECTANGLE_0 0x00470400
16171 /* NV-Array size NV_URECT_RECTANGLE_0__SIZE_1 [0..15] */
16172 #define NV_URECT_RECTANGLE_0__SIZE_1 0x00000010
16173 #define NV_URECT_RECTANGLE_0_X 0x0000FFFF
16174 #define NV_URECT_RECTANGLE_0_Y 0xFFFF0000
16175 
16176 /* NV-Array NV_URECT_RECTANGLE_1 (8 byte access) */
16177 #define NV_URECT_RECTANGLE_1 0x00470404
16178 /* NV-Array size NV_URECT_RECTANGLE_1__SIZE_1 [0..15] */
16179 #define NV_URECT_RECTANGLE_1__SIZE_1 0x00000010
16180 #define NV_URECT_RECTANGLE_1_WIDTH 0x0000FFFF
16181 #define NV_URECT_RECTANGLE_1_HEIGHT 0xFFFF0000
16182 
16183 /* NV-Device NV_UTRI */
16184 #define NV_UTRI 0x004B0000 /* size: 0x00001FFF */
16185 #define NV_RENDER_SOLID_TRIANGLE 0x005D0000
16186 
16187 /* NV-Register NV_UTRI_CTX_SWITCH */
16188 #define NV_UTRI_CTX_SWITCH 0x004B0000
16189 #define NV_UTRI_CTX_SWITCH_INSTANCE 0x0000FFFF
16190 #define NV_UTRI_CTX_SWITCH_CHID 0x007F0000
16191 #define NV_UTRI_CTX_SWITCH_VOLATILE 0x80000000
16192 #define NV_UTRI_CTX_SWITCH_VOLATILE_IGNORE 0x7FFFFFFF
16193 #define NV_UTRI_CTX_SWITCH_VOLATILE_RESET 0x80000000
16194 
16195 /* NV-Register NV_UTRI_NOP */
16196 #define NV_UTRI_NOP 0x004B0100
16197 #define NV_UTRI_NOP_PARAMETER 0xFFFFFFFF
16198 
16199 /* NV-Register NV_UTRI_NOTIFY */
16200 #define NV_UTRI_NOTIFY 0x004B0104
16201 #define NV_UTRI_NOTIFY_STYLE 0xFFFFFFFF
16202 #define NV_UTRI_NOTIFY_STYLE_WRITE_ONLY 0x00000000
16203 #define NV_UTRI_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001
16204 
16205 /* NV-Register NV_UTRI_SET_NOTIFY */
16206 #define NV_UTRI_SET_NOTIFY 0x004B0104
16207 /* Alias NV_UTRI_NOTIFY */
16208 /* Alias NV_UTRI_NOTIFY */
16209 #define NV_UTRI_SET_NOTIFY_PARAMETER 0xFFFFFFFF
16210 #define NV_UTRI_SET_NOTIFY_PARAMETER_WRITE 0x00000000
16211 
16212 /* NV-Register NV_UTRI_SET_PATCH */
16213 #define NV_UTRI_SET_PATCH 0x004B010C
16214 #define NV_UTRI_SET_PATCH_PARAMETER 0xFFFFFFFF
16215 #define NV_UTRI_SET_PATCH_PARAMETER_INVALIDATE 0x00000000
16216 #define NV_UTRI_SET_PATCH_PARAMETER_VALIDATE 0x00000001
16217 
16218 /* NV-Register NV_UTRI_SET_CONTEXT_DMA_NOTIFY */
16219 #define NV_UTRI_SET_CONTEXT_DMA_NOTIFY 0x004B0180
16220 #define NV_UTRI_SET_CONTEXT_DMA_NOTIFY_PARAMETER 0xFFFFFFFF
16221 
16222 /* NV-Register NV_UTRI_SET_IMAGE_OUTPUT */
16223 #define NV_UTRI_SET_IMAGE_OUTPUT 0x004B0200
16224 #define NV_UTRI_SET_IMAGE_OUTPUT_PARAMETER 0xFFFFFFFF
16225 
16226 /* NV-Register NV_UTRI_SET_COLOR_FORMAT */
16227 #define NV_UTRI_SET_COLOR_FORMAT 0x004B0300
16228 #define NV_UTRI_SET_COLOR_FORMAT_LE 0xFFFFFFFF
16229 #define NV_UTRI_SET_COLOR_FORMAT_LE_X16R5G6B5 0x00000001
16230 #define NV_UTRI_SET_COLOR_FORMAT_LE_X17R5G5B5 0x00000002
16231 #define NV_UTRI_SET_COLOR_FORMAT_LE_X8R8G8B8 0x00000003
16232 
16233 /* NV-Register NV_UTRI_COLOR */
16234 #define NV_UTRI_COLOR 0x004B0304
16235 #define NV_UTRI_COLOR_VALUE 0xFFFFFFFF
16236 
16237 /* NV-Register NV_UTRI_TRIANGLE_0 */
16238 #define NV_UTRI_TRIANGLE_0 0x004B0310
16239 #define NV_UTRI_TRIANGLE_0_X 0x0000FFFF
16240 #define NV_UTRI_TRIANGLE_0_Y 0xFFFF0000
16241 
16242 /* NV-Register NV_UTRI_TRIANGLE_1 */
16243 #define NV_UTRI_TRIANGLE_1 0x004B0314
16244 #define NV_UTRI_TRIANGLE_1_X 0x0000FFFF
16245 #define NV_UTRI_TRIANGLE_1_Y 0xFFFF0000
16246 
16247 /* NV-Register NV_UTRI_TRIANGLE_2 */
16248 #define NV_UTRI_TRIANGLE_2 0x004B0318
16249 #define NV_UTRI_TRIANGLE_2_X 0x0000FFFF
16250 #define NV_UTRI_TRIANGLE_2_Y 0xFFFF0000
16251 
16252 /* NV-Register NV_UTRI_TRIANGLE32_0 */
16253 #define NV_UTRI_TRIANGLE32_0 0x004B0320
16254 #define NV_UTRI_TRIANGLE32_0_X 0xFFFFFFFF
16255 
16256 /* NV-Register NV_UTRI_TRIANGLE32_1 */
16257 #define NV_UTRI_TRIANGLE32_1 0x004B0324
16258 #define NV_UTRI_TRIANGLE32_1_Y 0xFFFFFFFF
16259 
16260 /* NV-Register NV_UTRI_TRIANGLE32_2 */
16261 #define NV_UTRI_TRIANGLE32_2 0x004B0328
16262 #define NV_UTRI_TRIANGLE32_2_X 0xFFFFFFFF
16263 
16264 /* NV-Register NV_UTRI_TRIANGLE32_3 */
16265 #define NV_UTRI_TRIANGLE32_3 0x004B032C
16266 #define NV_UTRI_TRIANGLE32_3_Y 0xFFFFFFFF
16267 
16268 /* NV-Register NV_UTRI_TRIANGLE32_4 */
16269 #define NV_UTRI_TRIANGLE32_4 0x004B0330
16270 #define NV_UTRI_TRIANGLE32_4_X 0xFFFFFFFF
16271 
16272 /* NV-Register NV_UTRI_TRIANGLE32_5 */
16273 #define NV_UTRI_TRIANGLE32_5 0x004B0334
16274 #define NV_UTRI_TRIANGLE32_5_Y 0xFFFFFFFF
16275 
16276 /* NV-Array NV_UTRI_TRIMESH (4 byte access) */
16277 #define NV_UTRI_TRIMESH 0x004B0400
16278 /* NV-Array size NV_UTRI_TRIMESH__SIZE_1 [0..31] */
16279 #define NV_UTRI_TRIMESH__SIZE_1 0x00000020
16280 #define NV_UTRI_TRIMESH_X 0x0000FFFF
16281 #define NV_UTRI_TRIMESH_Y 0xFFFF0000
16282 
16283 /* NV-Array NV_UTRI_TRIMESH32_0 (8 byte access) */
16284 #define NV_UTRI_TRIMESH32_0 0x004B0480
16285 /* NV-Array size NV_UTRI_TRIMESH32_0__SIZE_1 [0..15] */
16286 #define NV_UTRI_TRIMESH32_0__SIZE_1 0x00000010
16287 #define NV_UTRI_TRIMESH32_0_X 0xFFFFFFFF
16288 
16289 /* NV-Array NV_UTRI_TRIMESH32_1 (8 byte access) */
16290 #define NV_UTRI_TRIMESH32_1 0x004B0484
16291 /* NV-Array size NV_UTRI_TRIMESH32_1__SIZE_1 [0..15] */
16292 #define NV_UTRI_TRIMESH32_1__SIZE_1 0x00000010
16293 #define NV_UTRI_TRIMESH32_1_Y 0xFFFFFFFF
16294 
16295 /* NV-Array NV_UTRI_CTRIANGLE_0 (16 byte access) */
16296 #define NV_UTRI_CTRIANGLE_0 0x004B0500
16297 /* NV-Array size NV_UTRI_CTRIANGLE_0__SIZE_1 [0..7] */
16298 #define NV_UTRI_CTRIANGLE_0__SIZE_1 0x00000008
16299 #define NV_UTRI_CTRIANGLE_0_COLOR 0xFFFFFFFF
16300 
16301 /* NV-Array NV_UTRI_CTRIANGLE_1 (16 byte access) */
16302 #define NV_UTRI_CTRIANGLE_1 0x004B0504
16303 /* NV-Array size NV_UTRI_CTRIANGLE_1__SIZE_1 [0..7] */
16304 #define NV_UTRI_CTRIANGLE_1__SIZE_1 0x00000008
16305 #define NV_UTRI_CTRIANGLE_1_X 0x0000FFFF
16306 #define NV_UTRI_CTRIANGLE_1_Y 0xFFFF0000
16307 
16308 /* NV-Array NV_UTRI_CTRIANGLE_2 (16 byte access) */
16309 #define NV_UTRI_CTRIANGLE_2 0x004B0508
16310 /* NV-Array size NV_UTRI_CTRIANGLE_2__SIZE_1 [0..7] */
16311 #define NV_UTRI_CTRIANGLE_2__SIZE_1 0x00000008
16312 #define NV_UTRI_CTRIANGLE_2_X 0x0000FFFF
16313 #define NV_UTRI_CTRIANGLE_2_Y 0xFFFF0000
16314 
16315 /* NV-Array NV_UTRI_CTRIANGLE_3 (16 byte access) */
16316 #define NV_UTRI_CTRIANGLE_3 0x004B050C
16317 /* NV-Array size NV_UTRI_CTRIANGLE_3__SIZE_1 [0..7] */
16318 #define NV_UTRI_CTRIANGLE_3__SIZE_1 0x00000008
16319 #define NV_UTRI_CTRIANGLE_3_X 0x0000FFFF
16320 #define NV_UTRI_CTRIANGLE_3_Y 0xFFFF0000
16321 
16322 /* NV-Array NV_UTRI_CTRIMESH_0 (8 byte access) */
16323 #define NV_UTRI_CTRIMESH_0 0x004B0580
16324 /* NV-Array size NV_UTRI_CTRIMESH_0__SIZE_1 [0..15] */
16325 #define NV_UTRI_CTRIMESH_0__SIZE_1 0x00000010
16326 #define NV_UTRI_CTRIMESH_0_COLOR 0xFFFFFFFF
16327 
16328 /* NV-Array NV_UTRI_CTRIMESH_1 (8 byte access) */
16329 #define NV_UTRI_CTRIMESH_1 0x004B0584
16330 /* NV-Array size NV_UTRI_CTRIMESH_1__SIZE_1 [0..15] */
16331 #define NV_UTRI_CTRIMESH_1__SIZE_1 0x00000010
16332 #define NV_UTRI_CTRIMESH_1_X 0x0000FFFF
16333 #define NV_UTRI_CTRIMESH_1_Y 0xFFFF0000
16334 
16335 /* NV-Device NV_USCALED */
16336 #define NV_USCALED 0x004E0000 /* size: 0x00001FFF */
16337 #define NV_SCALED_IMAGE_FROM_MEMORY 0x00770000
16338 
16339 /* NV-Register NV_USCALED_CTX_SWITCH */
16340 #define NV_USCALED_CTX_SWITCH 0x004E0000
16341 #define NV_USCALED_CTX_SWITCH_INSTANCE 0x0000FFFF
16342 #define NV_USCALED_CTX_SWITCH_CHID 0x007F0000
16343 #define NV_USCALED_CTX_SWITCH_VOLATILE 0x80000000
16344 #define NV_USCALED_CTX_SWITCH_VOLATILE_IGNORE 0x7FFFFFFF
16345 #define NV_USCALED_CTX_SWITCH_VOLATILE_RESET 0x80000000
16346 
16347 /* NV-Register NV_USCALED_NOP */
16348 #define NV_USCALED_NOP 0x004E0100
16349 #define NV_USCALED_NOP_PARAMETER 0xFFFFFFFF
16350 
16351 /* NV-Register NV_USCALED_NOTIFY */
16352 #define NV_USCALED_NOTIFY 0x004E0104
16353 #define NV_USCALED_NOTIFY_STYLE 0xFFFFFFFF
16354 #define NV_USCALED_NOTIFY_STYLE_WRITE_ONLY 0x00000000
16355 #define NV_USCALED_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001
16356 
16357 /* NV-Register NV_USCALED_SET_NOTIFY */
16358 #define NV_USCALED_SET_NOTIFY 0x004E0104
16359 /* Alias NV_USCALED_NOTIFY */
16360 /* Alias NV_USCALED_NOTIFY */
16361 #define NV_USCALED_SET_NOTIFY_PARAMETER 0xFFFFFFFF
16362 #define NV_USCALED_SET_NOTIFY_PARAMETER_WRITE 0x00000000
16363 
16364 /* NV-Register NV_USCALED_SET_PATCH */
16365 #define NV_USCALED_SET_PATCH 0x004E010C
16366 #define NV_USCALED_SET_PATCH_PARAMETER 0xFFFFFFFF
16367 #define NV_USCALED_SET_PATCH_PARAMETER_INVALIDATE 0x00000000
16368 #define NV_USCALED_SET_PATCH_PARAMETER_VALIDATE 0x00000001
16369 
16370 /* NV-Register NV_USCALED_SET_CONTEXT_DMA_NOTIFY */
16371 #define NV_USCALED_SET_CONTEXT_DMA_NOTIFY 0x004E0180
16372 #define NV_USCALED_SET_CONTEXT_DMA_NOTIFY_PARAMETER 0xFFFFFFFF
16373 
16374 /* NV-Register NV_USCALED_SET_CONTEXT_DMA_IMAGE */
16375 #define NV_USCALED_SET_CONTEXT_DMA_IMAGE 0x004E0184
16376 #define NV_USCALED_SET_CONTEXT_DMA_IMAGE_PARAMETER 0xFFFFFFFF
16377 
16378 /* NV-Register NV_USCALED_SET_IMAGE_OUTPUT */
16379 #define NV_USCALED_SET_IMAGE_OUTPUT 0x004E0200
16380 #define NV_USCALED_SET_IMAGE_OUTPUT_PARAMETER 0xFFFFFFFF
16381 
16382 /* NV-Register NV_USCALED_SET_COLOR_FORMAT */
16383 #define NV_USCALED_SET_COLOR_FORMAT 0x004E0300
16384 #define NV_USCALED_SET_COLOR_FORMAT_LE 0xFFFFFFFF
16385 #define NV_USCALED_SET_COLOR_FORMAT_LE_A1R5G5B5 0x00000001
16386 #define NV_USCALED_SET_COLOR_FORMAT_LE_X1R5G5B5 0x00000002
16387 #define NV_USCALED_SET_COLOR_FORMAT_LE_A8R8G8B8 0x00000003
16388 #define NV_USCALED_SET_COLOR_FORMAT_LE_X8R8G8B8 0x00000004
16389 #define NV_USCALED_SET_COLOR_FORMAT_LE_V8YB8U8YA8 0x00000005
16390 #define NV_USCALED_SET_COLOR_FORMAT_LE_YB8V8YA8U8 0x00000006
16391 #define NV_USCALED_SET_COLOR_FORMAT_LE_R5G6B5 0x00000007
16392 
16393 /* NV-Register NV_USCALED_CLIP_0 */
16394 #define NV_USCALED_CLIP_0 0x004E0308
16395 #define NV_USCALED_CLIP_0_X 0x0000FFFF
16396 #define NV_USCALED_CLIP_0_Y 0xFFFF0000
16397 
16398 /* NV-Register NV_USCALED_CLIP_1 */
16399 #define NV_USCALED_CLIP_1 0x004E030C
16400 #define NV_USCALED_CLIP_1_WIDTH 0x0000FFFF
16401 #define NV_USCALED_CLIP_1_HEIGHT 0xFFFF0000
16402 
16403 /* NV-Register NV_USCALED_RECTANGLE_OUT_0 */
16404 #define NV_USCALED_RECTANGLE_OUT_0 0x004E0310
16405 #define NV_USCALED_RECTANGLE_OUT_0_X 0x0000FFFF
16406 #define NV_USCALED_RECTANGLE_OUT_0_Y 0xFFFF0000
16407 
16408 /* NV-Register NV_USCALED_RECTANGLE_OUT_1 */
16409 #define NV_USCALED_RECTANGLE_OUT_1 0x004E0314
16410 #define NV_USCALED_RECTANGLE_OUT_1_WIDTH 0x0000FFFF
16411 #define NV_USCALED_RECTANGLE_OUT_1_HEIGHT 0xFFFF0000
16412 
16413 /* NV-Register NV_USCALED_DELTA_DU_DX */
16414 #define NV_USCALED_DELTA_DU_DX 0x004E0318
16415 #define NV_USCALED_DELTA_DU_DX_R_FRACTION 0x000FFFFF
16416 #define NV_USCALED_DELTA_DU_DX_R_INT 0xFFF00000
16417 #define NV_USCALED_DELTA_DU_DX_R 0xFFFFFFFF
16418 
16419 /* NV-Register NV_USCALED_DELTA_DV_DY */
16420 #define NV_USCALED_DELTA_DV_DY 0x004E031C
16421 #define NV_USCALED_DELTA_DV_DY_R_FRACTION 0x000FFFFF
16422 #define NV_USCALED_DELTA_DV_DY_R_INT 0xFFF00000
16423 #define NV_USCALED_DELTA_DV_DY_R 0xFFFFFFFF
16424 
16425 /* NV-Register NV_USCALED_SIZE */
16426 #define NV_USCALED_SIZE 0x004E0400
16427 #define NV_USCALED_SIZE_WIDTH 0x0000FFFF
16428 #define NV_USCALED_SIZE_HEIGHT 0xFFFF0000
16429 
16430 /* NV-Register NV_USCALED_FORMAT */
16431 #define NV_USCALED_FORMAT 0x004E0404
16432 #define NV_USCALED_FORMAT_PITCH 0x0000FFFF
16433 #define NV_USCALED_FORMAT_ORIGIN 0x00FF0000
16434 #define NV_USCALED_FORMAT_ORIGIN_CENTER 0x00010000
16435 #define NV_USCALED_FORMAT_ORIGIN_CORNER 0x00020000
16436 #define NV_USCALED_FORMAT_INTERPOLATOR 0xFF000000
16437 #define NV_USCALED_FORMAT_INTERPOLATOR_ZOH 0x00000000
16438 #define NV_USCALED_FORMAT_INTERPOLATOR_FOH 0x01000000
16439 
16440 /* NV-Register NV_USCALED_OFFSET */
16441 #define NV_USCALED_OFFSET 0x004E0408
16442 #define NV_USCALED_OFFSET_VALUE 0xFFFFFFFF
16443 
16444 /* NV-Register NV_USCALED_POINT */
16445 #define NV_USCALED_POINT 0x004E040C
16446 #define NV_USCALED_POINT_V_FRACTION 0x00000FFF
16447 #define NV_USCALED_POINT_V_INT 0x0000F000
16448 #define NV_USCALED_POINT_V_VALUE 0x0000FFFF
16449 #define NV_USCALED_POINT_U_FRACTION 0x000F0000
16450 #define NV_USCALED_POINT_U_INT 0xFFF00000
16451 #define NV_USCALED_POINT_U_VALUE 0xFFFFFFFF
16452 
16453 /* NV-Device NV_USTRTCH */
16454 #define NV_USTRTCH 0x00550000 /* size: 0x00001FFF */
16455 #define NV_STRETCHED_IMAGE_FROM_CPU 0x00000076
16456 
16457 /* NV-Register NV_USTRTCH_CTX_SWITCH */
16458 #define NV_USTRTCH_CTX_SWITCH 0x00550000
16459 #define NV_USTRTCH_CTX_SWITCH_INSTANCE 0x0000FFFF
16460 #define NV_USTRTCH_CTX_SWITCH_CHID 0x007F0000
16461 #define NV_USTRTCH_CTX_SWITCH_VOLATILE 0x80000000
16462 #define NV_USTRTCH_CTX_SWITCH_VOLATILE_IGNORE 0x7FFFFFFF
16463 #define NV_USTRTCH_CTX_SWITCH_VOLATILE_RESET 0x80000000
16464 
16465 /* NV-Register NV_USTRTCH_NOP */
16466 #define NV_USTRTCH_NOP 0x00550100
16467 #define NV_USTRTCH_NOP_PARAMETER 0xFFFFFFFF
16468 
16469 /* NV-Register NV_USTRTCH_NOTIFY */
16470 #define NV_USTRTCH_NOTIFY 0x00550104
16471 #define NV_USTRTCH_NOTIFY_STYLE 0xFFFFFFFF
16472 #define NV_USTRTCH_NOTIFY_STYLE_WRITE_ONLY 0x00000000
16473 #define NV_USTRTCH_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001
16474 
16475 /* NV-Register NV_USTRTCH_SET_NOTIFY */
16476 #define NV_USTRTCH_SET_NOTIFY 0x00550104
16477 /* Alias NV_USTRTCH_NOTIFY */
16478 /* Alias NV_USTRTCH_NOTIFY */
16479 #define NV_USTRTCH_SET_NOTIFY_PARAMETER 0xFFFFFFFF
16480 #define NV_USTRTCH_SET_NOTIFY_PARAMETER_WRITE 0x00000000
16481 
16482 /* NV-Register NV_USTRTCH_SET_PATCH */
16483 #define NV_USTRTCH_SET_PATCH 0x0055010C
16484 #define NV_USTRTCH_SET_PATCH_PARAMETER 0xFFFFFFFF
16485 #define NV_USTRTCH_SET_PATCH_PARAMETER_INVALIDATE 0x00000000
16486 #define NV_USTRTCH_SET_PATCH_PARAMETER_VALIDATE 0x00000001
16487 
16488 /* NV-Register NV_USTRTCH_SET_CONTEXT_DMA_NOTIFY */
16489 #define NV_USTRTCH_SET_CONTEXT_DMA_NOTIFY 0x00550180
16490 #define NV_USTRTCH_SET_CONTEXT_DMA_NOTIFY_PARAMETER 0xFFFFFFFF
16491 
16492 /* NV-Register NV_USTRTCH_SET_IMAGE_OUTPUT */
16493 #define NV_USTRTCH_SET_IMAGE_OUTPUT 0x00550200
16494 #define NV_USTRTCH_SET_IMAGE_OUTPUT_PARAMETER 0xFFFFFFFF
16495 
16496 /* NV-Register NV_USTRTCH_SET_COLOR_FORMAT */
16497 #define NV_USTRTCH_SET_COLOR_FORMAT 0x00550300
16498 #define NV_USTRTCH_SET_COLOR_FORMAT_LE 0xFFFFFFFF
16499 #define NV_USTRTCH_SET_COLOR_FORMAT_LE_R5G6B5 0x00000001
16500 #define NV_USTRTCH_SET_COLOR_FORMAT_LE_A1R5G5B5 0x00000002
16501 #define NV_USTRTCH_SET_COLOR_FORMAT_LE_X1R5G5B5 0x00000003
16502 #define NV_USTRTCH_SET_COLOR_FORMAT_LE_A8R8G8B8 0x00000004
16503 #define NV_USTRTCH_SET_COLOR_FORMAT_LE_X8R8G8B8 0x00000005
16504 
16505 /* NV-Register NV_USTRTCH_SIZE_IN */
16506 #define NV_USTRTCH_SIZE_IN 0x00550304
16507 #define NV_USTRTCH_SIZE_IN_WIDTH 0x0000FFFF
16508 #define NV_USTRTCH_SIZE_IN_HEIGHT 0xFFFF0000
16509 
16510 /* NV-Register NV_USTRTCH_DELTA_DX_DU */
16511 #define NV_USTRTCH_DELTA_DX_DU 0x00550308
16512 #define NV_USTRTCH_DELTA_DX_DU_R_FRACTION 0x000FFFFF
16513 #define NV_USTRTCH_DELTA_DX_DU_R_INT 0xFFF00000
16514 #define NV_USTRTCH_DELTA_DX_DU_R 0xFFFFFFFF
16515 
16516 /* NV-Register NV_USTRTCH_DELTA_DY_DV */
16517 #define NV_USTRTCH_DELTA_DY_DV 0x0055030C
16518 #define NV_USTRTCH_DELTA_DY_DV_R_FRACTION 0x000FFFFF
16519 #define NV_USTRTCH_DELTA_DY_DV_R_INT 0xFFF00000
16520 #define NV_USTRTCH_DELTA_DY_DV_R 0xFFFFFFFF
16521 
16522 /* NV-Register NV_USTRTCH_CLIP_0 */
16523 #define NV_USTRTCH_CLIP_0 0x00550310
16524 #define NV_USTRTCH_CLIP_0_X 0x0000FFFF
16525 #define NV_USTRTCH_CLIP_0_Y 0xFFFF0000
16526 
16527 /* NV-Register NV_USTRTCH_CLIP_1 */
16528 #define NV_USTRTCH_CLIP_1 0x00550314
16529 #define NV_USTRTCH_CLIP_1_WIDTH 0x0000FFFF
16530 #define NV_USTRTCH_CLIP_1_HEIGHT 0xFFFF0000
16531 
16532 /* NV-Register NV_USTRTCH_POINT12D4 */
16533 #define NV_USTRTCH_POINT12D4 0x00550318
16534 #define NV_USTRTCH_POINT12D4_X_FRACTION 0x0000000F
16535 #define NV_USTRTCH_POINT12D4_X_INT 0x0000FFF0
16536 #define NV_USTRTCH_POINT12D4_X 0x0000FFFF
16537 #define NV_USTRTCH_POINT12D4_Y_FRACTION 0x000F0000
16538 #define NV_USTRTCH_POINT12D4_Y_INT 0xFFF00000
16539 #define NV_USTRTCH_POINT12D4_Y 0xFFFF0000
16540 
16541 /* NV-Array NV_USTRTCH_COLOR (4 byte access) */
16542 #define NV_USTRTCH_COLOR 0x00550400
16543 /* NV-Array size NV_USTRTCH_COLOR__SIZE_1 [0..1791] */
16544 #define NV_USTRTCH_COLOR__SIZE_1 0x00000700
16545 #define NV_USTRTCH_COLOR_VALUE 0xFFFFFFFF
16546 
16547 /* NV-Device NV_042 */
16548 #define NV_042 0x00610000 /* size: 0x00001FFF */
16549 #define NV4_SURFACE 0x00000042
16550 
16551 /* NV-Register NV_042_NV4_SURFACE */
16552 #define NV_042_NV4_SURFACE 0x00610000
16553 
16554 /* NV-Register NV_042_NOP */
16555 #ifndef NV_042_NOP
16556 #define NV_042_NOP 0x00610100
16557 #endif
16558 #define NV_042_NOP_PARAMETER 0xFFFFFFFF
16559 
16560 /* NV-Register NV_042_PM_TRIGGER */
16561 #define NV_042_PM_TRIGGER 0x00610140
16562 #define NV_042_PM_TRIGGER_PARAMETER 0xFFFFFFFF
16563 
16564 /* NV-Register NV_042_NOTIFY */
16565 #define NV_042_NOTIFY 0x00610104
16566 #define NV_042_NOTIFY_STYLE 0xFFFFFFFF
16567 #define NV_042_NOTIFY_STYLE_WRITE_ONLY 0x00000000
16568 #define NV_042_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001
16569 
16570 /* NV-Register NV_042_SET_NOTIFY */
16571 #define NV_042_SET_NOTIFY 0x00610104
16572 #define NV_042_SET_NOTIFY_PARAMETER 0xFFFFFFFF
16573 #define NV_042_SET_NOTIFY_PARAMETER_WRITE 0x00000000
16574 
16575 /* NV-Register NV_042_SET_CONTEXT_DMA_NOTIFY */
16576 #define NV_042_SET_CONTEXT_DMA_NOTIFY 0x00610180
16577 #define NV_042_SET_CONTEXT_DMA_NOTIFY_PARAMETER 0xFFFFFFFF
16578 
16579 /* NV-Register NV_042_SET_CONTEXT_DMA_IMAGE_SOURCE */
16580 #define NV_042_SET_CONTEXT_DMA_IMAGE_SOURCE 0x00610184
16581 #define NV_042_SET_CONTEXT_DMA_IMAGE_SOURCE_PARAMETER 0xFFFFFFFF
16582 
16583 /* NV-Register NV_042_SET_CONTEXT_DMA_IMAGE_DESTIN */
16584 #define NV_042_SET_CONTEXT_DMA_IMAGE_DESTIN 0x00610188
16585 #define NV_042_SET_CONTEXT_DMA_IMAGE_DESTIN_PARAMETER 0xFFFFFFFF
16586 
16587 /* NV-Register NV_042_SET_IMAGE_OUTPUT_SOURCE */
16588 #define NV_042_SET_IMAGE_OUTPUT_SOURCE 0x00610200
16589 #define NV_042_SET_IMAGE_OUTPUT_SOURCE_PARAMETER 0xFFFFFFFF
16590 
16591 /* NV-Register NV_042_SET_IMAGE_OUTPUT_DESTIN */
16592 #define NV_042_SET_IMAGE_OUTPUT_DESTIN 0x00610204
16593 #define NV_042_SET_IMAGE_OUTPUT_DESTIN_PARAMETER 0xFFFFFFFF
16594 
16595 /* NV-Array NV_042_SET_IMAGE_INPUT_DESTIN (4 byte access) */
16596 #define NV_042_SET_IMAGE_INPUT_DESTIN 0x00610208
16597 /* NV-Array size NV_042_SET_IMAGE_INPUT_DESTIN__SIZE_1 [0..61] */
16598 #define NV_042_SET_IMAGE_INPUT_DESTIN__SIZE_1 0x0000003E
16599 #define NV_042_SET_IMAGE_INPUT_DESTIN_PARAMETER 0xFFFFFFFF
16600 
16601 /* NV-Register NV_042_FMT */
16602 #define NV_042_FMT 0x00610300
16603 #define NV_042_FMT_VALUE 0xFFFFFFFF
16604 #define NV_042_FMT_VALUE_LE_Y8 0x00000001
16605 #define NV_042_FMT_VALUE_LE_X1R5G5B5_Z1R5G5B5 0x00000002
16606 #define NV_042_FMT_VALUE_LE_X1R5G5B5_O1R5G5B5 0x00000003
16607 #define NV_042_FMT_VALUE_LE_R5G6B5 0x00000004
16608 #define NV_042_FMT_VALUE_LE_Y16 0x00000005
16609 #define NV_042_FMT_VALUE_LE_X8R8G8B8_Z8R8G8B8 0x00000006
16610 #define NV_042_FMT_VALUE_LE_X8R8G8B8_O8R8G8B8 0x00000007
16611 #define NV_042_FMT_VALUE_LE_X1A7R8G8B8_Z1A7R8G8B8 0x00000008
16612 #define NV_042_FMT_VALUE_LE_X1A7R8G8B8_O1A7R8G8B8 0x00000009
16613 #define NV_042_FMT_VALUE_LE_A8R8G8B8 0x0000000A
16614 #define NV_042_FMT_VALUE_LE_Y32 0x0000000B
16615 
16616 /* NV-Register NV_042_PITCH */
16617 #define NV_042_PITCH 0x00610304
16618 #define NV_042_PITCH_SOURCE 0x0000FFFF
16619 #define NV_042_PITCH_DESTIN 0xFFFF0000
16620 
16621 /* NV-Register NV_042_OFFSET_SOURCE */
16622 #define NV_042_OFFSET_SOURCE 0x00610308
16623 #define NV_042_OFFSET_SOURCE_LINADRS 0xFFFFFFFF
16624 #define NV_042_OFFSET_SOURCE_LINADRS_0 0x00000000
16625 
16626 /* NV-Register NV_042_OFFSET_DESTIN */
16627 #define NV_042_OFFSET_DESTIN 0x0061030C
16628 #define NV_042_OFFSET_DESTIN_LINADRS 0xFFFFFFFF
16629 #define NV_042_OFFSET_DESTIN_LINADRS_0 0x00000000
16630 
16631 /* NV-Device NV_052 */
16632 #define NV_052 0x00630000 /* size: 0x00001FFF */
16633 #define NV4_SWIZZLED_SURFACE 0x00000052
16634 
16635 /* NV-Register NV_052_NV4_SWIZZLED_SURFACE */
16636 #define NV_052_NV4_SWIZZLED_SURFACE 0x00630000
16637 
16638 /* NV-Register NV_052_NOP */
16639 #define NV_052_NOP 0x00630100
16640 #define NV_052_NOP_PARAMETER 0xFFFFFFFF
16641 
16642 /* NV-Register NV_052_NOTIFY */
16643 #define NV_052_NOTIFY 0x00630104
16644 #define NV_052_NOTIFY_STYLE 0xFFFFFFFF
16645 #define NV_052_NOTIFY_STYLE_WRITE_ONLY 0x00000000
16646 #define NV_052_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001
16647 /* Alias NV_052_SET_NOTIFY */
16648 /* Alias NV_052_SET_NOTIFY */
16649 #define NV_052_SET_NOTIFY_PARAMETER 0xFFFFFFFF
16650 #define NV_052_SET_NOTIFY_PARAMETER_WRITE 0x00000000
16651 
16652 /* NV-Register NV_052_SET_CONTEXT_DMA_NOTIFY */
16653 #define NV_052_SET_CONTEXT_DMA_NOTIFY 0x00630180
16654 #define NV_052_SET_CONTEXT_DMA_NOTIFY_PARAMETER 0xFFFFFFFF
16655 
16656 /* NV-Register NV_052_SET_CONTEXT_DMA_IMAGE */
16657 #define NV_052_SET_CONTEXT_DMA_IMAGE 0x00630184
16658 #define NV_052_SET_CONTEXT_DMA_IMAGE_PARAMETER 0xFFFFFFFF
16659 
16660 /* NV-Register NV_052_SET_IMAGE_OUTPUT */
16661 #define NV_052_SET_IMAGE_OUTPUT 0x00630200
16662 #define NV_052_SET_IMAGE_OUTPUT_PARAMETER 0xFFFFFFFF
16663 
16664 /* NV-Array NV_052_SET_IMAGE_INPUT (4 byte access) */
16665 #define NV_052_SET_IMAGE_INPUT 0x00630204
16666 /* NV-Array size NV_052_SET_IMAGE_INPUT__SIZE_1 [0..62] */
16667 #define NV_052_SET_IMAGE_INPUT__SIZE_1 0x0000003F
16668 #define NV_052_SET_IMAGE_INPUT_PARAMETER 0xFFFFFFFF
16669 
16670 /* NV-Register NV_052_SET_FORMAT */
16671 #define NV_052_SET_FORMAT 0x00630300
16672 #define NV_052_SET_FORMAT_COLOR 0x0000FFFF
16673 #define NV_052_SET_FORMAT_COLOR_LE_Y8 0x00000001
16674 #define NV_052_SET_FORMAT_COLOR_LE_X1R5G5B5_Z1R5G5B5 0x00000002
16675 #define NV_052_SET_FORMAT_COLOR_LE_X1R5G5B5_O1R5G5B5 0x00000003
16676 #define NV_052_SET_FORMAT_COLOR_LE_R5G6B5 0x00000004
16677 #define NV_052_SET_FORMAT_COLOR_LE_Y16 0x00000005
16678 #define NV_052_SET_FORMAT_COLOR_LE_X8R8G8B8_Z8R8G8B8 0x00000006
16679 #define NV_052_SET_FORMAT_COLOR_LE_X8R8G8B8_O8R8G8B8 0x00000007
16680 #define NV_052_SET_FORMAT_COLOR_LE_X1A7R8G8B8_Z1A7R8G8B8 0x00000008
16681 #define NV_052_SET_FORMAT_COLOR_LE_X1A7R8G8B8_O1A7R8G8B8 0x00000009
16682 #define NV_052_SET_FORMAT_COLOR_LE_A8R8G8B8 0x0000000A
16683 #define NV_052_SET_FORMAT_COLOR_LE_Y32 0x0000000B
16684 #define NV_052_SET_FORMAT_WIDTH 0x00FF0000
16685 #define NV_052_SET_FORMAT_WIDTH_1 0x00000000
16686 #define NV_052_SET_FORMAT_WIDTH_2 0x00010000
16687 #define NV_052_SET_FORMAT_WIDTH_4 0x00020000
16688 #define NV_052_SET_FORMAT_WIDTH_8 0x00030000
16689 #define NV_052_SET_FORMAT_WIDTH_16 0x00040000
16690 #define NV_052_SET_FORMAT_WIDTH_32 0x00050000
16691 #define NV_052_SET_FORMAT_WIDTH_64 0x00060000
16692 #define NV_052_SET_FORMAT_WIDTH_128 0x00070000
16693 #define NV_052_SET_FORMAT_WIDTH_256 0x00080000
16694 #define NV_052_SET_FORMAT_WIDTH_512 0x00090000
16695 #define NV_052_SET_FORMAT_WIDTH_1024 0x000A0000
16696 #define NV_052_SET_FORMAT_WIDTH_2048 0x000B0000
16697 #define NV_052_SET_FORMAT_HEIGHT 0xFF000000
16698 #define NV_052_SET_FORMAT_HEIGHT_1 0x00000000
16699 #define NV_052_SET_FORMAT_HEIGHT_2 0x01000000
16700 #define NV_052_SET_FORMAT_HEIGHT_4 0x02000000
16701 #define NV_052_SET_FORMAT_HEIGHT_8 0x03000000
16702 #define NV_052_SET_FORMAT_HEIGHT_16 0x04000000
16703 #define NV_052_SET_FORMAT_HEIGHT_32 0x05000000
16704 #define NV_052_SET_FORMAT_HEIGHT_64 0x06000000
16705 #define NV_052_SET_FORMAT_HEIGHT_128 0x07000000
16706 #define NV_052_SET_FORMAT_HEIGHT_256 0x08000000
16707 #define NV_052_SET_FORMAT_HEIGHT_512 0x09000000
16708 #define NV_052_SET_FORMAT_HEIGHT_1024 0x0A000000
16709 #define NV_052_SET_FORMAT_HEIGHT_2048 0x0B000000
16710 
16711 /* NV-Register NV_052_SET_OFFSET */
16712 #define NV_052_SET_OFFSET 0x00630304
16713 #define NV_052_SET_OFFSET_LINADRS 0xFFFFFFFF
16714 #define NV_052_SET_OFFSET_LINADRS_0 0x00000000
16715 
16716 /* NV-Device NV_065 */
16717 #ifndef NV_065
16718 #define NV_065 0x00660000 /* size: 0x00001FFF */
16719 #endif
16720 #define NV5_IMAGE_FROM_CPU 0x00000065
16721 
16722 /* NV-Register NV_065_NV5_IMAGE_FROM_CPU */
16723 #define NV_065_NV5_IMAGE_FROM_CPU 0x00660000
16724 #define NV_065_NV5_IMAGE_FROM_CPU_HANDLE 0xFFFFFFFF
16725 
16726 /* NV-Register NV_065_NOP */
16727 #ifndef NV_065_NOP
16728 #define NV_065_NOP 0x00660100
16729 #endif
16730 #define NV_065_NOP_PARAMETER 0xFFFFFFFF
16731 
16732 /* NV-Register NV_065_NOTIFY */
16733 #ifndef NV_065_NOTIFY
16734 #define NV_065_NOTIFY 0x00660104
16735 #endif
16736 #define NV_065_NOTIFY_STYLE 0xFFFFFFFF
16737 #define NV_065_NOTIFY_STYLE_WRITE_ONLY 0x00000000
16738 #define NV_065_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001
16739 
16740 /* NV-Register NV_065_SET_NOTIFY */
16741 #define NV_065_SET_NOTIFY 0x00660104
16742 /* Alias NV_065_NOTIFY */
16743 /* Alias NV_065_NOTIFY */
16744 #define NV_065_SET_NOTIFY_PARAMETER 0xFFFFFFFF
16745 #define NV_065_SET_NOTIFY_PARAMETER_WRITE 0x00000000
16746 
16747 /* NV-Register NV_065_SET_CONTEXT_DMA_NOTIFY */
16748 #ifndef NV_065_SET_CONTEXT_DMA_NOTIFY
16749 #define NV_065_SET_CONTEXT_DMA_NOTIFY 0x00660180
16750 #endif
16751 #define NV_065_SET_CONTEXT_DMA_NOTIFY_PARAMETER 0xFFFFFFFF
16752 
16753 /* NV-Register NV_065_SET_CONTEXT_COLOR_KEY */
16754 #define NV_065_SET_CONTEXT_COLOR_KEY 0x00660184
16755 #define NV_065_SET_CONTEXT_COLOR_KEY_PARAMETER 0xFFFFFFFF
16756 
16757 /* NV-Register NV_065_SET_CONTEXT_CLIP_RECTANGLE */
16758 #define NV_065_SET_CONTEXT_CLIP_RECTANGLE 0x00660188
16759 #define NV_065_SET_CONTEXT_CLIP_RECTANGLE_PARAMETER 0xFFFFFFFF
16760 
16761 /* NV-Register NV_065_SET_CONTEXT_PATTERN */
16762 #define NV_065_SET_CONTEXT_PATTERN 0x0066018C
16763 #define NV_065_SET_CONTEXT_PATTERN_PARAMETER 0xFFFFFFFF
16764 
16765 /* NV-Register NV_065_SET_CONTEXT_ROP */
16766 #define NV_065_SET_CONTEXT_ROP 0x00660190
16767 #define NV_065_SET_CONTEXT_ROP_PARAMETER 0xFFFFFFFF
16768 
16769 /* NV-Register NV_065_SET_CONTEXT_BETA1 */
16770 #define NV_065_SET_CONTEXT_BETA1 0x00660194
16771 #define NV_065_SET_CONTEXT_BETA1_PARAMETER 0xFFFFFFFF
16772 
16773 /* NV-Register NV_065_SET_CONTEXT_BETA4 */
16774 #define NV_065_SET_CONTEXT_BETA4 0x00660198
16775 #define NV_065_SET_CONTEXT_BETA4_PARAMETER 0xFFFFFFFF
16776 
16777 /* NV-Register NV_065_SET_CONTEXT_SURFACE */
16778 #define NV_065_SET_CONTEXT_SURFACE 0x0066019C
16779 #define NV_065_SET_CONTEXT_SURFACE_PARAMETER 0xFFFFFFFF
16780 
16781 /* NV-Register NV_065_SET_COLOR_CONVERSION */
16782 #define NV_065_SET_COLOR_CONVERSION 0x006602F8
16783 #define NV_065_SET_COLOR_CONVERSION_TYPE 0xFFFFFFFF
16784 #define NV_065_SET_COLOR_CONVERSION_TYPE_DITHER 0x00000000
16785 #define NV_065_SET_COLOR_CONVERSION_TYPE_TRUNCATE 0x00000001
16786 #define NV_065_SET_COLOR_CONVERSION_TYPE_SUBTR_TRUNCATE 0x00000002
16787 
16788 /* NV-Register NV_065_SET_OPERATION */
16789 #define NV_065_SET_OPERATION 0x006602FC
16790 #define NV_065_SET_OPERATION_MODE 0xFFFFFFFF
16791 #define NV_065_SET_OPERATION_MODE_SRCCOPY_AND 0x00000000
16792 #define NV_065_SET_OPERATION_MODE_ROP_AND 0x00000001
16793 #define NV_065_SET_OPERATION_MODE_BLEND_AND 0x00000002
16794 #define NV_065_SET_OPERATION_MODE_SRCCOPY 0x00000003
16795 #define NV_065_SET_OPERATION_MODE_SRCCOPY_PREMULT 0x00000004
16796 #define NV_065_SET_OPERATION_MODE_BLEND_PREMULT 0x00000005
16797 
16798 /* NV-Register NV_065_SET_COLOR_FORMAT */
16799 #define NV_065_SET_COLOR_FORMAT 0x00660300
16800 #define NV_065_SET_COLOR_FORMAT_LE 0xFFFFFFFF
16801 #define NV_065_SET_COLOR_FORMAT_LE_R5G6B5 0x00000001
16802 #define NV_065_SET_COLOR_FORMAT_LE_A1R5G5B5 0x00000002
16803 #define NV_065_SET_COLOR_FORMAT_LE_X1R5G5B5 0x00000003
16804 #define NV_065_SET_COLOR_FORMAT_LE_A8R8G8B8 0x00000004
16805 #define NV_065_SET_COLOR_FORMAT_LE_X8R8G8B8 0x00000005
16806 
16807 /* NV-Register NV_065_POINT */
16808 #define NV_065_POINT 0x00660304
16809 #define NV_065_POINT_X 0x0000FFFF
16810 #define NV_065_POINT_Y 0xFFFF0000
16811 
16812 /* NV-Register NV_065_SIZE_OUT */
16813 #define NV_065_SIZE_OUT 0x00660308
16814 #define NV_065_SIZE_OUT_WIDTH 0x0000FFFF
16815 #define NV_065_SIZE_OUT_HEIGHT 0xFFFF0000
16816 
16817 /* NV-Register NV_065_SIZE_IN */
16818 #define NV_065_SIZE_IN 0x0066030C
16819 #define NV_065_SIZE_IN_WIDTH 0x0000FFFF
16820 #define NV_065_SIZE_IN_HEIGHT 0xFFFF0000
16821 
16822 /* NV-Array NV_065_COLOR (4 byte access) */
16823 #define NV_065_COLOR 0x00660400
16824 /* NV-Array size NV_065_COLOR__SIZE_1 [0..1791] */
16825 #define NV_065_COLOR__SIZE_1 0x00000700
16826 #define NV_065_COLOR_VALUE 0xFFFFFFFF
16827 
16828 /* NV-Device NV_064 */
16829 #ifndef NV_064
16830 #define NV_064 0x00650000 /* size: 0x00001FFF */
16831 #endif
16832 #define NV5_INDEXED_IMAGE_FROM_CPU 0x00000064
16833 
16834 /* NV-Register NV_064_NV5_INDEXED_IMAGE_FROM_CPU */
16835 #define NV_064_NV5_INDEXED_IMAGE_FROM_CPU 0x00650000
16836 #define NV_064_NV5_INDEXED_IMAGE_FROM_CPU_HANDLE 0xFFFFFFFF
16837 
16838 /* NV-Register NV_064_NOP */
16839 #ifndef NV_064_NOP
16840 #define NV_064_NOP 0x00650100
16841 #endif
16842 #define NV_064_NOP_PARAMETER 0xFFFFFFFF
16843 
16844 /* NV-Register NV_064_NOTIFY */
16845 #ifndef NV_064_NOTIFY
16846 #define NV_064_NOTIFY 0x00650104
16847 #endif
16848 #define NV_064_NOTIFY_STYLE 0xFFFFFFFF
16849 #define NV_064_NOTIFY_STYLE_WRITE_ONLY 0x00000000
16850 #define NV_064_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001
16851 
16852 /* NV-Register NV_064_SET_NOTIFY */
16853 #define NV_064_SET_NOTIFY 0x00650104
16854 /* Alias NV_064_NOTIFY */
16855 /* Alias NV_064_NOTIFY */
16856 #define NV_064_SET_NOTIFY_PARAMETER 0xFFFFFFFF
16857 #define NV_064_SET_NOTIFY_PARAMETER_WRITE 0x00000000
16858 
16859 /* NV-Register NV_064_SET_CONTEXT_DMA_NOTIFY */
16860 #ifndef NV_064_SET_CONTEXT_DMA_NOTIFY
16861 #define NV_064_SET_CONTEXT_DMA_NOTIFY 0x00650180
16862 #endif
16863 #define NV_064_SET_CONTEXT_DMA_NOTIFY_PARAMETER 0xFFFFFFFF
16864 
16865 /* NV-Register NV_064_SET_CONTEXT_DMA_LUT */
16866 #define NV_064_SET_CONTEXT_DMA_LUT 0x00650184
16867 #define NV_064_SET_CONTEXT_DMA_LUT_PARAMETER 0xFFFFFFFF
16868 
16869 /* NV-Register NV_064_SET_CONTEXT_COLOR_KEY */
16870 #define NV_064_SET_CONTEXT_COLOR_KEY 0x00650188
16871 #define NV_064_SET_CONTEXT_COLOR_KEY_PARAMETER 0xFFFFFFFF
16872 
16873 /* NV-Register NV_064_SET_CONTEXT_CLIP_RECTANGLE */
16874 #define NV_064_SET_CONTEXT_CLIP_RECTANGLE 0x0065018C
16875 #define NV_064_SET_CONTEXT_CLIP_RECTANGLE_PARAMETER 0xFFFFFFFF
16876 
16877 /* NV-Register NV_064_SET_CONTEXT_PATTERN */
16878 #define NV_064_SET_CONTEXT_PATTERN 0x00650190
16879 #define NV_064_SET_CONTEXT_PATTERN_PARAMETER 0xFFFFFFFF
16880 
16881 /* NV-Register NV_064_SET_CONTEXT_ROP */
16882 #define NV_064_SET_CONTEXT_ROP 0x00650194
16883 #define NV_064_SET_CONTEXT_ROP_PARAMETER 0xFFFFFFFF
16884 
16885 /* NV-Register NV_064_SET_CONTEXT_BETA1 */
16886 #define NV_064_SET_CONTEXT_BETA1 0x00650198
16887 #define NV_064_SET_CONTEXT_BETA1_PARAMETER 0xFFFFFFFF
16888 
16889 /* NV-Register NV_064_SET_CONTEXT_BETA4 */
16890 #define NV_064_SET_CONTEXT_BETA4 0x0065019C
16891 #define NV_064_SET_CONTEXT_BETA4_PARAMETER 0xFFFFFFFF
16892 
16893 /* NV-Register NV_064_SET_CONTEXT_SURFACE */
16894 #define NV_064_SET_CONTEXT_SURFACE 0x006501A0
16895 #define NV_064_SET_CONTEXT_SURFACE_PARAMETER 0xFFFFFFFF
16896 
16897 /* NV-Register NV_064_SET_COLOR_CONVERSION */
16898 #define NV_064_SET_COLOR_CONVERSION 0x006503E0
16899 #define NV_064_SET_COLOR_CONVERSION_TYPE 0xFFFFFFFF
16900 #define NV_064_SET_COLOR_CONVERSION_TYPE_DITHER 0x00000000
16901 #define NV_064_SET_COLOR_CONVERSION_TYPE_TRUNCATE 0x00000001
16902 #define NV_064_SET_COLOR_CONVERSION_TYPE_SUBTR_TRUNCATE 0x00000002
16903 
16904 /* NV-Register NV_064_SET_OPERATION */
16905 #define NV_064_SET_OPERATION 0x006503E4
16906 #define NV_064_SET_OPERATION_MODE 0xFFFFFFFF
16907 #define NV_064_SET_OPERATION_MODE_SRCCOPY_AND 0x00000000
16908 #define NV_064_SET_OPERATION_MODE_ROP_AND 0x00000001
16909 #define NV_064_SET_OPERATION_MODE_BLEND_AND 0x00000002
16910 #define NV_064_SET_OPERATION_MODE_SRCCOPY 0x00000003
16911 #define NV_064_SET_OPERATION_MODE_SRCCOPY_PREMULT 0x00000004
16912 #define NV_064_SET_OPERATION_MODE_BLEND_PREMULT 0x00000005
16913 
16914 /* NV-Register NV_064_SET_COLOR_FORMAT */
16915 #define NV_064_SET_COLOR_FORMAT 0x006503E8
16916 #define NV_064_SET_COLOR_FORMAT_LE 0xFFFFFFFF
16917 #define NV_064_SET_COLOR_FORMAT_LE_R5G6B5 0x00000001
16918 #define NV_064_SET_COLOR_FORMAT_LE_A1R5G5B5 0x00000002
16919 #define NV_064_SET_COLOR_FORMAT_LE_X1R5G5B5 0x00000003
16920 #define NV_064_SET_COLOR_FORMAT_LE_A8R8G8B8 0x00000004
16921 #define NV_064_SET_COLOR_FORMAT_LE_X8R8G8B8 0x00000005
16922 
16923 /* NV-Register NV_064_INDEX_FORMAT */
16924 #define NV_064_INDEX_FORMAT 0x006503EC
16925 #define NV_064_INDEX_FORMAT_LE 0xFFFFFFFF
16926 #define NV_064_INDEX_FORMAT_LE_I8 0x00000000
16927 #define NV_064_INDEX_FORMAT_LE_I4 0x00000001
16928 
16929 /* NV-Register NV_064_LUT_OFFSET */
16930 #define NV_064_LUT_OFFSET 0x006503F0
16931 #define NV_064_LUT_OFFSET_ARGUMENT 0xFFFFFFFF
16932 
16933 /* NV-Register NV_064_POINT */
16934 #define NV_064_POINT 0x006503F4
16935 #define NV_064_POINT_X 0x0000FFFF
16936 #define NV_064_POINT_Y 0xFFFF0000
16937 
16938 /* NV-Register NV_064_SIZE_OUT */
16939 #define NV_064_SIZE_OUT 0x006503F8
16940 #define NV_064_SIZE_OUT_WIDTH 0x0000FFFF
16941 #define NV_064_SIZE_OUT_HEIGHT 0xFFFF0000
16942 
16943 /* NV-Register NV_064_SIZE_IN */
16944 #define NV_064_SIZE_IN 0x006503FC
16945 #define NV_064_SIZE_IN_WIDTH 0x0000FFFF
16946 #define NV_064_SIZE_IN_HEIGHT 0xFFFF0000
16947 
16948 /* NV-Array NV_064_INDICES (4 byte access) */
16949 #define NV_064_INDICES 0x00650400
16950 /* NV-Array size NV_064_INDICES__SIZE_1 [0..1791] */
16951 #define NV_064_INDICES__SIZE_1 0x00000700
16952 #define NV_064_INDICES_VALUE 0xFFFFFFFF
16953 
16954 /* NV-Device NV_063 */
16955 #define NV_063 0x00640000 /* size: 0x00001FFF */
16956 #define NV5_SCALED_IMAGE_FROM_MEMORY 0x00000063
16957 
16958 /* NV-Register NV_063_NV5_SCALED_IMAGE_FROM_MEMORY */
16959 #define NV_063_NV5_SCALED_IMAGE_FROM_MEMORY 0x00640000
16960 #define NV_063_NV5_SCALED_IMAGE_FROM_MEMORY_HANDLE 0xFFFFFFFF
16961 
16962 /* NV-Register NV_063_NOP */
16963 #define NV_063_NOP 0x00640100
16964 #define NV_063_NOP_PARAMETER 0xFFFFFFFF
16965 
16966 /* NV-Register NV_063_NOTIFY */
16967 #define NV_063_NOTIFY 0x00640104
16968 #define NV_063_NOTIFY_STYLE 0xFFFFFFFF
16969 #define NV_063_NOTIFY_STYLE_WRITE_ONLY 0x00000000
16970 #define NV_063_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001
16971 
16972 /* NV-Register NV_063_SET_NOTIFY */
16973 #define NV_063_SET_NOTIFY 0x00640104
16974 /* Alias NV_063_NOTIFY */
16975 /* Alias NV_063_NOTIFY */
16976 #define NV_063_SET_NOTIFY_PARAMETER 0xFFFFFFFF
16977 #define NV_063_SET_NOTIFY_PARAMETER_WRITE 0x00000000
16978 
16979 /* NV-Register NV_063_SET_CONTEXT_DMA_NOTIFY */
16980 #define NV_063_SET_CONTEXT_DMA_NOTIFY 0x00640180
16981 #define NV_063_SET_CONTEXT_DMA_NOTIFY_PARAMETER 0xFFFFFFFF
16982 
16983 /* NV-Register NV_063_SET_CONTEXT_DMA_IMAGE */
16984 #define NV_063_SET_CONTEXT_DMA_IMAGE 0x00640184
16985 #define NV_063_SET_CONTEXT_DMA_IMAGE_PARAMETER 0xFFFFFFFF
16986 
16987 /* NV-Register NV_063_SET_CONTEXT_PATTERN */
16988 #define NV_063_SET_CONTEXT_PATTERN 0x00640188
16989 #define NV_063_SET_CONTEXT_PATTERN_PARAMETER 0xFFFFFFFF
16990 
16991 /* NV-Register NV_063_SET_CONTEXT_ROP */
16992 #define NV_063_SET_CONTEXT_ROP 0x0064018C
16993 #define NV_063_SET_CONTEXT_ROP_PARAMETER 0xFFFFFFFF
16994 
16995 /* NV-Register NV_063_SET_CONTEXT_BETA1 */
16996 #define NV_063_SET_CONTEXT_BETA1 0x00640190
16997 #define NV_063_SET_CONTEXT_BETA1_PARAMETER 0xFFFFFFFF
16998 
16999 /* NV-Register NV_063_SET_CONTEXT_BETA4 */
17000 #define NV_063_SET_CONTEXT_BETA4 0x00640194
17001 #define NV_063_SET_CONTEXT_BETA4_PARAMETER 0xFFFFFFFF
17002 
17003 /* NV-Register NV_063_SET_CONTEXT_SURFACE */
17004 #define NV_063_SET_CONTEXT_SURFACE 0x00640198
17005 #define NV_063_SET_CONTEXT_SURFACE_PARAMETER 0xFFFFFFFF
17006 
17007 /* NV-Register NV_063_SET_COLOR_CONVERSION */
17008 #define NV_063_SET_COLOR_CONVERSION 0x006402FC
17009 #define NV_063_SET_COLOR_CONVERSION_TYPE 0xFFFFFFFF
17010 #define NV_063_SET_COLOR_CONVERSION_TYPE_DITHER 0x00000000
17011 #define NV_063_SET_COLOR_CONVERSION_TYPE_TRUNCATE 0x00000001
17012 #define NV_063_SET_COLOR_CONVERSION_TYPE_SUBTR_TRUNCATE 0x00000002
17013 
17014 /* NV-Register NV_063_SET_COLOR_FORMAT */
17015 #define NV_063_SET_COLOR_FORMAT 0x00640300
17016 #define NV_063_SET_COLOR_FORMAT_LE 0xFFFFFFFF
17017 #define NV_063_SET_COLOR_FORMAT_LE_A1R5G5B5 0x00000001
17018 #define NV_063_SET_COLOR_FORMAT_LE_X1R5G5B5 0x00000002
17019 #define NV_063_SET_COLOR_FORMAT_LE_A8R8G8B8 0x00000003
17020 #define NV_063_SET_COLOR_FORMAT_LE_X8R8G8B8 0x00000004
17021 #define NV_063_SET_COLOR_FORMAT_LE_V8YB8U8YA8 0x00000005
17022 #define NV_063_SET_COLOR_FORMAT_LE_YB8V8YA8U8 0x00000006
17023 #define NV_063_SET_COLOR_FORMAT_LE_R5G6B5 0x00000007
17024 
17025 /* NV-Register NV_063_SET_OPERATION */
17026 #define NV_063_SET_OPERATION 0x00640304
17027 #define NV_063_SET_OPERATION_MODE 0xFFFFFFFF
17028 #define NV_063_SET_OPERATION_MODE_SRCCOPY_AND 0x00000000
17029 #define NV_063_SET_OPERATION_MODE_ROP_AND 0x00000001
17030 #define NV_063_SET_OPERATION_MODE_BLEND_AND 0x00000002
17031 #define NV_063_SET_OPERATION_MODE_SRCCOPY 0x00000003
17032 #define NV_063_SET_OPERATION_MODE_SRCCOPY_PREMULT 0x00000004
17033 #define NV_063_SET_OPERATION_MODE_BLEND_PREMULT 0x00000005
17034 
17035 /* NV-Register NV_063_CLIP_0 */
17036 #define NV_063_CLIP_0 0x00640308
17037 #define NV_063_CLIP_0_X 0x0000FFFF
17038 #define NV_063_CLIP_0_Y 0xFFFF0000
17039 
17040 /* NV-Register NV_063_CLIP_1 */
17041 #define NV_063_CLIP_1 0x0064030C
17042 #define NV_063_CLIP_1_WIDTH 0x0000FFFF
17043 #define NV_063_CLIP_1_HEIGHT 0xFFFF0000
17044 
17045 /* NV-Register NV_063_RECTANGLE_OUT_0 */
17046 #define NV_063_RECTANGLE_OUT_0 0x00640310
17047 #define NV_063_RECTANGLE_OUT_0_X 0x0000FFFF
17048 #define NV_063_RECTANGLE_OUT_0_Y 0xFFFF0000
17049 
17050 /* NV-Register NV_063_RECTANGLE_OUT_1 */
17051 #define NV_063_RECTANGLE_OUT_1 0x00640314
17052 #define NV_063_RECTANGLE_OUT_1_WIDTH 0x0000FFFF
17053 #define NV_063_RECTANGLE_OUT_1_HEIGHT 0xFFFF0000
17054 
17055 /* NV-Register NV_063_DELTA_DU_DX */
17056 #define NV_063_DELTA_DU_DX 0x00640318
17057 #define NV_063_DELTA_DU_DX_R_FRACTION 0x000FFFFF
17058 #define NV_063_DELTA_DU_DX_R_INT 0xFFF00000
17059 #define NV_063_DELTA_DU_DX_R 0xFFFFFFFF
17060 
17061 /* NV-Register NV_063_DELTA_DV_DY */
17062 #define NV_063_DELTA_DV_DY 0x0064031C
17063 #define NV_063_DELTA_DV_DY_R_FRACTION 0x000FFFFF
17064 #define NV_063_DELTA_DV_DY_R_INT 0xFFF00000
17065 #define NV_063_DELTA_DV_DY_R 0xFFFFFFFF
17066 
17067 /* NV-Register NV_063_SIZE */
17068 #define NV_063_SIZE 0x00640400
17069 #define NV_063_SIZE_WIDTH 0x0000FFFF
17070 #define NV_063_SIZE_HEIGHT 0xFFFF0000
17071 
17072 /* NV-Register NV_063_FORMAT */
17073 #define NV_063_FORMAT 0x00640404
17074 #define NV_063_FORMAT_PITCH 0x0000FFFF
17075 #define NV_063_FORMAT_ORIGIN 0x00FF0000
17076 #define NV_063_FORMAT_ORIGIN_CENTER 0x00010000
17077 #define NV_063_FORMAT_ORIGIN_CORNER 0x00020000
17078 #define NV_063_FORMAT_INTERPOLATOR 0xFF000000
17079 #define NV_063_FORMAT_INTERPOLATOR_ZOH 0x00000000
17080 #define NV_063_FORMAT_INTERPOLATOR_FOH 0x01000000
17081 
17082 /* NV-Register NV_063_OFFSET */
17083 #define NV_063_OFFSET 0x00640408
17084 #define NV_063_OFFSET_VALUE 0xFFFFFFFF
17085 
17086 /* NV-Register NV_063_POINT */
17087 #define NV_063_POINT 0x0064040C
17088 #define NV_063_POINT_V_FRACTION 0x00000FFF
17089 #define NV_063_POINT_V_INT 0x0000F000
17090 #define NV_063_POINT_V_VALUE 0x0000FFFF
17091 #define NV_063_POINT_U_FRACTION 0x000F0000
17092 #define NV_063_POINT_U_INT 0xFFF00000
17093 #define NV_063_POINT_U_VALUE 0xFFFFFFFF
17094 
17095 /* NV-Device NV_066 */
17096 #ifndef NV_066
17097 #define NV_066 0x00670000 /* size: 0x00001FFF */
17098 #endif
17099 #define NV5_STRETCHED_IMAGE_FROM_CPU 0x00000066
17100 
17101 /* NV-Register NV_066_NV5_STRETCHED_IMAGE_FROM_CPU */
17102 #define NV_066_NV5_STRETCHED_IMAGE_FROM_CPU 0x00670000
17103 #define NV_066_NV5_STRETCHED_IMAGE_FROM_CPU_HANDLE 0xFFFFFFFF
17104 
17105 /* NV-Register NV_066_NOP */
17106 #ifndef NV_066_NOP
17107 #define NV_066_NOP 0x00670100
17108 #endif
17109 #define NV_066_NOP_PARAMETER 0xFFFFFFFF
17110 
17111 /* NV-Register NV_066_NOTIFY */
17112 #ifndef NV_066_NOTIFY
17113 #define NV_066_NOTIFY 0x00670104
17114 #endif
17115 #define NV_066_NOTIFY_STYLE 0xFFFFFFFF
17116 #define NV_066_NOTIFY_STYLE_WRITE_ONLY 0x00000000
17117 #define NV_066_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001
17118 
17119 /* NV-Register NV_066_SET_NOTIFY */
17120 #define NV_066_SET_NOTIFY 0x00670104
17121 /* Alias NV_066_NOTIFY */
17122 /* Alias NV_066_NOTIFY */
17123 #define NV_066_SET_NOTIFY_PARAMETER 0xFFFFFFFF
17124 #define NV_066_SET_NOTIFY_PARAMETER_WRITE 0x00000000
17125 
17126 /* NV-Register NV_066_SET_CONTEXT_DMA_NOTIFY */
17127 #ifndef NV_066_SET_CONTEXT_DMA_NOTIFY
17128 #define NV_066_SET_CONTEXT_DMA_NOTIFY 0x00670180
17129 #endif
17130 #define NV_066_SET_CONTEXT_DMA_NOTIFY_PARAMETER 0xFFFFFFFF
17131 
17132 /* NV-Register NV_066_SET_CONTEXT_COLOR_KEY */
17133 #define NV_066_SET_CONTEXT_COLOR_KEY 0x00670184
17134 #define NV_066_SET_CONTEXT_COLOR_KEY_PARAMETER 0xFFFFFFFF
17135 
17136 /* NV-Register NV_066_SET_CONTEXT_PATTERN */
17137 #define NV_066_SET_CONTEXT_PATTERN 0x00670188
17138 #define NV_066_SET_CONTEXT_PATTERN_PARAMETER 0xFFFFFFFF
17139 
17140 /* NV-Register NV_066_SET_CONTEXT_ROP */
17141 #define NV_066_SET_CONTEXT_ROP 0x0067018C
17142 #define NV_066_SET_CONTEXT_ROP_PARAMETER 0xFFFFFFFF
17143 
17144 /* NV-Register NV_066_SET_CONTEXT_BETA1 */
17145 #define NV_066_SET_CONTEXT_BETA1 0x00670190
17146 #define NV_066_SET_CONTEXT_BETA1_PARAMETER 0xFFFFFFFF
17147 
17148 /* NV-Register NV_066_SET_CONTEXT_BETA4 */
17149 #define NV_066_SET_CONTEXT_BETA4 0x00670194
17150 #define NV_066_SET_CONTEXT_BETA4_PARAMETER 0xFFFFFFFF
17151 
17152 /* NV-Register NV_066_SET_CONTEXT_SURFACE */
17153 #define NV_066_SET_CONTEXT_SURFACE 0x00670198
17154 #define NV_066_SET_CONTEXT_SURFACE_PARAMETER 0xFFFFFFFF
17155 
17156 /* NV-Register NV_066_SET_COLOR_CONVERSION */
17157 #define NV_066_SET_COLOR_CONVERSION 0x006702F8
17158 #define NV_066_SET_COLOR_CONVERSION_TYPE 0xFFFFFFFF
17159 #define NV_066_SET_COLOR_CONVERSION_TYPE_DITHER 0x00000000
17160 #define NV_066_SET_COLOR_CONVERSION_TYPE_TRUNCATE 0x00000001
17161 #define NV_066_SET_COLOR_CONVERSION_TYPE_SUBTR_TRUNCATE 0x00000002
17162 
17163 /* NV-Register NV_066_SET_OPERATION */
17164 #define NV_066_SET_OPERATION 0x006702FC
17165 #define NV_066_SET_OPERATION_MODE 0xFFFFFFFF
17166 #define NV_066_SET_OPERATION_MODE_SRCCOPY_AND 0x00000000
17167 #define NV_066_SET_OPERATION_MODE_ROP_AND 0x00000001
17168 #define NV_066_SET_OPERATION_MODE_BLEND_AND 0x00000002
17169 #define NV_066_SET_OPERATION_MODE_SRCCOPY 0x00000003
17170 #define NV_066_SET_OPERATION_MODE_SRCCOPY_PREMULT 0x00000004
17171 #define NV_066_SET_OPERATION_MODE_BLEND_PREMULT 0x00000005
17172 
17173 /* NV-Register NV_066_SET_COLOR_FORMAT */
17174 #define NV_066_SET_COLOR_FORMAT 0x00670300
17175 #define NV_066_SET_COLOR_FORMAT_LE 0xFFFFFFFF
17176 #define NV_066_SET_COLOR_FORMAT_LE_R5G6B5 0x00000001
17177 #define NV_066_SET_COLOR_FORMAT_LE_A1R5G5B5 0x00000002
17178 #define NV_066_SET_COLOR_FORMAT_LE_X1R5G5B5 0x00000003
17179 #define NV_066_SET_COLOR_FORMAT_LE_A8R8G8B8 0x00000004
17180 #define NV_066_SET_COLOR_FORMAT_LE_X8R8G8B8 0x00000005
17181 
17182 /* NV-Register NV_066_SIZE_IN */
17183 #define NV_066_SIZE_IN 0x00670304
17184 #define NV_066_SIZE_IN_WIDTH 0x0000FFFF
17185 #define NV_066_SIZE_IN_HEIGHT 0xFFFF0000
17186 
17187 /* NV-Register NV_066_DELTA_DX_DU */
17188 #define NV_066_DELTA_DX_DU 0x00670308
17189 #define NV_066_DELTA_DX_DU_R_FRACTION 0x000FFFFF
17190 #define NV_066_DELTA_DX_DU_R_INT 0xFFF00000
17191 #define NV_066_DELTA_DX_DU_R 0xFFFFFFFF
17192 
17193 /* NV-Register NV_066_DELTA_DY_DV */
17194 #define NV_066_DELTA_DY_DV 0x0067030C
17195 #define NV_066_DELTA_DY_DV_R_FRACTION 0x000FFFFF
17196 #define NV_066_DELTA_DY_DV_R_INT 0xFFF00000
17197 #define NV_066_DELTA_DY_DV_R 0xFFFFFFFF
17198 
17199 /* NV-Register NV_066_CLIP_0 */
17200 #define NV_066_CLIP_0 0x00670310
17201 #define NV_066_CLIP_0_X 0x0000FFFF
17202 #define NV_066_CLIP_0_Y 0xFFFF0000
17203 
17204 /* NV-Register NV_066_CLIP_1 */
17205 #define NV_066_CLIP_1 0x00670314
17206 #define NV_066_CLIP_1_WIDTH 0x0000FFFF
17207 #define NV_066_CLIP_1_HEIGHT 0xFFFF0000
17208 
17209 /* NV-Register NV_066_POINT12D4 */
17210 #define NV_066_POINT12D4 0x00670318
17211 #define NV_066_POINT12D4_X_FRACTION 0x0000000F
17212 #define NV_066_POINT12D4_X_INT 0x0000FFF0
17213 #define NV_066_POINT12D4_X 0x0000FFFF
17214 #define NV_066_POINT12D4_Y_FRACTION 0x000F0000
17215 #define NV_066_POINT12D4_Y_INT 0xFFF00000
17216 #define NV_066_POINT12D4_Y 0xFFFF0000
17217 
17218 /* NV-Array NV_066_COLOR (4 byte access) */
17219 #define NV_066_COLOR 0x00670400
17220 /* NV-Array size NV_066_COLOR__SIZE_1 [0..1791] */
17221 #define NV_066_COLOR__SIZE_1 0x00000700
17222 #define NV_066_COLOR_VALUE 0xFFFFFFFF
17223 
17224 /* NV-Device NV_UPATT */
17225 #define NV_UPATT 0x00460000 /* size: 0x00001FFF */
17226 #define NV_IMAGE_PATTERN 0x00000018
17227 
17228 /* NV-Register NV_UPATT_CTX_SWITCH */
17229 #define NV_UPATT_CTX_SWITCH 0x00460000
17230 #define NV_UPATT_CTX_SWITCH_INSTANCE 0x0000FFFF
17231 #define NV_UPATT_CTX_SWITCH_CHID 0x007F0000
17232 #define NV_UPATT_CTX_SWITCH_VOLATILE 0x80000000
17233 #define NV_UPATT_CTX_SWITCH_VOLATILE_IGNORE 0x7FFFFFFF
17234 #define NV_UPATT_CTX_SWITCH_VOLATILE_RESET 0x80000000
17235 
17236 /* NV-Register NV_UPATT_NOTIFY */
17237 #define NV_UPATT_NOTIFY 0x00460104
17238 #define NV_UPATT_NOTIFY_STYLE 0xFFFFFFFF
17239 #define NV_UPATT_NOTIFY_STYLE_WRITE_ONLY 0x00000000
17240 #define NV_UPATT_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001
17241 
17242 /* NV-Register NV_UPATT_SET_NOTIFY */
17243 #define NV_UPATT_SET_NOTIFY 0x00460104
17244 /* Alias NV_UPATT_NOTIFY */
17245 /* Alias NV_UPATT_NOTIFY */
17246 #define NV_UPATT_SET_NOTIFY_PARAMETER 0xFFFFFFFF
17247 #define NV_UPATT_SET_NOTIFY_PARAMETER_WRITE 0x00000000
17248 
17249 /* NV-Register NV_UPATT_SET_CONTEXT_DMA_NOTIFY */
17250 #define NV_UPATT_SET_CONTEXT_DMA_NOTIFY 0x00460180
17251 #define NV_UPATT_SET_CONTEXT_DMA_NOTIFY_PARAMETER 0xFFFFFFFF
17252 
17253 /* NV-Register NV_UPATT_SET_IMAGE_OUTPUT */
17254 #define NV_UPATT_SET_IMAGE_OUTPUT 0x00460200
17255 #define NV_UPATT_SET_IMAGE_OUTPUT_PARAMETER 0xFFFFFFFF
17256 
17257 /* NV-Register NV_UPATT_SET_COLOR_FORMAT */
17258 #define NV_UPATT_SET_COLOR_FORMAT 0x00460300
17259 #define NV_UPATT_SET_COLOR_FORMAT_LE 0xFFFFFFFF
17260 #define NV_UPATT_SET_COLOR_FORMAT_LE_X16A8Y8 0x00000001
17261 #define NV_UPATT_SET_COLOR_FORMAT_LE_X16A1R5G5B5 0x00000002
17262 #define NV_UPATT_SET_COLOR_FORMAT_LE_A8R8G8B8 0x00000003
17263 
17264 /* NV-Register NV_UPATT_SET_MONOCHROME_FORMAT */
17265 #define NV_UPATT_SET_MONOCHROME_FORMAT 0x00460304
17266 #define NV_UPATT_SET_MONOCHROME_FORMAT_VALUE 0xFFFFFFFF
17267 
17268 /* NV-Register NV_UPATT_SET_SHAPE */
17269 #define NV_UPATT_SET_SHAPE 0x00460308
17270 #define NV_UPATT_SET_SHAPE_VALUE 0x00000003
17271 #define NV_UPATT_SET_SHAPE_VALUE_8X_8Y 0x00000000
17272 #define NV_UPATT_SET_SHAPE_VALUE_64X_1Y 0x00000001
17273 #define NV_UPATT_SET_SHAPE_VALUE_1X_64Y 0x00000002
17274 
17275 /* NV-Register NV_UPATT_SET_COLOR0 */
17276 #define NV_UPATT_SET_COLOR0 0x00460310
17277 #define NV_UPATT_SET_COLOR0_VALUE 0xFFFFFFFF
17278 
17279 /* NV-Register NV_UPATT_SET_COLOR1 */
17280 #define NV_UPATT_SET_COLOR1 0x00460314
17281 #define NV_UPATT_SET_COLOR1_VALUE 0xFFFFFFFF
17282 
17283 /* NV-Array NV_UPATT_SET_PATTERN (4 byte access) */
17284 #define NV_UPATT_SET_PATTERN 0x00460318
17285 /* NV-Array size NV_UPATT_SET_PATTERN__SIZE_1 [0..1] */
17286 #define NV_UPATT_SET_PATTERN__SIZE_1 0x00000002
17287 #define NV_UPATT_SET_PATTERN_BITMAP 0xFFFFFFFF
17288 
17289 /* NV-Device NV_URECT */
17290 #define NV_URECT 0x00470000 /* size: 0x00001FFF */
17291 #define NV1_RENDER_SOLID_RECTANGLE 0x0000001E
17292 
17293 /* NV-Register NV_URECT_CTX_SWITCH */
17294 #define NV_URECT_CTX_SWITCH 0x00470000
17295 #define NV_URECT_CTX_SWITCH_INSTANCE 0x0000FFFF
17296 #define NV_URECT_CTX_SWITCH_CHID 0x007F0000
17297 #define NV_URECT_CTX_SWITCH_VOLATILE 0x80000000
17298 #define NV_URECT_CTX_SWITCH_VOLATILE_IGNORE 0x7FFFFFFF
17299 #define NV_URECT_CTX_SWITCH_VOLATILE_RESET 0x80000000
17300 
17301 /* NV-Register NV_URECT_NOTIFY */
17302 #define NV_URECT_NOTIFY 0x00470104
17303 #define NV_URECT_NOTIFY_STYLE 0xFFFFFFFF
17304 #define NV_URECT_NOTIFY_STYLE_WRITE_ONLY 0x00000000
17305 #define NV_URECT_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001
17306 
17307 /* NV-Register NV_URECT_SET_NOTIFY */
17308 #define NV_URECT_SET_NOTIFY 0x00470104
17309 /* Alias NV_URECT_NOTIFY */
17310 /* Alias NV_URECT_NOTIFY */
17311 #define NV_URECT_SET_NOTIFY_PARAMETER 0xFFFFFFFF
17312 #define NV_URECT_SET_NOTIFY_PARAMETER_WRITE 0x00000000
17313 
17314 /* NV-Register NV_URECT_SET_PATCH */
17315 #define NV_URECT_SET_PATCH 0x0047010C
17316 #define NV_URECT_SET_PATCH_PARAMETER 0xFFFFFFFF
17317 #define NV_URECT_SET_PATCH_PARAMETER_INVALIDATE 0x00000000
17318 #define NV_URECT_SET_PATCH_PARAMETER_VALIDATE 0x00000001
17319 
17320 /* NV-Register NV_URECT_SET_CONTEXT_DMA_NOTIFY */
17321 #define NV_URECT_SET_CONTEXT_DMA_NOTIFY 0x00470180
17322 #define NV_URECT_SET_CONTEXT_DMA_NOTIFY_PARAMETER 0xFFFFFFFF
17323 
17324 /* NV-Register NV_URECT_SET_IMAGE_OUTPUT */
17325 #define NV_URECT_SET_IMAGE_OUTPUT 0x00470200
17326 #define NV_URECT_SET_IMAGE_OUTPUT_PARAMETER 0xFFFFFFFF
17327 
17328 /* NV-Register NV_URECT_SET_COLOR_FORMAT */
17329 #define NV_URECT_SET_COLOR_FORMAT 0x00470300
17330 #define NV_URECT_SET_COLOR_FORMAT_LE 0xFFFFFFFF
17331 #define NV_URECT_SET_COLOR_FORMAT_LE_X16A8Y8 0x00000001
17332 #define NV_URECT_SET_COLOR_FORMAT_LE_X24Y8 0x00000002
17333 #define NV_URECT_SET_COLOR_FORMAT_LE_X16A1R5G5B5 0x00000003
17334 #ifndef NV_URECT_SET_COLOR_FORMAT_LE_X17R5G5B5
17335 #define NV_URECT_SET_COLOR_FORMAT_LE_X17R5G5B5 0x00000004
17336 #endif
17337 #define NV_URECT_SET_COLOR_FORMAT_LE_A8R8G8B8 0x00000005
17338 #ifndef NV_URECT_SET_COLOR_FORMAT_LE_X8R8G8B8
17339 #define NV_URECT_SET_COLOR_FORMAT_LE_X8R8G8B8 0x00000006
17340 #endif
17341 #define NV_URECT_SET_COLOR_FORMAT_LE_A16Y16 0x00000007
17342 #define NV_URECT_SET_COLOR_FORMAT_LE_X16Y16 0x00000008
17343 
17344 /* NV-Register NV_URECT_COLOR */
17345 #define NV_URECT_COLOR 0x00470304
17346 #define NV_URECT_COLOR_VALUE 0xFFFFFFFF
17347 
17348 /* NV-Array NV_URECT_RECTANGLE_0 (8 byte access) */
17349 #define NV_URECT_RECTANGLE_0 0x00470400
17350 /* NV-Array size NV_URECT_RECTANGLE_0__SIZE_1 [0..15] */
17351 #define NV_URECT_RECTANGLE_0__SIZE_1 0x00000010
17352 #define NV_URECT_RECTANGLE_0_X 0x0000FFFF
17353 #define NV_URECT_RECTANGLE_0_Y 0xFFFF0000
17354 
17355 /* NV-Array NV_URECT_RECTANGLE_1 (8 byte access) */
17356 #define NV_URECT_RECTANGLE_1 0x00470404
17357 /* NV-Array size NV_URECT_RECTANGLE_1__SIZE_1 [0..15] */
17358 #define NV_URECT_RECTANGLE_1__SIZE_1 0x00000010
17359 #define NV_URECT_RECTANGLE_1_WIDTH 0x0000FFFF
17360 #define NV_URECT_RECTANGLE_1_HEIGHT 0xFFFF0000
17361 
17362 /* NV-Device NV_UROP */
17363 #define NV_UROP 0x00420000 /* size: 0x00001FFF */
17364 #define NV_ROP5_SOLID 0x00430000
17365 
17366 /* NV-Register NV_UROP_CTX_SWITCH */
17367 #define NV_UROP_CTX_SWITCH 0x00420000
17368 #define NV_UROP_CTX_SWITCH_INSTANCE 0x0000FFFF
17369 #define NV_UROP_CTX_SWITCH_CHID 0x007F0000
17370 #define NV_UROP_CTX_SWITCH_VOLATILE 0x80000000
17371 #define NV_UROP_CTX_SWITCH_VOLATILE_IGNORE 0x7FFFFFFF
17372 #define NV_UROP_CTX_SWITCH_VOLATILE_RESET 0x80000000
17373 
17374 /* NV-Register NV_UROP_NOTIFY */
17375 #define NV_UROP_NOTIFY 0x00420104
17376 #define NV_UROP_NOTIFY_STYLE 0xFFFFFFFF
17377 #define NV_UROP_NOTIFY_STYLE_WRITE_ONLY 0x00000000
17378 #define NV_UROP_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001
17379 
17380 /* NV-Register NV_UROP_SET_NOTIFY */
17381 #define NV_UROP_SET_NOTIFY 0x00420104
17382 /* Alias NV_UROP_NOTIFY */
17383 /* Alias NV_UROP_NOTIFY */
17384 #define NV_UROP_SET_NOTIFY_PARAMETER 0xFFFFFFFF
17385 #define NV_UROP_SET_NOTIFY_PARAMETER_WRITE 0x00000000
17386 
17387 /* NV-Register NV_UROP_SET_CONTEXT_DMA_NOTIFY */
17388 #define NV_UROP_SET_CONTEXT_DMA_NOTIFY 0x00420180
17389 #define NV_UROP_SET_CONTEXT_DMA_NOTIFY_PARAMETER 0xFFFFFFFF
17390 
17391 /* NV-Register NV_UROP_SET_ROP_OUTPUT */
17392 #define NV_UROP_SET_ROP_OUTPUT 0x00420200
17393 #define NV_UROP_SET_ROP_OUTPUT_PARAMETER 0xFFFFFFFF
17394 
17395 /* NV-Register NV_UROP_SET_ROP5 */
17396 #define NV_UROP_SET_ROP5 0x00420300
17397 #define NV_UROP_SET_ROP5_VALUE 0x000000FF
17398 
17399 /* NV-Register NV_UROP_SET_ROP */
17400 #define NV_UROP_SET_ROP 0x00420300
17401 /* Alias NV_UROP_SET_ROP5 */
17402 /* Alias NV_UROP_SET_ROP5 */
17403 #define NV_UROP_SET_ROP_VALUE 0x000000FF
17404 
17405 /* NV-Device NV_USCALED */
17406 #define NV_USCALED 0x004E0000 /* size: 0x00001FFF */
17407 #ifndef NV_SCALED_IMAGE_FROM_MEMORY
17408 #define NV_SCALED_IMAGE_FROM_MEMORY 0x00000037
17409 #endif
17410 
17411 /* NV-Register NV_USCALED_CTX_SWITCH */
17412 #define NV_USCALED_CTX_SWITCH 0x004E0000
17413 #define NV_USCALED_CTX_SWITCH_INSTANCE 0x0000FFFF
17414 #define NV_USCALED_CTX_SWITCH_CHID 0x007F0000
17415 #define NV_USCALED_CTX_SWITCH_VOLATILE 0x80000000
17416 #define NV_USCALED_CTX_SWITCH_VOLATILE_IGNORE 0x7FFFFFFF
17417 #define NV_USCALED_CTX_SWITCH_VOLATILE_RESET 0x80000000
17418 
17419 /* NV-Register NV_USCALED_NOTIFY */
17420 #define NV_USCALED_NOTIFY 0x004E0104
17421 #define NV_USCALED_NOTIFY_STYLE 0xFFFFFFFF
17422 #define NV_USCALED_NOTIFY_STYLE_WRITE_ONLY 0x00000000
17423 #define NV_USCALED_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001
17424 
17425 /* NV-Register NV_USCALED_SET_NOTIFY */
17426 #define NV_USCALED_SET_NOTIFY 0x004E0104
17427 /* Alias NV_USCALED_NOTIFY */
17428 /* Alias NV_USCALED_NOTIFY */
17429 #define NV_USCALED_SET_NOTIFY_PARAMETER 0xFFFFFFFF
17430 #define NV_USCALED_SET_NOTIFY_PARAMETER_WRITE 0x00000000
17431 
17432 /* NV-Register NV_USCALED_SET_PATCH */
17433 #define NV_USCALED_SET_PATCH 0x004E010C
17434 #define NV_USCALED_SET_PATCH_PARAMETER 0xFFFFFFFF
17435 #define NV_USCALED_SET_PATCH_PARAMETER_INVALIDATE 0x00000000
17436 #define NV_USCALED_SET_PATCH_PARAMETER_VALIDATE 0x00000001
17437 
17438 /* NV-Register NV_USCALED_SET_CONTEXT_DMA_NOTIFY */
17439 #define NV_USCALED_SET_CONTEXT_DMA_NOTIFY 0x004E0180
17440 #define NV_USCALED_SET_CONTEXT_DMA_NOTIFY_PARAMETER 0xFFFFFFFF
17441 
17442 /* NV-Register NV_USCALED_SET_CONTEXT_DMA_IMAGE */
17443 #define NV_USCALED_SET_CONTEXT_DMA_IMAGE 0x004E0184
17444 #define NV_USCALED_SET_CONTEXT_DMA_IMAGE_PARAMETER 0xFFFFFFFF
17445 
17446 /* NV-Register NV_USCALED_SET_IMAGE_OUTPUT */
17447 #define NV_USCALED_SET_IMAGE_OUTPUT 0x004E0200
17448 #define NV_USCALED_SET_IMAGE_OUTPUT_PARAMETER 0xFFFFFFFF
17449 
17450 /* NV-Register NV_USCALED_SET_COLOR_FORMAT */
17451 #define NV_USCALED_SET_COLOR_FORMAT 0x004E0300
17452 #define NV_USCALED_SET_COLOR_FORMAT_LE 0xFFFFFFFF
17453 #define NV_USCALED_SET_COLOR_FORMAT_LE_A1R5G5B5 0x00000001
17454 #define NV_USCALED_SET_COLOR_FORMAT_LE_X1R5G5B5 0x00000002
17455 #define NV_USCALED_SET_COLOR_FORMAT_LE_A8R8G8B8 0x00000003
17456 #define NV_USCALED_SET_COLOR_FORMAT_LE_X8R8G8B8 0x00000004
17457 #define NV_USCALED_SET_COLOR_FORMAT_LE_V8YB8U8YA8 0x00000005
17458 #define NV_USCALED_SET_COLOR_FORMAT_LE_YB8V8YA8U8 0x00000006
17459 #define NV_USCALED_SET_COLOR_FORMAT_LE_R5G6B5 0x00000007
17460 
17461 /* NV-Register NV_USCALED_CLIP_0 */
17462 #define NV_USCALED_CLIP_0 0x004E0308
17463 #define NV_USCALED_CLIP_0_X 0x0000FFFF
17464 #define NV_USCALED_CLIP_0_Y 0xFFFF0000
17465 
17466 /* NV-Register NV_USCALED_CLIP_1 */
17467 #define NV_USCALED_CLIP_1 0x004E030C
17468 #define NV_USCALED_CLIP_1_WIDTH 0x0000FFFF
17469 #define NV_USCALED_CLIP_1_HEIGHT 0xFFFF0000
17470 
17471 /* NV-Register NV_USCALED_RECTANGLE_OUT_0 */
17472 #define NV_USCALED_RECTANGLE_OUT_0 0x004E0310
17473 #define NV_USCALED_RECTANGLE_OUT_0_X 0x0000FFFF
17474 #define NV_USCALED_RECTANGLE_OUT_0_Y 0xFFFF0000
17475 
17476 /* NV-Register NV_USCALED_RECTANGLE_OUT_1 */
17477 #define NV_USCALED_RECTANGLE_OUT_1 0x004E0314
17478 #define NV_USCALED_RECTANGLE_OUT_1_WIDTH 0x0000FFFF
17479 #define NV_USCALED_RECTANGLE_OUT_1_HEIGHT 0xFFFF0000
17480 
17481 /* NV-Register NV_USCALED_DELTA_DU_DX */
17482 #define NV_USCALED_DELTA_DU_DX 0x004E0318
17483 #define NV_USCALED_DELTA_DU_DX_R_FRACTION 0x000FFFFF
17484 #define NV_USCALED_DELTA_DU_DX_R_INT 0xFFF00000
17485 #define NV_USCALED_DELTA_DU_DX_R 0xFFFFFFFF
17486 
17487 /* NV-Register NV_USCALED_DELTA_DV_DY */
17488 #define NV_USCALED_DELTA_DV_DY 0x004E031C
17489 #define NV_USCALED_DELTA_DV_DY_R_FRACTION 0x000FFFFF
17490 #define NV_USCALED_DELTA_DV_DY_R_INT 0xFFF00000
17491 #define NV_USCALED_DELTA_DV_DY_R 0xFFFFFFFF
17492 
17493 /* NV-Register NV_USCALED_SIZE */
17494 #define NV_USCALED_SIZE 0x004E0400
17495 #define NV_USCALED_SIZE_WIDTH 0x0000FFFF
17496 #define NV_USCALED_SIZE_HEIGHT 0xFFFF0000
17497 
17498 /* NV-Register NV_USCALED_PITCH */
17499 #define NV_USCALED_PITCH 0x004E0404
17500 #define NV_USCALED_PITCH_VALUE 0xFFFFFFFF
17501 
17502 /* NV-Register NV_USCALED_OFFSET */
17503 #define NV_USCALED_OFFSET 0x004E0408
17504 #define NV_USCALED_OFFSET_VALUE 0xFFFFFFFF
17505 
17506 /* NV-Register NV_USCALED_POINT */
17507 #define NV_USCALED_POINT 0x004E040C
17508 #define NV_USCALED_POINT_V_FRACTION 0x00000FFF
17509 #define NV_USCALED_POINT_V_INT 0x0000F000
17510 #define NV_USCALED_POINT_V_VALUE 0x0000FFFF
17511 #define NV_USCALED_POINT_U_FRACTION 0x000F0000
17512 #define NV_USCALED_POINT_U_INT 0xFFF00000
17513 #define NV_USCALED_POINT_U_VALUE 0xFFFFFFFF
17514 
17515 /* NV-Device NV_USTRTCH */
17516 #define NV_USTRTCH 0x00550000 /* size: 0x00001FFF */
17517 #ifndef NV_STRETCHED_IMAGE_FROM_CPU
17518 #define NV_STRETCHED_IMAGE_FROM_CPU 0x00000036
17519 #endif
17520 
17521 /* NV-Register NV_USTRTCH_CTX_SWITCH */
17522 #define NV_USTRTCH_CTX_SWITCH 0x00550000
17523 #define NV_USTRTCH_CTX_SWITCH_INSTANCE 0x0000FFFF
17524 #define NV_USTRTCH_CTX_SWITCH_CHID 0x007F0000
17525 #define NV_USTRTCH_CTX_SWITCH_VOLATILE 0x80000000
17526 #define NV_USTRTCH_CTX_SWITCH_VOLATILE_IGNORE 0x7FFFFFFF
17527 #define NV_USTRTCH_CTX_SWITCH_VOLATILE_RESET 0x80000000
17528 
17529 /* NV-Register NV_USTRTCH_NOTIFY */
17530 #define NV_USTRTCH_NOTIFY 0x00550104
17531 #define NV_USTRTCH_NOTIFY_STYLE 0xFFFFFFFF
17532 #define NV_USTRTCH_NOTIFY_STYLE_WRITE_ONLY 0x00000000
17533 #define NV_USTRTCH_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001
17534 
17535 /* NV-Register NV_USTRTCH_SET_NOTIFY */
17536 #define NV_USTRTCH_SET_NOTIFY 0x00550104
17537 /* Alias NV_USTRTCH_NOTIFY */
17538 /* Alias NV_USTRTCH_NOTIFY */
17539 #define NV_USTRTCH_SET_NOTIFY_PARAMETER 0xFFFFFFFF
17540 #define NV_USTRTCH_SET_NOTIFY_PARAMETER_WRITE 0x00000000
17541 
17542 /* NV-Register NV_USTRTCH_SET_PATCH */
17543 #define NV_USTRTCH_SET_PATCH 0x0055010C
17544 #define NV_USTRTCH_SET_PATCH_PARAMETER 0xFFFFFFFF
17545 #define NV_USTRTCH_SET_PATCH_PARAMETER_INVALIDATE 0x00000000
17546 #define NV_USTRTCH_SET_PATCH_PARAMETER_VALIDATE 0x00000001
17547 
17548 /* NV-Register NV_USTRTCH_SET_CONTEXT_DMA_NOTIFY */
17549 #define NV_USTRTCH_SET_CONTEXT_DMA_NOTIFY 0x00550180
17550 #define NV_USTRTCH_SET_CONTEXT_DMA_NOTIFY_PARAMETER 0xFFFFFFFF
17551 
17552 /* NV-Register NV_USTRTCH_SET_IMAGE_OUTPUT */
17553 #define NV_USTRTCH_SET_IMAGE_OUTPUT 0x00550200
17554 #define NV_USTRTCH_SET_IMAGE_OUTPUT_PARAMETER 0xFFFFFFFF
17555 
17556 /* NV-Register NV_USTRTCH_SET_COLOR_FORMAT */
17557 #define NV_USTRTCH_SET_COLOR_FORMAT 0x00550300
17558 #define NV_USTRTCH_SET_COLOR_FORMAT_LE 0xFFFFFFFF
17559 #define NV_USTRTCH_SET_COLOR_FORMAT_LE_Y8 0x00000001
17560 #define NV_USTRTCH_SET_COLOR_FORMAT_LE_A1R5G5B5 0x00000002
17561 #define NV_USTRTCH_SET_COLOR_FORMAT_LE_X1R5G5B5 0x00000003
17562 #define NV_USTRTCH_SET_COLOR_FORMAT_LE_A8R8G8B8 0x00000004
17563 #define NV_USTRTCH_SET_COLOR_FORMAT_LE_X8R8G8B8 0x00000005
17564 
17565 /* NV-Register NV_USTRTCH_SIZE_IN */
17566 #define NV_USTRTCH_SIZE_IN 0x00550304
17567 #define NV_USTRTCH_SIZE_IN_WIDTH 0x0000FFFF
17568 #define NV_USTRTCH_SIZE_IN_HEIGHT 0xFFFF0000
17569 
17570 /* NV-Register NV_USTRTCH_DELTA_DX_DU */
17571 #define NV_USTRTCH_DELTA_DX_DU 0x00550308
17572 #define NV_USTRTCH_DELTA_DX_DU_R_FRACTION 0x000FFFFF
17573 #define NV_USTRTCH_DELTA_DX_DU_R_INT 0xFFF00000
17574 #define NV_USTRTCH_DELTA_DX_DU_R 0xFFFFFFFF
17575 
17576 /* NV-Register NV_USTRTCH_DELTA_DY_DV */
17577 #define NV_USTRTCH_DELTA_DY_DV 0x0055030C
17578 #define NV_USTRTCH_DELTA_DY_DV_R_FRACTION 0x000FFFFF
17579 #define NV_USTRTCH_DELTA_DY_DV_R_INT 0xFFF00000
17580 #define NV_USTRTCH_DELTA_DY_DV_R 0xFFFFFFFF
17581 
17582 /* NV-Register NV_USTRTCH_CLIP_0 */
17583 #define NV_USTRTCH_CLIP_0 0x00550310
17584 #define NV_USTRTCH_CLIP_0_X 0x0000FFFF
17585 #define NV_USTRTCH_CLIP_0_Y 0xFFFF0000
17586 
17587 /* NV-Register NV_USTRTCH_CLIP_1 */
17588 #define NV_USTRTCH_CLIP_1 0x00550314
17589 #define NV_USTRTCH_CLIP_1_WIDTH 0x0000FFFF
17590 #define NV_USTRTCH_CLIP_1_HEIGHT 0xFFFF0000
17591 
17592 /* NV-Register NV_USTRTCH_POINT12D4 */
17593 #define NV_USTRTCH_POINT12D4 0x00550318
17594 #define NV_USTRTCH_POINT12D4_X_FRACTION 0x0000000F
17595 #define NV_USTRTCH_POINT12D4_X_INT 0x0000FFF0
17596 #define NV_USTRTCH_POINT12D4_X 0x0000FFFF
17597 #define NV_USTRTCH_POINT12D4_Y_FRACTION 0x000F0000
17598 #define NV_USTRTCH_POINT12D4_Y_INT 0xFFF00000
17599 #define NV_USTRTCH_POINT12D4_Y 0xFFFF0000
17600 
17601 /* NV-Array NV_USTRTCH_COLOR (4 byte access) */
17602 #define NV_USTRTCH_COLOR 0x00550400
17603 /* NV-Array size NV_USTRTCH_COLOR__SIZE_1 [0..1791] */
17604 #define NV_USTRTCH_COLOR__SIZE_1 0x00000700
17605 #define NV_USTRTCH_COLOR_VALUE 0xFFFFFFFF
17606 
17607 /* NV-Device NV_UTRI */
17608 #define NV_UTRI 0x004B0000 /* size: 0x00001FFF */
17609 #define NV1_RENDER_SOLID_TRIANGLE 0x0000001D
17610 
17611 /* NV-Register NV_UTRI_CTX_SWITCH */
17612 #define NV_UTRI_CTX_SWITCH 0x004B0000
17613 #define NV_UTRI_CTX_SWITCH_INSTANCE 0x0000FFFF
17614 #define NV_UTRI_CTX_SWITCH_CHID 0x007F0000
17615 #define NV_UTRI_CTX_SWITCH_VOLATILE 0x80000000
17616 #define NV_UTRI_CTX_SWITCH_VOLATILE_IGNORE 0x7FFFFFFF
17617 #define NV_UTRI_CTX_SWITCH_VOLATILE_RESET 0x80000000
17618 
17619 /* NV-Register NV_UTRI_NOTIFY */
17620 #define NV_UTRI_NOTIFY 0x004B0104
17621 #define NV_UTRI_NOTIFY_STYLE 0xFFFFFFFF
17622 #define NV_UTRI_NOTIFY_STYLE_WRITE_ONLY 0x00000000
17623 #define NV_UTRI_NOTIFY_STYLE_WRITE_THEN_AWAKEN 0x00000001
17624 
17625 /* NV-Register NV_UTRI_SET_NOTIFY */
17626 #define NV_UTRI_SET_NOTIFY 0x004B0104
17627 /* Alias NV_UTRI_NOTIFY */
17628 /* Alias NV_UTRI_NOTIFY */
17629 #define NV_UTRI_SET_NOTIFY_PARAMETER 0xFFFFFFFF
17630 #define NV_UTRI_SET_NOTIFY_PARAMETER_WRITE 0x00000000
17631 
17632 /* NV-Register NV_UTRI_SET_PATCH */
17633 #define NV_UTRI_SET_PATCH 0x004B010C
17634 #define NV_UTRI_SET_PATCH_PARAMETER 0xFFFFFFFF
17635 #define NV_UTRI_SET_PATCH_PARAMETER_INVALIDATE 0x00000000
17636 #define NV_UTRI_SET_PATCH_PARAMETER_VALIDATE 0x00000001
17637 
17638 /* NV-Register NV_UTRI_SET_CONTEXT_DMA_NOTIFY */
17639 #define NV_UTRI_SET_CONTEXT_DMA_NOTIFY 0x004B0180
17640 #define NV_UTRI_SET_CONTEXT_DMA_NOTIFY_PARAMETER 0xFFFFFFFF
17641 
17642 /* NV-Register NV_UTRI_SET_IMAGE_OUTPUT */
17643 #define NV_UTRI_SET_IMAGE_OUTPUT 0x004B0200
17644 #define NV_UTRI_SET_IMAGE_OUTPUT_PARAMETER 0xFFFFFFFF
17645 
17646 /* NV-Register NV_UTRI_SET_COLOR_FORMAT */
17647 #define NV_UTRI_SET_COLOR_FORMAT 0x004B0300
17648 #define NV_UTRI_SET_COLOR_FORMAT_LE 0xFFFFFFFF
17649 #define NV_UTRI_SET_COLOR_FORMAT_LE_X16A8Y8 0x00000001
17650 #define NV_UTRI_SET_COLOR_FORMAT_LE_X24Y8 0x00000002
17651 #define NV_UTRI_SET_COLOR_FORMAT_LE_X16A1R5G5B5 0x00000003
17652 #ifndef NV_UTRI_SET_COLOR_FORMAT_LE_X17R5G5B5
17653 #define NV_UTRI_SET_COLOR_FORMAT_LE_X17R5G5B5 0x00000004
17654 #endif
17655 #define NV_UTRI_SET_COLOR_FORMAT_LE_A8R8G8B8 0x00000005
17656 #ifndef NV_UTRI_SET_COLOR_FORMAT_LE_X8R8G8B8
17657 #define NV_UTRI_SET_COLOR_FORMAT_LE_X8R8G8B8 0x00000006
17658 #endif
17659 #define NV_UTRI_SET_COLOR_FORMAT_LE_A16Y16 0x00000007
17660 #define NV_UTRI_SET_COLOR_FORMAT_LE_X16Y16 0x00000008
17661 
17662 /* NV-Register NV_UTRI_COLOR */
17663 #define NV_UTRI_COLOR 0x004B0304
17664 #define NV_UTRI_COLOR_VALUE 0xFFFFFFFF
17665 
17666 /* NV-Register NV_UTRI_TRIANGLE_0 */
17667 #define NV_UTRI_TRIANGLE_0 0x004B0310
17668 #define NV_UTRI_TRIANGLE_0_X 0x0000FFFF
17669 #define NV_UTRI_TRIANGLE_0_Y 0xFFFF0000
17670 
17671 /* NV-Register NV_UTRI_TRIANGLE_1 */
17672 #define NV_UTRI_TRIANGLE_1 0x004B0314
17673 #define NV_UTRI_TRIANGLE_1_X 0x0000FFFF
17674 #define NV_UTRI_TRIANGLE_1_Y 0xFFFF0000
17675 
17676 /* NV-Register NV_UTRI_TRIANGLE_2 */
17677 #define NV_UTRI_TRIANGLE_2 0x004B0318
17678 #define NV_UTRI_TRIANGLE_2_X 0x0000FFFF
17679 #define NV_UTRI_TRIANGLE_2_Y 0xFFFF0000
17680 
17681 /* NV-Register NV_UTRI_TRIANGLE32_0 */
17682 #define NV_UTRI_TRIANGLE32_0 0x004B0320
17683 #define NV_UTRI_TRIANGLE32_0_X 0xFFFFFFFF
17684 
17685 /* NV-Register NV_UTRI_TRIANGLE32_1 */
17686 #define NV_UTRI_TRIANGLE32_1 0x004B0324
17687 #define NV_UTRI_TRIANGLE32_1_Y 0xFFFFFFFF
17688 
17689 /* NV-Register NV_UTRI_TRIANGLE32_2 */
17690 #define NV_UTRI_TRIANGLE32_2 0x004B0328
17691 #define NV_UTRI_TRIANGLE32_2_X 0xFFFFFFFF
17692 
17693 /* NV-Register NV_UTRI_TRIANGLE32_3 */
17694 #define NV_UTRI_TRIANGLE32_3 0x004B032C
17695 #define NV_UTRI_TRIANGLE32_3_Y 0xFFFFFFFF
17696 
17697 /* NV-Register NV_UTRI_TRIANGLE32_4 */
17698 #define NV_UTRI_TRIANGLE32_4 0x004B0330
17699 #define NV_UTRI_TRIANGLE32_4_X 0xFFFFFFFF
17700 
17701 /* NV-Register NV_UTRI_TRIANGLE32_5 */
17702 #define NV_UTRI_TRIANGLE32_5 0x004B0334
17703 #define NV_UTRI_TRIANGLE32_5_Y 0xFFFFFFFF
17704 
17705 /* NV-Array NV_UTRI_TRIMESH (4 byte access) */
17706 #define NV_UTRI_TRIMESH 0x004B0400
17707 /* NV-Array size NV_UTRI_TRIMESH__SIZE_1 [0..31] */
17708 #define NV_UTRI_TRIMESH__SIZE_1 0x00000020
17709 #define NV_UTRI_TRIMESH_X 0x0000FFFF
17710 #define NV_UTRI_TRIMESH_Y 0xFFFF0000
17711 
17712 /* NV-Array NV_UTRI_TRIMESH32_0 (8 byte access) */
17713 #define NV_UTRI_TRIMESH32_0 0x004B0480
17714 /* NV-Array size NV_UTRI_TRIMESH32_0__SIZE_1 [0..15] */
17715 #define NV_UTRI_TRIMESH32_0__SIZE_1 0x00000010
17716 #define NV_UTRI_TRIMESH32_0_X 0xFFFFFFFF
17717 
17718 /* NV-Array NV_UTRI_TRIMESH32_1 (8 byte access) */
17719 #define NV_UTRI_TRIMESH32_1 0x004B0484
17720 /* NV-Array size NV_UTRI_TRIMESH32_1__SIZE_1 [0..15] */
17721 #define NV_UTRI_TRIMESH32_1__SIZE_1 0x00000010
17722 #define NV_UTRI_TRIMESH32_1_Y 0xFFFFFFFF
17723 
17724 /* NV-Array NV_UTRI_CTRIANGLE_0 (16 byte access) */
17725 #define NV_UTRI_CTRIANGLE_0 0x004B0500
17726 /* NV-Array size NV_UTRI_CTRIANGLE_0__SIZE_1 [0..7] */
17727 #define NV_UTRI_CTRIANGLE_0__SIZE_1 0x00000008
17728 #define NV_UTRI_CTRIANGLE_0_COLOR 0xFFFFFFFF
17729 
17730 /* NV-Array NV_UTRI_CTRIANGLE_1 (16 byte access) */
17731 #define NV_UTRI_CTRIANGLE_1 0x004B0504
17732 /* NV-Array size NV_UTRI_CTRIANGLE_1__SIZE_1 [0..7] */
17733 #define NV_UTRI_CTRIANGLE_1__SIZE_1 0x00000008
17734 #define NV_UTRI_CTRIANGLE_1_X 0x0000FFFF
17735 #define NV_UTRI_CTRIANGLE_1_Y 0xFFFF0000
17736 
17737 /* NV-Array NV_UTRI_CTRIANGLE_2 (16 byte access) */
17738 #define NV_UTRI_CTRIANGLE_2 0x004B0508
17739 /* NV-Array size NV_UTRI_CTRIANGLE_2__SIZE_1 [0..7] */
17740 #define NV_UTRI_CTRIANGLE_2__SIZE_1 0x00000008
17741 #define NV_UTRI_CTRIANGLE_2_X 0x0000FFFF
17742 #define NV_UTRI_CTRIANGLE_2_Y 0xFFFF0000
17743 
17744 /* NV-Array NV_UTRI_CTRIANGLE_3 (16 byte access) */
17745 #define NV_UTRI_CTRIANGLE_3 0x004B050C
17746 /* NV-Array size NV_UTRI_CTRIANGLE_3__SIZE_1 [0..7] */
17747 #define NV_UTRI_CTRIANGLE_3__SIZE_1 0x00000008
17748 #define NV_UTRI_CTRIANGLE_3_X 0x0000FFFF
17749 #define NV_UTRI_CTRIANGLE_3_Y 0xFFFF0000
17750 
17751 /* NV-Array NV_UTRI_CTRIMESH_0 (8 byte access) */
17752 #define NV_UTRI_CTRIMESH_0 0x004B0580
17753 /* NV-Array size NV_UTRI_CTRIMESH_0__SIZE_1 [0..15] */
17754 #define NV_UTRI_CTRIMESH_0__SIZE_1 0x00000010
17755 #define NV_UTRI_CTRIMESH_0_COLOR 0xFFFFFFFF
17756 
17757 /* NV-Array NV_UTRI_CTRIMESH_1 (8 byte access) */
17758 #define NV_UTRI_CTRIMESH_1 0x004B0584
17759 /* NV-Array size NV_UTRI_CTRIMESH_1__SIZE_1 [0..15] */
17760 #define NV_UTRI_CTRIMESH_1__SIZE_1 0x00000010
17761 #define NV_UTRI_CTRIMESH_1_X 0x0000FFFF
17762 #define NV_UTRI_CTRIMESH_1_Y 0xFFFF0000
17763 
17764 /* NV-Device NV_UW95TXT */
17765 #define NV_UW95TXT 0x004C0000 /* size: 0x00001FFF */
17766 #define NV_RENDER_GDI0_RECTANGLE_AND_TEXT 0x004B0000
17767 
17768 /* NV-Register NV_UW95TXT_CTX_SWITCH */
17769 #define NV_UW95TXT_CTX_SWITCH 0x004C0000
17770 #define NV_UW95TXT_CTX_SWITCH_INSTANCE 0x0000FFFF
17771 #define NV_UW95TXT_CTX_SWITCH_CHID 0x007F0000
17772 #define NV_UW95TXT_CTX_SWITCH_VOLATILE 0x80000000
17773 #define NV_UW95TXT_CTX_SWITCH_VOLATILE_IGNORE 0x7FFFFFFF
17774 #define NV_UW95TXT_CTX_SWITCH_VOLATILE_RESET 0x80000000
17775 
17776 /* NV-Register NV_UW95TXT_SET_NOTIFY */
17777 #define NV_UW95TXT_SET_NOTIFY 0x004C0104
17778 #define NV_UW95TXT_SET_NOTIFY_PARAMETER 0xFFFFFFFF
17779 #define NV_UW95TXT_SET_NOTIFY_PARAMETER_WRITE 0x00000000
17780 
17781 /* NV-Register NV_UW95TXT_SET_CONTEXT_DMA_NOTIFY */
17782 #define NV_UW95TXT_SET_CONTEXT_DMA_NOTIFY 0x004C0180
17783 #define NV_UW95TXT_SET_CONTEXT_DMA_NOTIFY_PARAMETER 0xFFFFFFFF
17784 
17785 /* NV-Register NV_UW95TXT_SET_COLOR_FORMAT */
17786 #define NV_UW95TXT_SET_COLOR_FORMAT 0x004C0300
17787 #define NV_UW95TXT_SET_COLOR_FORMAT_VALUE 0xFFFFFFFF
17788 
17789 /* NV-Register NV_UW95TXT_SET_MONOCHROME_FORMAT */
17790 #define NV_UW95TXT_SET_MONOCHROME_FORMAT 0x004C0304
17791 #define NV_UW95TXT_SET_MONOCHROME_FORMAT_VALUE 0xFFFFFFFF
17792 
17793 /* NV-Register NV_UW95TXT_COLOR_A */
17794 #define NV_UW95TXT_COLOR_A 0x004C03FC
17795 #define NV_UW95TXT_COLOR_A_VALUE 0xFFFFFFFF
17796 
17797 /* NV-Array NV_UW95TXT_RECT_NCLIP_0 (8 byte access) */
17798 #define NV_UW95TXT_RECT_NCLIP_0 0x004C0400
17799 /* NV-Array size NV_UW95TXT_RECT_NCLIP_0__SIZE_1 [0..63] */
17800 #define NV_UW95TXT_RECT_NCLIP_0__SIZE_1 0x00000040
17801 #define NV_UW95TXT_RECT_NCLIP_0_Y 0x0000FFFF
17802 #define NV_UW95TXT_RECT_NCLIP_0_X 0xFFFF0000
17803 
17804 /* NV-Array NV_UW95TXT_RECT_NCLIP_1 (8 byte access) */
17805 #define NV_UW95TXT_RECT_NCLIP_1 0x004C0404
17806 /* NV-Array size NV_UW95TXT_RECT_NCLIP_1__SIZE_1 [0..63] */
17807 #define NV_UW95TXT_RECT_NCLIP_1__SIZE_1 0x00000040
17808 #define NV_UW95TXT_RECT_NCLIP_1_HEIGHT 0x0000FFFF
17809 #define NV_UW95TXT_RECT_NCLIP_1_WIDTH 0xFFFF0000
17810 
17811 /* NV-Register NV_UW95TXT_CLIP_B_0 */
17812 #define NV_UW95TXT_CLIP_B_0 0x004C07F4
17813 #define NV_UW95TXT_CLIP_B_0_LEFT 0x0000FFFF
17814 #define NV_UW95TXT_CLIP_B_0_TOP 0xFFFF0000
17815 
17816 /* NV-Register NV_UW95TXT_CLIP_B_1 */
17817 #define NV_UW95TXT_CLIP_B_1 0x004C07F8
17818 #define NV_UW95TXT_CLIP_B_1_RIGHT 0x0000FFFF
17819 #define NV_UW95TXT_CLIP_B_1_BOTTOM 0xFFFF0000
17820 
17821 /* NV-Register NV_UW95TXT_COLOR_B */
17822 #define NV_UW95TXT_COLOR_B 0x004C07FC
17823 #define NV_UW95TXT_COLOR_B_VALUE 0xFFFFFFFF
17824 
17825 /* NV-Array NV_UW95TXT_RECT_CLIP_0 (8 byte access) */
17826 #define NV_UW95TXT_RECT_CLIP_0 0x004C0800
17827 /* NV-Array size NV_UW95TXT_RECT_CLIP_0__SIZE_1 [0..63] */
17828 #define NV_UW95TXT_RECT_CLIP_0__SIZE_1 0x00000040
17829 #define NV_UW95TXT_RECT_CLIP_0_LEFT 0x0000FFFF
17830 #define NV_UW95TXT_RECT_CLIP_0_TOP 0xFFFF0000
17831 
17832 /* NV-Array NV_UW95TXT_RECT_CLIP_1 (8 byte access) */
17833 #define NV_UW95TXT_RECT_CLIP_1 0x004C0804
17834 /* NV-Array size NV_UW95TXT_RECT_CLIP_1__SIZE_1 [0..63] */
17835 #define NV_UW95TXT_RECT_CLIP_1__SIZE_1 0x00000040
17836 #define NV_UW95TXT_RECT_CLIP_1_RIGHT 0x0000FFFF
17837 #define NV_UW95TXT_RECT_CLIP_1_BOTTOM 0xFFFF0000
17838 
17839 /* NV-Register NV_UW95TXT_CLIP_C_0 */
17840 #define NV_UW95TXT_CLIP_C_0 0x004C0BEC
17841 #define NV_UW95TXT_CLIP_C_0_LEFT 0x0000FFFF
17842 #define NV_UW95TXT_CLIP_C_0_TOP 0xFFFF0000
17843 
17844 /* NV-Register NV_UW95TXT_CLIP_C_1 */
17845 #define NV_UW95TXT_CLIP_C_1 0x004C0BF0
17846 #define NV_UW95TXT_CLIP_C_1_RIGHT 0x0000FFFF
17847 #define NV_UW95TXT_CLIP_C_1_BOTTOM 0xFFFF0000
17848 
17849 /* NV-Register NV_UW95TXT_COLOR1_C */
17850 #define NV_UW95TXT_COLOR1_C 0x004C0BF4
17851 #define NV_UW95TXT_COLOR1_C_VALUE 0xFFFFFFFF
17852 
17853 /* NV-Register NV_UW95TXT_SIZE_C */
17854 #define NV_UW95TXT_SIZE_C 0x004C0BF8
17855 #define NV_UW95TXT_SIZE_C_WIDTH 0x0000FFFF
17856 #define NV_UW95TXT_SIZE_C_HEIGHT 0xFFFF0000
17857 
17858 /* NV-Register NV_UW95TXT_POINT_C */
17859 #define NV_UW95TXT_POINT_C 0x004C0BFC
17860 #define NV_UW95TXT_POINT_C_X 0x0000FFFF
17861 #define NV_UW95TXT_POINT_C_Y 0xFFFF0000
17862 
17863 /* NV-Array NV_UW95TXT_MONO_COLOR1_C (4 byte access) */
17864 #define NV_UW95TXT_MONO_COLOR1_C 0x004C0C00
17865 /* NV-Array size NV_UW95TXT_MONO_COLOR1_C__SIZE_1 [0..127] */
17866 #define NV_UW95TXT_MONO_COLOR1_C__SIZE_1 0x00000080
17867 #define NV_UW95TXT_MONO_COLOR1_C_BITMAP 0xFFFFFFFF
17868 
17869 /* NV-Register NV_UW95TXT_CLIP_D_0 */
17870 #define NV_UW95TXT_CLIP_D_0 0x004C0FE8
17871 #define NV_UW95TXT_CLIP_D_0_LEFT 0x0000FFFF
17872 #define NV_UW95TXT_CLIP_D_0_TOP 0xFFFF0000
17873 
17874 /* NV-Register NV_UW95TXT_CLIP_D_1 */
17875 #define NV_UW95TXT_CLIP_D_1 0x004C0FEC
17876 #define NV_UW95TXT_CLIP_D_1_RIGHT 0x0000FFFF
17877 #define NV_UW95TXT_CLIP_D_1_BOTTOM 0xFFFF0000
17878 
17879 /* NV-Register NV_UW95TXT_COLOR1_D */
17880 #define NV_UW95TXT_COLOR1_D 0x004C0FF0
17881 #define NV_UW95TXT_COLOR1_D_VALUE 0xFFFFFFFF
17882 
17883 /* NV-Register NV_UW95TXT_SIZE_IN_D */
17884 #define NV_UW95TXT_SIZE_IN_D 0x004C0FF4
17885 #define NV_UW95TXT_SIZE_IN_D_WIDTH 0x0000FFFF
17886 #define NV_UW95TXT_SIZE_IN_D_HEIGHT 0xFFFF0000
17887 
17888 /* NV-Register NV_UW95TXT_SIZE_OUT_D */
17889 #define NV_UW95TXT_SIZE_OUT_D 0x004C0FF8
17890 #define NV_UW95TXT_SIZE_OUT_D_WIDTH 0x0000FFFF
17891 #define NV_UW95TXT_SIZE_OUT_D_HEIGHT 0xFFFF0000
17892 
17893 /* NV-Register NV_UW95TXT_POINT_D */
17894 #define NV_UW95TXT_POINT_D 0x004C0FFC
17895 #define NV_UW95TXT_POINT_D_X 0x0000FFFF
17896 #define NV_UW95TXT_POINT_D_Y 0xFFFF0000
17897 
17898 /* NV-Array NV_UW95TXT_MONO_COLOR1_D (4 byte access) */
17899 #define NV_UW95TXT_MONO_COLOR1_D 0x004C1000
17900 /* NV-Array size NV_UW95TXT_MONO_COLOR1_D__SIZE_1 [0..127] */
17901 #define NV_UW95TXT_MONO_COLOR1_D__SIZE_1 0x00000080
17902 #define NV_UW95TXT_MONO_COLOR1_D_BITMAP 0xFFFFFFFF
17903 
17904 /* NV-Register NV_UW95TXT_CLIP_E_0 */
17905 #define NV_UW95TXT_CLIP_E_0 0x004C13E4
17906 #define NV_UW95TXT_CLIP_E_0_LEFT 0x0000FFFF
17907 #define NV_UW95TXT_CLIP_E_0_TOP 0xFFFF0000
17908 
17909 /* NV-Register NV_UW95TXT_CLIP_E_1 */
17910 #define NV_UW95TXT_CLIP_E_1 0x004C13E8
17911 #define NV_UW95TXT_CLIP_E_1_RIGHT 0x0000FFFF
17912 #define NV_UW95TXT_CLIP_E_1_BOTTOM 0xFFFF0000
17913 
17914 /* NV-Register NV_UW95TXT_COLOR0_E */
17915 #define NV_UW95TXT_COLOR0_E 0x004C13EC
17916 #define NV_UW95TXT_COLOR0_E_VALUE 0xFFFFFFFF
17917 
17918 /* NV-Register NV_UW95TXT_COLOR1_E */
17919 #define NV_UW95TXT_COLOR1_E 0x004C13F0
17920 #define NV_UW95TXT_COLOR1_E_VALUE 0xFFFFFFFF
17921 
17922 /* NV-Register NV_UW95TXT_SIZE_IN_E */
17923 #define NV_UW95TXT_SIZE_IN_E 0x004C13F4
17924 #define NV_UW95TXT_SIZE_IN_E_WIDTH 0x0000FFFF
17925 #define NV_UW95TXT_SIZE_IN_E_HEIGHT 0xFFFF0000
17926 
17927 /* NV-Register NV_UW95TXT_SIZE_OUT_E */
17928 #define NV_UW95TXT_SIZE_OUT_E 0x004C13F8
17929 #define NV_UW95TXT_SIZE_OUT_E_WIDTH 0x0000FFFF
17930 #define NV_UW95TXT_SIZE_OUT_E_HEIGHT 0xFFFF0000
17931 
17932 /* NV-Register NV_UW95TXT_POINT_E */
17933 #define NV_UW95TXT_POINT_E 0x004C13FC
17934 #define NV_UW95TXT_POINT_E_X 0x0000FFFF
17935 #define NV_UW95TXT_POINT_E_Y 0xFFFF0000
17936 
17937 /* NV-Array NV_UW95TXT_MONO_COLOR01_E (4 byte access) */
17938 #define NV_UW95TXT_MONO_COLOR01_E 0x004C1400
17939 /* NV-Array size NV_UW95TXT_MONO_COLOR01_E__SIZE_1 [0..127] */
17940 #define NV_UW95TXT_MONO_COLOR01_E__SIZE_1 0x00000080
17941 #define NV_UW95TXT_MONO_COLOR01_E_BITMAP 0xFFFFFFFF
17942 
17943 #endif /* __NV10REG_H__ */