The Pedigree Project  0.1
mips_common/Timer.cc
1 /*
2  * Copyright (c) 2008-2014, Pedigree Developers
3  *
4  * Please see the CONTRIB file in the root of the source tree for a full
5  * list of contributors.
6  *
7  * Permission to use, copy, modify, and distribute this software for any
8  * purpose with or without fee is hereby granted, provided that the above
9  * copyright notice and this permission notice appear in all copies.
10  *
11  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18  */
19 
20 #include "Timer.h"
21 #include "../core/processor/mips32/InterruptManager.h"
22 #include "pedigree/kernel/Log.h"
23 #include "pedigree/kernel/compiler.h"
24 #include "pedigree/kernel/machine/Machine.h"
25 #include "pedigree/kernel/processor/InterruptManager.h"
26 #include "pedigree/kernel/processor/Processor.h"
27 
29 
30 bool CountCompareTimer::registerHandler(TimerHandler *handler)
31 {
32  if (UNLIKELY(handler == 0 && m_Handler != 0))
33  return false;
34 
35  m_Handler = handler;
36  return true;
37 }
38 
40 {
41  // Allocate the Interrupt.
42  MIPS32InterruptManager &IntManager =
44  if (IntManager.registerExternalInterruptHandler(7, this) == false)
45  return false;
46 
48 
49  uint32_t bleh;
50  asm volatile("mfc0 %0, $12, 1" : "=r"(bleh));
51  NOTICE("Bleh: " << Hex << bleh);
52 
53  // Unmask our interrupt vector.
54  uint32_t sr;
55  asm volatile("mfc0 %0, $12;nop" : "=r"(sr));
56  // NOTICE(Hex << sr);
57  // Processor::breakpoint();
58  sr |= (0x80 << 8); // Enable external interrupt 0 - first two bits are
59  // software ints.
60  asm volatile("mtc0 %0, $12;nop" : : "r"(sr));
61 
62  // Set up the compare register.
63  asm volatile("mtc0 %0, $11; nop" : : "r"(m_Compare));
64  // Zero the count register.
65  asm volatile("mtc0 $zero, $9; nop");
66 
67  return true;
68 }
70 {
71 }
72 
74 {
75 }
76 
77 void CountCompareTimer::interrupt(size_t interruptNumber, InterruptState &state)
78 {
79  // Set up the compare register.
80  m_Compare += 0x10000;
81  asm volatile("mtc0 %0, $11; nop" : : "r"(m_Compare));
82 
83  // Processor::breakpoint();
84 
85  // Read count - are we about to overlap?
86  uint32_t count;
87  asm volatile("mfc0 %0, $9; nop" : "=r"(count));
88 
89  if (count > m_Compare)
90  {
91  asm volatile("mtc0 %0, $9; nop" : : "r"(m_Compare - 0x10000));
92  }
93 
94  // TODO: Delta is wrong
95  if (LIKELY(m_Handler != 0))
96  m_Handler->timer(0, state);
97 }
virtual void interrupt(size_t interruptNumber, InterruptState &state)
static CountCompareTimer m_Instance
#define NOTICE(text)
Definition: Log.h:74
Definition: Log.h:136
virtual void timer(uint64_t delta, InterruptState &state)=0
static void setInterrupts(bool bEnable)
bool initialise() INITIALISATION_ONLY
CountCompareTimer() INITIALISATION_ONLY
static InterruptManager & instance()