20 #ifndef KERNEL_PROCESSOR_PPC_COMMON_PROCESSOR_H 21 #define KERNEL_PROCESSOR_PPC_COMMON_PROCESSOR_H 23 #define MSR_POW 0x00040000 24 #define MSR_ILE 0x00010000 25 #define MSR_EE 0x00008000 26 #define MSR_PR 0x00004000 27 #define MSR_FP 0x00002000 28 #define MSR_ME 0x00001000 29 #define MSR_FE0 0x00000800 30 #define MSR_SE 0x00000400 31 #define MSR_BE 0x00000200 32 #define MSR_FE1 0x00000100 33 #define MSR_IP 0x00000040 34 #define MSR_IR 0x00000020 35 #define MSR_DR 0x00000010 36 #define MSR_RI 0x00000002 37 #define MSR_LE 0x00000001 54 asm volatile(
"tlbie %0" : :
"r"(pAddress));
57 void Processor::setSegmentRegisters(
58 uint32_t segmentBase,
bool supervisorKey,
bool userKey)
61 for (
int i = 0; i < 16; i++)
65 segs[i] |= 0x40000000;
67 segs[i] |= 0x20000000;
68 segs[i] |= (segmentBase + i) & 0x00FFFFFF;
70 asm volatile(
"mtsr 0, %0" : :
"r"(segs[0]));
71 asm volatile(
"mtsr 1, %0" : :
"r"(segs[1]));
72 asm volatile(
"mtsr 2, %0" : :
"r"(segs[2]));
73 asm volatile(
"mtsr 3, %0" : :
"r"(segs[3]));
74 asm volatile(
"mtsr 4, %0" : :
"r"(segs[4]));
75 asm volatile(
"mtsr 5, %0" : :
"r"(segs[5]));
76 asm volatile(
"mtsr 6, %0" : :
"r"(segs[6]));
77 asm volatile(
"mtsr 7, %0" : :
"r"(segs[7]));
static void invalidate(void *pAddress)