|
uint16_t | vendor |
|
uint16_t | device |
|
uint16_t | command |
|
uint16_t | status |
|
uint8_t | revision |
|
uint8_t | progif |
|
uint8_t | subclass |
|
uint8_t | class_code |
|
uint8_t | cache_line_size |
|
uint8_t | latency_timer |
|
uint8_t | header_type |
|
uint8_t | bist |
|
uint32_t | bar [6] |
|
uint32_t | cardbus_pointer |
|
uint16_t | subsys_vendor |
|
uint16_t | subsys_id |
|
uint32_t | rom_base_address |
|
uint32_t | reserved0 |
|
uint32_t | reserved1 |
|
uint8_t | interrupt_line |
|
uint8_t | interrupt_pin |
|
uint8_t | min_grant |
|
uint8_t | max_latency |
|
Definition at line 82 of file Pci.h.
The documentation for this struct was generated from the following file: