Definition at line 148 of file Pci.h.
◆ bar
| uint32_t PciBus::ConfigSpace::bar[6] |
◆ bist
| uint8_t PciBus::ConfigSpace::bist |
◆ cache_line_size
| uint8_t PciBus::ConfigSpace::cache_line_size |
◆ cardbus_pointer
| uint32_t PciBus::ConfigSpace::cardbus_pointer |
◆ class_code
| uint8_t PciBus::ConfigSpace::class_code |
◆ command
| uint16_t PciBus::ConfigSpace::command |
◆ device
| uint16_t PciBus::ConfigSpace::device |
◆ header_type
| uint8_t PciBus::ConfigSpace::header_type |
◆ interrupt_line
| uint8_t PciBus::ConfigSpace::interrupt_line |
◆ interrupt_pin
| uint8_t PciBus::ConfigSpace::interrupt_pin |
◆ latency_timer
| uint8_t PciBus::ConfigSpace::latency_timer |
◆ max_latency
| uint8_t PciBus::ConfigSpace::max_latency |
◆ min_grant
| uint8_t PciBus::ConfigSpace::min_grant |
◆ progif
| uint8_t PciBus::ConfigSpace::progif |
◆ reserved0
| uint32_t PciBus::ConfigSpace::reserved0 |
◆ reserved1
| uint32_t PciBus::ConfigSpace::reserved1 |
◆ revision
| uint8_t PciBus::ConfigSpace::revision |
◆ rom_base_address
| uint32_t PciBus::ConfigSpace::rom_base_address |
◆ status
| uint16_t PciBus::ConfigSpace::status |
◆ subclass
| uint8_t PciBus::ConfigSpace::subclass |
◆ subsys_id
| uint16_t PciBus::ConfigSpace::subsys_id |
◆ subsys_vendor
| uint16_t PciBus::ConfigSpace::subsys_vendor |
◆ vendor
| uint16_t PciBus::ConfigSpace::vendor |
The documentation for this struct was generated from the following file: