20 #ifndef PCI_ATA_CONTROLLER_H 21 #define PCI_ATA_CONTROLLER_H 23 #include "AtaController.h" 24 #include "pedigree/kernel/machine/types.h" 25 #include "pedigree/kernel/processor/state_forward.h" 26 #include "pedigree/kernel/processor/types.h" 27 #include "pedigree/kernel/utilities/StaticString.h" 28 #include "pedigree/kernel/utilities/String.h" 34 #define ATA_CMD_READ 0 35 #define ATA_CMD_WRITE 1 49 s.append(m_nController);
50 str =
String(static_cast<const char *>(s));
53 virtual bool sendCommand(
54 size_t nUnit, uintptr_t pCommand, uint8_t nCommandSize,
55 uintptr_t pRespBuffer, uint16_t nRespBytes,
bool bWrite);
58 uint64_t p1, uint64_t p2, uint64_t p3, uint64_t p4, uint64_t p5,
59 uint64_t p6, uint64_t p7, uint64_t p8);
62 virtual bool irq(irq_id_t number, InterruptState &state);
83 } m_PciControllerType;
virtual uint64_t executeRequest(uint64_t p1, uint64_t p2, uint64_t p3, uint64_t p4, uint64_t p5, uint64_t p6, uint64_t p7, uint64_t p8)
virtual bool irq(irq_id_t number, InterruptState &state)
Abstrace base class for hardware I/O capabilities.
virtual void getName(String &str)
PciAtaController(Controller *pDev, int nController=0)