20 #ifndef KERNEL_PROCESSOR_PROCESSOR_H 21 #define KERNEL_PROCESSOR_PROCESSOR_H 23 #include "pedigree/kernel/compiler.h" 24 #include "pedigree/kernel/processor/ProcessorInformation.h" 25 #include "pedigree/kernel/processor/state_forward.h" 26 #include "pedigree/kernel/processor/types.h" 27 #include "pedigree/kernel/utilities/StaticString.h" 28 #if defined(MULTIPROCESSOR) 55 #define DEBUG_BREAKPOINT_0 0x01 56 #define DEBUG_BREAKPOINT_1 0x02 57 #define DEBUG_BREAKPOINT_2 0x04 58 #define DEBUG_BREAKPOINT_3 0x08 59 #define DEBUG_REG_ACCESS \ 61 #define DEBUG_SINGLE_STEP \ 64 #define DEBUG_TASK_SWITCH \ 106 static void initialisationDone();
109 static void deinitialise();
114 static size_t isInitialised();
118 static uintptr_t getBasePointer();
121 static uintptr_t getStackPointer();
124 static uintptr_t getInstructionPointer();
134 static bool saveState(SchedulerState &state)
135 #ifdef SYSTEM_REQUIRES_ATOMIC_CONTEXT_SWITCH 143 restoreState(SchedulerState &state,
volatile uintptr_t *pLock = 0)
NORETURN;
148 restoreState(SyscallState &state,
volatile uintptr_t *pLock = 0)
NORETURN;
149 #ifdef SYSTEM_REQUIRES_ATOMIC_CONTEXT_SWITCH 151 static void switchState(
152 bool bInterrupts, SchedulerState &a, SchedulerState &b,
153 volatile uintptr_t *pLock = 0);
155 static void switchState(
156 bool bInterrupts, SchedulerState &a, SyscallState &b,
157 volatile uintptr_t *pLock = 0);
168 static void saveAndJumpKernel(
169 bool bInterrupts, SchedulerState &s,
volatile uintptr_t *pLock,
170 uintptr_t address, uintptr_t stack, uintptr_t p1 = 0, uintptr_t p2 = 0,
171 uintptr_t p3 = 0, uintptr_t p4 = 0);
182 static void saveAndJumpUser(
183 bool bInterrupts, SchedulerState &s,
volatile uintptr_t *pLock,
184 uintptr_t address, uintptr_t stack, uintptr_t p1 = 0, uintptr_t p2 = 0,
185 uintptr_t p3 = 0, uintptr_t p4 = 0);
186 #endif // SYSTEM_REQUIRES_ATOMIC_CONTEXT_SWITCH 196 static void jumpKernel(
197 volatile uintptr_t *pLock, uintptr_t address, uintptr_t stack,
198 uintptr_t p1 = 0, uintptr_t p2 = 0, uintptr_t p3 = 0,
209 static void jumpUser(
210 volatile uintptr_t *pLock, uintptr_t address, uintptr_t stack,
211 uintptr_t p1 = 0, uintptr_t p2 = 0, uintptr_t p3 = 0,
215 static void breakpoint();
223 static size_t getDebugBreakpointCount();
229 static uintptr_t getDebugBreakpoint(
230 size_t nBpNumber, DebugFlags::FaultType &nFaultType,
size_t &nLength,
238 static void enableDebugBreakpoint(
239 size_t nBpNumber, uintptr_t nLinearAddress,
240 DebugFlags::FaultType nFaultType,
size_t nLength);
244 static void disableDebugBreakpoint(
size_t nBpNumber);
248 static uintptr_t getDebugStatus();
251 static void haltUntilInterrupt();
257 static void setInterrupts(
bool bEnable);
260 static bool getInterrupts();
264 static void setSingleStep(
bool bEnable, InterruptState &state);
266 #if defined(X86_COMMON) 270 static uint64_t readMachineSpecificRegister(uint32_t index);
274 static void writeMachineSpecificRegister(uint32_t index, uint64_t value);
283 uint32_t inEax, uint32_t inEcx, uint32_t &eax, uint32_t &ebx,
284 uint32_t &ecx, uint32_t &edx);
294 invalidate(
void *pAddress);
296 #if defined(X86_COMMON) 297 static physical_uintptr_t readCr3();
302 static physical_uintptr_t readTTBR0();
304 static physical_uintptr_t readTTBR1();
306 static uint32_t readTTBCR();
308 static void writeTTBR0(physical_uintptr_t value);
310 static void writeTTBR1(physical_uintptr_t value);
312 static void writeTTBCR(uint32_t value);
315 #if defined(MIPS_COMMON) || defined(PPC_COMMON) 319 static void invalidateICache(uintptr_t nAddr);
323 static void invalidateDCache(uintptr_t nAddr);
327 static void flushDCache(uintptr_t nAddr);
334 flushDCacheAndInvalidateICache(uintptr_t startAddr, uintptr_t endAddr);
343 #if !defined(MULTIPROCESSOR) 350 #if !defined(MULTIPROCESSOR) 351 static ProcessorInformation &information();
353 static ProcessorInformation &information();
356 #if !defined(MULTIPROCESSOR) 357 static size_t getCount();
359 static size_t getCount();
364 setSegmentRegisters(uint32_t segmentBase,
bool supervisorKey,
bool userKey);
368 static void setTlsBase(uintptr_t newBase);
376 static void _breakpoint();
377 static void _reset() NORETURN;
378 static
void _haltUntilInterrupt();
380 static
bool m_bInterrupts;
385 #if !defined(MULTIPROCESSOR) 392 static ProcessorInformation m_SafeBspProcessorInformation;
395 static size_t m_nProcessors;
400 #if defined(X86_COMMON) 401 #include "pedigree/kernel/processor/x86_common/Processor.h" 402 #elif defined(MIPS_COMMON) 403 #include "pedigree/kernel/processor/mips_common/Processor.h" 404 #elif defined(ARM_COMMON) 405 #include "pedigree/kernel/processor/arm_common/Processor.h" 406 #elif defined(PPC_COMMON) 407 #include "pedigree/kernel/processor/ppc_common/Processor.h" 408 #elif defined(HOSTED) 409 #include "pedigree/kernel/processor/hosted/Processor.h" 413 #include "pedigree/kernel/processor/x86/Processor.h" 416 #include "pedigree/kernel/processor/x64/Processor.h" Bootstrap structure passed to the kernel entry point.
This class manages how processes and threads are scheduled across processors.
#define INITIALISATION_ONLY
A vector / dynamic array.
static size_t m_Initialised
The exception was caused by a hardware task switch.
static ProcessorInformation m_ProcessorInformation