13 enum class Result { Success, CommandError, TransportError };
15 bool initialise(
IoBase* registers, uint16_t
id, uint16_t depth,
size_t stride,
16 size_t transferBytes);
17 Result execute(
Nvme::Command command,
void* buffer,
size_t bytes,
bool writing,
bool interrupts,
18 size_t timeoutSeconds, uint32_t* result =
nullptr,
bool interruptProbe =
false);
19 bool complete(
bool fromInterrupt);
21 size_t interruptCompletions()
const;
22 size_t maximumOutstanding()
const;
23 uint64_t submissionAddress()
const {
26 uint64_t completionAddress()
const {
29 uint16_t depth()
const {
37 physical_uintptr_t firstPage = 0;
45 bool observe(
bool fromInterrupt,
bool interruptsEnabled =
false);
50 Slot m_Slots[Nvme::QueueDepth - 1];
54 size_t m_TransferBytes;
59 uint16_t m_SubmissionHead;
62 bool m_PolledInterrupt;
63 size_t m_InterruptCompletions;
65 size_t m_MaximumOutstanding;