NvmeQueue.h

/* Copyright (c) 2026, Pedigree Developers. SPDX-License-Identifier: ISC */
#ifndef NVME_QUEUE_H
#define NVME_QUEUE_H
#include "pedigree/kernel/machine/Pci.h"
#include "pedigree/kernel/process/Mutex.h"
#include "pedigree/kernel/process/Semaphore.h"
#include "pedigree/kernel/processor/MemoryRegion.h"
 
#include "Registers.h"
class IoBase;
 
class NvmeQueue {
 public:
  enum class Result { Success, CommandError, TransportError };
  NvmeQueue();
  bool initialise(IoBase* registers, uint16_t id, uint16_t depth, size_t stride,
                  size_t transferBytes, Device* dmaDevice);
  Result execute(Nvme::Command command, void* buffer, size_t bytes, bool writing, bool interrupts,
                 size_t timeoutSeconds, uint32_t* result = nullptr, bool interruptProbe = false,
                 bool cacheFill = false, physical_uintptr_t directWritePhysical = 0,
                 PciBus::DmaMapping* directReadMapping = nullptr);
  bool complete(bool fromInterrupt);
  void stop();
  void releaseDma();
  size_t interruptCompletions() const;
  size_t maximumOutstanding() const;
  uint64_t submissionAddress() const {
    return m_SubmissionDma.address();
  }
  uint64_t completionAddress() const {
    return m_CompletionDma.address();
  }
  uint16_t depth() const {
    return m_Depth;
  }
 
 private:
  struct Slot {
    Slot();
    MemoryRegion data;
    physical_uintptr_t firstPage = 0;
    MemoryRegion prps;
    PciBus::DmaMapping dataDma[Nvme::MaxTransfer / Nvme::PageSize];
    PciBus::DmaMapping prpsDma;
    Semaphore completion;
    bool active;
    bool done;
    uint16_t status;
    uint32_t result;
  };
  bool observe(bool fromInterrupt, bool interruptsEnabled = false);
  void stopLocked();
  IoBase* m_Registers;
  Device* m_DmaDevice;
  MemoryRegion m_Submission;
  MemoryRegion m_Completion;
  PciBus::DmaMapping m_SubmissionDma;
  PciBus::DmaMapping m_CompletionDma;
  Slot m_Slots[Nvme::QueueDepth - 1];
  mutable Mutex m_Lock;
  Semaphore m_Available;
  size_t m_Stride;
  size_t m_TransferBytes;
  uint16_t m_Id;
  uint16_t m_Depth;
  uint16_t m_Tail;
  uint16_t m_Head;
  uint16_t m_SubmissionHead;
  bool m_Phase;
  bool m_Online;
  bool m_PolledInterrupt;
  size_t m_InterruptCompletions;
  size_t m_Outstanding;
  size_t m_MaximumOutstanding;
};
#endif