ProcessorBase Class Reference

#include <Processor.h>

Inheritance diagram for ProcessorBase:

Collaboration diagram for ProcessorBase:

Static Public Member Functions
static void	initialise1 (const BootstrapStruct_t &Info) INITIALISATION_ONLY
	first stage in the initialisation of the processor-specific interface
static void	initialise2 (const BootstrapStruct_t &Info) INITIALISATION_ONLY
	second/last stage in the initialisation of the processor-specific interface
static void	initialisationDone ()
static void	deinitialise ()
static size_t	isInitialised ()
static uintptr_t	getBasePointer ()
static uintptr_t	getStackPointer ()
static uintptr_t	getInstructionPointer ()
static void	switchAddressSpace (VirtualAddressSpace &AddressSpace)
static bool	saveState (SchedulerState &state)
static void	restoreState (SchedulerState &state, volatile uintptr_t *pLock=0) NORETURN
static void	restoreState (SyscallState &state, volatile uintptr_t *pLock=0) NORETURN
static void	contextSwitch (InterruptState *state) NORETURN
static void	switchState (bool bInterrupts, SchedulerState &a, SchedulerState &b, volatile uintptr_t *pLock=0)
static void	switchState (bool bInterrupts, SchedulerState &a, SyscallState &b, volatile uintptr_t *pLock=0)
static void	saveAndJumpKernel (bool bInterrupts, SchedulerState &s, volatile uintptr_t *pLock, uintptr_t address, uintptr_t stack, uintptr_t p1=0, uintptr_t p2=0, uintptr_t p3=0, uintptr_t p4=0)
static void	saveAndJumpUser (bool bInterrupts, SchedulerState &s, volatile uintptr_t *pLock, uintptr_t address, uintptr_t stack, uintptr_t p1=0, uintptr_t p2=0, uintptr_t p3=0, uintptr_t p4=0)
static void	jumpKernel (volatile uintptr_t *pLock, uintptr_t address, uintptr_t stack, uintptr_t p1=0, uintptr_t p2=0, uintptr_t p3=0, uintptr_t p4=0) NORETURN
static void	jumpUser (volatile uintptr_t *pLock, uintptr_t address, uintptr_t stack, uintptr_t p1=0, uintptr_t p2=0, uintptr_t p3=0, uintptr_t p4=0) NORETURN
static void	breakpoint ()
static void	halt ()
static void	reset ()
static size_t	getDebugBreakpointCount ()
static uintptr_t	getDebugBreakpoint (size_t nBpNumber, DebugFlags::FaultType &nFaultType, size_t &nLength, bool &bEnabled)
static void	enableDebugBreakpoint (size_t nBpNumber, uintptr_t nLinearAddress, DebugFlags::FaultType nFaultType, size_t nLength)
static void	disableDebugBreakpoint (size_t nBpNumber)
static uintptr_t	getDebugStatus ()
static void	haltUntilInterrupt ()
static void	pause ()
static void	setInterrupts (bool bEnable)
static bool	getInterrupts ()
static bool	inDeviceHardIrq ()
static ExecutionContext	executionContext ()
static bool	guardDeviceHardIrqOperation (DeviceHardIrqOperation operation)
static void	setSingleStep (bool bEnable, InterruptState &state)
static void	invalidate (void *pAddress)
static MUST_USE_RESULT TlbInvalidationResult	beginTlbInvalidation (TlbInvalidationGuard &guard)
static MUST_USE_RESULT TlbInvalidationResult	invalidateAll (void *pAddress)
static MUST_USE_RESULT TlbInvalidationResult	invalidateAll (void *pAddress, TlbInvalidationGuard &guard)
static MUST_USE_RESULT TlbInvalidationResult	invalidateProcessors (void *pAddress, TlbInvalidationGuard &guard, uint64_t processors)
static bool	tlbInvalidationFailureActive ()
static bool	tlbInvalidationTerminal ()
static void	invalidateICache (uintptr_t nAddr)
static void	invalidateDCache (uintptr_t nAddr)
static void	flushDCache (uintptr_t nAddr)
static void	flushDCacheAndInvalidateICache (uintptr_t startAddr, uintptr_t endAddr)
static void	identify (HugeStaticString &str)
static ProcessorId	id ()
static size_t	index ()
static ProcessorInformation &	information ()
static ProcessorInformation *	informationAt (size_t cpu)
static size_t	getCount ()
static void	setTlsBase (uintptr_t newBase)
static uintptr_t	getUserGsBase ()
static void	setUserGsBase (uintptr_t newBase)

Static Public Attributes
static size_t	m_Initialised = 0

Static Private Member Functions
static NEVER_INLINE	__attribute__ ((cold)) bool rejectDeviceHardIrqOperation(DeviceHardIrqOperation operation)
static MUST_USE_RESULT bool	closeTlbInvalidationAdmissionForTerminalFailure (TlbInvalidationGuard &guard, TlbInvalidationResult result)
static void	endTlbInvalidation (TlbInvalidationGuard &guard)

Static Private Attributes
static ProcessorInformation::KernelGsAnchor	m_BootstrapKernelGsAnchor
static Vector< ProcessorInformation * >	m_ProcessorInformation
static ProcessorInformation	m_SafeBspProcessorInformation
static size_t	m_nProcessors = 1

Friends
class	Multiprocessor
class	TlbInvalidationGuard
class	X86GdtManager
class	X64GdtManager
class	Scheduler

Detailed Description

Interface to the processor's capabilities

Architecture-specific implementations exist, and subclasses are used to add processor-specific methods (don't use the preprocessor for that anymore).

Cast a Processor object to the architecture-specific variant if you need to access architecturally unique features.

Note

static in member function declarations denotes that these functions return/process data on the processor that is executing this code.

Definition at line 129 of file Processor.h.

Member Function Documentation

beginTlbInvalidation()

TlbInvalidationResult ProcessorBase::beginTlbInvalidation ( TlbInvalidationGuard &  guard )

static

Admit a page-table mutation before its first PTE write.

The guard may cover more than one address and must remain alive through every corresponding invalidateAll call. This operation uses bounded polling and rejects hard-IRQ, scheduler-IRQ, synthetic-IRQ, and debugger contexts before the mapping can change. The guarded region must not sleep or wait for work which itself needs new mapping admission.

Definition at line 227 of file arm64/Processor.cc.

References executionContext().

Referenced by invalidateAll().

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breakpoint()

void ProcessorBase::breakpoint ( )

static

Trigger a breakpoint

Definition at line 163 of file arm64/Processor.cc.

Referenced by _assert(), and Log::addEntry().

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closeTlbInvalidationAdmissionForTerminalFailure()

bool ProcessorBase::closeTlbInvalidationAdmissionForTerminalFailure ( TlbInvalidationGuard &  guard, TlbInvalidationResult  result  )

staticprivate

Escalate an admitted mutation to terminal failure.

Definition at line 243 of file arm64/Processor.cc.

Referenced by TlbInvalidationGuard::closeAdmissionForTerminalFailure().

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contextSwitch()

static void ProcessorBase::contextSwitch ( InterruptState *  state )

static

Restores a complete x64 interrupt frame through iretq.

The pointed-to state must remain valid and contain a fully validated return context. This is declared for future signal-return plumbing.

Referenced by X64SyscallManager::syscall().

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deinitialise()

void ProcessorBase::deinitialise ( )

static

Prepare the processor for reset by deinitialising things initialised in initialise2/initialise1.

Definition at line 45 of file arm64/Processor.cc.

disableDebugBreakpoint()

void ProcessorBase::disableDebugBreakpoint ( size_t  nBpNumber )

static

Disable a specific breakpoint

Parameters

[in]

nBpNumber

the breakpoint number [0 - (getDebugBreakpointCount() 1)]

Definition at line 204 of file arm64/Processor.cc.

Referenced by BreakpointCommand::execute().

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enableDebugBreakpoint()

void ProcessorBase::enableDebugBreakpoint ( size_t  nBpNumber, uintptr_t  nLinearAddress, DebugFlags::FaultType  nFaultType, size_t  nLength  )

static

Enable a specific breakpoint

Parameters

[in]	nBpNumber	the breakpoint number [0 - (getDebugBreakpointCount() 1)]
[in]	nLinearAddress	the linear Adress that should trigger a breakpoint exception
[in]	nFaultType	the type of access that should trigger a breakpoint exception
[in]	nLength	the size/length of the breakpoint

Definition at line 203 of file arm64/Processor.cc.

Referenced by BreakpointCommand::execute().

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endTlbInvalidation()

void ProcessorBase::endTlbInvalidation ( TlbInvalidationGuard &  guard )

staticprivate

Release an active page-table mutation admission lease.

Definition at line 238 of file arm64/Processor.cc.

Referenced by TlbInvalidationGuard::retire().

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executionContext()

ExecutionContext ProcessorBase::executionContext ( )

static

Classifies the current execution boundary without relying on a per-processor IRQ marker that could survive a Thread context switch.

Definition at line 109 of file Processor.cc.

References Thread::executionContext(), getInterrupts(), and information().

Referenced by beginTlbInvalidation(), SchedulerTimer::canRemoveHandlerInCurrentContext(), ThreadedIrqDispatcher::canShutdown(), ThreadedIrqDispatcher::prepareLine(), RequestQueue::publishAsyncRequest(), VFS::removeMountCallback(), VFS::removeProbeCallback(), PerProcessorScheduler::serviceProcessStopAtUserReturn(), Pic::unregisterHandler(), and VirtIrqManager::unregisterHandler().

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flushDCache()

void ProcessorBase::flushDCache ( uintptr_t  nAddr )

static

Flush a line in the data cache.

Parameters

[in]

nAddr

The address of a memory location to flush from the Dcache.

Definition at line 284 of file arm64/Processor.cc.

flushDCacheAndInvalidateICache()

void ProcessorBase::flushDCacheAndInvalidateICache ( uintptr_t  startAddr, uintptr_t  endAddr  )

static

Flush from the data cache and invalidate into the instruction cache. This must be used whenever code is written to memory and needs to be executed.

Parameters

startAddr	The first address to be flushed and invalidated.
endAddr	The last address to be flushed and invalidated.

Definition at line 288 of file arm64/Processor.cc.

Referenced by Elf::load().

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getBasePointer()

uintptr_t ProcessorBase::getBasePointer ( )

static

Get the base-pointer of the calling function

Returns

base-pointer of the calling function

Definition at line 129 of file arm64/Processor.cc.

Referenced by Backtrace::performBpBacktrace().

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getCount()

size_t ProcessorBase::getCount ( )

static

Get the number of CPUs currently available

Definition at line 314 of file arm64/Processor.cc.

Referenced by Spinlock::acquireContended(), CpuInfoCommand::execute(), informationAt(), Scheduler::initialise(), and PerProcessorScheduler::initialise().

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getDebugBreakpoint()

uintptr_t ProcessorBase::getDebugBreakpoint ( size_t  nBpNumber, DebugFlags::FaultType &  nFaultType, size_t &  nLength, bool &  bEnabled  )

static

Get information for a specific breakpoint

Parameters

[in]	nBpNumber	the breakpoint number [0 - (getDebugBreakpointCount() 1)]
[in,out]	nFaultType	the breakpoint type
[in,out]	nLength	the breakpoint size/length
[in,out]	bEnabled	is the breakpoint enabled?

Definition at line 195 of file arm64/Processor.cc.

Referenced by BreakpointCommand::execute().

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getDebugBreakpointCount()

size_t ProcessorBase::getDebugBreakpointCount ( )

static

Return the (total) number of breakpoints

Returns

(total) number of breakpoints

Definition at line 191 of file arm64/Processor.cc.

Referenced by BreakpointCommand::execute().

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getDebugStatus()

uintptr_t ProcessorBase::getDebugStatus ( )

static

Get the debug status

Todo:

is the debug status somehow abtractable?

Returns

the debug status

Definition at line 205 of file arm64/Processor.cc.

getInstructionPointer()

uintptr_t ProcessorBase::getInstructionPointer ( )

static

Get the instruction-pointer of the calling function

Returns

instruction-pointer of the calling function

Definition at line 141 of file arm64/Processor.cc.

Referenced by Backtrace::performBpBacktrace().

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getInterrupts()

bool ProcessorBase::getInterrupts ( )

static

Get the IRQ state

Returns

true, if interrupt requests are enabled, false otherwise

Definition at line 157 of file arm64/Processor.cc.

Referenced by Spinlock::acquire(), PerProcessorScheduler::addThread(), PerProcessorScheduler::addThread(), RequestQueue::canWaitForCompletion(), PerProcessorScheduler::checkEventState(), MemoryPressureManager::compact(), VmwareGraphics::VmwareFramebuffer::copy(), IrqHandlerRegistry::dispatchThreaded(), X64VirtualAddressSpace::doAllocateStack(), AtaDisk::doRead(), Rtc::drainRemoteAlarmDispatch(), executionContext(), PosixSubsystem::exit(), Thread::TemporarySignalMask::finish(), VmwareGraphics::getCurrentScreenMode(), VmwareGraphics::getScreenModes(), Rtc::getTickCountNano(), haltUntilInterrupt(), VmwareGraphics::VmwareFramebuffer::hwRedraw(), Rtc::initialise2(), Rtc::initialiseProcessorClock(), Thread::popState(), RequestQueue::publishAsyncRequest(), Thread::pushState(), VirtIrqManager::registerHardIsaIrqHandler(), VirtIrqManager::registerSchedulerIrqHandler(), Process::releaseVforkAddressSpace(), Log::removeCallback(), MemoryPressureManager::removeHandler(), PosixSubsystem::resolveUserPageFault(), NMFaultHandler::restoreCurrentThreadFpuState(), Thread::retainTemporarySignalWaitInterruptionOrClear(), NMFaultHandler::saveCurrentThreadFpuState(), PerProcessorScheduler::schedule(), GraphicsService::serve(), PerProcessorScheduler::serviceDeferredSubsystemException(), PerProcessorScheduler::serviceProcessStopAtUserReturn(), PerProcessorScheduler::setClockDeadline(), VmwareGraphics::setScreenMode(), VmwareGraphics::setScreenMode(), VmwareGraphics::setScreenMode(), SplitIrqHandler::shutdownSplitIrq(), HostedInterruptManager::signalShim(), ServiceManager::tryGetService(), Spinlock::unlock(), VirtIrqManager::unregisterHandler(), PageFaultHandler::unregisterHandler(), TimerHandlerRegistry::unregisterHandler(), IrqHandlerRegistry::unregisterHandler(), VirtIrqManager::unregisterSchedulerIrqHandler(), AtaDisk::writePageBuffer(), and Process::~Process().

getStackPointer()

uintptr_t ProcessorBase::getStackPointer ( )

static

Get the stack-pointer of the calling function

Returns

stack-pointer of the calling function

Definition at line 135 of file arm64/Processor.cc.

Referenced by jumpUser().

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getUserGsBase()

uintptr_t ProcessorBase::getUserGsBase ( )

static

Definition at line 224 of file x64/Processor.cc.

guardDeviceHardIrqOperation()

ALWAYS_INLINE bool ProcessorBase::guardDeviceHardIrqOperation ( DeviceHardIrqOperation  operation )

inlinestatic

Enforces the device hard-IRQ execution boundary.

Returns true outside device hard-IRQ callbacks. A violation is fatal in production; hosted smoke tests may install a hook which converts the violation into a false return so the rejecting call site can be tested.

Definition at line 585 of file Processor.h.

References inDeviceHardIrq(), and LIKELY.

Referenced by Semaphore::acquireForCompletion(), SlamAllocator::allocate(), Semaphore::release(), PerProcessorScheduler::schedule(), and WaitQueue::wakeAllIfWaiting().

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halt()

void ProcessorBase::halt ( )

static

Halt this processor

Definition at line 167 of file arm64/Processor.cc.

Referenced by IoPortManager::allocate(), IoPortManager::free(), panic(), MemoryMappedIo::read16(), MemoryMappedIo::read32(), IoPort::read64(), MemoryMappedIo::read64(), MemoryMappedIo::read8(), reset(), Debugger::start(), MemoryMappedIo::write16(), MemoryMappedIo::write32(), IoPort::write64(), MemoryMappedIo::write64(), and MemoryMappedIo::write8().

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haltUntilInterrupt()

void ProcessorBase::haltUntilInterrupt ( )

static

Wait for an IRQ to fire. Possible HALT or low-power state.

Definition at line 171 of file arm64/Processor.cc.

References getInterrupts(), and setInterrupts().

Referenced by PerProcessorScheduler::idleUntilInterrupt().

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id()

ProcessorId ProcessorBase::id ( )

static

Get the ProcessorId of this processor

Returns

the ProcessorId of this processor

Definition at line 311 of file arm64/Processor.cc.

References information().

Referenced by PerProcessorScheduler::addThread(), PerProcessorScheduler::addThread(), PerProcessorScheduler::initialise(), X64InterruptManager::interrupt(), HostedSchedulerTimer::registerHandler(), VirtSchedulerTimer::registerHandler(), HostedSchedulerTimer::removeHandler(), VirtSchedulerTimer::removeHandler(), and PosixSubsystem::threadException().

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identify()

void ProcessorBase::identify ( HugeStaticString &  str )

static

Populate 'str' with a string describing the characteristics of this processor.

Definition at line 303 of file arm64/Processor.cc.

Referenced by CpuInfoCommand::execute().

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inDeviceHardIrq()

ALWAYS_INLINE bool ProcessorBase::inDeviceHardIrq ( )

inlinestatic

True only while an explicit device hard-IRQ callback is running.

Definition at line 581 of file Processor.h.

References information().

Referenced by PosixSubsystem::exit(), guardDeviceHardIrqOperation(), NetworkStack::receive(), NetworkStack::receive(), PerProcessorScheduler::serviceProcessStopAtUserReturn(), sys_mbox_trypost(), TimerFdService::timer(), and Mailbox< T, preallocatedSize, Notifications >::tryWrite().

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index()

size_t ProcessorBase::index ( )

inlinestatic

Get this processor's dense topology index for per-CPU storage. The bootstrap processor owns slot zero before discovery; each additional processor receives its permanent slot before it enters C++.

Definition at line 36 of file x64/Processor.h.

References index().

Referenced by Spinlock::acquire(), Spinlock::acquireContended(), Scheduler::addThread(), LocksCommand::checkSchedule(), LocksCommand::checkState(), index(), Pic::initialise(), ThreadedIrqDispatcher::initialise(), PerProcessorScheduler::initialise(), Pic::initialiseThreaded(), Pic::interrupt(), LocksCommand::lockReleased(), X86CommonProcessor::readMachineSpecificRegister(), Timer::sampleCpuTime(), Rtc::sampleCpuTime(), Pic::shutdownThreaded(), Debugger::start(), and X86CommonProcessor::writeMachineSpecificRegister().

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information()

ProcessorInformation & ProcessorBase::information ( )

inlinestatic

Get the ProcessorInformation structure of this processor

Returns

the ProcessorInformation structure of this processor

Definition at line 30 of file x64/Processor.h.

References information().

Referenced by PerProcessorScheduler::abandonCurrentThreadStack(), PosixSubsystem::acquire(), Spinlock::acquire(), Spinlock::acquireContended(), Semaphore::acquireForCompletion(), BusMasterIde::add(), HostedTimer::addAlarm(), Rtc::addAlarm(), VirtTimer::addAlarm(), RequestQueue::addRequest(), PerProcessorScheduler::addThread(), PerProcessorScheduler::addThread(), Ohci::addTransferToTransaction(), Uhci::addTransferToTransaction(), SlamAllocator::allocate(), Elf::allocate(), HostedPhysicalMemoryManager::allocateRegion(), X86CommonPhysicalMemoryManager::allocateRegion(), MemoryMapManager::allows(), Cache::beginMutableLoan(), Process::beginTermination(), UnixSocketSyscalls::bind(), SchedulerTimer::canRemoveHandlerInCurrentContext(), ThreadedIrqDispatcher::canShutdown(), RequestQueue::canWaitForCompletion(), PosixSubsystem::checkAddress(), PerProcessorScheduler::checkEventState(), HostedVirtualAddressSpace::clone(), MemoryMapManager::clone(), RandomFile::command(), X64PreparedPageRemap::commit(), PerProcessorScheduler::commitCurrentThreadExit(), PerProcessorScheduler::commitUserReturnTerminalState(), MemoryMapManager::compact(), MemoryPressureManager::compact(), MemoryMappedFile::compact(), Thread::completeAffinityAtSafePoint(), MemoryMapManager::contains(), Pipe::decreaseRefCount(), LinuxAmd64Signal::AsyncEvent::deliverAtUserReturn(), LinuxAmd64Signal::AsyncEvent::deliverAtUserReturn(), X64VirtualAddressSpace::detachEmptyTables(), HostedVirtualAddressSpace::detachMapping(), Thread::discardUserStackMetadataForExec(), IrqHandlerRegistry::dispatchThreaded(), RequestQueue::drain(), Rtc::drainRemoteAlarmDispatch(), PerProcessorScheduler::eventHandlerReturned(), Cache::evict(), MappingCommand::execute(), executionContext(), PosixSubsystem::exit(), NetworkFilter::filter(), Elf::finaliseModule(), MemoryMapManager::findAttachment(), Cache::finishRetirement(), File::getPhysicalPage(), Rtc::getTickCountNano(), id(), inDeviceHardIrq(), information(), UserManager::initialise(), InputManager::initialise(), CacheManager::initialise(), ThreadedIrqDispatcher::initialise(), Scheduler::initialise(), X64GdtManager::initialise(), PerProcessorScheduler::initialise(), Rtc::initialise2(), Dm9601::initialiseDriver(), X64GdtManager::initialiseProcessor(), Rtc::initialiseProcessorClock(), DynamicLinker::initPlt(), HostedInterruptManager::interrupt(), X64InterruptManager::interrupt(), NMFaultHandler::interrupt(), PageFaultHandler::interrupt(), X64VirtualAddressSpace::invalidateMapping(), IrqHandlerRegistry::invalidateThreadedLine(), PosixSubsystem::invoke(), ThreadedIrqDispatcher::isCurrentWorker(), Thread::joinInternal(), jumpUser(), Process::kill(), PosixSubsystem::kill(), PosixSubsystem::loadElf(), Elf::loadModule(), ConsoleManager::lockConsole(), User::login(), Cache::lookupStable(), InputManager::mainThread(), Cache::map(), VFS::mount(), Ne2k::Ne2k(), Backtrace::performBpBacktrace(), PosixSubsystem::prepareExecutable(), Process::prepareThreadExit(), File::publishEvent(), PosixSubsystem::queueSignalDelivery(), Process::quiesceTermination(), Process::releaseVforkAddressSpace(), Pipe::releaseVfsReference(), AnonymousMemoryMap::remove(), MemoryMappedFile::remove(), MemoryMapManager::removeAndRelease(), MemoryMapManager::removeAttachment(), Log::removeCallback(), NetworkFilter::removeCallback(), MemoryPressureManager::removeHandler(), VFS::removeMountCallback(), VFS::removeProbeCallback(), VirtualTerminalManager::reportPermission(), PerProcessorScheduler::requestCurrentThreadExitToIdle(), Scheduler::requestLoadAverageSample(), DynamicLinker::resolvePlt(), PosixSubsystem::resolveUserPageFault(), NMFaultHandler::restoreCurrentThreadFpuState(), DeviceHardIrqContext::restoreDepth(), restoreState(), Cache::retireWriteback(), X64InterruptManager::returnFromInterrupt(), pocketknife::runConcurrentlyAttached(), Rtc::sampleCpuTime(), Scheduler::sampleLoadAverage(), NMFaultHandler::saveCurrentThreadFpuState(), PerProcessorScheduler::schedule(), PosixSubsystem::sendSignal(), SignalEvent::serialize(), PerProcessorScheduler::serviceDeferredSubsystemException(), PerProcessorScheduler::serviceIrqWorkDoorbell(), PerProcessorScheduler::servicePendingScheduling(), PerProcessorScheduler::serviceProcessStopAtUserReturn(), PerProcessorScheduler::serviceUserReturnWork(), PerProcessorScheduler::serviceUserReturnWork(), PerProcessorScheduler::setClockDeadline(), Thread::setKernelStack(), AnonymousMemoryMap::setPermissions(), MemoryMappedFile::setPermissions(), Process::setTimeAccountingReportInterest(), Thread::setTlsBase(), ThreadedIrqDispatcher::shutdown(), SplitIrqHandler::shutdownSplitIrq(), HostedInterruptManager::signalShim(), Debugger::start(), Process::suspendInternal(), switchAddressSpace(), Cache::syncAll(), sys_thread_is_current(), HostedSyscallManager::syscall(), X64SyscallManager::syscall(), Thread::Thread(), Thread::Thread(), Thread::threadExited(), PerProcessorScheduler::timer(), DLTrapHandler::trap(), MemoryMappedFile::trap(), ConsoleManager::unlockConsole(), MemoryMapManager::unmap(), MemoryMapManager::unmapAllUnlocked(), PageFaultHandler::unregisterHandler(), TimerHandlerRegistry::unregisterHandler(), IrqHandlerRegistry::unregisterHandler(), ConditionVariable::wait(), Event::waitForDeliveries(), Process::waitUntilTerminationReapable(), Process::waitUntilTerminationReapableForTerminalCoordinator(), RequestQueue::work(), Cache::PreparedDiscard::writeback(), Cache::writebackPage(), Scheduler::yield(), NetworkFilter::~NetworkFilter(), PosixSubsystem::~PosixSubsystem(), and Process::~Process().

informationAt()

ProcessorInformation * ProcessorBase::informationAt ( size_t  cpu )

static

Resolves a discovered logical slot, including before BSP identity is live.

Definition at line 39 of file Processor.cc.

References Vector< T >::count(), getCount(), m_ProcessorInformation, and m_SafeBspProcessorInformation.

Referenced by PerProcessorScheduler::initialise(), and PerProcessorScheduler::setClockDeadline().

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initialisationDone()

void ProcessorBase::initialisationDone ( )

static

End of the kernel core initialisation reached, the initialisation functions and data may now get unmapped/freed.

Definition at line 41 of file arm64/Processor.cc.

initialise1()

void ProcessorBase::initialise1 ( const BootstrapStruct_t &  Info )

static

first stage in the initialisation of the processor-specific interface

Initialises the processor specific interface. After this function call the whole processor-specific interface is initialised. Note though, that only the bootstrap processor is started. Multiprocessor/-core facilities are available after initialiseProcessor2().

Note

This function should only be called once and by main()

Parameters

[in]

Info

reference to the multiboot information structure

todo move to a better place

Definition at line 28 of file arm64/Processor.cc.

References PageFaultHandler::initialise(), PageFaultHandler::instance(), m_Initialised, and m_SafeBspProcessorInformation.

initialise2()

void ProcessorBase::initialise2 ( const BootstrapStruct_t &  Info )

static

second/last stage in the initialisation of the processor-specific interface

Initialises the Multiprocessor/-core functionality of the processor-specific interface. This function may only be called after initialiseProcessor1 and after the whole machine specific interface has been initialised.

Note

This function should only be called once and by main()

Definition at line 36 of file arm64/Processor.cc.

References m_Initialised.

invalidate()

void ProcessorBase::invalidate ( void *  pAddress )

static

Invalidate the TLB entry containing a specific virtual address

Parameters

[in]

pAddress

the specific virtual address

Note

This affects only the executing processor.

Definition at line 216 of file arm64/Processor.cc.

Referenced by Arm64VirtualAddressSpace::detachMapping(), Armv7VirtualAddressSpace::detachMapping(), invalidateAll(), invalidateProcessors(), Arm64VirtualAddressSpace::map(), Armv7VirtualAddressSpace::map(), Arm64VirtualAddressSpace::revertToKernelAddressSpace(), Armv7VirtualAddressSpace::revertToKernelAddressSpace(), Arm64VirtualAddressSpace::trySetFlags(), and Armv7VirtualAddressSpace::trySetFlags().

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invalidateAll() [1/2]

TlbInvalidationResult ProcessorBase::invalidateAll ( void *  pAddress )

static

Invalidate one virtual address on every online processor and do not return until each processor has acknowledged the request.

The caller must keep the online-processor set, page-table mutation, and its page-table storage stable until this returns Success. The implementation is allocation-free and uses bounded polling, so it is valid in ordinary thread and atomic thread context. Explicit device, scheduler, synthetic-IRQ, and debugger contexts are rejected: none may wait for another processor's progress. On any failure, the caller must not reclaim or reuse the old mapping's backing storage. Convenience invalidation for callers which have not changed a PTE. Page-table writers must acquire a guard before their mutation and use the overload below, so processor retirement cannot overtake publication.

Definition at line 259 of file arm64/Processor.cc.

References beginTlbInvalidation(), and invalidateAll().

Referenced by invalidateAll().

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invalidateAll() [2/2]

TlbInvalidationResult ProcessorBase::invalidateAll ( void *  pAddress, TlbInvalidationGuard &  guard  )

static

Invalidate under an admission lease acquired before the PTE mutation.

Definition at line 265 of file arm64/Processor.cc.

References invalidate().

invalidateDCache()

void ProcessorBase::invalidateDCache ( uintptr_t  nAddr )

static

Invalidate a line in the data cache.

Parameters

[in]

nAddr

The address of a memory location to invalidate from the Dcache.

Definition at line 280 of file arm64/Processor.cc.

invalidateICache()

void ProcessorBase::invalidateICache ( uintptr_t  nAddr )

static

Invalidate a line in the instruction cache.

Parameters

[in]

nAddr

The address of a memory location to invalidate from the Icache.

Definition at line 276 of file arm64/Processor.cc.

invalidateProcessors()

TlbInvalidationResult ProcessorBase::invalidateProcessors ( void *  pAddress, TlbInvalidationGuard &  guard, uint64_t  processors  )

static

Invalidate locally and on the selected dense processor slots under a lease.

Definition at line 297 of file x86_common/Processor.cc.

References invalidate().

isInitialised()

size_t ProcessorBase::isInitialised ( )

static

Is the processor-specific interface initialised?

Returns

0, if nothing has been initialised, 1, if initialise1() has been executed successfully, 2, if initialise2() has been executed successfully

Definition at line 105 of file Processor.cc.

References m_Initialised.

Referenced by IoPortManager::allocate(), and IoPortManager::free().

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jumpKernel()

void ProcessorBase::jumpKernel ( volatile uintptr_t *  pLock, uintptr_t  address, uintptr_t  stack, uintptr_t  p1 = 0, uintptr_t  p2 = 0, uintptr_t  p3 = 0, uintptr_t  p4 = 0  )

static

Jumps to an address, in kernel mode, and sets up a calling frame with the given parameters.

Parameters

pLock	Optional lock to release.
address	Address to jump to.
stack	Stack to use (set to 0 for current stack).
param1	First parameter.
param2	Second parameter.
param3	Third parameter.
param4	Fourth parameter.

Definition at line 115 of file arm64/Processor.cc.

Referenced by PerProcessorScheduler::addThread(), and saveAndJumpKernel().

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jumpUser()

void ProcessorBase::jumpUser ( volatile uintptr_t *  pLock, uintptr_t  address, uintptr_t  stack, uintptr_t  p1 = 0, uintptr_t  p2 = 0, uintptr_t  p3 = 0, uintptr_t  p4 = 0  )

static

Jumps to an address, in user mode, and sets up a calling frame with the given parameters.

Parameters

pLock	Optional lock to release.
address	Address to jump to.
stack	Stack to use (set to 0 for current stack).
param1	First parameter.
param2	Second parameter.
param3	Third parameter.
param4	Fourth parameter.

Definition at line 120 of file arm64/Processor.cc.

References getStackPointer(), and information().

Referenced by PerProcessorScheduler::addThread(), PerProcessorScheduler::checkEventState(), saveAndJumpUser(), and HostedSyscallManager::syscall().

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pause()

void ProcessorBase::pause ( )

static

Pause CPU during a tight polling loop.

Definition at line 180 of file arm64/Processor.cc.

Referenced by Spinlock::acquireContended(), X86CommonPhysicalMemoryManager::PageStack::allocate(), LocksCommand::checkState(), AtaDisk::doRead(), Rtc::drainRemoteAlarmDispatch(), Rtc::initialise2(), panic(), PciAtaController::PciAtaController(), DebuggerIO::readCli(), Ne2k::send(), Debugger::start(), TimerHandlerRegistry::unregisterHandler(), Rtc::waitForUpdateCompletion(), and AtaDisk::writePageBuffer().

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reset()

void ProcessorBase::reset ( )

static

Reset this processor

Definition at line 184 of file arm64/Processor.cc.

References Machine::finalShutdown(), and halt().

Referenced by Machine::finalShutdown(), Pc::finalShutdown(), and HostedInterruptManager::interrupt().

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restoreState() [1/2]

void ProcessorBase::restoreState ( SchedulerState &  state, volatile uintptr_t *  pLock = 0  )

static

Restore a previous scheduler state.

Parameters

[in]	state	The state to restore.
[out]	pLock	Optional lock to release.

Definition at line 69 of file arm64/Processor.cc.

Referenced by PerProcessorScheduler::addThread(), PerProcessorScheduler::eventHandlerReturned(), switchState(), switchState(), and X64SyscallManager::syscall().

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restoreState() [2/2]

void ProcessorBase::restoreState ( SyscallState &  state, volatile uintptr_t *  pLock = 0  )

static

Restore a previous syscall state.

Parameters

[out]	pLock	Optional lock to release (for none, set as 0)
[in]	state	Syscall state to restore.

Definition at line 73 of file arm64/Processor.cc.

References information().

saveAndJumpKernel()

void ProcessorBase::saveAndJumpKernel ( bool  bInterrupts, SchedulerState &  s, volatile uintptr_t *  pLock, uintptr_t  address, uintptr_t  stack, uintptr_t  p1 = 0, uintptr_t  p2 = 0, uintptr_t  p3 = 0, uintptr_t  p4 = 0  )

static

Jumps to an address, in kernel mode, and sets up a calling frame with the given parameters. Saves the current state before doing so.

Parameters

bInterrupts	Interrupt state to restore in saved context.
pLock	Optional lock to release.
address	Address to jump to.
stack	Stack to use (set to 0 for current stack).
param1	First parameter.
param2	Second parameter.
param3	Third parameter.
param4	Fourth parameter.

Definition at line 95 of file arm64/Processor.cc.

References jumpKernel(), saveState(), and setInterrupts().

Referenced by PerProcessorScheduler::addThread().

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saveAndJumpUser()

void ProcessorBase::saveAndJumpUser ( bool  bInterrupts, SchedulerState &  s, volatile uintptr_t *  pLock, uintptr_t  address, uintptr_t  stack, uintptr_t  p1 = 0, uintptr_t  p2 = 0, uintptr_t  p3 = 0, uintptr_t  p4 = 0  )

static

Jumps to an address, in user mode, and sets up a calling frame with the given parameters. Saves the current state before doing so.

Parameters

bInterrupts	Interrupt state to restore in saved context.
pLock	Optional lock to release.
address	Address to jump to.
stack	Stack to use (set to 0 for current stack).
param1	First parameter.
param2	Second parameter.
param3	Third parameter.
param4	Fourth parameter.

Definition at line 105 of file arm64/Processor.cc.

References jumpUser(), saveState(), and setInterrupts().

Referenced by PerProcessorScheduler::addThread(), and PerProcessorScheduler::checkEventState().

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saveState()

bool ProcessorBase::saveState ( SchedulerState &  state )

static

Save the current processor state.

Parameters

[out]

state

SchedulerState to save into.

Returns

False if the save saved the state. True if a restoreState occurs.

Definition at line 65 of file arm64/Processor.cc.

Referenced by PerProcessorScheduler::addThread(), PerProcessorScheduler::addThread(), PerProcessorScheduler::checkEventState(), saveAndJumpKernel(), saveAndJumpUser(), switchState(), and switchState().

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setInterrupts()

void ProcessorBase::setInterrupts ( bool  bEnable )

static

Enable/Disable IRQs

Parameters

[in]

bEnable

true to enable IRSs, false otherwise

Definition at line 149 of file arm64/Processor.cc.

Referenced by Spinlock::acquire(), PerProcessorScheduler::addThread(), PerProcessorScheduler::addThread(), PerProcessorScheduler::checkEventState(), Thread::completeAffinityAtSafePoint(), IrqHandlerRegistry::dispatchThreaded(), AtaDisk::doRead(), PerProcessorScheduler::eventHandlerReturned(), Thread::TemporarySignalMask::finish(), Rtc::getTickCountNano(), haltUntilInterrupt(), PerProcessorScheduler::idleUntilInterrupt(), Rtc::initialise2(), Rtc::initialiseProcessorClock(), PosixSubsystem::invoke(), PosixSubsystem::kill(), panic(), Thread::popState(), Thread::pushState(), VirtIrqManager::registerHardIsaIrqHandler(), VirtIrqManager::registerSchedulerIrqHandler(), Spinlock::release(), Process::releaseVforkAddressSpace(), NMFaultHandler::restoreCurrentThreadFpuState(), Thread::retainTemporarySignalWaitInterruptionOrClear(), X64InterruptManager::returnFromInterrupt(), saveAndJumpKernel(), saveAndJumpUser(), NMFaultHandler::saveCurrentThreadFpuState(), PerProcessorScheduler::schedule(), PerProcessorScheduler::setClockDeadline(), HostedInterruptManager::signalShim(), switchState(), switchState(), PedigreeCSyscallManager::syscall(), HostedSyscallManager::syscall(), X64SyscallManager::syscall(), VirtIrqManager::unregisterHandler(), VirtIrqManager::unregisterSchedulerIrqHandler(), AtaDisk::writePageBuffer(), and Process::~Process().

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setSingleStep()

void ProcessorBase::setSingleStep ( bool  bEnable, InterruptState &  state  )

static

Enable/Disable single-stepping

Parameters

[in]	bEnable	true to enable single-stepping, false otherwise
[in]	state	the interrupt-state

Definition at line 208 of file arm64/Processor.cc.

Referenced by StepCommand::execute(), TraceCommand::execute(), and Debugger::interrupt().

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setTlsBase()

void ProcessorBase::setTlsBase ( uintptr_t  newBase )

static

Set a new TLS area base address.

Definition at line 145 of file arm64/Processor.cc.

Referenced by PerProcessorScheduler::addThread(), PerProcessorScheduler::addThread(), PerProcessorScheduler::initialise(), Thread::resetTlsBase(), and Thread::setTlsBase().

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setUserGsBase()

void ProcessorBase::setUserGsBase ( uintptr_t  newBase )

static

Definition at line 230 of file x64/Processor.cc.

switchAddressSpace()

void ProcessorBase::switchAddressSpace ( VirtualAddressSpace &  AddressSpace )

static

Switch to a different virtual address space

Parameters

[in]

AddressSpace

the new address space

Definition at line 49 of file arm64/Processor.cc.

References VirtualAddressSpace::getKernelAddressSpace(), and information().

Referenced by PerProcessorScheduler::addThread(), PerProcessorScheduler::addThread(), MemoryMapManager::compact(), Process::releaseVforkAddressSpace(), PosixSubsystem::~PosixSubsystem(), and Process::~Process().

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switchState() [1/2]

void ProcessorBase::switchState ( bool  bInterrupts, SchedulerState &  a, SchedulerState &  b, volatile uintptr_t *  pLock = 0  )

static

Switch between two states, safely.

Definition at line 77 of file arm64/Processor.cc.

References restoreState(), saveState(), and setInterrupts().

Referenced by PerProcessorScheduler::addThread().

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switchState() [2/2]

void ProcessorBase::switchState ( bool  bInterrupts, SchedulerState &  a, SyscallState &  b, volatile uintptr_t *  pLock = 0  )

static

Switch between two states, safely.

Definition at line 86 of file arm64/Processor.cc.

References restoreState(), saveState(), and setInterrupts().

tlbInvalidationFailureActive()

bool ProcessorBase::tlbInvalidationFailureActive ( )

static

True after a failed invalidation has permanently closed admission.

Definition at line 252 of file arm64/Processor.cc.

tlbInvalidationTerminal()

bool ProcessorBase::tlbInvalidationTerminal ( )

static

True while page-table mutation admission is permanently closed.

Definition at line 255 of file arm64/Processor.cc.

Referenced by panic().

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Friends And Related Symbol Documentation

Multiprocessor

friend class Multiprocessor

friend

Definition at line 130 of file Processor.h.

Scheduler

friend class Scheduler

friend

Definition at line 134 of file Processor.h.

TlbInvalidationGuard

friend class TlbInvalidationGuard

friend

Definition at line 131 of file Processor.h.

X64GdtManager

friend class X64GdtManager

friend

Definition at line 133 of file Processor.h.

X86GdtManager

friend class X86GdtManager

friend

Definition at line 132 of file Processor.h.

Member Data Documentation

m_BootstrapKernelGsAnchor

constinit ProcessorInformation::KernelGsAnchor ProcessorBase::m_BootstrapKernelGsAnchor

staticprivate

Initial value:

= {
    0, 0, &m_SafeBspProcessorInformation, 0, nullptr}

Definition at line 42 of file Processor.h.

m_Initialised

size_t ProcessorBase::m_Initialised = 0

static

How far has the processor-specific interface been initialised

Definition at line 483 of file Processor.h.

Referenced by _assert(), SlamAllocator::allocate(), Arm64PhysicalMemoryManager::allocatePage(), Armv7PhysicalMemoryManager::allocatePage(), HostedPhysicalMemoryManager::allocatePage(), X86CommonPhysicalMemoryManager::allocatePage(), MemoryPressureProcessKiller::compact(), MemoryPressureManager::compact(), Arm64PhysicalMemoryManager::freePageUnlocked(), Armv7PhysicalMemoryManager::freePageUnlocked(), HostedPhysicalMemoryManager::freePageUnlocked(), X86CommonPhysicalMemoryManager::freePageUnlocked(), initialise1(), initialise2(), PageFaultHandler::interrupt(), isInitialised(), X64VirtualAddressSpace::mapPageStructures(), and X64VirtualAddressSpace::mapUnlocked().

m_nProcessors

size_t ProcessorBase::m_nProcessors = 1

staticprivate

Definition at line 518 of file Processor.h.

m_ProcessorInformation

Vector< ProcessorInformation * > ProcessorBase::m_ProcessorInformation

staticprivate

If we have only one processor, we define the ProcessorInformation class here otherwise we use an array of ProcessorInformation structures

Definition at line 512 of file Processor.h.

Referenced by informationAt(), Scheduler::initialise(), and X64GdtManager::initialise().

m_SafeBspProcessorInformation

ProcessorInformation ProcessorBase::m_SafeBspProcessorInformation

staticprivate

Used before multiprocessor stuff is turned on as a "safe" info structure. For stuff like early heap setup and all that.

Definition at line 516 of file Processor.h.

Referenced by informationAt(), and initialise1().

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The documentation for this class was generated from the following files:

• Processor.h
• x64/Processor.h
• arm64/Processor.cc
• armv7/Processor.cc
• hosted/Processor.cc
• Processor.cc
• x64/Processor.cc
• x86_common/Processor.cc