kernel/machine/mach_virt/IrqManager.h

/*
 * Copyright (c) 2026, Pedigree Developers
 *
 * Permission to use, copy, modify, and distribute this software for any
 * purpose with or without fee is hereby granted.
 */
 
#ifndef KERNEL_MACHINE_VIRT_IRQMANAGER_H
#define KERNEL_MACHINE_VIRT_IRQMANAGER_H
 
#include "pedigree/kernel/Spinlock.h"
#include "pedigree/kernel/machine/IrqHandlerRegistry.h"
#include "pedigree/kernel/machine/IrqManager.h"
#include "pedigree/kernel/machine/ThreadedIrqDispatcher.h"
#include "pedigree/kernel/processor/state_forward.h"
 
#include "GicIts.h"
 
class VirtIrqManager : public IrqManager {
 public:
  static VirtIrqManager& instance();
 
  bool initialise();
  bool initialiseThreaded();
  bool shutdownThreaded();
  void handle(InterruptState& state);
 
  irq_id_t registerIsaIrqHandler(uint8_t irq, IrqHandler* handler,
                                 const IrqPolicy& policy) override;
  irq_id_t registerPciIrqHandler(IrqHandler* handler, Device* device,
                                 const IrqPolicy& policy) override;
  irq_id_t registerPciMessageIrqHandler(IrqHandler* handler, Device* device,
                                        const IrqPolicy& intxFallbackPolicy) override;
  bool registerPciMsixIrqHandlers(Device* device, IrqHandler* const* handlers, size_t count,
                                  irq_id_t* ids, bool& fallbackSafe,
                                  const size_t* processors = nullptr) override;
  irq_id_t registerHardIsaIrqHandler(uint8_t irq, HardIrqHandler* handler,
                                     const IrqPolicy& policy) override;
  irq_id_t registerHardPciIrqHandler(HardIrqHandler* handler, Device* device,
                                     const IrqPolicy& policy) override;
  irq_id_t registerHardPciMessageIrqHandler(HardIrqHandler* handler, Device* device,
                                            const IrqPolicy& intxFallbackPolicy) override;
  irq_id_t registerSchedulerIrqHandler(uint8_t irq, SchedulerIrqHandler* handler,
                                       const IrqPolicy& policy) override;
  bool unregisterSchedulerIrqHandler(irq_id_t id, SchedulerIrqHandler* handler) override;
  bool unregisterHandler(irq_id_t id, IrqHandlerBase* handler) override;
  void enable(uint8_t irq, bool enabled) override;
 
 private:
  static constexpr size_t MaxIrqs = 256;
  static constexpr size_t MaxPciLines = 16;
 
  struct PciLine {
    uint32_t irq;
    size_t cookie;
    size_t handlers;
    bool inFlight;
    bool removing;
    bool quarantined;
    bool hard;
    bool reserved;
    bool message;
    bool spuriousSafe;
    bool msix;
    bool lpi;
    uint8_t msixIndex;
    uint32_t deviceId;
    Device* device;
  };
 
  VirtIrqManager();
  static void dispatchPciLine(void* context, uint8_t line, size_t cookie);
  irq_id_t registerPciHandler(IrqHandlerBase* handler, Device* device, const IrqPolicy& policy,
                              bool hard);
  irq_id_t registerPciMessageHandler(IrqHandlerBase* handler, Device* device, bool hard,
                                     bool& allowFallback);
  size_t pciLine(uint32_t irq) const;
  uint8_t pciRegistryLine(size_t slot) const;
  uint32_t acknowledge();
  void complete(uint32_t acknowledgeValue);
  bool setEnabled(uint32_t irq, bool enabled);
  void setLevel(uint32_t irq);
  void setEdge(uint32_t irq);
  bool initialiseMsi();
  bool initialiseV2();
  bool initialiseV3();
 
  HardIrqHandler* m_Hard[MaxIrqs];
  SchedulerIrqHandler* m_Scheduler[MaxIrqs];
  IrqHandlerRegistry m_PciHandlers;
  ThreadedIrqDispatcher m_PciDispatcher;
  Spinlock m_PciLock;
  PciLine m_PciLines[MaxPciLines];
  GicIts m_Its;
  uint32_t m_Version;
  uint32_t m_IrqCount;
  uint32_t m_MsiFirst;
  uint32_t m_MsiLast;
  uint64_t m_MsiAddress;
  bool m_MsiReady;
  bool m_Initialised;
 
  static VirtIrqManager m_Instance;
};
 
extern "C" void virtHandleIrq(InterruptState& state);
 
#endif