x86_common/ProcessorInformation.h

/*
 * Copyright (c) 2008-2014, Pedigree Developers
 *
 * Please see the CONTRIB file in the root of the source tree for a full
 * list of contributors.
 *
 * Permission to use, copy, modify, and distribute this software for any
 * purpose with or without fee is hereby granted, provided that the above
 * copyright notice and this permission notice appear in all copies.
 *
 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 */
 
#ifndef KERNEL_PROCESSOR_X86_COMMON_PROCESSORINFORMATION_H
#define KERNEL_PROCESSOR_X86_COMMON_PROCESSORINFORMATION_H
#include <config.h>
 
#define _PROCESSOR_INFORMATION_ONLY_WANT_PROCESSORID
 
#include "pedigree/kernel/compiler.h"
#include "pedigree/kernel/process/RcuReadState.h"
#include "pedigree/kernel/processor/ProcessorInformation.h"
#include "pedigree/kernel/processor/types.h"
 
class VirtualAddressSpace;
class PerProcessorScheduler;
class Thread;
class DeviceHardIrqContext;
class SuspendDeviceHardIrqContext;
 
class EXPORTED_PUBLIC X86CommonProcessorInformation {
  friend class ProcessorBase;
  friend class Multiprocessor;
 
 public:
  typedef struct X64TaskStateSegment TaskStateSegment;
 
#if X64
  struct KernelGsAnchor {
    uintptr_t kernelStack;
    uintptr_t userStack;
    X86CommonProcessorInformation* information;
    size_t processorIndex;
    void* pendingUserEntry;
#if PEDIGREE_LATENCY_ACCOUNTING
    size_t latencyNmiDepth = 0;
#endif
  };
  static_assert(__builtin_offsetof(KernelGsAnchor, kernelStack) == 0);
  static_assert(__builtin_offsetof(KernelGsAnchor, userStack) == 8);
  static_assert(__builtin_offsetof(KernelGsAnchor, information) == 16);
  static_assert(__builtin_offsetof(KernelGsAnchor, processorIndex) == 24);
  static_assert(__builtin_offsetof(KernelGsAnchor, pendingUserEntry) == 32);
#if PEDIGREE_LATENCY_ACCOUNTING
  static_assert(__builtin_offsetof(KernelGsAnchor, latencyNmiDepth) == 40);
  static_assert(sizeof(KernelGsAnchor) == 48);
#else
  static_assert(sizeof(KernelGsAnchor) == 40);
#endif
 
  KernelGsAnchor* kernelGsAnchor() {
    return &m_KernelGsAnchor;
  }
  void activateKernelGsAnchor(size_t processorIndex);
#endif
 
  VirtualAddressSpace& getVirtualAddressSpace() const;
  void setVirtualAddressSpace(VirtualAddressSpace& virtualAddressSpace);
 
  void setTssSelector(uint16_t TssSelector);
  void setTss(void* Tss);
  uint16_t getTssSelector() const;
  void* getTss() const;
  uint16_t getTlsSelector();
  void setTlsSelector(uint16_t tls);
 
  uintptr_t getKernelStack() const;
  void setKernelStack(uintptr_t stack);
  Thread* getCurrentThread() const {
    return m_pCurrentThread;
  }
  void setCurrentThread(Thread* pThread);
 
  PerProcessorScheduler& getScheduler();
 
  RcuReadState& rcuState() {
    return m_RcuState;
  }
 
  ProcessorId processorId() const {
    return m_ProcessorId;
  }
  uint8_t localApicId() const {
    return m_LocalApicId;
  }
 
  void initialiseTscClockAnchor(uint64_t tsc, uint64_t nanoseconds);
 
  ALWAYS_INLINE bool getTscClockAnchor(uint64_t& tsc, uint64_t& nanoseconds) const {
    if (!__atomic_load_n(&m_TscClockAnchorInitialised, __ATOMIC_ACQUIRE)) {
      return false;
    }
 
    tsc = __atomic_load_n(&m_TscClockAnchor, __ATOMIC_RELAXED);
    nanoseconds = __atomic_load_n(&m_TscClockAnchorNanoseconds, __ATOMIC_RELAXED);
    return true;
  }
 
 protected:
  X86CommonProcessorInformation(ProcessorId processorId, uint8_t apicId = 0);
  virtual ~X86CommonProcessorInformation();
 
  void setIds(ProcessorId processorId, uint8_t apicId = 0);
 
 private:
  friend class DeviceHardIrqContext;
  friend class SuspendDeviceHardIrqContext;
 
  X86CommonProcessorInformation();
  X86CommonProcessorInformation(const X86CommonProcessorInformation&);
  X86CommonProcessorInformation& operator=(const X86CommonProcessorInformation&);
 
  ProcessorId m_ProcessorId;
  uint16_t m_TssSelector;
  TaskStateSegment* m_Tss;
  VirtualAddressSpace* m_VirtualAddressSpace;
  uint8_t m_LocalApicId;
  Thread* m_pCurrentThread;
  PerProcessorScheduler* m_Scheduler;
  uint16_t m_TlsSelector;
  size_t m_DeviceHardIrqDepth;
  uint64_t m_TscClockAnchor;
  uint64_t m_TscClockAnchorNanoseconds;
  bool m_TscClockAnchorInitialised;
  RcuReadState m_RcuState;
 
#if X64
  KernelGsAnchor m_KernelGsAnchor{0, 0, this, 0, nullptr};
#endif
};
 
#endif