The Pedigree Project 0.1
NvmeController.h
1/* Copyright (c) 2026, Pedigree Developers. SPDX-License-Identifier: ISC */
2#ifndef NVME_CONTROLLER_H
3#define NVME_CONTROLLER_H
4#include "pedigree/kernel/machine/IrqHandler.h"
5#include "pedigree/kernel/process/OperationBarrier.h"
6
7#include "NvmeQueue.h"
8#include "modules/drivers/common/scsi/ScsiController.h"
9class NvmeDisk;
10class EXPORTED_PUBLIC NvmeController final : public ScsiController, public IrqHandler {
11 public:
12 explicit NvmeController(Device* pci);
13 ~NvmeController() override;
14 bool initialiseController();
15 void shutdown();
16 bool identify(uint32_t nsid, uint8_t kind, void* buffer, bool interruptProbe = false);
17 bool primaryControllerCapabilities(Nvme::PrimaryControllerCapabilities& capabilities);
18 bool secondaryControllers(uint16_t firstControllerId, Nvme::SecondaryControllerList& controllers);
19 // The caller must quiesce a secondary controller before taking it offline.
20 // Primary allocation changes require a controller-level reset other than CC.EN.
21 bool virtualizationManagement(uint16_t controllerId, Nvme::VirtualResource resource,
22 Nvme::VirtualizationAction action, uint16_t count,
23 uint16_t* modified = nullptr);
24 // The caller must quiesce the target controller's namespace I/O and retire
25 // its published disk/cache before changing attachment. No disk is rescanned here.
26 bool setNamespaceAttachment(uint32_t nsid, uint16_t controllerId, bool attached);
27 uint16_t controllerId() const {
28 return m_ControllerId;
29 }
30 bool supportsVirtualizationManagement() const {
31 return m_VirtualizationSupported;
32 }
33 bool readWrite(uint32_t nsid, uint64_t lba, uint32_t blocks, void* buffer, size_t bytes,
34 bool writing);
35 bool flush(uint32_t nsid);
36 size_t interruptCompletions() const;
37 size_t maximumOutstanding() const;
38 size_t ioQueueCount() const {
39 return m_IoCount;
40 }
41 size_t ioQueueInterruptCompletions(size_t queue) const;
42 Device* pciDevice() const {
43 return m_Pci;
44 }
45 size_t maxTransfer() const {
46 return m_MaxTransfer;
47 }
48 const char* model() const {
49 return m_Model;
50 }
51 bool supportsConcurrentReads() const override {
52 return true;
53 }
54 IrqDisposition irq(irq_id_t number) override;
55 bool acceptsSpuriousInterrupts() const override {
56 return true;
57 }
58 bool sendCommand(size_t, uintptr_t, uint8_t, uintptr_t, uint16_t, bool) override {
59 return false;
60 }
61
62 protected:
63 size_t getNumUnits() override {
64 return getNumChildren();
65 }
66
67 private:
68 friend class NvmeDisk;
69 bool waitReady(bool ready);
70 bool disable();
71 void failController();
72 bool command(NvmeQueue& queue, Nvme::Command command, void* buffer = nullptr, size_t bytes = 0,
73 bool writing = false, uint32_t* result = nullptr, bool interruptProbe = false,
74 bool cacheFill = false, physical_uintptr_t directWritePhysical = 0);
75 bool readWrite(uint32_t nsid, uint64_t lba, uint32_t blocks, void* buffer, size_t bytes,
76 bool writing, bool cacheFill, physical_uintptr_t directWritePhysical = 0);
77 bool createIoQueue(size_t index, uint16_t interruptVector);
78 NvmeQueue& ioQueue();
79 bool primaryControllerCapabilitiesLocked(Nvme::PrimaryControllerCapabilities& capabilities);
80 bool secondaryControllersLocked(uint16_t firstControllerId,
82 bool discoverNamespaces(uint32_t maximumId, bool& activeNamespaces);
83 NvmeDisk* findNamespace(uint32_t nsid);
84 Device* m_Pci;
85 IoBase* m_Registers;
86 NvmeQueue m_Admin;
87 NvmeQueue* m_Io[Nvme::MaxIoQueues];
88 size_t m_IoCount;
89 size_t m_IoProcessor[Nvme::MaxIoQueues];
90 OperationBarrier m_Commands;
91 Mutex m_WriteLock;
92 Mutex m_ResetLock;
93 Mutex m_VirtualizationLock;
94 mutable Mutex m_IrqLock;
95 size_t m_ReadyMilliseconds;
96 size_t m_MaxTransfer;
97 irq_id_t m_Irq;
98 irq_id_t m_IoIrq[Nvme::MaxIoQueues];
99 uint16_t m_OriginalCommand;
100 uint16_t m_ControllerId;
101 bool m_VirtualizationSupported;
102 bool m_NamespaceManagementSupported;
103 bool m_PciChanged;
104 bool m_HardwareOwned;
105 bool m_DmaInstalled;
106 bool m_DmaIsolated;
107 bool m_Interrupts;
108 bool m_BatchInitialising;
109 bool m_Failed;
110 bool m_Stopping;
111 bool m_Shutdown;
112 char m_Model[41];
113};
114#endif
size_t getNumChildren()
Definition Device.cc:143
Abstrace base class for hardware I/O capabilities.
Definition IoBase.h:32
virtual IrqDisposition irq(irq_id_t number)=0
Definition Mutex.h:56
bool supportsConcurrentReads() const override
bool acceptsSpuriousInterrupts() const override
IrqDisposition
Definition IrqHandler.h:31